Tomona Nanase / Mbed 2 deprecated DISCO-F746NG_Sweep

DISCO-F746NGのAudioOutから正弦波をスイープとして出力します。ダブルバッファリングを使って、リアルタイムにデータ生成をしています。 This program outputs sine sweep from AudioOut on DISCO-F746NG. The program uses double buffering when generates data signals.

Dependencies:   BSP_DISCO_F746NG_patch_fixed LCD_DISCO_F746NG mbed

BSP_overwrite.cpp@0:ece4ec581d2b, 2015-12-26 (annotated)

Committer:
nanase
Date:
Sat Dec 26 07:20:53 2015 +0000
Revision:
0:ece4ec581d2b
First commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
nanase 0:ece4ec581d2b 1 #include "main.h"
nanase 0:ece4ec581d2b 2
nanase 0:ece4ec581d2b 3 void BSP_AUDIO_OUT_HalfTransfer_CallBack(void)
nanase 0:ece4ec581d2b 4 {
nanase 0:ece4ec581d2b 5 fill_buffer(0, BufferSize / 2);
nanase 0:ece4ec581d2b 6 BSP_AUDIO_OUT_ChangeBuffer((uint16_t*)&sweep_buffer[0], BufferByteSize / 2);
nanase 0:ece4ec581d2b 7 }
nanase 0:ece4ec581d2b 8
nanase 0:ece4ec581d2b 9 void BSP_AUDIO_OUT_TransferComplete_CallBack(void)
nanase 0:ece4ec581d2b 10 {
nanase 0:ece4ec581d2b 11 fill_buffer(BufferSize / 2, BufferSize / 2);
nanase 0:ece4ec581d2b 12 BSP_AUDIO_OUT_ChangeBuffer((uint16_t*)&sweep_buffer[BufferSize / 2], BufferByteSize / 2);
nanase 0:ece4ec581d2b 13 }
nanase 0:ece4ec581d2b 14
nanase 0:ece4ec581d2b 15 void BSP_AUDIO_OUT_Error_CallBack(void)
nanase 0:ece4ec581d2b 16 {
nanase 0:ece4ec581d2b 17 error_trap();
nanase 0:ece4ec581d2b 18 }
nanase 0:ece4ec581d2b 19
nanase 0:ece4ec581d2b 20 DMA_HandleTypeDef hdma_sai_tx;
nanase 0:ece4ec581d2b 21
nanase 0:ece4ec581d2b 22 void AUDIO_OUT_SAIx_DMAx_IRQHandler(void)
nanase 0:ece4ec581d2b 23 {
nanase 0:ece4ec581d2b 24 HAL_DMA_IRQHandler(&hdma_sai_tx);
nanase 0:ece4ec581d2b 25 }
nanase 0:ece4ec581d2b 26
nanase 0:ece4ec581d2b 27 void BSP_AUDIO_OUT_MspInit(SAI_HandleTypeDef *hsai, void *Params)
nanase 0:ece4ec581d2b 28 {
nanase 0:ece4ec581d2b 29 //static DMA_HandleTypeDef hdma_sai_tx;
nanase 0:ece4ec581d2b 30 GPIO_InitTypeDef gpio_init_structure;
nanase 0:ece4ec581d2b 31
nanase 0:ece4ec581d2b 32 /* Enable SAI clock */
nanase 0:ece4ec581d2b 33 AUDIO_OUT_SAIx_CLK_ENABLE();
nanase 0:ece4ec581d2b 34
nanase 0:ece4ec581d2b 35 /* Enable GPIO clock */
nanase 0:ece4ec581d2b 36 AUDIO_OUT_SAIx_MCLK_ENABLE();
nanase 0:ece4ec581d2b 37 AUDIO_OUT_SAIx_SCK_SD_ENABLE();
nanase 0:ece4ec581d2b 38 AUDIO_OUT_SAIx_FS_ENABLE();
nanase 0:ece4ec581d2b 39
nanase 0:ece4ec581d2b 40 /* CODEC_SAI pins configuration: FS, SCK, MCK and SD pins ------------------*/
nanase 0:ece4ec581d2b 41 gpio_init_structure.Pin = AUDIO_OUT_SAIx_FS_PIN;
nanase 0:ece4ec581d2b 42 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
nanase 0:ece4ec581d2b 43 gpio_init_structure.Pull = GPIO_NOPULL;
nanase 0:ece4ec581d2b 44 gpio_init_structure.Speed = GPIO_SPEED_HIGH;
nanase 0:ece4ec581d2b 45 gpio_init_structure.Alternate = AUDIO_OUT_SAIx_FS_SD_MCLK_AF;
nanase 0:ece4ec581d2b 46 HAL_GPIO_Init(AUDIO_OUT_SAIx_FS_GPIO_PORT, &gpio_init_structure);
nanase 0:ece4ec581d2b 47
nanase 0:ece4ec581d2b 48 gpio_init_structure.Pin = AUDIO_OUT_SAIx_SCK_PIN;
nanase 0:ece4ec581d2b 49 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
nanase 0:ece4ec581d2b 50 gpio_init_structure.Pull = GPIO_NOPULL;
nanase 0:ece4ec581d2b 51 gpio_init_structure.Speed = GPIO_SPEED_HIGH;
nanase 0:ece4ec581d2b 52 gpio_init_structure.Alternate = AUDIO_OUT_SAIx_SCK_AF;
nanase 0:ece4ec581d2b 53 HAL_GPIO_Init(AUDIO_OUT_SAIx_SCK_SD_GPIO_PORT, &gpio_init_structure);
nanase 0:ece4ec581d2b 54
nanase 0:ece4ec581d2b 55 gpio_init_structure.Pin = AUDIO_OUT_SAIx_SD_PIN;
nanase 0:ece4ec581d2b 56 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
nanase 0:ece4ec581d2b 57 gpio_init_structure.Pull = GPIO_NOPULL;
nanase 0:ece4ec581d2b 58 gpio_init_structure.Speed = GPIO_SPEED_HIGH;
nanase 0:ece4ec581d2b 59 gpio_init_structure.Alternate = AUDIO_OUT_SAIx_FS_SD_MCLK_AF;
nanase 0:ece4ec581d2b 60 HAL_GPIO_Init(AUDIO_OUT_SAIx_SCK_SD_GPIO_PORT, &gpio_init_structure);
nanase 0:ece4ec581d2b 61
nanase 0:ece4ec581d2b 62 gpio_init_structure.Pin = AUDIO_OUT_SAIx_MCLK_PIN;
nanase 0:ece4ec581d2b 63 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
nanase 0:ece4ec581d2b 64 gpio_init_structure.Pull = GPIO_NOPULL;
nanase 0:ece4ec581d2b 65 gpio_init_structure.Speed = GPIO_SPEED_HIGH;
nanase 0:ece4ec581d2b 66 gpio_init_structure.Alternate = AUDIO_OUT_SAIx_FS_SD_MCLK_AF;
nanase 0:ece4ec581d2b 67 HAL_GPIO_Init(AUDIO_OUT_SAIx_MCLK_GPIO_PORT, &gpio_init_structure);
nanase 0:ece4ec581d2b 68
nanase 0:ece4ec581d2b 69 /* Enable the DMA clock */
nanase 0:ece4ec581d2b 70 AUDIO_OUT_SAIx_DMAx_CLK_ENABLE();
nanase 0:ece4ec581d2b 71
nanase 0:ece4ec581d2b 72 if(hsai->Instance == AUDIO_OUT_SAIx) {
nanase 0:ece4ec581d2b 73 /* Configure the hdma_saiTx handle parameters */
nanase 0:ece4ec581d2b 74 hdma_sai_tx.Init.Channel = AUDIO_OUT_SAIx_DMAx_CHANNEL;
nanase 0:ece4ec581d2b 75 hdma_sai_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
nanase 0:ece4ec581d2b 76 hdma_sai_tx.Init.PeriphInc = DMA_PINC_DISABLE;
nanase 0:ece4ec581d2b 77 hdma_sai_tx.Init.MemInc = DMA_MINC_ENABLE;
nanase 0:ece4ec581d2b 78 hdma_sai_tx.Init.PeriphDataAlignment = AUDIO_OUT_SAIx_DMAx_PERIPH_DATA_SIZE;
nanase 0:ece4ec581d2b 79 hdma_sai_tx.Init.MemDataAlignment = AUDIO_OUT_SAIx_DMAx_MEM_DATA_SIZE;
nanase 0:ece4ec581d2b 80 hdma_sai_tx.Init.Mode = DMA_CIRCULAR;
nanase 0:ece4ec581d2b 81 hdma_sai_tx.Init.Priority = DMA_PRIORITY_HIGH;
nanase 0:ece4ec581d2b 82 hdma_sai_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
nanase 0:ece4ec581d2b 83 hdma_sai_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
nanase 0:ece4ec581d2b 84 hdma_sai_tx.Init.MemBurst = DMA_MBURST_SINGLE;
nanase 0:ece4ec581d2b 85 hdma_sai_tx.Init.PeriphBurst = DMA_PBURST_SINGLE;
nanase 0:ece4ec581d2b 86
nanase 0:ece4ec581d2b 87 hdma_sai_tx.Instance = AUDIO_OUT_SAIx_DMAx_STREAM;
nanase 0:ece4ec581d2b 88
nanase 0:ece4ec581d2b 89 /* Associate the DMA handle */
nanase 0:ece4ec581d2b 90 __HAL_LINKDMA(hsai, hdmatx, hdma_sai_tx);
nanase 0:ece4ec581d2b 91
nanase 0:ece4ec581d2b 92 /* Deinitialize the Stream for new transfer */
nanase 0:ece4ec581d2b 93 HAL_DMA_DeInit(&hdma_sai_tx);
nanase 0:ece4ec581d2b 94
nanase 0:ece4ec581d2b 95 /* Configure the DMA Stream */
nanase 0:ece4ec581d2b 96 HAL_DMA_Init(&hdma_sai_tx);
nanase 0:ece4ec581d2b 97 }
nanase 0:ece4ec581d2b 98
nanase 0:ece4ec581d2b 99 /* SAI DMA IRQ Channel configuration */
nanase 0:ece4ec581d2b 100 HAL_NVIC_SetPriority(AUDIO_OUT_SAIx_DMAx_IRQ, AUDIO_OUT_IRQ_PREPRIO, 0);
nanase 0:ece4ec581d2b 101 HAL_NVIC_EnableIRQ(AUDIO_OUT_SAIx_DMAx_IRQ);
nanase 0:ece4ec581d2b 102 }