fix LPC812 PWM
Fork of mbed-dev by
targets/hal/TARGET_NXP/TARGET_LPC11UXX/pinmap.c@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 0:9b334a45a8ff
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /* mbed Microcontroller Library |
bogdanm | 0:9b334a45a8ff | 2 | * Copyright (c) 2006-2013 ARM Limited |
bogdanm | 0:9b334a45a8ff | 3 | * |
bogdanm | 0:9b334a45a8ff | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
bogdanm | 0:9b334a45a8ff | 5 | * you may not use this file except in compliance with the License. |
bogdanm | 0:9b334a45a8ff | 6 | * You may obtain a copy of the License at |
bogdanm | 0:9b334a45a8ff | 7 | * |
bogdanm | 0:9b334a45a8ff | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
bogdanm | 0:9b334a45a8ff | 9 | * |
bogdanm | 0:9b334a45a8ff | 10 | * Unless required by applicable law or agreed to in writing, software |
bogdanm | 0:9b334a45a8ff | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
bogdanm | 0:9b334a45a8ff | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
bogdanm | 0:9b334a45a8ff | 13 | * See the License for the specific language governing permissions and |
bogdanm | 0:9b334a45a8ff | 14 | * limitations under the License. |
bogdanm | 0:9b334a45a8ff | 15 | */ |
bogdanm | 0:9b334a45a8ff | 16 | #include "mbed_assert.h" |
bogdanm | 0:9b334a45a8ff | 17 | #include "pinmap.h" |
bogdanm | 0:9b334a45a8ff | 18 | #include "mbed_error.h" |
bogdanm | 0:9b334a45a8ff | 19 | |
bogdanm | 0:9b334a45a8ff | 20 | #define LPC_IOCON0_BASE (LPC_IOCON_BASE) |
bogdanm | 0:9b334a45a8ff | 21 | #define LPC_IOCON1_BASE (LPC_IOCON_BASE + 0x60) |
bogdanm | 0:9b334a45a8ff | 22 | |
bogdanm | 0:9b334a45a8ff | 23 | void pin_function(PinName pin, int function) { |
bogdanm | 0:9b334a45a8ff | 24 | MBED_ASSERT(pin != (PinName)NC); |
bogdanm | 0:9b334a45a8ff | 25 | if (pin == (PinName)NC) return; |
bogdanm | 0:9b334a45a8ff | 26 | |
bogdanm | 0:9b334a45a8ff | 27 | uint32_t pin_number = (uint32_t)pin; |
bogdanm | 0:9b334a45a8ff | 28 | |
bogdanm | 0:9b334a45a8ff | 29 | __IO uint32_t *reg = (pin_number < 32) ? |
bogdanm | 0:9b334a45a8ff | 30 | (__IO uint32_t*)(LPC_IOCON0_BASE + 4 * pin_number) : |
bogdanm | 0:9b334a45a8ff | 31 | (__IO uint32_t*)(LPC_IOCON1_BASE + 4 * (pin_number - 32)); |
bogdanm | 0:9b334a45a8ff | 32 | |
bogdanm | 0:9b334a45a8ff | 33 | // pin function bits: [2:0] -> 111 = (0x7) |
bogdanm | 0:9b334a45a8ff | 34 | *reg = (*reg & ~0x7) | (function & 0x7); |
bogdanm | 0:9b334a45a8ff | 35 | } |
bogdanm | 0:9b334a45a8ff | 36 | |
bogdanm | 0:9b334a45a8ff | 37 | void pin_mode(PinName pin, PinMode mode) { |
bogdanm | 0:9b334a45a8ff | 38 | MBED_ASSERT(pin != (PinName)NC); |
bogdanm | 0:9b334a45a8ff | 39 | uint32_t pin_number = (uint32_t)pin; |
bogdanm | 0:9b334a45a8ff | 40 | uint32_t drain = ((uint32_t) mode & (uint32_t) OpenDrain) >> 2; |
bogdanm | 0:9b334a45a8ff | 41 | |
bogdanm | 0:9b334a45a8ff | 42 | __IO uint32_t *reg = (pin_number < 32) ? |
bogdanm | 0:9b334a45a8ff | 43 | (__IO uint32_t*)(LPC_IOCON0_BASE + 4 * pin_number) : |
bogdanm | 0:9b334a45a8ff | 44 | (__IO uint32_t*)(LPC_IOCON1_BASE + 4 * (pin_number - 32)); |
bogdanm | 0:9b334a45a8ff | 45 | uint32_t tmp = *reg; |
bogdanm | 0:9b334a45a8ff | 46 | |
bogdanm | 0:9b334a45a8ff | 47 | // pin mode bits: [4:3] -> 11000 = (0x3 << 3) |
bogdanm | 0:9b334a45a8ff | 48 | tmp &= ~(0x3 << 3); |
bogdanm | 0:9b334a45a8ff | 49 | tmp |= (mode & 0x3) << 3; |
bogdanm | 0:9b334a45a8ff | 50 | |
bogdanm | 0:9b334a45a8ff | 51 | // drain |
bogdanm | 0:9b334a45a8ff | 52 | tmp &= ~(0x1 << 10); |
bogdanm | 0:9b334a45a8ff | 53 | tmp |= drain << 10; |
bogdanm | 0:9b334a45a8ff | 54 | |
bogdanm | 0:9b334a45a8ff | 55 | *reg = tmp; |
bogdanm | 0:9b334a45a8ff | 56 | } |