sabme ua / GR-PEACH_btn_int_test

SW0, SW1 button int test.

Dependencies:   mbed-src

main.cpp@0:044197641ae8, 2015-01-07 (annotated)

Committer:
mzta
Date:
Wed Jan 07 17:58:43 2015 +0000
Revision:
0:044197641ae8
Child:
1:a88865265000
int test initial commit.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mzta 0:044197641ae8 1 #include "mbed.h"
mzta 0:044197641ae8 2
mzta 0:044197641ae8 3 #define BTN0_PIN P6_0
mzta 0:044197641ae8 4 #define BTN1_PIN P6_1
mzta 0:044197641ae8 5 #define BTN0_IRQ IRQ5_IRQn
mzta 0:044197641ae8 6 #define BTN1_IRQ IRQ4_IRQn
mzta 0:044197641ae8 7
mzta 0:044197641ae8 8 InterruptIn button0(BTN0_PIN);
mzta 0:044197641ae8 9 InterruptIn button1(BTN1_PIN);
mzta 0:044197641ae8 10 DigitalOut rled(LED_RED);
mzta 0:044197641ae8 11 DigitalOut bled(LED_BLUE);
mzta 0:044197641ae8 12
mzta 0:044197641ae8 13 #define DELAY_CNT 1000000000
mzta 0:044197641ae8 14
mzta 0:044197641ae8 15 void button0_int_handler() {
mzta 0:044197641ae8 16 rled = 0;
mzta 0:044197641ae8 17 for (int i = 0; i <= DELAY_CNT; i++) ;
mzta 0:044197641ae8 18 rled = 1;
mzta 0:044197641ae8 19 }
mzta 0:044197641ae8 20
mzta 0:044197641ae8 21 void button1_int_handler() {
mzta 0:044197641ae8 22 bled = 0;
mzta 0:044197641ae8 23 for (int i = 0; i <= DELAY_CNT; i++) ;
mzta 0:044197641ae8 24 bled = 1;
mzta 0:044197641ae8 25 }
mzta 0:044197641ae8 26
mzta 0:044197641ae8 27 int32_t R_INTC_SetPriority(uint16_t int_id, uint8_t priority);
mzta 0:044197641ae8 28
mzta 0:044197641ae8 29 int main() {
mzta 0:044197641ae8 30 rled = 1;
mzta 0:044197641ae8 31 bled = 1;
mzta 0:044197641ae8 32 R_INTC_SetPriority(BTN0_IRQ, 1);
mzta 0:044197641ae8 33 button0.fall(&button0_int_handler);
mzta 0:044197641ae8 34 button1.fall(&button1_int_handler);
mzta 0:044197641ae8 35 while(1) {
mzta 0:044197641ae8 36 wait(1);
mzta 0:044197641ae8 37 }
mzta 0:044197641ae8 38 }
mzta 0:044197641ae8 39
mzta 0:044197641ae8 40 /**
mzta 0:044197641ae8 41 * http://japan.renesas.com/req/sample_code.do?event=searchProducts&%20expandedProductsId=1&productsId=186374
mzta 0:044197641ae8 42 */
mzta 0:044197641ae8 43 #include "r_typedefs.h"
mzta 0:044197641ae8 44 #include "dev_drv.h" /* Device Driver common header */
mzta 0:044197641ae8 45 //#include "devdrv_intc.h" /* INTC Driver Header */
mzta 0:044197641ae8 46 #include "iodefine.h"
mzta 0:044197641ae8 47 #define INTC_ID_TOTAL (587)
mzta 0:044197641ae8 48 /******************************************************************************
mzta 0:044197641ae8 49 * Function Name: R_INTC_SetPriority
mzta 0:044197641ae8 50 * Description : Sets the priority level of the ID specified by the int_id to
mzta 0:044197641ae8 51 * : the priority level specified by the priority.
mzta 0:044197641ae8 52 * Arguments : uint16_t int_id : Interrupt ID
mzta 0:044197641ae8 53 * : uint8_t priority : Interrupt priority level (0 to 31)
mzta 0:044197641ae8 54 * Return Value : DEVDRV_SUCCESS : Success of INTC interrupt priority level setting
mzta 0:044197641ae8 55 * : DEVDRV_ERROR : Failure of INTC interrupt priority level setting
mzta 0:044197641ae8 56 ******************************************************************************/
mzta 0:044197641ae8 57 int32_t R_INTC_SetPriority(uint16_t int_id, uint8_t priority)
mzta 0:044197641ae8 58 {
mzta 0:044197641ae8 59 uint32_t icdipr;
mzta 0:044197641ae8 60 uint32_t mask;
mzta 0:044197641ae8 61 volatile uint32_t * addr;
mzta 0:044197641ae8 62
mzta 0:044197641ae8 63 /* ==== Argument check ==== */
mzta 0:044197641ae8 64 if ((int_id >= INTC_ID_TOTAL) || priority >= 32)
mzta 0:044197641ae8 65 {
mzta 0:044197641ae8 66 return DEVDRV_ERROR; /* Argument error */
mzta 0:044197641ae8 67 }
mzta 0:044197641ae8 68
mzta 0:044197641ae8 69 priority = priority << 3; /* Priority[7:3] of ICDIPRn is valid bit */
mzta 0:044197641ae8 70
mzta 0:044197641ae8 71 /* ICDIPRn has 4 sources in the 32 bits */
mzta 0:044197641ae8 72 /* The n can be calculated by int_id / 4 */
mzta 0:044197641ae8 73 /* The bit field width is 8 bits */
mzta 0:044197641ae8 74 /* The target bit can be calculated by (int_id % 4) * 8 */
mzta 0:044197641ae8 75 addr = (volatile uint32_t *)&INTC.ICDIPR0;
mzta 0:044197641ae8 76
mzta 0:044197641ae8 77 icdipr = *(addr + (int_id / 4)); /* Read ICDIPRn */
mzta 0:044197641ae8 78
mzta 0:044197641ae8 79 mask = (uint32_t)0x000000FFuL; /* ---- Mask ---- */
mzta 0:044197641ae8 80 mask = mask << ((int_id % 4) * 8); /* Shift to target bit */
mzta 0:044197641ae8 81 icdipr &= ~mask; /* Clear priority */
mzta 0:044197641ae8 82 mask = (uint32_t)priority; /* ---- Priority ---- */
mzta 0:044197641ae8 83 mask = mask << ((int_id % 4) * 8); /* Shift to target bit */
mzta 0:044197641ae8 84 icdipr |= mask; /* Set priority */
mzta 0:044197641ae8 85
mzta 0:044197641ae8 86 *(addr + (int_id / 4)) = icdipr; /* Write ICDIPRn */
mzta 0:044197641ae8 87
mzta 0:044197641ae8 88 return DEVDRV_SUCCESS;
mzta 0:044197641ae8 89 }