Shift registers working
ShiftReg.cpp@2:b565b6a8f612, 2019-05-07 (annotated)
- Committer:
- mwthewsey
- Date:
- Tue May 07 13:53:06 2019 +0000
- Revision:
- 2:b565b6a8f612
- Parent:
- 1:9cc13bd590df
shift regs working
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
yoonghm | 0:a0e3fd47970f | 1 | #include "mbed.h" |
yoonghm | 0:a0e3fd47970f | 2 | #include "ShiftReg.h" |
yoonghm | 0:a0e3fd47970f | 3 | |
mwthewsey | 2:b565b6a8f612 | 4 | ShiftReg::ShiftReg(PinName data, PinName store, PinName clock, PinName enable ): _ds(data), _st(store), _sh(clock), _en(enable)//Constructor |
mwthewsey | 2:b565b6a8f612 | 5 | { |
mwthewsey | 2:b565b6a8f612 | 6 | _en = 1; |
mwthewsey | 2:b565b6a8f612 | 7 | } |
mwthewsey | 2:b565b6a8f612 | 8 | void ShiftReg::Write (uint16_t data) |
mwthewsey | 2:b565b6a8f612 | 9 | { |
mwthewsey | 2:b565b6a8f612 | 10 | uint16_t mask; |
mwthewsey | 2:b565b6a8f612 | 11 | mask = 0x8000; |
mwthewsey | 2:b565b6a8f612 | 12 | for (uint8_t i = 0; i < 16; i++) |
mwthewsey | 2:b565b6a8f612 | 13 | { |
mwthewsey | 2:b565b6a8f612 | 14 | if (data & mask) |
mwthewsey | 2:b565b6a8f612 | 15 | { |
mwthewsey | 2:b565b6a8f612 | 16 | _ds = 1; |
mwthewsey | 2:b565b6a8f612 | 17 | } |
mwthewsey | 2:b565b6a8f612 | 18 | else |
mwthewsey | 2:b565b6a8f612 | 19 | { |
mwthewsey | 2:b565b6a8f612 | 20 | _ds = 0; |
mwthewsey | 2:b565b6a8f612 | 21 | } |
mwthewsey | 2:b565b6a8f612 | 22 | |
mwthewsey | 2:b565b6a8f612 | 23 | mask = mask >> 1; |
mwthewsey | 2:b565b6a8f612 | 24 | |
mwthewsey | 2:b565b6a8f612 | 25 | _sh = 0; |
mwthewsey | 2:b565b6a8f612 | 26 | _sh = 1; |
mwthewsey | 2:b565b6a8f612 | 27 | } |
mwthewsey | 2:b565b6a8f612 | 28 | //Latch |
mwthewsey | 2:b565b6a8f612 | 29 | _st = 1; |
mwthewsey | 2:b565b6a8f612 | 30 | _st = 0; |
mwthewsey | 2:b565b6a8f612 | 31 | //Latch |
mwthewsey | 2:b565b6a8f612 | 32 | _en = 0; |
mwthewsey | 2:b565b6a8f612 | 33 | } |
mwthewsey | 1:9cc13bd590df | 34 | void ShiftReg::ShiftByte (uint16_t data, BitOrd ord ) |
yoonghm | 0:a0e3fd47970f | 35 | { |
mwthewsey | 1:9cc13bd590df | 36 | uint16_t mask; |
mwthewsey | 1:9cc13bd590df | 37 | if (ord == MSBFirst) |
mwthewsey | 1:9cc13bd590df | 38 | { |
mwthewsey | 1:9cc13bd590df | 39 | mask = 0x8000; |
mwthewsey | 1:9cc13bd590df | 40 | } |
mwthewsey | 1:9cc13bd590df | 41 | else |
mwthewsey | 1:9cc13bd590df | 42 | { |
mwthewsey | 1:9cc13bd590df | 43 | mask = 0x0001; |
mwthewsey | 1:9cc13bd590df | 44 | } |
mwthewsey | 1:9cc13bd590df | 45 | for (uint8_t i = 0; i < 16; i++) |
yoonghm | 0:a0e3fd47970f | 46 | { |
mwthewsey | 1:9cc13bd590df | 47 | //_ds = data; |
yoonghm | 0:a0e3fd47970f | 48 | |
mwthewsey | 1:9cc13bd590df | 49 | if (data & mask) |
mwthewsey | 1:9cc13bd590df | 50 | { |
mwthewsey | 1:9cc13bd590df | 51 | _ds = 1; |
mwthewsey | 1:9cc13bd590df | 52 | } |
mwthewsey | 1:9cc13bd590df | 53 | else |
mwthewsey | 1:9cc13bd590df | 54 | { |
mwthewsey | 1:9cc13bd590df | 55 | _ds = 0; |
mwthewsey | 1:9cc13bd590df | 56 | } |
mwthewsey | 1:9cc13bd590df | 57 | if (ord == MSBFirst) |
mwthewsey | 1:9cc13bd590df | 58 | { |
mwthewsey | 1:9cc13bd590df | 59 | mask = mask >> 1; |
mwthewsey | 1:9cc13bd590df | 60 | } |
mwthewsey | 1:9cc13bd590df | 61 | else |
mwthewsey | 1:9cc13bd590df | 62 | { |
mwthewsey | 1:9cc13bd590df | 63 | mask = mask << 1; |
mwthewsey | 1:9cc13bd590df | 64 | } |
yoonghm | 0:a0e3fd47970f | 65 | _sh = 0; |
yoonghm | 0:a0e3fd47970f | 66 | _sh = 1; |
yoonghm | 0:a0e3fd47970f | 67 | } |
mwthewsey | 2:b565b6a8f612 | 68 | _en = 0; |
yoonghm | 0:a0e3fd47970f | 69 | } |
mwthewsey | 1:9cc13bd590df | 70 | void ShiftReg::ShiftBit(int8_t data) |
yoonghm | 0:a0e3fd47970f | 71 | { |
yoonghm | 0:a0e3fd47970f | 72 | _ds = data; |
yoonghm | 0:a0e3fd47970f | 73 | _sh = 0; |
yoonghm | 0:a0e3fd47970f | 74 | _sh = 1; |
yoonghm | 0:a0e3fd47970f | 75 | } |
yoonghm | 0:a0e3fd47970f | 76 | |
mwthewsey | 1:9cc13bd590df | 77 | void ShiftReg::Latch() |
yoonghm | 0:a0e3fd47970f | 78 | { |
yoonghm | 0:a0e3fd47970f | 79 | _st = 1; |
yoonghm | 0:a0e3fd47970f | 80 | _st = 0; |
yoonghm | 0:a0e3fd47970f | 81 | } |