Mark Turner / Mbed 2 deprecated lightsense_kl46z_basic_v2

Tried to initialize the buttons and slider but couldn't get it to work.

Dependencies:   mbed

SLCD/LCDconfig.h@0:0d6b77c9ae01, 2016-09-19 (annotated)

Committer:
mturner5
Date:
Mon Sep 19 03:28:41 2016 +0000
Revision:
0:0d6b77c9ae01
basic v2;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mturner5 0:0d6b77c9ae01 1 #include "FRDM-s401.h" // 4x7 segdisplay
mturner5 0:0d6b77c9ae01 2
mturner5 0:0d6b77c9ae01 3
mturner5 0:0d6b77c9ae01 4 #if 1 // VREF to VLL1
mturner5 0:0d6b77c9ae01 5 /* Following configuration is used for LCD default initialization */
mturner5 0:0d6b77c9ae01 6 #define _LCDRVEN (1) //
mturner5 0:0d6b77c9ae01 7 #define _LCDRVTRIM (8) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
mturner5 0:0d6b77c9ae01 8 #define _LCDCPSEL (1) // charge pump select 0 or 1
mturner5 0:0d6b77c9ae01 9 #define _LCDLOADADJUST (3) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
mturner5 0:0d6b77c9ae01 10 #define _LCDALTDIV (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
mturner5 0:0d6b77c9ae01 11 #define _LCDALRCLKSOURCE (0) // 0 -- External clock 1 -- Alternate clock
mturner5 0:0d6b77c9ae01 12
mturner5 0:0d6b77c9ae01 13 #define _LCDCLKPSL (0) // Clock divider to generate the LCD Waveforms
mturner5 0:0d6b77c9ae01 14 #define _LCDSUPPLY (1)
mturner5 0:0d6b77c9ae01 15 #define _LCDHREF (0) // 0 or 1
mturner5 0:0d6b77c9ae01 16 #define _LCDCLKSOURCE (1) // 0 -- External clock 1 -- Alternate clock
mturner5 0:0d6b77c9ae01 17 #define _LCDLCK (1) //Any number between 0 and 7
mturner5 0:0d6b77c9ae01 18 #define _LCDBLINKRATE (3) //Any number between 0 and 7
mturner5 0:0d6b77c9ae01 19
mturner5 0:0d6b77c9ae01 20
mturner5 0:0d6b77c9ae01 21 #else //VLL3 to VDD internally
mturner5 0:0d6b77c9ae01 22 /* Following configuration is used for LCD default initialization */
mturner5 0:0d6b77c9ae01 23 #define _LCDCLKSOURCE (1) // 0 -- External clock 1 -- Alternate clock
mturner5 0:0d6b77c9ae01 24 #define _LCDALRCLKSOURCE (0) // 0 -- External clock 1 -- Alternate clock
mturner5 0:0d6b77c9ae01 25 #define _LCDCLKPSL (0) // Clock divider to generate the LCD Waveforms
mturner5 0:0d6b77c9ae01 26 #define _LCDSUPPLY (0)
mturner5 0:0d6b77c9ae01 27 #define _LCDLOADADJUST (3) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
mturner5 0:0d6b77c9ae01 28 #define _LCDALTDIV (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
mturner5 0:0d6b77c9ae01 29 #define _LCDRVTRIM (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
mturner5 0:0d6b77c9ae01 30 #define _LCDHREF (0) // 0 or 1
mturner5 0:0d6b77c9ae01 31 #define _LCDCPSEL (1) // 0 or 1
mturner5 0:0d6b77c9ae01 32 #define _LCDRVEN (0) //
mturner5 0:0d6b77c9ae01 33 #define _LCDBLINKRATE (3) // Any number between 0 and 7
mturner5 0:0d6b77c9ae01 34 #define _LCDLCK (0) // Any number between 0 and 7
mturner5 0:0d6b77c9ae01 35
mturner5 0:0d6b77c9ae01 36 #endif
mturner5 0:0d6b77c9ae01 37
mturner5 0:0d6b77c9ae01 38
mturner5 0:0d6b77c9ae01 39
mturner5 0:0d6b77c9ae01 40
mturner5 0:0d6b77c9ae01 41 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Control Register 0 ~|~|~|~|~|~|~|~|~|~|~|~|~*/
mturner5 0:0d6b77c9ae01 42 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
mturner5 0:0d6b77c9ae01 43 #define _LCDINTENABLE (1)
mturner5 0:0d6b77c9ae01 44
mturner5 0:0d6b77c9ae01 45 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Control Register 1 ~|~|~|~|~|~|~|~|~|~|~|~|~|*/
mturner5 0:0d6b77c9ae01 46 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
mturner5 0:0d6b77c9ae01 47 #define _LCDFRAMEINTERRUPT (0) //0 Disable Frame Frequency Interrupt
mturner5 0:0d6b77c9ae01 48 //1 Enable an LCD interrupt that coincides with the LCD frame frequency
mturner5 0:0d6b77c9ae01 49 #define _LCDFULLCPLDIRIVE (0) // 0 GPIO shared with the LCD. Inputs levels and internal pullup reference to VDD
mturner5 0:0d6b77c9ae01 50 // 1 If VSUPPLY=11and RVEN=0. Inputs levels and internal pullup reference to VLL3
mturner5 0:0d6b77c9ae01 51 #define _LCDWAITMODE (0) // 0 Allows the LCD driver and charge pump to continue running during wait mode
mturner5 0:0d6b77c9ae01 52 // 1 Disable the LCD when the MCU goes into wait mode
mturner5 0:0d6b77c9ae01 53 #define _LCDSTOPMODE (0) // 0 Allows the LCD driver and charge pump to continue running during stop2 or stop3
mturner5 0:0d6b77c9ae01 54 // 1 Disable the LCD when and charge pump when the MCU goes into stop2 or stop3
mturner5 0:0d6b77c9ae01 55
mturner5 0:0d6b77c9ae01 56 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Voltage Supply Register ~|~|~|~|~|~|~|~|~|~|~|~*/
mturner5 0:0d6b77c9ae01 57 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
mturner5 0:0d6b77c9ae01 58 #define _LCDHIGHREF (0) //0 Divide input VIREG=1.0v
mturner5 0:0d6b77c9ae01 59 //1 Do not divide the input VIREG=1.67v
mturner5 0:0d6b77c9ae01 60 #define _LCDBBYPASS (0) //Determines whether the internal LCD op amp buffer is bypassed
mturner5 0:0d6b77c9ae01 61 //0 Buffered mode
mturner5 0:0d6b77c9ae01 62 //1 Unbuffered mode
mturner5 0:0d6b77c9ae01 63
mturner5 0:0d6b77c9ae01 64 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Regulated Voltage Control |~|~|~|~|~|~|~|~|~|~*/
mturner5 0:0d6b77c9ae01 65 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
mturner5 0:0d6b77c9ae01 66 #define _LCDCONTRAST (1) //Contrast by software 0 -- Disable 1-- Enable
mturner5 0:0d6b77c9ae01 67 #define _LVLCONTRAST (0) //Any number between 0 and 15, if the number is bigger the glass gets darker
mturner5 0:0d6b77c9ae01 68
mturner5 0:0d6b77c9ae01 69 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Blink Control Register ~|~|~|~|~|~|~|~|~|~|~|~*/
mturner5 0:0d6b77c9ae01 70 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
mturner5 0:0d6b77c9ae01 71 #define _LCDBLINKCONTROL (1) //0 Disable blink mode
mturner5 0:0d6b77c9ae01 72 //1 Enable blink mode
mturner5 0:0d6b77c9ae01 73 #define _LCDALTMODE (0) //0 Normal display
mturner5 0:0d6b77c9ae01 74 //1 Alternate display for 4 backplanes or less the LCD backplane sequencer changes to otuput an alternate display
mturner5 0:0d6b77c9ae01 75 #define _LCDBLANKDISP (0) //0 Do not blank display
mturner5 0:0d6b77c9ae01 76 //1 Blank display if you put it in 0 the text before blank is manteined
mturner5 0:0d6b77c9ae01 77 #define _LCDBLINKMODE (0) //0 Display blank during the blink period
mturner5 0:0d6b77c9ae01 78 //1 Display alternate displat during blink period (Ignored if duty is 5 or greater)
mturner5 0:0d6b77c9ae01 79
mturner5 0:0d6b77c9ae01 80
mturner5 0:0d6b77c9ae01 81 //Calculated values
mturner5 0:0d6b77c9ae01 82 #define _LCDUSEDPINS (_LCDFRONTPLANES + _LCDBACKPLANES)
mturner5 0:0d6b77c9ae01 83 #define _LCDDUTY (_LCDBACKPLANES-1) //Any number between 0 and 7
mturner5 0:0d6b77c9ae01 84 #define LCD_WF_BASE LCD->WF8B[0]
mturner5 0:0d6b77c9ae01 85
mturner5 0:0d6b77c9ae01 86 // General definitions used by the LCD library
mturner5 0:0d6b77c9ae01 87 #define LCD_WF(x) *((uint8 *)&LCD_WF_BASE + x)
mturner5 0:0d6b77c9ae01 88
mturner5 0:0d6b77c9ae01 89 /*LCD Fault Detections Consts*/
mturner5 0:0d6b77c9ae01 90 #define FP_TYPE 0x00 // pin is a Front Plane
mturner5 0:0d6b77c9ae01 91 #define BP_TYPE 0x80 // pin is Back Plane
mturner5 0:0d6b77c9ae01 92
mturner5 0:0d6b77c9ae01 93 // Fault Detect Preescaler Options
mturner5 0:0d6b77c9ae01 94 #define FDPRS_1 0
mturner5 0:0d6b77c9ae01 95 #define FDPRS_2 1
mturner5 0:0d6b77c9ae01 96 #define FDPRS_4 2
mturner5 0:0d6b77c9ae01 97 #define FDPRS_8 3
mturner5 0:0d6b77c9ae01 98 #define FDPRS_16 4
mturner5 0:0d6b77c9ae01 99 #define FDPRS_32 5
mturner5 0:0d6b77c9ae01 100 #define FDPRS_64 6
mturner5 0:0d6b77c9ae01 101 #define FDPRS_128 7
mturner5 0:0d6b77c9ae01 102
mturner5 0:0d6b77c9ae01 103 // Fault Detect Sample Window Width Values
mturner5 0:0d6b77c9ae01 104 #define FDSWW_4 0
mturner5 0:0d6b77c9ae01 105 #define FDSWW_8 1
mturner5 0:0d6b77c9ae01 106 #define FDSWW_16 2
mturner5 0:0d6b77c9ae01 107 #define FDSWW_32 3
mturner5 0:0d6b77c9ae01 108 #define FDSWW_64 4
mturner5 0:0d6b77c9ae01 109 #define FDSWW_128 5
mturner5 0:0d6b77c9ae01 110 #define FDSWW_256 6
mturner5 0:0d6b77c9ae01 111 #define FDSWW_512 7
mturner5 0:0d6b77c9ae01 112
mturner5 0:0d6b77c9ae01 113 /*
mturner5 0:0d6b77c9ae01 114 Mask Bit definitions used f
mturner5 0:0d6b77c9ae01 115 */
mturner5 0:0d6b77c9ae01 116 #define mBIT0 1
mturner5 0:0d6b77c9ae01 117 #define mBIT1 2
mturner5 0:0d6b77c9ae01 118 #define mBIT2 4
mturner5 0:0d6b77c9ae01 119 #define mBIT3 8
mturner5 0:0d6b77c9ae01 120 #define mBIT4 16
mturner5 0:0d6b77c9ae01 121 #define mBIT5 32
mturner5 0:0d6b77c9ae01 122 #define mBIT6 64
mturner5 0:0d6b77c9ae01 123 #define mBIT7 128
mturner5 0:0d6b77c9ae01 124 #define mBIT8 256
mturner5 0:0d6b77c9ae01 125 #define mBIT9 512
mturner5 0:0d6b77c9ae01 126 #define mBIT10 1024
mturner5 0:0d6b77c9ae01 127 #define mBIT11 2048
mturner5 0:0d6b77c9ae01 128 #define mBIT12 4096
mturner5 0:0d6b77c9ae01 129 #define mBIT13 8192
mturner5 0:0d6b77c9ae01 130 #define mBIT14 16384
mturner5 0:0d6b77c9ae01 131 #define mBIT15 32768
mturner5 0:0d6b77c9ae01 132 #define mBIT16 65536
mturner5 0:0d6b77c9ae01 133 #define mBIT17 131072
mturner5 0:0d6b77c9ae01 134 #define mBIT18 262144
mturner5 0:0d6b77c9ae01 135 #define mBIT19 524288
mturner5 0:0d6b77c9ae01 136 #define mBIT20 1048576
mturner5 0:0d6b77c9ae01 137 #define mBIT21 2097152
mturner5 0:0d6b77c9ae01 138 #define mBIT22 4194304
mturner5 0:0d6b77c9ae01 139 #define mBIT23 8388608
mturner5 0:0d6b77c9ae01 140 #define mBIT24 16777216
mturner5 0:0d6b77c9ae01 141 #define mBIT25 33554432
mturner5 0:0d6b77c9ae01 142 #define mBIT26 67108864
mturner5 0:0d6b77c9ae01 143 #define mBIT27 134217728
mturner5 0:0d6b77c9ae01 144 #define mBIT28 268435456
mturner5 0:0d6b77c9ae01 145 #define mBIT29 536870912
mturner5 0:0d6b77c9ae01 146 #define mBIT30 1073741824
mturner5 0:0d6b77c9ae01 147 #define mBIT31 2147483648
mturner5 0:0d6b77c9ae01 148
mturner5 0:0d6b77c9ae01 149 #define mBIT32 1
mturner5 0:0d6b77c9ae01 150 #define mBIT33 2
mturner5 0:0d6b77c9ae01 151 #define mBIT34 4
mturner5 0:0d6b77c9ae01 152 #define mBIT35 8
mturner5 0:0d6b77c9ae01 153 #define mBIT36 16
mturner5 0:0d6b77c9ae01 154 #define mBIT37 32
mturner5 0:0d6b77c9ae01 155 #define mBIT38 64
mturner5 0:0d6b77c9ae01 156 #define mBIT39 128
mturner5 0:0d6b77c9ae01 157 #define mBIT40 256
mturner5 0:0d6b77c9ae01 158 #define mBIT41 512
mturner5 0:0d6b77c9ae01 159 #define mBIT42 1024
mturner5 0:0d6b77c9ae01 160 #define mBIT43 2048
mturner5 0:0d6b77c9ae01 161 #define mBIT44 4096
mturner5 0:0d6b77c9ae01 162 #define mBIT45 8192
mturner5 0:0d6b77c9ae01 163 #define mBIT46 16384
mturner5 0:0d6b77c9ae01 164 #define mBIT47 32768
mturner5 0:0d6b77c9ae01 165 #define mBIT48 65536
mturner5 0:0d6b77c9ae01 166 #define mBIT49 131072
mturner5 0:0d6b77c9ae01 167 #define mBIT50 262144
mturner5 0:0d6b77c9ae01 168 #define mBIT51 524288
mturner5 0:0d6b77c9ae01 169 #define mBIT52 1048576
mturner5 0:0d6b77c9ae01 170 #define mBIT53 2097152
mturner5 0:0d6b77c9ae01 171 #define mBIT54 4194304
mturner5 0:0d6b77c9ae01 172 #define mBIT55 8388608
mturner5 0:0d6b77c9ae01 173 #define mBIT56 16777216
mturner5 0:0d6b77c9ae01 174 #define mBIT57 33554432
mturner5 0:0d6b77c9ae01 175 #define mBIT58 67108864
mturner5 0:0d6b77c9ae01 176 #define mBIT59 134217728
mturner5 0:0d6b77c9ae01 177 #define mBIT60 268435456
mturner5 0:0d6b77c9ae01 178 #define mBIT61 536870912
mturner5 0:0d6b77c9ae01 179 #define mBIT62 1073741824
mturner5 0:0d6b77c9ae01 180 #define mBIT63 2147483648
mturner5 0:0d6b77c9ae01 181
mturner5 0:0d6b77c9ae01 182
mturner5 0:0d6b77c9ae01 183