Simmerl Manuel
/
MRT_Studienarbeit
This program control a 5 axis arm robot from lynx motion
scmRTOS/scmRTOS_TARGET_CFG.h@0:b6608b36efd7, 2011-02-15 (annotated)
- Committer:
- msimmerl
- Date:
- Tue Feb 15 07:49:25 2011 +0000
- Revision:
- 0:b6608b36efd7
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
msimmerl | 0:b6608b36efd7 | 1 | //****************************************************************************** |
msimmerl | 0:b6608b36efd7 | 2 | //* |
msimmerl | 0:b6608b36efd7 | 3 | //* FULLNAME: Single-Chip Microcontroller Real-Time Operating System |
msimmerl | 0:b6608b36efd7 | 4 | //* |
msimmerl | 0:b6608b36efd7 | 5 | //* NICKNAME: scmRTOS |
msimmerl | 0:b6608b36efd7 | 6 | //* |
msimmerl | 0:b6608b36efd7 | 7 | //* PROCESSOR: ARM Cortex-M3 |
msimmerl | 0:b6608b36efd7 | 8 | //* |
msimmerl | 0:b6608b36efd7 | 9 | //* TOOLKIT: EWARM (IAR Systems) |
msimmerl | 0:b6608b36efd7 | 10 | //* |
msimmerl | 0:b6608b36efd7 | 11 | //* PURPOSE: Project Level Target Extensions Config |
msimmerl | 0:b6608b36efd7 | 12 | //* |
msimmerl | 0:b6608b36efd7 | 13 | //* Version: 3.10 |
msimmerl | 0:b6608b36efd7 | 14 | //* |
msimmerl | 0:b6608b36efd7 | 15 | //* $Revision: 196 $ |
msimmerl | 0:b6608b36efd7 | 16 | //* $Date:: 2008-06-19 #$ |
msimmerl | 0:b6608b36efd7 | 17 | //* |
msimmerl | 0:b6608b36efd7 | 18 | //* Copyright (c) 2003-2010, Harry E. Zhurov |
msimmerl | 0:b6608b36efd7 | 19 | //* |
msimmerl | 0:b6608b36efd7 | 20 | //* Permission is hereby granted, free of charge, to any person |
msimmerl | 0:b6608b36efd7 | 21 | //* obtaining a copy of this software and associated documentation |
msimmerl | 0:b6608b36efd7 | 22 | //* files (the "Software"), to deal in the Software without restriction, |
msimmerl | 0:b6608b36efd7 | 23 | //* including without limitation the rights to use, copy, modify, merge, |
msimmerl | 0:b6608b36efd7 | 24 | //* publish, distribute, sublicense, and/or sell copies of the Software, |
msimmerl | 0:b6608b36efd7 | 25 | //* and to permit persons to whom the Software is furnished to do so, |
msimmerl | 0:b6608b36efd7 | 26 | //* subject to the following conditions: |
msimmerl | 0:b6608b36efd7 | 27 | //* |
msimmerl | 0:b6608b36efd7 | 28 | //* The above copyright notice and this permission notice shall be included |
msimmerl | 0:b6608b36efd7 | 29 | //* in all copies or substantial portions of the Software. |
msimmerl | 0:b6608b36efd7 | 30 | //* |
msimmerl | 0:b6608b36efd7 | 31 | //* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
msimmerl | 0:b6608b36efd7 | 32 | //* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
msimmerl | 0:b6608b36efd7 | 33 | //* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
msimmerl | 0:b6608b36efd7 | 34 | //* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY |
msimmerl | 0:b6608b36efd7 | 35 | //* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
msimmerl | 0:b6608b36efd7 | 36 | //* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH |
msimmerl | 0:b6608b36efd7 | 37 | //* THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
msimmerl | 0:b6608b36efd7 | 38 | //* |
msimmerl | 0:b6608b36efd7 | 39 | //* ================================================================= |
msimmerl | 0:b6608b36efd7 | 40 | //* See http://scmrtos.sourceforge.net for documentation, latest |
msimmerl | 0:b6608b36efd7 | 41 | //* information, license and contact details. |
msimmerl | 0:b6608b36efd7 | 42 | //* ================================================================= |
msimmerl | 0:b6608b36efd7 | 43 | //* |
msimmerl | 0:b6608b36efd7 | 44 | //****************************************************************************** |
msimmerl | 0:b6608b36efd7 | 45 | //* mbed port by Igor Skochinsky |
msimmerl | 0:b6608b36efd7 | 46 | |
msimmerl | 0:b6608b36efd7 | 47 | #ifndef scmRTOS_TARGET_CFG_H |
msimmerl | 0:b6608b36efd7 | 48 | #define scmRTOS_TARGET_CFG_H |
msimmerl | 0:b6608b36efd7 | 49 | |
msimmerl | 0:b6608b36efd7 | 50 | #include "device.h" |
msimmerl | 0:b6608b36efd7 | 51 | |
msimmerl | 0:b6608b36efd7 | 52 | // Define SysTick clock frequency and its interrupt rate in Hz. |
msimmerl | 0:b6608b36efd7 | 53 | #define SYSTICKFREQ 100000000 |
msimmerl | 0:b6608b36efd7 | 54 | #define SYSTICKINTRATE 1000 |
msimmerl | 0:b6608b36efd7 | 55 | |
msimmerl | 0:b6608b36efd7 | 56 | //------------------------------------------------------------------------------ |
msimmerl | 0:b6608b36efd7 | 57 | // |
msimmerl | 0:b6608b36efd7 | 58 | // System Timer stuff |
msimmerl | 0:b6608b36efd7 | 59 | // |
msimmerl | 0:b6608b36efd7 | 60 | // |
msimmerl | 0:b6608b36efd7 | 61 | namespace OS |
msimmerl | 0:b6608b36efd7 | 62 | { |
msimmerl | 0:b6608b36efd7 | 63 | extern "C" void SysTick_Handler(); |
msimmerl | 0:b6608b36efd7 | 64 | } |
msimmerl | 0:b6608b36efd7 | 65 | |
msimmerl | 0:b6608b36efd7 | 66 | #define LOCK_SYSTEM_TIMER() ( *CPU_SYSTICKCSR &= ~CPU_SYSTICKCSR_EINT ) |
msimmerl | 0:b6608b36efd7 | 67 | #define UNLOCK_SYSTEM_TIMER() ( *CPU_SYSTICKCSR |= CPU_SYSTICKCSR_EINT ) |
msimmerl | 0:b6608b36efd7 | 68 | |
msimmerl | 0:b6608b36efd7 | 69 | //------------------------------------------------------------------------------ |
msimmerl | 0:b6608b36efd7 | 70 | // |
msimmerl | 0:b6608b36efd7 | 71 | // Context Switch ISR stuff |
msimmerl | 0:b6608b36efd7 | 72 | // |
msimmerl | 0:b6608b36efd7 | 73 | // |
msimmerl | 0:b6608b36efd7 | 74 | namespace OS |
msimmerl | 0:b6608b36efd7 | 75 | { |
msimmerl | 0:b6608b36efd7 | 76 | #if scmRTOS_IDLE_HOOK_ENABLE == 1 |
msimmerl | 0:b6608b36efd7 | 77 | void IdleProcessUserHook(); |
msimmerl | 0:b6608b36efd7 | 78 | #endif |
msimmerl | 0:b6608b36efd7 | 79 | |
msimmerl | 0:b6608b36efd7 | 80 | #if scmRTOS_CONTEXT_SWITCH_SCHEME == 1 |
msimmerl | 0:b6608b36efd7 | 81 | |
msimmerl | 0:b6608b36efd7 | 82 | INLINE inline void RaiseContextSwitch() { *CPU_ICSR |= 0x10000000; } |
msimmerl | 0:b6608b36efd7 | 83 | |
msimmerl | 0:b6608b36efd7 | 84 | #define ENABLE_NESTED_INTERRUPTS() |
msimmerl | 0:b6608b36efd7 | 85 | |
msimmerl | 0:b6608b36efd7 | 86 | #if scmRTOS_SYSTIMER_NEST_INTS_ENABLE == 0 |
msimmerl | 0:b6608b36efd7 | 87 | #define DISABLE_NESTED_INTERRUPTS() TCritSect cs |
msimmerl | 0:b6608b36efd7 | 88 | #else |
msimmerl | 0:b6608b36efd7 | 89 | #define DISABLE_NESTED_INTERRUPTS() |
msimmerl | 0:b6608b36efd7 | 90 | #endif |
msimmerl | 0:b6608b36efd7 | 91 | |
msimmerl | 0:b6608b36efd7 | 92 | #else |
msimmerl | 0:b6608b36efd7 | 93 | #error "Cortex-M3 port supports software interrupt switch method only!" |
msimmerl | 0:b6608b36efd7 | 94 | |
msimmerl | 0:b6608b36efd7 | 95 | #endif // scmRTOS_CONTEXT_SWITCH_SCHEME |
msimmerl | 0:b6608b36efd7 | 96 | |
msimmerl | 0:b6608b36efd7 | 97 | } |
msimmerl | 0:b6608b36efd7 | 98 | //----------------------------------------------------------------------------- |
msimmerl | 0:b6608b36efd7 | 99 | |
msimmerl | 0:b6608b36efd7 | 100 | #endif // scmRTOS_TARGET_CFG_H |
msimmerl | 0:b6608b36efd7 | 101 | //----------------------------------------------------------------------------- |
msimmerl | 0:b6608b36efd7 | 102 |