Revision 57:0480438fc29c, committed 2013-01-18

Comitter:

emilmont

Date:

Fri Jan 18 10:30:14 2013 +0000

Parent:

56:3753e96f3c8b

Child:

58:0954ebd79f59

Commit message:

Add semihosting support for IAR toolchain
Improve IAR stdio retargeting

Changed in this revision

Binary file LPC1768/IAR/cmsis_nvic.o has changed

Binary file LPC1768/IAR/core_cm3.o has changed

Binary file LPC1768/IAR/mbed.a has changed

Binary file LPC1768/IAR/system_LPC17xx.o has changed

--- a/LPC1768/device.h	Wed Jan 16 14:27:32 2013 +0000
+++ b/LPC1768/device.h	Fri Jan 18 10:30:14 2013 +0000
@@ -47,15 +47,8 @@
 
 #define DEVICE_PWMOUT           1
 
-#if defined (__ICCARM__)
-#define DEVICE_SEMIHOST         0
-#else
 #define DEVICE_SEMIHOST         1
-#endif
-
-#if DEVICE_SEMIHOST
 #define DEVICE_LOCALFILESYSTEM  1
-#endif
 
 #define DEVICE_SLEEP            1
 

--- a/semihost_api.h	Wed Jan 16 14:27:32 2013 +0000
+++ b/semihost_api.h	Fri Jan 18 10:30:14 2013 +0000
@@ -30,17 +30,15 @@
 #endif
 
 #if DEVICE_SEMIHOST
-/* __semihost intrinsic
- This intrinsic inserts an SVC or BKPT instruction into the instruction stream
- generated by the compiler. It enables you to make semihosting calls from C or
- C++ that are independent of the target architecture.
- */
+
 #ifndef __CC_ARM
-/* Semihost implementation taken from eLua (MIT license):
- *    git://github.com/elua/elua.git/src/semifs.c
- */
 
-/* SWI numbers for RDI (Angel) monitors */
+#if defined(__ICCARM__)
+inline int __semihost(int reason, const void *arg) {
+    return __semihosting(reason, (void*)arg);
+}
+#else
+
 #ifdef __thumb__
 #   define AngelSWI            0xAB
 #   define AngelSWIInsn        "bkpt"
@@ -53,20 +51,20 @@
 
 inline int __semihost(int reason, const void *arg) {
     int value;
-    asm volatile ("mov r0, %1; mov r1, %2; " AngelSWIInsn " %a3; mov %0, r0"
-       : "=r" (value) /* Outputs */
-       : "r" (reason), "r" (arg), "i" (AngelSWI) /* Inputs */
-       : "r0", "r1", "r2", "r3", "ip", "lr", "memory", "cc"
-                /* Clobbers r0 and r1, and lr if in supervisor mode */);
-                /* Accordingly to page 13-77 of ARM DUI 0040D other registers
-                   can also be clobbered.  Some memory positions may also be
-                   changed by a system call, so they should not be kept in
-                   registers. Note: we are assuming the manual is right and
-                   Angel is respecting the APCS.  */
-
+    
+    asm volatile (
+       "mov r0, %1"          "\n\t"
+       "mov r1, %2"          "\n\t"
+       AngelSWIInsn " %a3"   "\n\t"
+       "mov %0, r0"
+       : "=r" (value)                                         /* output operands             */
+       : "r" (reason), "r" (arg), "i" (AngelSWI)              /* input operands              */
+       : "r0", "r1", "r2", "r3", "ip", "lr", "memory", "cc"   /* list of clobbered registers */
+    );
+    
     return value;
 }
-
+#endif
 #endif
 
 #if DEVICE_LOCALFILESYSTEM