Marcell Rausch / mbed-dev-no-serial

mbed library sources. Supersedes mbed-src. removed serial

Fork of mbed-dev by mbed official

targets/TARGET_Maxim/TARGET_MAX32630/mxc/spix.c@157:ff67d9f36b67, 2017-02-02 (annotated)

Committer:
<>
Date:
Thu Feb 02 17:01:33 2017 +0000
Revision:
157:ff67d9f36b67
This updates the lib to the mbed lib v135

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 157:ff67d9f36b67 1 /**
<> 157:ff67d9f36b67 2 * @file
<> 157:ff67d9f36b67 3 * @brief SPI execute in place driver.
<> 157:ff67d9f36b67 4 */
<> 157:ff67d9f36b67 5 /* *****************************************************************************
<> 157:ff67d9f36b67 6 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 157:ff67d9f36b67 7 *
<> 157:ff67d9f36b67 8 * Permission is hereby granted, free of charge, to any person obtaining a
<> 157:ff67d9f36b67 9 * copy of this software and associated documentation files (the "Software"),
<> 157:ff67d9f36b67 10 * to deal in the Software without restriction, including without limitation
<> 157:ff67d9f36b67 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 157:ff67d9f36b67 12 * and/or sell copies of the Software, and to permit persons to whom the
<> 157:ff67d9f36b67 13 * Software is furnished to do so, subject to the following conditions:
<> 157:ff67d9f36b67 14 *
<> 157:ff67d9f36b67 15 * The above copyright notice and this permission notice shall be included
<> 157:ff67d9f36b67 16 * in all copies or substantial portions of the Software.
<> 157:ff67d9f36b67 17 *
<> 157:ff67d9f36b67 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 157:ff67d9f36b67 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 157:ff67d9f36b67 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 157:ff67d9f36b67 21 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 157:ff67d9f36b67 22 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 157:ff67d9f36b67 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 157:ff67d9f36b67 24 * OTHER DEALINGS IN THE SOFTWARE.
<> 157:ff67d9f36b67 25 *
<> 157:ff67d9f36b67 26 * Except as contained in this notice, the name of Maxim Integrated
<> 157:ff67d9f36b67 27 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 157:ff67d9f36b67 28 * Products, Inc. Branding Policy.
<> 157:ff67d9f36b67 29 *
<> 157:ff67d9f36b67 30 * The mere transfer of this software does not imply any licenses
<> 157:ff67d9f36b67 31 * of trade secrets, proprietary technology, copyrights, patents,
<> 157:ff67d9f36b67 32 * trademarks, maskwork rights, or any other form of intellectual
<> 157:ff67d9f36b67 33 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 157:ff67d9f36b67 34 * ownership rights.
<> 157:ff67d9f36b67 35 *
<> 157:ff67d9f36b67 36 * $Date: 2016-09-08 17:31:41 -0500 (Thu, 08 Sep 2016) $
<> 157:ff67d9f36b67 37 * $Revision: 24323 $
<> 157:ff67d9f36b67 38 *
<> 157:ff67d9f36b67 39 **************************************************************************** */
<> 157:ff67d9f36b67 40
<> 157:ff67d9f36b67 41 /* **** Includes **** */
<> 157:ff67d9f36b67 42 #include <stddef.h>
<> 157:ff67d9f36b67 43 #include "mxc_config.h"
<> 157:ff67d9f36b67 44 #include "mxc_assert.h"
<> 157:ff67d9f36b67 45 #include "spix.h"
<> 157:ff67d9f36b67 46 #include "spix_regs.h"
<> 157:ff67d9f36b67 47
<> 157:ff67d9f36b67 48 /**
<> 157:ff67d9f36b67 49 * @ingroup spix
<> 157:ff67d9f36b67 50 * @{
<> 157:ff67d9f36b67 51 */
<> 157:ff67d9f36b67 52
<> 157:ff67d9f36b67 53 /* **** Definitions **** */
<> 157:ff67d9f36b67 54 #define CMD_CLOCKS 8
<> 157:ff67d9f36b67 55 #define ADDR_3BYTE_CLOCKS 24
<> 157:ff67d9f36b67 56 #define ADDR_4BYTE_CLOCKS 32
<> 157:ff67d9f36b67 57
<> 157:ff67d9f36b67 58 /***** Globals *****/
<> 157:ff67d9f36b67 59
<> 157:ff67d9f36b67 60 /***** Functions *****/
<> 157:ff67d9f36b67 61
<> 157:ff67d9f36b67 62 /******************************************************************************/
<> 157:ff67d9f36b67 63 #if defined ( __GNUC__ )
<> 157:ff67d9f36b67 64 #undef IAR_SPIX_PRAGMA //Make sure this is not defined for GCC
<> 157:ff67d9f36b67 65 #endif
<> 157:ff67d9f36b67 66
<> 157:ff67d9f36b67 67 #if IAR_SPIX_PRAGMA
<> 157:ff67d9f36b67 68 // IAR memory section declaration for the SPIX functions to be loaded in RAM.
<> 157:ff67d9f36b67 69 #pragma section=".spix_config"
<> 157:ff67d9f36b67 70 #endif
<> 157:ff67d9f36b67 71
<> 157:ff67d9f36b67 72 #if(MXC_SPIX_REV == 0)
<> 157:ff67d9f36b67 73
<> 157:ff67d9f36b67 74 #if defined ( __GNUC__ )
<> 157:ff67d9f36b67 75 __attribute__ ((section(".spix_config"), noinline))
<> 157:ff67d9f36b67 76 #endif /* __GNUC */
<> 157:ff67d9f36b67 77
<> 157:ff67d9f36b67 78 #if IAR_SPIX_PRAGMA
<> 157:ff67d9f36b67 79 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
<> 157:ff67d9f36b67 80 #pragma optimize=no_inline // IAR no inline optimization on this function
<> 157:ff67d9f36b67 81 #endif /* IAR_PRAGMA */
<> 157:ff67d9f36b67 82
<> 157:ff67d9f36b67 83 static void SPIX_UpdateFBIgnore()
<> 157:ff67d9f36b67 84 {
<> 157:ff67d9f36b67 85 // Update the feedback ignore clocks
<> 157:ff67d9f36b67 86 uint8_t clocks = 0;
<> 157:ff67d9f36b67 87 uint8_t no_cmd_clocks = 0;
<> 157:ff67d9f36b67 88
<> 157:ff67d9f36b67 89 // Adjust the clocks for the command
<> 157:ff67d9f36b67 90 if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH) ==
<> 157:ff67d9f36b67 91 MXC_S_SPIX_FETCH_CTRL_CMD_WIDTH_QUAD_IO) {
<> 157:ff67d9f36b67 92
<> 157:ff67d9f36b67 93 clocks += CMD_CLOCKS/4;
<> 157:ff67d9f36b67 94 } else if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH) ==
<> 157:ff67d9f36b67 95 MXC_S_SPIX_FETCH_CTRL_CMD_WIDTH_DUAL_IO) {
<> 157:ff67d9f36b67 96
<> 157:ff67d9f36b67 97 clocks += CMD_CLOCKS/2;
<> 157:ff67d9f36b67 98 } else {
<> 157:ff67d9f36b67 99
<> 157:ff67d9f36b67 100 clocks += CMD_CLOCKS;
<> 157:ff67d9f36b67 101 }
<> 157:ff67d9f36b67 102
<> 157:ff67d9f36b67 103 // Adjust the clocks for the address
<> 157:ff67d9f36b67 104 if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH) ==
<> 157:ff67d9f36b67 105 MXC_S_SPIX_FETCH_CTRL_ADDR_WIDTH_QUAD_IO) {
<> 157:ff67d9f36b67 106
<> 157:ff67d9f36b67 107 if(MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR) {
<> 157:ff67d9f36b67 108 clocks += ADDR_4BYTE_CLOCKS/4;
<> 157:ff67d9f36b67 109 no_cmd_clocks += ADDR_4BYTE_CLOCKS/4;
<> 157:ff67d9f36b67 110 } else {
<> 157:ff67d9f36b67 111 clocks += ADDR_3BYTE_CLOCKS/4;
<> 157:ff67d9f36b67 112 no_cmd_clocks += ADDR_3BYTE_CLOCKS/4;
<> 157:ff67d9f36b67 113 }
<> 157:ff67d9f36b67 114
<> 157:ff67d9f36b67 115 } else if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH) ==
<> 157:ff67d9f36b67 116 MXC_S_SPIX_FETCH_CTRL_ADDR_WIDTH_DUAL_IO) {
<> 157:ff67d9f36b67 117
<> 157:ff67d9f36b67 118 if(MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR) {
<> 157:ff67d9f36b67 119 clocks += ADDR_4BYTE_CLOCKS/2;
<> 157:ff67d9f36b67 120 no_cmd_clocks += ADDR_4BYTE_CLOCKS/2;
<> 157:ff67d9f36b67 121 } else {
<> 157:ff67d9f36b67 122 clocks += ADDR_3BYTE_CLOCKS/2;
<> 157:ff67d9f36b67 123 no_cmd_clocks += ADDR_3BYTE_CLOCKS/2;
<> 157:ff67d9f36b67 124 }
<> 157:ff67d9f36b67 125 } else {
<> 157:ff67d9f36b67 126
<> 157:ff67d9f36b67 127 if(MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR) {
<> 157:ff67d9f36b67 128 clocks += ADDR_4BYTE_CLOCKS;
<> 157:ff67d9f36b67 129 no_cmd_clocks += ADDR_4BYTE_CLOCKS;
<> 157:ff67d9f36b67 130 } else {
<> 157:ff67d9f36b67 131 clocks += ADDR_3BYTE_CLOCKS;
<> 157:ff67d9f36b67 132 no_cmd_clocks += ADDR_3BYTE_CLOCKS;
<> 157:ff67d9f36b67 133 }
<> 157:ff67d9f36b67 134 }
<> 157:ff67d9f36b67 135
<> 157:ff67d9f36b67 136 // Adjust for the mode clocks
<> 157:ff67d9f36b67 137 clocks += ((MXC_SPIX->mode_ctrl & MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS) >>
<> 157:ff67d9f36b67 138 MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS_POS);
<> 157:ff67d9f36b67 139
<> 157:ff67d9f36b67 140 // Set the FB Ignore clocks
<> 157:ff67d9f36b67 141 MXC_SPIX->sck_fb_ctrl = ((MXC_SPIX->sck_fb_ctrl & ~MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS) |
<> 157:ff67d9f36b67 142 (clocks << MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS_POS));
<> 157:ff67d9f36b67 143
<> 157:ff67d9f36b67 144 MXC_SPIX->sck_fb_ctrl = ((MXC_SPIX->sck_fb_ctrl & ~MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS_NO_CMD) |
<> 157:ff67d9f36b67 145 (no_cmd_clocks << MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS_NO_CMD_POS));
<> 157:ff67d9f36b67 146 }
<> 157:ff67d9f36b67 147 #endif /* MXC_SPIX_REV==0 */
<> 157:ff67d9f36b67 148
<> 157:ff67d9f36b67 149 /******************************************************************************/
<> 157:ff67d9f36b67 150 #if defined ( __GNUC__ )
<> 157:ff67d9f36b67 151 __attribute__ ((section(".spix_config"), noinline))
<> 157:ff67d9f36b67 152 #endif /* __GNUC */
<> 157:ff67d9f36b67 153
<> 157:ff67d9f36b67 154 #if IAR_SPIX_PRAGMA
<> 157:ff67d9f36b67 155 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
<> 157:ff67d9f36b67 156 #pragma optimize=no_inline // IAR no inline optimization on this function
<> 157:ff67d9f36b67 157 #endif /* IAR_SPIX_PRAGMA */
<> 157:ff67d9f36b67 158 int SPIX_ConfigClock(const sys_cfg_spix_t *sys_cfg, uint32_t baud, uint8_t sample)
<> 157:ff67d9f36b67 159 {
<> 157:ff67d9f36b67 160 int err;
<> 157:ff67d9f36b67 161 uint32_t spix_clk, clocks;
<> 157:ff67d9f36b67 162
<> 157:ff67d9f36b67 163 // Check the input parameters
<> 157:ff67d9f36b67 164 if(sys_cfg == NULL) {
<> 157:ff67d9f36b67 165 return E_NULL_PTR;
<> 157:ff67d9f36b67 166 }
<> 157:ff67d9f36b67 167
<> 157:ff67d9f36b67 168 // Set system level configurations
<> 157:ff67d9f36b67 169 if ((err = SYS_SPIX_Init(sys_cfg, baud)) != E_NO_ERROR) {
<> 157:ff67d9f36b67 170 return err;
<> 157:ff67d9f36b67 171 }
<> 157:ff67d9f36b67 172
<> 157:ff67d9f36b67 173 // Configure the mode and baud
<> 157:ff67d9f36b67 174 spix_clk = SYS_SPIX_GetFreq();
<> 157:ff67d9f36b67 175 if(spix_clk <= 0) {
<> 157:ff67d9f36b67 176 return E_UNINITIALIZED;
<> 157:ff67d9f36b67 177 }
<> 157:ff67d9f36b67 178
<> 157:ff67d9f36b67 179 // Make sure that we can generate this frequency
<> 157:ff67d9f36b67 180 clocks = (spix_clk / (2*baud));
<> 157:ff67d9f36b67 181 if((clocks <= 0) || (clocks >= 0x10)) {
<> 157:ff67d9f36b67 182 return E_BAD_PARAM;
<> 157:ff67d9f36b67 183 }
<> 157:ff67d9f36b67 184
<> 157:ff67d9f36b67 185 // Set the baud
<> 157:ff67d9f36b67 186 MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg &
<> 157:ff67d9f36b67 187 ~(MXC_F_SPIX_MASTER_CFG_SCK_HI_CLK | MXC_F_SPIX_MASTER_CFG_SCK_LO_CLK)) |
<> 157:ff67d9f36b67 188 (clocks << MXC_F_SPIX_MASTER_CFG_SCK_HI_CLK_POS) |
<> 157:ff67d9f36b67 189 (clocks << MXC_F_SPIX_MASTER_CFG_SCK_LO_CLK_POS));
<> 157:ff67d9f36b67 190
<> 157:ff67d9f36b67 191 if(sample != 0) {
<> 157:ff67d9f36b67 192 // Use sample mode
<> 157:ff67d9f36b67 193 MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg & ~MXC_F_SPIX_MASTER_CFG_SDIO_SAMPLE_POINT) |
<> 157:ff67d9f36b67 194 (sample << MXC_F_SPIX_MASTER_CFG_SDIO_SAMPLE_POINT_POS));
<> 157:ff67d9f36b67 195
<> 157:ff67d9f36b67 196 MXC_SPIX->sck_fb_ctrl &= ~(MXC_F_SPIX_SCK_FB_CTRL_ENABLE_SCK_FB_MODE |
<> 157:ff67d9f36b67 197 MXC_F_SPIX_SCK_FB_CTRL_INVERT_SCK_FB_CLK);
<> 157:ff67d9f36b67 198 } else {
<> 157:ff67d9f36b67 199 // Use Feedback mode
<> 157:ff67d9f36b67 200 MXC_SPIX->master_cfg &= ~(MXC_F_SPIX_MASTER_CFG_SDIO_SAMPLE_POINT);
<> 157:ff67d9f36b67 201
<> 157:ff67d9f36b67 202 MXC_SPIX->sck_fb_ctrl |= (MXC_F_SPIX_SCK_FB_CTRL_ENABLE_SCK_FB_MODE |
<> 157:ff67d9f36b67 203 MXC_F_SPIX_SCK_FB_CTRL_INVERT_SCK_FB_CLK);
<> 157:ff67d9f36b67 204
<> 157:ff67d9f36b67 205
<> 157:ff67d9f36b67 206 #if(MXC_SPIX_REV == 0)
<> 157:ff67d9f36b67 207 SPIX_UpdateFBIgnore();
<> 157:ff67d9f36b67 208 #endif
<> 157:ff67d9f36b67 209 }
<> 157:ff67d9f36b67 210
<> 157:ff67d9f36b67 211 return E_NO_ERROR;
<> 157:ff67d9f36b67 212 }
<> 157:ff67d9f36b67 213
<> 157:ff67d9f36b67 214 /******************************************************************************/
<> 157:ff67d9f36b67 215 #if defined ( __GNUC__ )
<> 157:ff67d9f36b67 216 __attribute__ ((section(".spix_config"), noinline))
<> 157:ff67d9f36b67 217 #endif /* __GNUC */
<> 157:ff67d9f36b67 218
<> 157:ff67d9f36b67 219 #if IAR_SPIX_PRAGMA
<> 157:ff67d9f36b67 220 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
<> 157:ff67d9f36b67 221 #pragma optimize=no_inline // IAR no inline optimization on this function
<> 157:ff67d9f36b67 222 #endif /* IAR_SPIX_PRAGMA */
<> 157:ff67d9f36b67 223
<> 157:ff67d9f36b67 224 void SPIX_ConfigSlave(uint8_t ssel, uint8_t pol, uint8_t act_delay, uint8_t inact_delay)
<> 157:ff67d9f36b67 225 {
<> 157:ff67d9f36b67 226
<> 157:ff67d9f36b67 227 // Set the slave select
<> 157:ff67d9f36b67 228 MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg & ~MXC_F_SPIX_MASTER_CFG_SLAVE_SEL) |
<> 157:ff67d9f36b67 229 (ssel << MXC_F_SPIX_MASTER_CFG_SLAVE_SEL_POS));
<> 157:ff67d9f36b67 230
<> 157:ff67d9f36b67 231 if(pol != 0) {
<> 157:ff67d9f36b67 232 // Active high
<> 157:ff67d9f36b67 233 MXC_SPIX->master_cfg &= ~(MXC_F_SPIX_MASTER_CFG_SS_ACT_LO);
<> 157:ff67d9f36b67 234 } else {
<> 157:ff67d9f36b67 235 // Active low
<> 157:ff67d9f36b67 236 MXC_SPIX->master_cfg |= MXC_F_SPIX_MASTER_CFG_SS_ACT_LO;
<> 157:ff67d9f36b67 237 }
<> 157:ff67d9f36b67 238
<> 157:ff67d9f36b67 239 // Set the delays
<> 157:ff67d9f36b67 240 MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg & ~(MXC_F_SPIX_MASTER_CFG_ACT_DELAY |
<> 157:ff67d9f36b67 241 MXC_F_SPIX_MASTER_CFG_INACT_DELAY)) |
<> 157:ff67d9f36b67 242 (act_delay << MXC_F_SPIX_MASTER_CFG_ACT_DELAY_POS) |
<> 157:ff67d9f36b67 243 (inact_delay << MXC_F_SPIX_MASTER_CFG_INACT_DELAY_POS));
<> 157:ff67d9f36b67 244 }
<> 157:ff67d9f36b67 245
<> 157:ff67d9f36b67 246 /******************************************************************************/
<> 157:ff67d9f36b67 247 #if defined ( __GNUC__ )
<> 157:ff67d9f36b67 248 __attribute__ ((section(".spix_config"), noinline))
<> 157:ff67d9f36b67 249 #endif /* __GNUC */
<> 157:ff67d9f36b67 250
<> 157:ff67d9f36b67 251 #if IAR_SPIX_PRAGMA
<> 157:ff67d9f36b67 252 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
<> 157:ff67d9f36b67 253 #pragma optimize=no_inline // IAR no inline optimization on this function
<> 157:ff67d9f36b67 254 #endif /* IAR_SPIX_PRAGMA */
<> 157:ff67d9f36b67 255
<> 157:ff67d9f36b67 256 void SPIX_ConfigFetch(const spix_fetch_t *fetch)
<> 157:ff67d9f36b67 257 {
<> 157:ff67d9f36b67 258 // Configure how the SPIX fetches data
<> 157:ff67d9f36b67 259 MXC_SPIX->fetch_ctrl = (((fetch->cmd << MXC_F_SPIX_FETCH_CTRL_CMD_VALUE_POS) & MXC_F_SPIX_FETCH_CTRL_CMD_VALUE) |
<> 157:ff67d9f36b67 260 ((fetch->cmd_width << MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH_POS) & MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH) |
<> 157:ff67d9f36b67 261 ((fetch->addr_width << MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH_POS) & MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH) |
<> 157:ff67d9f36b67 262 ((fetch->data_width << MXC_F_SPIX_FETCH_CTRL_DATA_WIDTH_POS) & MXC_F_SPIX_FETCH_CTRL_DATA_WIDTH) |
<> 157:ff67d9f36b67 263 ((fetch->addr_size << MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR_POS) & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR));
<> 157:ff67d9f36b67 264
<> 157:ff67d9f36b67 265 // Set the command mode and clocks
<> 157:ff67d9f36b67 266 MXC_SPIX->mode_ctrl = (((fetch->mode_clocks << MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS_POS) & MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS) |
<> 157:ff67d9f36b67 267 (!!fetch->no_cmd_mode << MXC_F_SPIX_MODE_CTRL_NO_CMD_MODE_POS));
<> 157:ff67d9f36b67 268
<> 157:ff67d9f36b67 269 MXC_SPIX->mode_data = (((fetch->mode_data << MXC_F_SPIX_MODE_DATA_MODE_DATA_BITS_POS) & MXC_F_SPIX_MODE_DATA_MODE_DATA_BITS) |
<> 157:ff67d9f36b67 270 MXC_F_SPIX_MODE_DATA_MODE_DATA_OE);
<> 157:ff67d9f36b67 271
<> 157:ff67d9f36b67 272 #if(MXC_SPIX_REV == 0)
<> 157:ff67d9f36b67 273 SPIX_UpdateFBIgnore();
<> 157:ff67d9f36b67 274 #endif
<> 157:ff67d9f36b67 275 }
<> 157:ff67d9f36b67 276
<> 157:ff67d9f36b67 277 /******************************************************************************/
<> 157:ff67d9f36b67 278 #if defined ( __GNUC__ )
<> 157:ff67d9f36b67 279 __attribute__ ((section(".spix_config"), noinline))
<> 157:ff67d9f36b67 280 #endif /* __GNUC */
<> 157:ff67d9f36b67 281
<> 157:ff67d9f36b67 282 #if IAR_SPIX_PRAGMA
<> 157:ff67d9f36b67 283 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
<> 157:ff67d9f36b67 284 #pragma optimize=no_inline // IAR no inline optimization on this function
<> 157:ff67d9f36b67 285 #endif /* IAR_SPIX_PRAGMA */
<> 157:ff67d9f36b67 286
<> 157:ff67d9f36b67 287 int SPIX_Shutdown(mxc_spix_regs_t *spix)
<> 157:ff67d9f36b67 288 {
<> 157:ff67d9f36b67 289 int err;
<> 157:ff67d9f36b67 290
<> 157:ff67d9f36b67 291 // Clear system level configurations
<> 157:ff67d9f36b67 292 if ((err = SYS_SPIX_Shutdown()) != E_NO_ERROR) {
<> 157:ff67d9f36b67 293 return err;
<> 157:ff67d9f36b67 294 }
<> 157:ff67d9f36b67 295
<> 157:ff67d9f36b67 296 return E_NO_ERROR;
<> 157:ff67d9f36b67 297 }