Marcell Rausch / mbed-dev-no-serial

mbed library sources. Supersedes mbed-src. removed serial

Fork of mbed-dev by mbed official

targets/TARGET_Maxim/TARGET_MAX32630/mxc/ioman.h@157:ff67d9f36b67, 2017-02-02 (annotated)

Committer:
<>
Date:
Thu Feb 02 17:01:33 2017 +0000
Revision:
157:ff67d9f36b67
This updates the lib to the mbed lib v135

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 157:ff67d9f36b67 1 /*******************************************************************************
<> 157:ff67d9f36b67 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 157:ff67d9f36b67 3 *
<> 157:ff67d9f36b67 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 157:ff67d9f36b67 5 * copy of this software and associated documentation files (the "Software"),
<> 157:ff67d9f36b67 6 * to deal in the Software without restriction, including without limitation
<> 157:ff67d9f36b67 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 157:ff67d9f36b67 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 157:ff67d9f36b67 9 * Software is furnished to do so, subject to the following conditions:
<> 157:ff67d9f36b67 10 *
<> 157:ff67d9f36b67 11 * The above copyright notice and this permission notice shall be included
<> 157:ff67d9f36b67 12 * in all copies or substantial portions of the Software.
<> 157:ff67d9f36b67 13 *
<> 157:ff67d9f36b67 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 157:ff67d9f36b67 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 157:ff67d9f36b67 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 157:ff67d9f36b67 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 157:ff67d9f36b67 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 157:ff67d9f36b67 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 157:ff67d9f36b67 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 157:ff67d9f36b67 21 *
<> 157:ff67d9f36b67 22 * Except as contained in this notice, the name of Maxim Integrated
<> 157:ff67d9f36b67 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 157:ff67d9f36b67 24 * Products, Inc. Branding Policy.
<> 157:ff67d9f36b67 25 *
<> 157:ff67d9f36b67 26 * The mere transfer of this software does not imply any licenses
<> 157:ff67d9f36b67 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 157:ff67d9f36b67 28 * trademarks, maskwork rights, or any other form of intellectual
<> 157:ff67d9f36b67 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 157:ff67d9f36b67 30 * ownership rights.
<> 157:ff67d9f36b67 31 *
<> 157:ff67d9f36b67 32 * $Date: 2016-04-27 15:26:08 -0500 (Wed, 27 Apr 2016) $
<> 157:ff67d9f36b67 33 * $Revision: 22543 $
<> 157:ff67d9f36b67 34 *
<> 157:ff67d9f36b67 35 ******************************************************************************/
<> 157:ff67d9f36b67 36
<> 157:ff67d9f36b67 37 /**
<> 157:ff67d9f36b67 38 * @file ioman.h
<> 157:ff67d9f36b67 39 * @brief IOMAN provides IO Management to the device. The functions in this
<> 157:ff67d9f36b67 40 * API enable requesting port pin assignment and release for all peripherals
<> 157:ff67d9f36b67 41 * with external I/O. Port pin mapping support is included for peripherals
<> 157:ff67d9f36b67 42 * that can support more than one pin mapping in a package.
<> 157:ff67d9f36b67 43 */
<> 157:ff67d9f36b67 44
<> 157:ff67d9f36b67 45 #ifndef _IOMAN_H_
<> 157:ff67d9f36b67 46 #define _IOMAN_H_
<> 157:ff67d9f36b67 47
<> 157:ff67d9f36b67 48 #include "mxc_config.h"
<> 157:ff67d9f36b67 49 #include "ioman_regs.h"
<> 157:ff67d9f36b67 50
<> 157:ff67d9f36b67 51 #ifdef __cplusplus
<> 157:ff67d9f36b67 52 extern "C" {
<> 157:ff67d9f36b67 53 #endif
<> 157:ff67d9f36b67 54
<> 157:ff67d9f36b67 55 /***** Definitions *****/
<> 157:ff67d9f36b67 56
<> 157:ff67d9f36b67 57 /** @brief Aliases for IOMAN package mapping field values. Refer to the
<> 157:ff67d9f36b67 58 * User's Guide for pinouts for each mapping.
<> 157:ff67d9f36b67 59 */
<> 157:ff67d9f36b67 60 typedef enum {
<> 157:ff67d9f36b67 61 IOMAN_MAP_UNUSED = 0, /**< Pin is not used */
<> 157:ff67d9f36b67 62 IOMAN_MAP_A = 0, /**< Pin Mapping A */
<> 157:ff67d9f36b67 63 IOMAN_MAP_B = 1, /**< Pin Mapping B */
<> 157:ff67d9f36b67 64 IOMAN_MAP_C = 2, /**< Pin Mapping C */
<> 157:ff67d9f36b67 65 IOMAN_MAP_D = 3, /**< Pin Mapping D */
<> 157:ff67d9f36b67 66 IOMAN_MAP_E = 4, /**< Pin Mapping E */
<> 157:ff67d9f36b67 67 IOMAN_MAP_F = 5, /**< Pin Mapping F */
<> 157:ff67d9f36b67 68 IOMAN_MAP_G = 6 /**< Pin Mapping G */
<> 157:ff67d9f36b67 69 }
<> 157:ff67d9f36b67 70 ioman_map_t;
<> 157:ff67d9f36b67 71
<> 157:ff67d9f36b67 72 /** @brief Typing of IOMAN Request and Acknowledge register fields */
<> 157:ff67d9f36b67 73 typedef union {
<> 157:ff67d9f36b67 74 uint32_t value;
<> 157:ff67d9f36b67 75 mxc_ioman_spix_req_t spix; /**< SPIX IOMAN configuration struct */
<> 157:ff67d9f36b67 76 mxc_ioman_uart0_req_t uart; /**< UART IOMAN configuration struct, see mxc_ioman_uart0_req_t */
<> 157:ff67d9f36b67 77 mxc_ioman_i2cm0_req_t i2cm0; /**< I<sup>2</sup>C Master 0 IOMAN configuration struct, see mxc_ioman_i2cm0_req_t */
<> 157:ff67d9f36b67 78 mxc_ioman_i2cm1_req_t i2cm1; /**< I<sup>2</sup>C Master 1 IOMAN configuration struct, see mxc_ioman_i2cm1_req_t */
<> 157:ff67d9f36b67 79 mxc_ioman_i2cm2_req_t i2cm2; /**< I<sup>2</sup>C Master 2 IOMAN configuration struct, see mxc_ioman_i2cm2_req_t */
<> 157:ff67d9f36b67 80 mxc_ioman_i2cs_req_t i2cs; /**< I<sup>2</sup>C Slave IOMAN configuration struct, see mxc_ioman_i2cs_req_t */
<> 157:ff67d9f36b67 81 mxc_ioman_spim0_req_t spim0; /**< SPI Master 0 IOMAN configuration struct, see mxc_ioman_spim0_req_t */
<> 157:ff67d9f36b67 82 mxc_ioman_spim1_req_t spim1; /**< SPI Master 1 IOMAN configuration struct, see mxc_ioman_spim1_req_t */
<> 157:ff67d9f36b67 83 mxc_ioman_spim2_req_t spim2; /**< SPI Master 2 IOMAN configuration struct, see mxc_ioman_spim1_req_t */
<> 157:ff67d9f36b67 84 mxc_ioman_spib_req_t spib; /**< SPI Bridge IOMAN configuration struct, see mxc_ioman_spib_req_t */
<> 157:ff67d9f36b67 85 mxc_ioman_owm_req_t owm; /**< 1-Wire Master IOMAN configuration struct, see mxc_ioman_owm_req_t */
<> 157:ff67d9f36b67 86 } ioman_req_t;
<> 157:ff67d9f36b67 87
<> 157:ff67d9f36b67 88 /** @brief IOMAN configuration object */
<> 157:ff67d9f36b67 89 typedef struct {
<> 157:ff67d9f36b67 90 volatile uint32_t *req_reg; /** Pointer to an IOMAN request register */
<> 157:ff67d9f36b67 91 volatile uint32_t *ack_reg; /** Pointer to an IOMAN acknowledge register */
<> 157:ff67d9f36b67 92 ioman_req_t req_val; /** IOMAN request register value, see ioman_req_t */
<> 157:ff67d9f36b67 93 } ioman_cfg_t;
<> 157:ff67d9f36b67 94
<> 157:ff67d9f36b67 95
<> 157:ff67d9f36b67 96 /***** Function Prototypes *****/
<> 157:ff67d9f36b67 97
<> 157:ff67d9f36b67 98 /**
<> 157:ff67d9f36b67 99 * @brief Configure the IO Manager using the specified configuration object.
<> 157:ff67d9f36b67 100 * @param cfg IOMAN configuration object
<> 157:ff67d9f36b67 101 * @returns E_NO_ERROR Configuration successful
<> 157:ff67d9f36b67 102 */
<> 157:ff67d9f36b67 103 int IOMAN_Config(const ioman_cfg_t *cfg);
<> 157:ff67d9f36b67 104
<> 157:ff67d9f36b67 105 /**
<> 157:ff67d9f36b67 106 * @brief Create an IOMAN configuration object for the SPI XIP module. Call IOMAN_Config with this object.
<> 157:ff67d9f36b67 107 * @param core Request (1) or release (0) SPIX core external pins
<> 157:ff67d9f36b67 108 * @param ss0 Request (1) or release (0) slave select 0 active out
<> 157:ff67d9f36b67 109 * @param ss1 Request (1) or release (0) slave select 1 active out
<> 157:ff67d9f36b67 110 * @param ss2 Request (1) or release (0) slave select 2 active out
<> 157:ff67d9f36b67 111 * @param quad Request (1) or release (0) quad IO
<> 157:ff67d9f36b67 112 * @param fast Request (1) or release (0) fast mode
<> 157:ff67d9f36b67 113 * @returns io_man_cfg_t IOMAN configuration object for the SPI XIP module.
<> 157:ff67d9f36b67 114 */
<> 157:ff67d9f36b67 115 ioman_cfg_t IOMAN_SPIX(int core, int ss0, int ss1, int ss2, int quad, int fast);
<> 157:ff67d9f36b67 116
<> 157:ff67d9f36b67 117 /**
<> 157:ff67d9f36b67 118 * @brief Create an IOMAN configuration object for a UART module. Call IOMAN_Config with this object.
<> 157:ff67d9f36b67 119 * @param idx Index of the UART module
<> 157:ff67d9f36b67 120 * @param io_map Set the pin mapping for RX/TX pins, see ioman_map_t
<> 157:ff67d9f36b67 121 * @param cts_map Set the pin mapping for CTS pin, see ioman_map_t
<> 157:ff67d9f36b67 122 * @param rts_map Set the pin mapping for RTS pin, see ioman_map_t
<> 157:ff67d9f36b67 123 * @param io_en Request (1) or release (0) RX and TX pins
<> 157:ff67d9f36b67 124 * @param cts_en Request (1) or release (0) CTS pin
<> 157:ff67d9f36b67 125 * @param rts_en Request (1) or release (0) RTS pin
<> 157:ff67d9f36b67 126 * @returns ioman_cfg_t IOMAN configuration object for the UART module
<> 157:ff67d9f36b67 127 */
<> 157:ff67d9f36b67 128 ioman_cfg_t IOMAN_UART(int idx, ioman_map_t io_map, ioman_map_t cts_map, ioman_map_t rts_map, int io_en, int cts_en, int rts_en);
<> 157:ff67d9f36b67 129
<> 157:ff67d9f36b67 130 /**
<> 157:ff67d9f36b67 131 * @brief Create an IOMAN configuration object for the I2CM0 module. Call IOMAN_Config with this object.
<> 157:ff67d9f36b67 132 * @param map Set the pin mapping for I2CM1 module, see ioman_map_t
<> 157:ff67d9f36b67 133 * @param io_en Request (1) or release (0) the I/O for the I2CM0 module
<> 157:ff67d9f36b67 134 * @returns ioman_cfg_t IOMAN configuration object for the I2CM0 module.
<> 157:ff67d9f36b67 135 */
<> 157:ff67d9f36b67 136 ioman_cfg_t IOMAN_I2CM0(ioman_map_t map, int io_en);
<> 157:ff67d9f36b67 137
<> 157:ff67d9f36b67 138 /**
<> 157:ff67d9f36b67 139 * @brief Create an IOMAN configuration object for the I2CM1 module. Call IOMAN_Config with this object.
<> 157:ff67d9f36b67 140 * @param map Set the pin mapping for I2CM1 module, see ioman_map_t
<> 157:ff67d9f36b67 141 * @param io_en Request (1) or release (0) the I/O for the I2CM1 module
<> 157:ff67d9f36b67 142 * @returns ioman_cfg_t IOMAN configuration object for the I2CM0 module.
<> 157:ff67d9f36b67 143 */
<> 157:ff67d9f36b67 144 ioman_cfg_t IOMAN_I2CM1(ioman_map_t map, int io_en);
<> 157:ff67d9f36b67 145
<> 157:ff67d9f36b67 146 /**
<> 157:ff67d9f36b67 147 * @brief Create an IOMAN configuration object for the I2CM2 module. Call IOMAN_Config with this object.
<> 157:ff67d9f36b67 148 * @param map Set the pin mapping for I2CM2 module, see ioman_map_t
<> 157:ff67d9f36b67 149 * @param io_en Request (1) or release (0) the I/O for the I2CM2 module
<> 157:ff67d9f36b67 150 * @returns ioman_cfg_t IOMAN configuration object for the I2CM0 module.
<> 157:ff67d9f36b67 151 */
<> 157:ff67d9f36b67 152 ioman_cfg_t IOMAN_I2CM2(ioman_map_t map, int io_en);
<> 157:ff67d9f36b67 153
<> 157:ff67d9f36b67 154 /**
<> 157:ff67d9f36b67 155 * @brief Create an IOMAN configuration object for an I2C slave module. Call IOMAN_Config with this object.
<> 157:ff67d9f36b67 156 * @param map Select the pin mapping for all configured pins, see ioman_map_t
<> 157:ff67d9f36b67 157 * @param io_en Request (1) or release (0) the I/O for this module
<> 157:ff67d9f36b67 158 * @returns ioman_cfg_t IOMAN configuration object for the I2CS module
<> 157:ff67d9f36b67 159 */
<> 157:ff67d9f36b67 160 ioman_cfg_t IOMAN_I2CS(ioman_map_t map, int io_en);
<> 157:ff67d9f36b67 161
<> 157:ff67d9f36b67 162 /**
<> 157:ff67d9f36b67 163 * @brief Create an IOMAN configuration object for a SPI Master (SPIM) module. Call IOMAN_Config with this object.
<> 157:ff67d9f36b67 164 * @param io_en Request (1) or release (0) the core IO for the module
<> 157:ff67d9f36b67 165 * @param ss0 Request (1) or release (0) slave select 0
<> 157:ff67d9f36b67 166 * @param ss1 Request (1) or release (0) slave select 1
<> 157:ff67d9f36b67 167 * @param ss2 Request (1) or release (0) slave select 2
<> 157:ff67d9f36b67 168 * @param ss3 Request (1) or release (0) slave select 3
<> 157:ff67d9f36b67 169 * @param ss4 Request (1) or release (0) slave select 4
<> 157:ff67d9f36b67 170 * @param quad Request (1) or release (0) quad IO
<> 157:ff67d9f36b67 171 * @param fast Request (1) or release (0) fast mode
<> 157:ff67d9f36b67 172 * @returns ioman_cfg_t IOMAN configuration object for an SPIM0 module
<> 157:ff67d9f36b67 173 */
<> 157:ff67d9f36b67 174 ioman_cfg_t IOMAN_SPIM0(int io_en, int ss0, int ss1, int ss2, int ss3, int ss4, int quad, int fast);
<> 157:ff67d9f36b67 175
<> 157:ff67d9f36b67 176 /**
<> 157:ff67d9f36b67 177 * @brief Create an IOMAN configuration object for a SPIM module. Call IOMAN_Config with this object.
<> 157:ff67d9f36b67 178 * @param io_en Request (1) or release (0) the core IO for the module
<> 157:ff67d9f36b67 179 * @param ss0 Request (1) or release (0) slave select 0
<> 157:ff67d9f36b67 180 * @param ss1 Request (1) or release (0) slave select 1
<> 157:ff67d9f36b67 181 * @param ss2 Request (1) or release (0) slave select 2
<> 157:ff67d9f36b67 182 * @param quad Request (1) or release (0) quad IO
<> 157:ff67d9f36b67 183 * @param fast Request (1) or release (0) fast mode
<> 157:ff67d9f36b67 184 * @returns ioman_cfg_t IOMAN configuration object for the SPIM1 module.
<> 157:ff67d9f36b67 185 */
<> 157:ff67d9f36b67 186 ioman_cfg_t IOMAN_SPIM1(int io_en, int ss0, int ss1, int ss2, int quad, int fast);
<> 157:ff67d9f36b67 187
<> 157:ff67d9f36b67 188 /**
<> 157:ff67d9f36b67 189 * @brief Create an IOMAN configuration object for a SPI module. Call IOMAN_Config with this object.
<> 157:ff67d9f36b67 190 * @param map Select the pin mapping, see ioman_map_t
<> 157:ff67d9f36b67 191 * @param io_en Request (1) or release (0) the core IO for the module
<> 157:ff67d9f36b67 192 * @param ss0 Request (1) or release (0) slave select 0
<> 157:ff67d9f36b67 193 * @param ss1 Request (1) or release (0) slave select 1
<> 157:ff67d9f36b67 194 * @param ss2 Request (1) or release (0) slave select 2
<> 157:ff67d9f36b67 195 * @param sr0 Request (1) or release (0) slave ready 0
<> 157:ff67d9f36b67 196 * @param sr1 Request (1) or release (0) slave ready 1
<> 157:ff67d9f36b67 197 * @param quad Request (1) or release (0) quad IO
<> 157:ff67d9f36b67 198 * @param fast Request (1) or release (0) fast mode
<> 157:ff67d9f36b67 199 * @returns ioman_cfg_t IOMAN configuration object for the SPIM2 module
<> 157:ff67d9f36b67 200 */
<> 157:ff67d9f36b67 201 ioman_cfg_t IOMAN_SPIM2(ioman_map_t map, int io_en, int ss0, int ss1, int ss2, int sr0, int sr1, int quad, int fast);
<> 157:ff67d9f36b67 202
<> 157:ff67d9f36b67 203 /**
<> 157:ff67d9f36b67 204 * @brief Create an IOMAN configuration object for the SPI Bridge module. Call IOMAN_Config with this object.
<> 157:ff67d9f36b67 205 * @param io_en Request (1) or release (0) the core IO for the module
<> 157:ff67d9f36b67 206 * @param quad Request (1) or release (0) quad IO
<> 157:ff67d9f36b67 207 * @param fast Request (1) or release (0) fast mode
<> 157:ff67d9f36b67 208 * @returns ioman_cfg_t IOMAN configuration object for the SPIB module
<> 157:ff67d9f36b67 209 */
<> 157:ff67d9f36b67 210 ioman_cfg_t IOMAN_SPIB(int io_en, int quad, int fast);
<> 157:ff67d9f36b67 211
<> 157:ff67d9f36b67 212 /**
<> 157:ff67d9f36b67 213 * @brief Create an IOMAN configuration object for the 1-Wire Master module. Call IOMAN_Config with this object.
<> 157:ff67d9f36b67 214 * @param io_en Request (1) or release (0) the core IO for the module
<> 157:ff67d9f36b67 215 * @param epu Request (1) or release (0) external pullup
<> 157:ff67d9f36b67 216 * @returns ioman_cfg_t IOMAN configuration object for the OWM module
<> 157:ff67d9f36b67 217 */
<> 157:ff67d9f36b67 218 ioman_cfg_t IOMAN_OWM(int io_en, int epu);
<> 157:ff67d9f36b67 219
<> 157:ff67d9f36b67 220 /**
<> 157:ff67d9f36b67 221 * @}
<> 157:ff67d9f36b67 222 */
<> 157:ff67d9f36b67 223
<> 157:ff67d9f36b67 224 /******************************************************************************/
<> 157:ff67d9f36b67 225 /* All the function prototypes above are implemented as macros below. The
<> 157:ff67d9f36b67 226 * above prototypes are for simplicity in doxygen.
<> 157:ff67d9f36b67 227 */
<> 157:ff67d9f36b67 228 #define IOMAN_SPIX(c, ss0, ss1, ss2, q, f) { \
<> 157:ff67d9f36b67 229 .req_reg = &MXC_IOMAN->spix_req, \
<> 157:ff67d9f36b67 230 .ack_reg = &MXC_IOMAN->spix_ack, \
<> 157:ff67d9f36b67 231 .req_val.spix = { .core_io_req = c, \
<> 157:ff67d9f36b67 232 .ss0_io_req = ss0, \
<> 157:ff67d9f36b67 233 .ss1_io_req = ss1, \
<> 157:ff67d9f36b67 234 .ss2_io_req = ss2, \
<> 157:ff67d9f36b67 235 .quad_io_req = q, \
<> 157:ff67d9f36b67 236 .fast_mode = f } }
<> 157:ff67d9f36b67 237
<> 157:ff67d9f36b67 238 #define IOMAN_UART(i, im, cm, rm, ien, cen, ren) { \
<> 157:ff67d9f36b67 239 .req_reg = (uint32_t*)((unsigned int)(&MXC_IOMAN->uart0_req) + (i * 2*sizeof(uint32_t))), \
<> 157:ff67d9f36b67 240 .ack_reg = (uint32_t*)((unsigned int)(&MXC_IOMAN->uart0_ack) + (i * 2*sizeof(uint32_t))), \
<> 157:ff67d9f36b67 241 .req_val.uart = { .io_map = im, \
<> 157:ff67d9f36b67 242 .cts_map = cm, \
<> 157:ff67d9f36b67 243 .rts_map = rm, \
<> 157:ff67d9f36b67 244 .io_req = ien, \
<> 157:ff67d9f36b67 245 .cts_io_req = cen, \
<> 157:ff67d9f36b67 246 .rts_io_req = ren } }
<> 157:ff67d9f36b67 247
<> 157:ff67d9f36b67 248 #define IOMAN_I2CM0(m, ien ) { \
<> 157:ff67d9f36b67 249 .req_reg = ((&MXC_IOMAN->i2cm0_req)), \
<> 157:ff67d9f36b67 250 .ack_reg = ((&MXC_IOMAN->i2cm0_ack)), \
<> 157:ff67d9f36b67 251 .req_val.i2cm0 = { .mapping_req = ien } }
<> 157:ff67d9f36b67 252
<> 157:ff67d9f36b67 253 #define IOMAN_I2CM1(m, ien) { \
<> 157:ff67d9f36b67 254 .req_reg = (uint32_t*)((unsigned int)(&MXC_IOMAN->i2cm1_req)), \
<> 157:ff67d9f36b67 255 .ack_reg = (uint32_t*)((unsigned int) (&MXC_IOMAN->i2cm1_ack)), \
<> 157:ff67d9f36b67 256 .req_val.i2cm1 = { .io_sel = m, \
<> 157:ff67d9f36b67 257 .mapping_req = ien } }
<> 157:ff67d9f36b67 258
<> 157:ff67d9f36b67 259 #define IOMAN_I2CM2(m, ien) { \
<> 157:ff67d9f36b67 260 .req_reg = (uint32_t*)((unsigned int)(&MXC_IOMAN->i2cm2_req)), \
<> 157:ff67d9f36b67 261 .ack_reg = (uint32_t*)((unsigned int) (&MXC_IOMAN->i2cm2_ack)), \
<> 157:ff67d9f36b67 262 .req_val.i2cm2 = { .io_sel = m, \
<> 157:ff67d9f36b67 263 .mapping_req = ien } }
<> 157:ff67d9f36b67 264
<> 157:ff67d9f36b67 265 #define IOMAN_I2CS(m, ien) { \
<> 157:ff67d9f36b67 266 .req_reg = &MXC_IOMAN->i2cs_req, \
<> 157:ff67d9f36b67 267 .ack_reg = &MXC_IOMAN->i2cs_ack, \
<> 157:ff67d9f36b67 268 .req_val.i2cs = { .io_sel = m, \
<> 157:ff67d9f36b67 269 .mapping_req = ien } }
<> 157:ff67d9f36b67 270
<> 157:ff67d9f36b67 271 #define IOMAN_SPIM0(io, ss0, ss1, ss2, ss3, ss4, q, f) { \
<> 157:ff67d9f36b67 272 .req_reg = &MXC_IOMAN->spim0_req, \
<> 157:ff67d9f36b67 273 .ack_reg = &MXC_IOMAN->spim0_ack, \
<> 157:ff67d9f36b67 274 .req_val.spim0 = { .core_io_req = io, \
<> 157:ff67d9f36b67 275 .ss0_io_req = ss0, \
<> 157:ff67d9f36b67 276 .ss1_io_req = ss1, \
<> 157:ff67d9f36b67 277 .ss2_io_req = ss2, \
<> 157:ff67d9f36b67 278 .ss3_io_req = ss3, \
<> 157:ff67d9f36b67 279 .ss4_io_req = ss4, \
<> 157:ff67d9f36b67 280 .quad_io_req = q, \
<> 157:ff67d9f36b67 281 .fast_mode = f } }
<> 157:ff67d9f36b67 282
<> 157:ff67d9f36b67 283 #define IOMAN_SPIM1(io, ss0, ss1, ss2, q, f) { \
<> 157:ff67d9f36b67 284 .req_reg = &MXC_IOMAN->spim1_req, \
<> 157:ff67d9f36b67 285 .ack_reg = &MXC_IOMAN->spim1_ack, \
<> 157:ff67d9f36b67 286 .req_val.spim1 = { .core_io_req = io, \
<> 157:ff67d9f36b67 287 .ss0_io_req = ss0, \
<> 157:ff67d9f36b67 288 .ss1_io_req = ss1, \
<> 157:ff67d9f36b67 289 .ss2_io_req = ss2, \
<> 157:ff67d9f36b67 290 .quad_io_req = q, \
<> 157:ff67d9f36b67 291 .fast_mode = f } }
<> 157:ff67d9f36b67 292
<> 157:ff67d9f36b67 293 #define IOMAN_SPIM2(m, io, ss0, ss1, ss2, sr0, sr1, q, f) { \
<> 157:ff67d9f36b67 294 .req_reg = &MXC_IOMAN->spim2_req, \
<> 157:ff67d9f36b67 295 .ack_reg = &MXC_IOMAN->spim2_ack, \
<> 157:ff67d9f36b67 296 .req_val.spim2 = { .mapping_req = m, \
<> 157:ff67d9f36b67 297 .core_io_req = io, \
<> 157:ff67d9f36b67 298 .ss0_io_req = ss0, \
<> 157:ff67d9f36b67 299 .ss1_io_req = ss1, \
<> 157:ff67d9f36b67 300 .ss2_io_req = ss2, \
<> 157:ff67d9f36b67 301 .sr0_io_req = sr0, \
<> 157:ff67d9f36b67 302 .sr1_io_req = sr1, \
<> 157:ff67d9f36b67 303 .quad_io_req = q, \
<> 157:ff67d9f36b67 304 .fast_mode = f } }
<> 157:ff67d9f36b67 305
<> 157:ff67d9f36b67 306 #define IOMAN_SPIB(io, q, f) { \
<> 157:ff67d9f36b67 307 .req_reg = &MXC_IOMAN->spib_req, \
<> 157:ff67d9f36b67 308 .ack_reg = &MXC_IOMAN->spib_ack, \
<> 157:ff67d9f36b67 309 .req_val.spib = { .core_io_req = io, \
<> 157:ff67d9f36b67 310 .quad_io_req = q, \
<> 157:ff67d9f36b67 311 .fast_mode = f } }
<> 157:ff67d9f36b67 312
<> 157:ff67d9f36b67 313 #define IOMAN_OWM(io, p) { \
<> 157:ff67d9f36b67 314 .req_reg = &MXC_IOMAN->owm_req, \
<> 157:ff67d9f36b67 315 .ack_reg = &MXC_IOMAN->owm_ack, \
<> 157:ff67d9f36b67 316 .req_val.owm = { .mapping_req = io, \
<> 157:ff67d9f36b67 317 .epu_io_req = p } }
<> 157:ff67d9f36b67 318
<> 157:ff67d9f36b67 319 #ifdef __cplusplus
<> 157:ff67d9f36b67 320 }
<> 157:ff67d9f36b67 321 #endif
<> 157:ff67d9f36b67 322
<> 157:ff67d9f36b67 323 #endif /* _IOMAN_H_ */