Mohamed Moawya / SnakeGame

test test test

Dependencies:   mbed

snake-test/mbed/hal/qspi_api.h@0:e4c5e6ec922e, 2020-05-25 (annotated)

Committer:
mohamedmoawya
Date:
Mon May 25 19:06:11 2020 +0000
Revision:
0:e4c5e6ec922e
snake game tteest

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mohamedmoawya 0:e4c5e6ec922e 1
mohamedmoawya 0:e4c5e6ec922e 2 /** \addtogroup hal */
mohamedmoawya 0:e4c5e6ec922e 3 /** @{*/
mohamedmoawya 0:e4c5e6ec922e 4 /* mbed Microcontroller Library
mohamedmoawya 0:e4c5e6ec922e 5 * Copyright (c) 2017 ARM Limited
mohamedmoawya 0:e4c5e6ec922e 6 *
mohamedmoawya 0:e4c5e6ec922e 7 * Licensed under the Apache License, Version 2.0 (the "License");
mohamedmoawya 0:e4c5e6ec922e 8 * you may not use this file except in compliance with the License.
mohamedmoawya 0:e4c5e6ec922e 9 * You may obtain a copy of the License at
mohamedmoawya 0:e4c5e6ec922e 10 *
mohamedmoawya 0:e4c5e6ec922e 11 * http://www.apache.org/licenses/LICENSE-2.0
mohamedmoawya 0:e4c5e6ec922e 12 *
mohamedmoawya 0:e4c5e6ec922e 13 * Unless required by applicable law or agreed to in writing, software
mohamedmoawya 0:e4c5e6ec922e 14 * distributed under the License is distributed on an "AS IS" BASIS,
mohamedmoawya 0:e4c5e6ec922e 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mohamedmoawya 0:e4c5e6ec922e 16 * See the License for the specific language governing permissions and
mohamedmoawya 0:e4c5e6ec922e 17 * limitations under the License.
mohamedmoawya 0:e4c5e6ec922e 18 */
mohamedmoawya 0:e4c5e6ec922e 19 #ifndef MBED_QSPI_API_H
mohamedmoawya 0:e4c5e6ec922e 20 #define MBED_QSPI_API_H
mohamedmoawya 0:e4c5e6ec922e 21
mohamedmoawya 0:e4c5e6ec922e 22 #include "device.h"
mohamedmoawya 0:e4c5e6ec922e 23 #include <stdbool.h>
mohamedmoawya 0:e4c5e6ec922e 24
mohamedmoawya 0:e4c5e6ec922e 25 #if DEVICE_QSPI
mohamedmoawya 0:e4c5e6ec922e 26
mohamedmoawya 0:e4c5e6ec922e 27 #ifdef __cplusplus
mohamedmoawya 0:e4c5e6ec922e 28 extern "C" {
mohamedmoawya 0:e4c5e6ec922e 29 #endif
mohamedmoawya 0:e4c5e6ec922e 30
mohamedmoawya 0:e4c5e6ec922e 31 /**
mohamedmoawya 0:e4c5e6ec922e 32 * \defgroup hal_qspi QSPI HAL
mohamedmoawya 0:e4c5e6ec922e 33 * @{
mohamedmoawya 0:e4c5e6ec922e 34 */
mohamedmoawya 0:e4c5e6ec922e 35
mohamedmoawya 0:e4c5e6ec922e 36 /** QSPI HAL object
mohamedmoawya 0:e4c5e6ec922e 37 */
mohamedmoawya 0:e4c5e6ec922e 38 typedef struct qspi_s qspi_t;
mohamedmoawya 0:e4c5e6ec922e 39
mohamedmoawya 0:e4c5e6ec922e 40 /** QSPI Bus width
mohamedmoawya 0:e4c5e6ec922e 41 *
mohamedmoawya 0:e4c5e6ec922e 42 * Some parts of commands provide variable bus width
mohamedmoawya 0:e4c5e6ec922e 43 */
mohamedmoawya 0:e4c5e6ec922e 44 typedef enum qspi_bus_width {
mohamedmoawya 0:e4c5e6ec922e 45 QSPI_CFG_BUS_SINGLE,
mohamedmoawya 0:e4c5e6ec922e 46 QSPI_CFG_BUS_DUAL,
mohamedmoawya 0:e4c5e6ec922e 47 QSPI_CFG_BUS_QUAD,
mohamedmoawya 0:e4c5e6ec922e 48 } qspi_bus_width_t;
mohamedmoawya 0:e4c5e6ec922e 49
mohamedmoawya 0:e4c5e6ec922e 50 /** Address size in bits
mohamedmoawya 0:e4c5e6ec922e 51 */
mohamedmoawya 0:e4c5e6ec922e 52 typedef enum qspi_address_size {
mohamedmoawya 0:e4c5e6ec922e 53 QSPI_CFG_ADDR_SIZE_8,
mohamedmoawya 0:e4c5e6ec922e 54 QSPI_CFG_ADDR_SIZE_16,
mohamedmoawya 0:e4c5e6ec922e 55 QSPI_CFG_ADDR_SIZE_24,
mohamedmoawya 0:e4c5e6ec922e 56 QSPI_CFG_ADDR_SIZE_32,
mohamedmoawya 0:e4c5e6ec922e 57 } qspi_address_size_t;
mohamedmoawya 0:e4c5e6ec922e 58
mohamedmoawya 0:e4c5e6ec922e 59 /** Alternative size in bits
mohamedmoawya 0:e4c5e6ec922e 60 */
mohamedmoawya 0:e4c5e6ec922e 61 typedef enum qspi_alt_size {
mohamedmoawya 0:e4c5e6ec922e 62 QSPI_CFG_ALT_SIZE_8,
mohamedmoawya 0:e4c5e6ec922e 63 QSPI_CFG_ALT_SIZE_16,
mohamedmoawya 0:e4c5e6ec922e 64 QSPI_CFG_ALT_SIZE_24,
mohamedmoawya 0:e4c5e6ec922e 65 QSPI_CFG_ALT_SIZE_32,
mohamedmoawya 0:e4c5e6ec922e 66 } qspi_alt_size_t;
mohamedmoawya 0:e4c5e6ec922e 67
mohamedmoawya 0:e4c5e6ec922e 68 /** QSPI command
mohamedmoawya 0:e4c5e6ec922e 69 *
mohamedmoawya 0:e4c5e6ec922e 70 * Defines a frame format. It consists of instruction, address, alternative, dummy count and data
mohamedmoawya 0:e4c5e6ec922e 71 */
mohamedmoawya 0:e4c5e6ec922e 72 typedef struct qspi_command {
mohamedmoawya 0:e4c5e6ec922e 73 struct {
mohamedmoawya 0:e4c5e6ec922e 74 qspi_bus_width_t bus_width; /**< Bus width for the instruction >*/
mohamedmoawya 0:e4c5e6ec922e 75 uint8_t value; /**< Instruction value >*/
mohamedmoawya 0:e4c5e6ec922e 76 bool disabled; /**< Instruction phase skipped if disabled is set to true >*/
mohamedmoawya 0:e4c5e6ec922e 77 } instruction;
mohamedmoawya 0:e4c5e6ec922e 78 struct {
mohamedmoawya 0:e4c5e6ec922e 79 qspi_bus_width_t bus_width; /**< Bus width for the address >*/
mohamedmoawya 0:e4c5e6ec922e 80 qspi_address_size_t size; /**< Address size >*/
mohamedmoawya 0:e4c5e6ec922e 81 uint32_t value; /**< Address value >*/
mohamedmoawya 0:e4c5e6ec922e 82 bool disabled; /**< Address phase skipped if disabled is set to true >*/
mohamedmoawya 0:e4c5e6ec922e 83 } address;
mohamedmoawya 0:e4c5e6ec922e 84 struct {
mohamedmoawya 0:e4c5e6ec922e 85 qspi_bus_width_t bus_width; /**< Bus width for alternative >*/
mohamedmoawya 0:e4c5e6ec922e 86 qspi_alt_size_t size; /**< Alternative size >*/
mohamedmoawya 0:e4c5e6ec922e 87 uint32_t value; /**< Alternative value >*/
mohamedmoawya 0:e4c5e6ec922e 88 bool disabled; /**< Alternative phase skipped if disabled is set to true >*/
mohamedmoawya 0:e4c5e6ec922e 89 } alt;
mohamedmoawya 0:e4c5e6ec922e 90 uint8_t dummy_count; /**< Dummy cycles count >*/
mohamedmoawya 0:e4c5e6ec922e 91 struct {
mohamedmoawya 0:e4c5e6ec922e 92 qspi_bus_width_t bus_width; /**< Bus width for data >*/
mohamedmoawya 0:e4c5e6ec922e 93 } data;
mohamedmoawya 0:e4c5e6ec922e 94 } qspi_command_t;
mohamedmoawya 0:e4c5e6ec922e 95
mohamedmoawya 0:e4c5e6ec922e 96 /** QSPI return status
mohamedmoawya 0:e4c5e6ec922e 97 */
mohamedmoawya 0:e4c5e6ec922e 98 typedef enum qspi_status {
mohamedmoawya 0:e4c5e6ec922e 99 QSPI_STATUS_ERROR = -1, /**< Generic error >*/
mohamedmoawya 0:e4c5e6ec922e 100 QSPI_STATUS_INVALID_PARAMETER = -2, /**< The parameter is invalid >*/
mohamedmoawya 0:e4c5e6ec922e 101 QSPI_STATUS_OK = 0, /**< Function executed sucessfully >*/
mohamedmoawya 0:e4c5e6ec922e 102 } qspi_status_t;
mohamedmoawya 0:e4c5e6ec922e 103
mohamedmoawya 0:e4c5e6ec922e 104 /** Initialize QSPI peripheral.
mohamedmoawya 0:e4c5e6ec922e 105 *
mohamedmoawya 0:e4c5e6ec922e 106 * It should initialize QSPI pins (io0-io3, sclk and ssel), set frequency, clock polarity and phase mode. The clock for the peripheral should be enabled
mohamedmoawya 0:e4c5e6ec922e 107 *
mohamedmoawya 0:e4c5e6ec922e 108 * @param obj QSPI object
mohamedmoawya 0:e4c5e6ec922e 109 * @param io0 Data pin 0
mohamedmoawya 0:e4c5e6ec922e 110 * @param io1 Data pin 1
mohamedmoawya 0:e4c5e6ec922e 111 * @param io2 Data pin 2
mohamedmoawya 0:e4c5e6ec922e 112 * @param io3 Data pin 3
mohamedmoawya 0:e4c5e6ec922e 113 * @param sclk The clock pin
mohamedmoawya 0:e4c5e6ec922e 114 * @param ssel The chip select pin
mohamedmoawya 0:e4c5e6ec922e 115 * @param hz The bus frequency
mohamedmoawya 0:e4c5e6ec922e 116 * @param mode Clock polarity and phase mode (0 - 3)
mohamedmoawya 0:e4c5e6ec922e 117 * @return QSPI_STATUS_OK if initialisation successfully executed
mohamedmoawya 0:e4c5e6ec922e 118 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
mohamedmoawya 0:e4c5e6ec922e 119 QSPI_STATUS_ERROR otherwise
mohamedmoawya 0:e4c5e6ec922e 120 */
mohamedmoawya 0:e4c5e6ec922e 121 qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, uint32_t hz, uint8_t mode);
mohamedmoawya 0:e4c5e6ec922e 122
mohamedmoawya 0:e4c5e6ec922e 123 /** Deinitilize QSPI peripheral
mohamedmoawya 0:e4c5e6ec922e 124 *
mohamedmoawya 0:e4c5e6ec922e 125 * It should release pins that are associated with the QSPI object, and disable clocks for QSPI peripheral module that was associated with the object
mohamedmoawya 0:e4c5e6ec922e 126 *
mohamedmoawya 0:e4c5e6ec922e 127 * @param obj QSPI object
mohamedmoawya 0:e4c5e6ec922e 128 * @return QSPI_STATUS_OK if deinitialisation successfully executed
mohamedmoawya 0:e4c5e6ec922e 129 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
mohamedmoawya 0:e4c5e6ec922e 130 QSPI_STATUS_ERROR otherwise
mohamedmoawya 0:e4c5e6ec922e 131 */
mohamedmoawya 0:e4c5e6ec922e 132 qspi_status_t qspi_free(qspi_t *obj);
mohamedmoawya 0:e4c5e6ec922e 133
mohamedmoawya 0:e4c5e6ec922e 134 /** Set the QSPI baud rate
mohamedmoawya 0:e4c5e6ec922e 135 *
mohamedmoawya 0:e4c5e6ec922e 136 * Actual frequency may differ from the desired frequency due to available dividers and the bus clock
mohamedmoawya 0:e4c5e6ec922e 137 * Configures the QSPI peripheral's baud rate
mohamedmoawya 0:e4c5e6ec922e 138 * @param obj The SPI object to configure
mohamedmoawya 0:e4c5e6ec922e 139 * @param hz The baud rate in Hz
mohamedmoawya 0:e4c5e6ec922e 140 * @return QSPI_STATUS_OK if frequency was set
mohamedmoawya 0:e4c5e6ec922e 141 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
mohamedmoawya 0:e4c5e6ec922e 142 QSPI_STATUS_ERROR otherwise
mohamedmoawya 0:e4c5e6ec922e 143 */
mohamedmoawya 0:e4c5e6ec922e 144 qspi_status_t qspi_frequency(qspi_t *obj, int hz);
mohamedmoawya 0:e4c5e6ec922e 145
mohamedmoawya 0:e4c5e6ec922e 146 /** Send a command and block of data
mohamedmoawya 0:e4c5e6ec922e 147 *
mohamedmoawya 0:e4c5e6ec922e 148 * @param obj QSPI object
mohamedmoawya 0:e4c5e6ec922e 149 * @param command QSPI command
mohamedmoawya 0:e4c5e6ec922e 150 * @param data TX buffer
mohamedmoawya 0:e4c5e6ec922e 151 * @param[in,out] length in - TX buffer length in bytes, out - number of bytes written
mohamedmoawya 0:e4c5e6ec922e 152 * @return QSPI_STATUS_OK if the data has been succesfully sent
mohamedmoawya 0:e4c5e6ec922e 153 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
mohamedmoawya 0:e4c5e6ec922e 154 QSPI_STATUS_ERROR otherwise
mohamedmoawya 0:e4c5e6ec922e 155 */
mohamedmoawya 0:e4c5e6ec922e 156 qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void *data, size_t *length);
mohamedmoawya 0:e4c5e6ec922e 157
mohamedmoawya 0:e4c5e6ec922e 158 /** Send a command (and optionally data) and get the response. Can be used to send/receive device specific commands
mohamedmoawya 0:e4c5e6ec922e 159 *
mohamedmoawya 0:e4c5e6ec922e 160 * @param obj QSPI object
mohamedmoawya 0:e4c5e6ec922e 161 * @param command QSPI command
mohamedmoawya 0:e4c5e6ec922e 162 * @param tx_data TX buffer
mohamedmoawya 0:e4c5e6ec922e 163 * @param tx_size TX buffer length in bytes
mohamedmoawya 0:e4c5e6ec922e 164 * @param rx_data RX buffer
mohamedmoawya 0:e4c5e6ec922e 165 * @param rx_size RX buffer length in bytes
mohamedmoawya 0:e4c5e6ec922e 166 * @return QSPI_STATUS_OK if the data has been succesfully sent
mohamedmoawya 0:e4c5e6ec922e 167 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
mohamedmoawya 0:e4c5e6ec922e 168 QSPI_STATUS_ERROR otherwise
mohamedmoawya 0:e4c5e6ec922e 169 */
mohamedmoawya 0:e4c5e6ec922e 170 qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command, const void *tx_data, size_t tx_size, void *rx_data, size_t rx_size);
mohamedmoawya 0:e4c5e6ec922e 171
mohamedmoawya 0:e4c5e6ec922e 172 /** Receive a command and block of data
mohamedmoawya 0:e4c5e6ec922e 173 *
mohamedmoawya 0:e4c5e6ec922e 174 * @param obj QSPI object
mohamedmoawya 0:e4c5e6ec922e 175 * @param command QSPI command
mohamedmoawya 0:e4c5e6ec922e 176 * @param data RX buffer
mohamedmoawya 0:e4c5e6ec922e 177 * @param[in,out] length in - RX buffer length in bytes, out - number of bytes read
mohamedmoawya 0:e4c5e6ec922e 178 * @return QSPI_STATUS_OK if data has been succesfully received
mohamedmoawya 0:e4c5e6ec922e 179 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
mohamedmoawya 0:e4c5e6ec922e 180 QSPI_STATUS_ERROR otherwise
mohamedmoawya 0:e4c5e6ec922e 181 */
mohamedmoawya 0:e4c5e6ec922e 182 qspi_status_t qspi_read(qspi_t *obj, const qspi_command_t *command, void *data, size_t *length);
mohamedmoawya 0:e4c5e6ec922e 183
mohamedmoawya 0:e4c5e6ec922e 184 /**@}*/
mohamedmoawya 0:e4c5e6ec922e 185
mohamedmoawya 0:e4c5e6ec922e 186 #ifdef __cplusplus
mohamedmoawya 0:e4c5e6ec922e 187 }
mohamedmoawya 0:e4c5e6ec922e 188 #endif
mohamedmoawya 0:e4c5e6ec922e 189
mohamedmoawya 0:e4c5e6ec922e 190 #endif
mohamedmoawya 0:e4c5e6ec922e 191
mohamedmoawya 0:e4c5e6ec922e 192 #endif
mohamedmoawya 0:e4c5e6ec922e 193
mohamedmoawya 0:e4c5e6ec922e 194 /** @}*/