Terminal for sending and receiving data via Semtech SX1276 chip. It uses the FRDM-KL25Z board, with a Modtronix inAir9 SX1276 board, and Modtronix SHD3I shield. The inAir9 module is mounted in iMod port 3 of the SHD3I module. The SHD3I shield is mounted on the FRDM-KL25Z board.
Dependencies: SX127x_modtronix mbed
Fork of chat_sx127x by
main.cpp@5:d6e7fb9446ff, 2015-02-16 (annotated)
- Committer:
- modtronix
- Date:
- Mon Feb 16 01:53:18 2015 +0000
- Revision:
- 5:d6e7fb9446ff
- Parent:
- 4:7a9007dfc0e5
Terminal for sending and receiving data via Semtech SX1276 chip.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
dudmuck | 1:1cd0afbed23c | 1 | #include "sx127x_lora.h" |
dudmuck | 1:1cd0afbed23c | 2 | #include "sx127x_fsk.h" |
dudmuck | 0:be215de91a68 | 3 | |
dudmuck | 0:be215de91a68 | 4 | /* |
dudmuck | 0:be215de91a68 | 5 | * http://mbed.org/handbook/mbed-FRDM-KL25Z |
modtronix | 5:d6e7fb9446ff | 6 | * |
modtronix | 5:d6e7fb9446ff | 7 | * The program was tested with the FRDM-KL25Z board, with a Modtronix inAir9 SX1276 board mounted in |
modtronix | 5:d6e7fb9446ff | 8 | * a Modtronix SHD3I daughter board(iMod3). |
modtronix | 5:d6e7fb9446ff | 9 | * |
modtronix | 5:d6e7fb9446ff | 10 | * MODTRONIX Notes |
modtronix | 5:d6e7fb9446ff | 11 | * Use this app to test LORA modem. |
modtronix | 5:d6e7fb9446ff | 12 | * - Connect to FRDM-KL25Z, with inAIR9 connected to it (via SHD3I daughter board) |
modtronix | 5:d6e7fb9446ff | 13 | * - Connect to PC via USB |
modtronix | 5:d6e7fb9446ff | 14 | * - Start HyperTerminal on PC, at 57.6K baud |
modtronix | 5:d6e7fb9446ff | 15 | * - Various commands can now be executed on terminal. Use '?' for list of commands. |
modtronix | 5:d6e7fb9446ff | 16 | * - Use '.' to see current settings. |
modtronix | 5:d6e7fb9446ff | 17 | * |
modtronix | 5:d6e7fb9446ff | 18 | * For example, to send test message: |
modtronix | 5:d6e7fb9446ff | 19 | * - Select mode in HyperTerminal. For example, type "t1" to configure for bw=250khz, sf=12, payload=9 |
modtronix | 5:d6e7fb9446ff | 20 | * - Ensure CRC and "low datarate optimize" has correct setting. |
modtronix | 5:d6e7fb9446ff | 21 | * - Press "t" in terminal to send a "semtech starter kit" 9 byte message |
modtronix | 5:d6e7fb9446ff | 22 | * |
modtronix | 5:d6e7fb9446ff | 23 | * NOTE! Ensure "low datarate optimize" is same! In hyperTerminal "ld0" turns it off, and "ld1" turns it on. |
modtronix | 5:d6e7fb9446ff | 24 | * |
modtronix | 5:d6e7fb9446ff | 25 | * ========== Firmware for KL25Z ========== |
modtronix | 5:d6e7fb9446ff | 26 | * The default firmware listed on mbed.org puts a clock pulse on pin A5. To fix this, use alternative |
modtronix | 5:d6e7fb9446ff | 27 | * firmware (or unsolder resistor R24). |
modtronix | 5:d6e7fb9446ff | 28 | * - Download "OpenSDA Firmware" from http://www.pemicro.com/opensda/ |
modtronix | 5:d6e7fb9446ff | 29 | * - Put KL25Z into bootloader mode (hold down button while plugging in SDA USB). |
modtronix | 5:d6e7fb9446ff | 30 | * - Drag "MSD-DEBUG-FRDM-KL25Z_Pemicro_v114.SDA" file onto it. |
modtronix | 5:d6e7fb9446ff | 31 | * - Reset KL25Z. |
modtronix | 5:d6e7fb9446ff | 32 | * - If the USB drivers do not automatically install, download and run "Windows USB Drivers" from |
modtronix | 5:d6e7fb9446ff | 33 | * www.pemicro.com/opensda. After this, when you plug in the KL25Z next time, all drivers should |
modtronix | 5:d6e7fb9446ff | 34 | * install correctly. |
dudmuck | 0:be215de91a68 | 35 | */ |
dudmuck | 0:be215de91a68 | 36 | |
modtronix | 5:d6e7fb9446ff | 37 | #define TARGET_KL25Z_SHD3I_INAIR8 /* FRDM-KL25Z + Modtronix inAir9 SX1276 board + SHD3I daughter board */ |
modtronix | 5:d6e7fb9446ff | 38 | #define AUTO_TRANSMIT 0 /* Enable automatic transmission every 1000ms */ |
modtronix | 5:d6e7fb9446ff | 39 | #define FSK_LARGE_PKT_THRESHOLD 0x3f |
modtronix | 5:d6e7fb9446ff | 40 | |
dudmuck | 0:be215de91a68 | 41 | DigitalOut green(LED_GREEN); |
modtronix | 5:d6e7fb9446ff | 42 | DigitalOut led2(LED_RED); |
dudmuck | 0:be215de91a68 | 43 | |
dudmuck | 0:be215de91a68 | 44 | Serial pc(USBTX, USBRX); |
dudmuck | 0:be215de91a68 | 45 | |
dudmuck | 0:be215de91a68 | 46 | uint8_t tx_cnt; |
dudmuck | 0:be215de91a68 | 47 | char pcbuf[64]; |
dudmuck | 0:be215de91a68 | 48 | |
modtronix | 5:d6e7fb9446ff | 49 | char mybuf[64]; |
modtronix | 5:d6e7fb9446ff | 50 | Timer tmr; |
modtronix | 5:d6e7fb9446ff | 51 | int32_t t; |
modtronix | 5:d6e7fb9446ff | 52 | uint8_t initDone; |
modtronix | 5:d6e7fb9446ff | 53 | |
modtronix | 5:d6e7fb9446ff | 54 | |
dudmuck | 0:be215de91a68 | 55 | typedef enum { |
dudmuck | 0:be215de91a68 | 56 | APP_NONE = 0, |
dudmuck | 0:be215de91a68 | 57 | APP_CHAT |
dudmuck | 0:be215de91a68 | 58 | } app_e; |
dudmuck | 0:be215de91a68 | 59 | |
dudmuck | 0:be215de91a68 | 60 | app_e app = APP_NONE; |
dudmuck | 0:be215de91a68 | 61 | |
dudmuck | 0:be215de91a68 | 62 | |
modtronix | 5:d6e7fb9446ff | 63 | |
modtronix | 5:d6e7fb9446ff | 64 | //Defines for the FRDM-KL25Z board, with Modtronix SHD3I with an inAir9 SX1276 module mounted in it. |
modtronix | 5:d6e7fb9446ff | 65 | #ifdef TARGET_KL25Z_SHD3I_INAIR8 |
modtronix | 5:d6e7fb9446ff | 66 | //SCLK=D13, MISO=D12, MOSI=D11 |
modtronix | 5:d6e7fb9446ff | 67 | //CS=D7, Reset=A5 |
modtronix | 5:d6e7fb9446ff | 68 | //DIO0=D2, DIO1=D8, DIO2=D4, DIO3=A4, DIO4=N.C., DIO5=D3 |
modtronix | 5:d6e7fb9446ff | 69 | // mosi, miso, sclk, cs, rst, dio0, dio1 |
modtronix | 5:d6e7fb9446ff | 70 | SX127x radio(D11, D12, D13, D7, PTC1, D2, D8); |
modtronix | 5:d6e7fb9446ff | 71 | //SX127x radio(D11, D12, D13, D7, A5, D2, D8); |
modtronix | 5:d6e7fb9446ff | 72 | #else |
modtronix | 5:d6e7fb9446ff | 73 | // pin: 3 8 1 7 10 12 5 |
modtronix | 5:d6e7fb9446ff | 74 | // mosi, miso, sclk, cs, rst, dio0, dio1 |
modtronix | 5:d6e7fb9446ff | 75 | // D11 D12 D13 D10 D9 D8 D2 |
modtronix | 5:d6e7fb9446ff | 76 | SX127x radio(PTD2, PTD3, PTD1, PTD0, PTD5, PTA13, PTD4); |
modtronix | 5:d6e7fb9446ff | 77 | #endif |
modtronix | 5:d6e7fb9446ff | 78 | |
modtronix | 5:d6e7fb9446ff | 79 | |
modtronix | 5:d6e7fb9446ff | 80 | //Required for V7 of SX127x library, but V7 doesn't work for this program! |
modtronix | 5:d6e7fb9446ff | 81 | //DigitalOut rfsw1(PTC8); |
modtronix | 5:d6e7fb9446ff | 82 | //DigitalOut rfsw2(PTC9); |
dudmuck | 0:be215de91a68 | 83 | |
modtronix | 5:d6e7fb9446ff | 84 | void rfsw_callback() |
modtronix | 5:d6e7fb9446ff | 85 | { |
modtronix | 5:d6e7fb9446ff | 86 | /* |
modtronix | 5:d6e7fb9446ff | 87 | if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) { // start of transmission |
modtronix | 5:d6e7fb9446ff | 88 | if (radio.HF) { |
modtronix | 5:d6e7fb9446ff | 89 | if (radio.RegPaConfig.bits.PaSelect) { // if PA_BOOST |
modtronix | 5:d6e7fb9446ff | 90 | rfsw2 = 0; |
modtronix | 5:d6e7fb9446ff | 91 | rfsw1 = 1; |
modtronix | 5:d6e7fb9446ff | 92 | } else { // RFO to power amp |
modtronix | 5:d6e7fb9446ff | 93 | rfsw2 = 1; |
modtronix | 5:d6e7fb9446ff | 94 | rfsw1 = 0; |
modtronix | 5:d6e7fb9446ff | 95 | } |
modtronix | 5:d6e7fb9446ff | 96 | } else { |
modtronix | 5:d6e7fb9446ff | 97 | // todo: sx1276 |
modtronix | 5:d6e7fb9446ff | 98 | } |
modtronix | 5:d6e7fb9446ff | 99 | } else if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER || radio.RegOpMode.bits.Mode == RF_OPMODE_CAD) { // start of reception |
modtronix | 5:d6e7fb9446ff | 100 | if (radio.HF) { |
modtronix | 5:d6e7fb9446ff | 101 | rfsw2 = 1; |
modtronix | 5:d6e7fb9446ff | 102 | rfsw1 = 1; |
modtronix | 5:d6e7fb9446ff | 103 | } else { |
modtronix | 5:d6e7fb9446ff | 104 | // todo: sx1276 |
modtronix | 5:d6e7fb9446ff | 105 | } |
modtronix | 5:d6e7fb9446ff | 106 | } else { // RF switch shutdown |
modtronix | 5:d6e7fb9446ff | 107 | rfsw2 = 0; |
modtronix | 5:d6e7fb9446ff | 108 | rfsw1 = 0; |
modtronix | 5:d6e7fb9446ff | 109 | } |
modtronix | 5:d6e7fb9446ff | 110 | */ |
modtronix | 5:d6e7fb9446ff | 111 | } |
dudmuck | 0:be215de91a68 | 112 | |
dudmuck | 1:1cd0afbed23c | 113 | SX127x_fsk fsk(radio); |
dudmuck | 1:1cd0afbed23c | 114 | SX127x_lora lora(radio); |
dudmuck | 0:be215de91a68 | 115 | |
modtronix | 5:d6e7fb9446ff | 116 | |
dudmuck | 0:be215de91a68 | 117 | void printLoraIrqs_(bool clear) |
dudmuck | 0:be215de91a68 | 118 | { |
dudmuck | 0:be215de91a68 | 119 | //in radio class -- RegIrqFlags_t RegIrqFlags; |
dudmuck | 0:be215de91a68 | 120 | |
dudmuck | 0:be215de91a68 | 121 | //already read RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS); |
dudmuck | 0:be215de91a68 | 122 | printf("\r\nIrqFlags:"); |
dudmuck | 1:1cd0afbed23c | 123 | if (lora.RegIrqFlags.bits.CadDetected) |
dudmuck | 0:be215de91a68 | 124 | printf("CadDetected "); |
dudmuck | 1:1cd0afbed23c | 125 | if (lora.RegIrqFlags.bits.FhssChangeChannel) { |
dudmuck | 0:be215de91a68 | 126 | //radio.RegHopChannel.octet = radio.read_reg(REG_LR_HOPCHANNEL); |
dudmuck | 1:1cd0afbed23c | 127 | printf("FhssChangeChannel:%d ", lora.RegHopChannel.bits.FhssPresentChannel); |
dudmuck | 0:be215de91a68 | 128 | } |
dudmuck | 1:1cd0afbed23c | 129 | if (lora.RegIrqFlags.bits.CadDone) |
dudmuck | 0:be215de91a68 | 130 | printf("CadDone "); |
dudmuck | 1:1cd0afbed23c | 131 | if (lora.RegIrqFlags.bits.TxDone) |
dudmuck | 0:be215de91a68 | 132 | printf("TxDone "); |
dudmuck | 1:1cd0afbed23c | 133 | if (lora.RegIrqFlags.bits.ValidHeader) |
dudmuck | 0:be215de91a68 | 134 | printf("[42mValidHeader[0m "); |
dudmuck | 1:1cd0afbed23c | 135 | if (lora.RegIrqFlags.bits.PayloadCrcError) |
dudmuck | 0:be215de91a68 | 136 | printf("[41mPayloadCrcError[0m "); |
dudmuck | 1:1cd0afbed23c | 137 | if (lora.RegIrqFlags.bits.RxDone) |
dudmuck | 0:be215de91a68 | 138 | printf("[42mRxDone[0m "); |
dudmuck | 1:1cd0afbed23c | 139 | if (lora.RegIrqFlags.bits.RxTimeout) |
dudmuck | 0:be215de91a68 | 140 | printf("RxTimeout "); |
dudmuck | 0:be215de91a68 | 141 | |
dudmuck | 0:be215de91a68 | 142 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 143 | |
dudmuck | 0:be215de91a68 | 144 | if (clear) |
dudmuck | 1:1cd0afbed23c | 145 | radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet); |
dudmuck | 0:be215de91a68 | 146 | |
dudmuck | 0:be215de91a68 | 147 | } |
dudmuck | 0:be215de91a68 | 148 | |
dudmuck | 1:1cd0afbed23c | 149 | void lora_printCodingRate(bool from_rx) |
dudmuck | 0:be215de91a68 | 150 | { |
dudmuck | 1:1cd0afbed23c | 151 | uint8_t d = lora.getCodingRate(from_rx); |
dudmuck | 0:be215de91a68 | 152 | printf("CodingRate:"); |
dudmuck | 0:be215de91a68 | 153 | switch (d) { |
dudmuck | 0:be215de91a68 | 154 | case 1: printf("4/5 "); break; |
dudmuck | 0:be215de91a68 | 155 | case 2: printf("4/6 "); break; |
dudmuck | 0:be215de91a68 | 156 | case 3: printf("4/7 "); break; |
dudmuck | 0:be215de91a68 | 157 | case 4: printf("4/8 "); break; |
dudmuck | 0:be215de91a68 | 158 | default: |
dudmuck | 0:be215de91a68 | 159 | printf("%d ", d); |
dudmuck | 0:be215de91a68 | 160 | break; |
dudmuck | 0:be215de91a68 | 161 | } |
dudmuck | 0:be215de91a68 | 162 | } |
dudmuck | 0:be215de91a68 | 163 | |
dudmuck | 1:1cd0afbed23c | 164 | void lora_printHeaderMode() |
dudmuck | 0:be215de91a68 | 165 | { |
dudmuck | 1:1cd0afbed23c | 166 | if (lora.getHeaderMode()) |
dudmuck | 0:be215de91a68 | 167 | printf("implicit "); |
dudmuck | 0:be215de91a68 | 168 | else |
dudmuck | 0:be215de91a68 | 169 | printf("explicit "); |
dudmuck | 0:be215de91a68 | 170 | } |
dudmuck | 0:be215de91a68 | 171 | |
dudmuck | 1:1cd0afbed23c | 172 | void lora_printBw() |
dudmuck | 0:be215de91a68 | 173 | { |
dudmuck | 1:1cd0afbed23c | 174 | uint8_t bw = lora.getBw(); |
dudmuck | 0:be215de91a68 | 175 | |
dudmuck | 0:be215de91a68 | 176 | printf("Bw:"); |
dudmuck | 0:be215de91a68 | 177 | if (radio.type == SX1276) { |
dudmuck | 1:1cd0afbed23c | 178 | switch (lora.RegModemConfig.sx1276bits.Bw) { |
dudmuck | 0:be215de91a68 | 179 | case 0: printf("7.8KHz "); break; |
dudmuck | 0:be215de91a68 | 180 | case 1: printf("10.4KHz "); break; |
dudmuck | 0:be215de91a68 | 181 | case 2: printf("15.6KHz "); break; |
dudmuck | 0:be215de91a68 | 182 | case 3: printf("20.8KHz "); break; |
dudmuck | 0:be215de91a68 | 183 | case 4: printf("31.25KHz "); break; |
dudmuck | 0:be215de91a68 | 184 | case 5: printf("41.7KHz "); break; |
dudmuck | 0:be215de91a68 | 185 | case 6: printf("62.5KHz "); break; |
dudmuck | 0:be215de91a68 | 186 | case 7: printf("125KHz "); break; |
dudmuck | 0:be215de91a68 | 187 | case 8: printf("250KHz "); break; |
dudmuck | 0:be215de91a68 | 188 | case 9: printf("500KHz "); break; |
dudmuck | 1:1cd0afbed23c | 189 | default: printf("%x ", lora.RegModemConfig.sx1276bits.Bw); break; |
dudmuck | 0:be215de91a68 | 190 | } |
dudmuck | 0:be215de91a68 | 191 | } else if (radio.type == SX1272) { |
dudmuck | 1:1cd0afbed23c | 192 | switch (lora.RegModemConfig.sx1272bits.Bw) { |
dudmuck | 0:be215de91a68 | 193 | case 0: printf("125KHz "); break; |
dudmuck | 0:be215de91a68 | 194 | case 1: printf("250KHz "); break; |
dudmuck | 0:be215de91a68 | 195 | case 2: printf("500KHz "); break; |
dudmuck | 0:be215de91a68 | 196 | case 3: printf("11b "); break; |
dudmuck | 0:be215de91a68 | 197 | } |
dudmuck | 0:be215de91a68 | 198 | } |
dudmuck | 0:be215de91a68 | 199 | } |
dudmuck | 0:be215de91a68 | 200 | |
dudmuck | 1:1cd0afbed23c | 201 | void lora_printAllBw() |
dudmuck | 0:be215de91a68 | 202 | { |
dudmuck | 0:be215de91a68 | 203 | int i, s; |
dudmuck | 0:be215de91a68 | 204 | |
dudmuck | 0:be215de91a68 | 205 | if (radio.type == SX1276) { |
dudmuck | 1:1cd0afbed23c | 206 | s = lora.RegModemConfig.sx1276bits.Bw; |
dudmuck | 0:be215de91a68 | 207 | for (i = 0; i < 10; i++ ) { |
dudmuck | 1:1cd0afbed23c | 208 | lora.RegModemConfig.sx1276bits.Bw = i; |
dudmuck | 0:be215de91a68 | 209 | printf("%d ", i); |
dudmuck | 1:1cd0afbed23c | 210 | lora_printBw(); |
dudmuck | 0:be215de91a68 | 211 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 212 | } |
dudmuck | 1:1cd0afbed23c | 213 | lora.RegModemConfig.sx1276bits.Bw = s; |
dudmuck | 0:be215de91a68 | 214 | } else if (radio.type == SX1272) { |
dudmuck | 1:1cd0afbed23c | 215 | s = lora.RegModemConfig.sx1272bits.Bw; |
dudmuck | 0:be215de91a68 | 216 | for (i = 0; i < 3; i++ ) { |
dudmuck | 1:1cd0afbed23c | 217 | lora.RegModemConfig.sx1272bits.Bw = i; |
dudmuck | 0:be215de91a68 | 218 | printf("%d ", i); |
dudmuck | 1:1cd0afbed23c | 219 | lora_printBw(); |
dudmuck | 0:be215de91a68 | 220 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 221 | } |
dudmuck | 1:1cd0afbed23c | 222 | lora.RegModemConfig.sx1272bits.Bw = s; |
dudmuck | 0:be215de91a68 | 223 | } |
dudmuck | 0:be215de91a68 | 224 | } |
dudmuck | 0:be215de91a68 | 225 | |
dudmuck | 1:1cd0afbed23c | 226 | void lora_printSf() |
dudmuck | 0:be215de91a68 | 227 | { |
dudmuck | 0:be215de91a68 | 228 | // spreading factor same between sx127[26] |
dudmuck | 1:1cd0afbed23c | 229 | printf("sf:%d ", lora.getSf()); |
dudmuck | 0:be215de91a68 | 230 | } |
dudmuck | 0:be215de91a68 | 231 | |
dudmuck | 1:1cd0afbed23c | 232 | void lora_printRxPayloadCrcOn() |
dudmuck | 0:be215de91a68 | 233 | { |
dudmuck | 1:1cd0afbed23c | 234 | bool on = lora.getRxPayloadCrcOn(); |
dudmuck | 0:be215de91a68 | 235 | //printf("RxPayloadCrcOn:%s ", on ? "on" : "off"); |
dudmuck | 0:be215de91a68 | 236 | if (on) |
dudmuck | 0:be215de91a68 | 237 | printf("RxPayloadCrcOn:1 = Tx CRC Enabled\r\n"); |
dudmuck | 0:be215de91a68 | 238 | else |
dudmuck | 0:be215de91a68 | 239 | printf("RxPayloadCrcOn:1 = no Tx CRC\r\n"); |
dudmuck | 0:be215de91a68 | 240 | } |
dudmuck | 0:be215de91a68 | 241 | |
dudmuck | 1:1cd0afbed23c | 242 | void lora_printTxContinuousMode() |
dudmuck | 0:be215de91a68 | 243 | { |
dudmuck | 1:1cd0afbed23c | 244 | printf("TxContinuousMode:%d ", lora.RegModemConfig2.sx1276bits.TxContinuousMode); // same for sx1272 and sx1276 |
dudmuck | 0:be215de91a68 | 245 | } |
dudmuck | 0:be215de91a68 | 246 | |
dudmuck | 1:1cd0afbed23c | 247 | void lora_printAgcAutoOn() |
dudmuck | 0:be215de91a68 | 248 | { |
dudmuck | 1:1cd0afbed23c | 249 | printf("AgcAutoOn:%d", lora.getAgcAutoOn()); |
dudmuck | 0:be215de91a68 | 250 | } |
dudmuck | 0:be215de91a68 | 251 | |
dudmuck | 1:1cd0afbed23c | 252 | void lora_print_dio() |
dudmuck | 0:be215de91a68 | 253 | { |
dudmuck | 1:1cd0afbed23c | 254 | radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2); |
dudmuck | 0:be215de91a68 | 255 | printf("DIO5:"); |
dudmuck | 0:be215de91a68 | 256 | switch (radio.RegDioMapping2.bits.Dio5Mapping) { |
dudmuck | 0:be215de91a68 | 257 | case 0: printf("ModeReady"); break; |
dudmuck | 0:be215de91a68 | 258 | case 1: printf("ClkOut"); break; |
dudmuck | 0:be215de91a68 | 259 | case 2: printf("ClkOut"); break; |
dudmuck | 0:be215de91a68 | 260 | } |
dudmuck | 0:be215de91a68 | 261 | printf(" DIO4:"); |
dudmuck | 0:be215de91a68 | 262 | switch (radio.RegDioMapping2.bits.Dio4Mapping) { |
dudmuck | 0:be215de91a68 | 263 | case 0: printf("CadDetected"); break; |
dudmuck | 0:be215de91a68 | 264 | case 1: printf("PllLock"); break; |
dudmuck | 0:be215de91a68 | 265 | case 2: printf("PllLock"); break; |
dudmuck | 0:be215de91a68 | 266 | } |
dudmuck | 0:be215de91a68 | 267 | radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1); |
dudmuck | 0:be215de91a68 | 268 | printf(" DIO3:"); |
dudmuck | 0:be215de91a68 | 269 | switch (radio.RegDioMapping1.bits.Dio3Mapping) { |
dudmuck | 0:be215de91a68 | 270 | case 0: printf("CadDone"); break; |
dudmuck | 0:be215de91a68 | 271 | case 1: printf("ValidHeader"); break; |
dudmuck | 0:be215de91a68 | 272 | case 2: printf("PayloadCrcError"); break; |
dudmuck | 0:be215de91a68 | 273 | } |
dudmuck | 0:be215de91a68 | 274 | printf(" DIO2:"); |
dudmuck | 0:be215de91a68 | 275 | switch (radio.RegDioMapping1.bits.Dio2Mapping) { |
dudmuck | 0:be215de91a68 | 276 | case 0: |
dudmuck | 0:be215de91a68 | 277 | case 1: |
dudmuck | 0:be215de91a68 | 278 | case 2: |
dudmuck | 0:be215de91a68 | 279 | printf("FhssChangeChannel"); |
dudmuck | 0:be215de91a68 | 280 | break; |
dudmuck | 0:be215de91a68 | 281 | } |
dudmuck | 0:be215de91a68 | 282 | printf(" DIO1:"); |
dudmuck | 0:be215de91a68 | 283 | switch (radio.RegDioMapping1.bits.Dio1Mapping) { |
dudmuck | 0:be215de91a68 | 284 | case 0: printf("RxTimeout"); break; |
dudmuck | 0:be215de91a68 | 285 | case 1: printf("FhssChangeChannel"); break; |
dudmuck | 0:be215de91a68 | 286 | case 2: printf("CadDetected"); break; |
dudmuck | 0:be215de91a68 | 287 | } |
dudmuck | 0:be215de91a68 | 288 | printf(" DIO0:"); |
dudmuck | 0:be215de91a68 | 289 | switch (radio.RegDioMapping1.bits.Dio0Mapping) { |
dudmuck | 0:be215de91a68 | 290 | case 0: printf("RxDone"); break; |
dudmuck | 0:be215de91a68 | 291 | case 1: printf("TxDone"); break; |
dudmuck | 0:be215de91a68 | 292 | case 2: printf("CadDone"); break; |
dudmuck | 0:be215de91a68 | 293 | } |
dudmuck | 0:be215de91a68 | 294 | |
dudmuck | 0:be215de91a68 | 295 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 296 | } |
dudmuck | 0:be215de91a68 | 297 | |
dudmuck | 1:1cd0afbed23c | 298 | void fsk_print_dio() |
dudmuck | 1:1cd0afbed23c | 299 | { |
dudmuck | 1:1cd0afbed23c | 300 | radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2); |
dudmuck | 1:1cd0afbed23c | 301 | |
dudmuck | 2:c6b23a43a9d9 | 302 | printf("DIO5:"); |
dudmuck | 1:1cd0afbed23c | 303 | switch (radio.RegDioMapping2.bits.Dio5Mapping) { |
dudmuck | 1:1cd0afbed23c | 304 | case 0: printf("ClkOut"); break; |
dudmuck | 1:1cd0afbed23c | 305 | case 1: printf("PllLock"); break; |
dudmuck | 1:1cd0afbed23c | 306 | case 2: |
dudmuck | 1:1cd0afbed23c | 307 | if (fsk.RegPktConfig2.bits.DataModePacket) |
dudmuck | 1:1cd0afbed23c | 308 | printf("data"); |
dudmuck | 1:1cd0afbed23c | 309 | else { |
dudmuck | 1:1cd0afbed23c | 310 | if (radio.RegDioMapping2.bits.MapPreambleDetect) |
dudmuck | 1:1cd0afbed23c | 311 | printf("preamble"); |
dudmuck | 1:1cd0afbed23c | 312 | else |
dudmuck | 1:1cd0afbed23c | 313 | printf("rssi"); |
dudmuck | 1:1cd0afbed23c | 314 | } |
dudmuck | 1:1cd0afbed23c | 315 | break; |
dudmuck | 1:1cd0afbed23c | 316 | case 3: printf("ModeReady"); break; |
dudmuck | 1:1cd0afbed23c | 317 | } |
dudmuck | 1:1cd0afbed23c | 318 | |
dudmuck | 2:c6b23a43a9d9 | 319 | printf(" DIO4:"); |
dudmuck | 1:1cd0afbed23c | 320 | switch (radio.RegDioMapping2.bits.Dio4Mapping) { |
dudmuck | 1:1cd0afbed23c | 321 | case 0: printf("temp/eol"); break; |
dudmuck | 1:1cd0afbed23c | 322 | case 1: printf("PllLock"); break; |
dudmuck | 1:1cd0afbed23c | 323 | case 2: printf("TimeOut"); break; |
dudmuck | 1:1cd0afbed23c | 324 | case 3: |
dudmuck | 1:1cd0afbed23c | 325 | if (fsk.RegPktConfig2.bits.DataModePacket) { |
dudmuck | 1:1cd0afbed23c | 326 | if (radio.RegDioMapping2.bits.MapPreambleDetect) |
dudmuck | 1:1cd0afbed23c | 327 | printf("preamble"); |
dudmuck | 1:1cd0afbed23c | 328 | else |
dudmuck | 1:1cd0afbed23c | 329 | printf("rssi"); |
dudmuck | 1:1cd0afbed23c | 330 | } else |
dudmuck | 1:1cd0afbed23c | 331 | printf("ModeReady"); |
dudmuck | 1:1cd0afbed23c | 332 | break; |
dudmuck | 1:1cd0afbed23c | 333 | } |
dudmuck | 1:1cd0afbed23c | 334 | |
dudmuck | 1:1cd0afbed23c | 335 | radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1); |
dudmuck | 1:1cd0afbed23c | 336 | |
dudmuck | 2:c6b23a43a9d9 | 337 | printf(" DIO3:"); |
dudmuck | 1:1cd0afbed23c | 338 | switch (radio.RegDioMapping1.bits.Dio3Mapping) { |
dudmuck | 1:1cd0afbed23c | 339 | case 0: printf("Timeout"); break; |
dudmuck | 1:1cd0afbed23c | 340 | case 1: |
dudmuck | 1:1cd0afbed23c | 341 | if (radio.RegDioMapping2.bits.MapPreambleDetect) |
dudmuck | 1:1cd0afbed23c | 342 | printf("preamble"); |
dudmuck | 1:1cd0afbed23c | 343 | else |
dudmuck | 1:1cd0afbed23c | 344 | printf("rssi"); |
dudmuck | 1:1cd0afbed23c | 345 | break; |
dudmuck | 1:1cd0afbed23c | 346 | case 2: printf("?automode_status?"); break; |
dudmuck | 1:1cd0afbed23c | 347 | case 3: printf("TempChange/LowBat"); break; |
dudmuck | 1:1cd0afbed23c | 348 | } |
dudmuck | 1:1cd0afbed23c | 349 | |
dudmuck | 2:c6b23a43a9d9 | 350 | printf(" DIO2:"); |
dudmuck | 1:1cd0afbed23c | 351 | if (fsk.RegPktConfig2.bits.DataModePacket) { |
dudmuck | 1:1cd0afbed23c | 352 | switch (radio.RegDioMapping1.bits.Dio2Mapping) { |
dudmuck | 1:1cd0afbed23c | 353 | case 0: printf("FifoFull"); break; |
dudmuck | 1:1cd0afbed23c | 354 | case 1: printf("RxReady"); break; |
dudmuck | 1:1cd0afbed23c | 355 | case 2: printf("FifoFull/rx-timeout"); break; |
dudmuck | 1:1cd0afbed23c | 356 | case 3: printf("FifoFull/rx-syncadrs"); break; |
dudmuck | 1:1cd0afbed23c | 357 | } |
dudmuck | 1:1cd0afbed23c | 358 | } else { |
dudmuck | 1:1cd0afbed23c | 359 | printf("Data"); |
dudmuck | 1:1cd0afbed23c | 360 | } |
dudmuck | 1:1cd0afbed23c | 361 | |
dudmuck | 2:c6b23a43a9d9 | 362 | printf(" DIO1:"); |
dudmuck | 1:1cd0afbed23c | 363 | if (fsk.RegPktConfig2.bits.DataModePacket) { |
dudmuck | 1:1cd0afbed23c | 364 | switch (radio.RegDioMapping1.bits.Dio1Mapping) { |
dudmuck | 1:1cd0afbed23c | 365 | case 0: printf("FifoThresh"); break; |
dudmuck | 1:1cd0afbed23c | 366 | case 1: printf("FifoEmpty"); break; |
dudmuck | 1:1cd0afbed23c | 367 | case 2: printf("FifoFull"); break; |
dudmuck | 1:1cd0afbed23c | 368 | case 3: printf("[41m-3-[0m"); break; |
dudmuck | 1:1cd0afbed23c | 369 | } |
dudmuck | 1:1cd0afbed23c | 370 | } else { |
dudmuck | 1:1cd0afbed23c | 371 | switch (radio.RegDioMapping1.bits.Dio1Mapping) { |
dudmuck | 1:1cd0afbed23c | 372 | case 0: printf("Dclk"); break; |
dudmuck | 1:1cd0afbed23c | 373 | case 1: |
dudmuck | 1:1cd0afbed23c | 374 | if (radio.RegDioMapping2.bits.MapPreambleDetect) |
dudmuck | 1:1cd0afbed23c | 375 | printf("preamble"); |
dudmuck | 1:1cd0afbed23c | 376 | else |
dudmuck | 1:1cd0afbed23c | 377 | printf("rssi"); |
dudmuck | 1:1cd0afbed23c | 378 | break; |
dudmuck | 1:1cd0afbed23c | 379 | case 2: printf("[41m-2-[0m"); break; |
dudmuck | 1:1cd0afbed23c | 380 | case 3: printf("[41m-3-[0m"); break; |
dudmuck | 1:1cd0afbed23c | 381 | } |
dudmuck | 1:1cd0afbed23c | 382 | } |
dudmuck | 1:1cd0afbed23c | 383 | |
dudmuck | 2:c6b23a43a9d9 | 384 | printf(" DIO0:"); |
dudmuck | 1:1cd0afbed23c | 385 | if (fsk.RegPktConfig2.bits.DataModePacket) { |
dudmuck | 1:1cd0afbed23c | 386 | switch (radio.RegDioMapping1.bits.Dio0Mapping) { |
dudmuck | 1:1cd0afbed23c | 387 | case 0: printf("PayloadReady/PacketSent"); break; |
dudmuck | 1:1cd0afbed23c | 388 | case 1: printf("CrcOk"); break; |
dudmuck | 1:1cd0afbed23c | 389 | case 2: printf("[41m-2-[0m"); break; |
dudmuck | 1:1cd0afbed23c | 390 | case 3: printf("TempChange/LowBat"); break; |
dudmuck | 1:1cd0afbed23c | 391 | } |
dudmuck | 1:1cd0afbed23c | 392 | } else { |
dudmuck | 1:1cd0afbed23c | 393 | switch (radio.RegDioMapping1.bits.Dio0Mapping) { |
dudmuck | 1:1cd0afbed23c | 394 | case 0: printf("SyncAdrs/TxReady"); break; |
dudmuck | 1:1cd0afbed23c | 395 | case 1: |
dudmuck | 1:1cd0afbed23c | 396 | if (radio.RegDioMapping2.bits.MapPreambleDetect) |
dudmuck | 1:1cd0afbed23c | 397 | printf("preamble"); |
dudmuck | 1:1cd0afbed23c | 398 | else |
dudmuck | 1:1cd0afbed23c | 399 | printf("rssi"); |
dudmuck | 1:1cd0afbed23c | 400 | break; |
dudmuck | 1:1cd0afbed23c | 401 | case 2: printf("RxReady"); break; |
dudmuck | 1:1cd0afbed23c | 402 | case 3: printf("[41m-3-[0m"); break; |
dudmuck | 1:1cd0afbed23c | 403 | } |
dudmuck | 1:1cd0afbed23c | 404 | } |
dudmuck | 1:1cd0afbed23c | 405 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 406 | } |
dudmuck | 1:1cd0afbed23c | 407 | |
dudmuck | 0:be215de91a68 | 408 | void lora_print_status() |
dudmuck | 0:be215de91a68 | 409 | { |
dudmuck | 0:be215de91a68 | 410 | uint8_t d; |
dudmuck | 0:be215de91a68 | 411 | |
dudmuck | 0:be215de91a68 | 412 | if (radio.type == SX1276) |
dudmuck | 0:be215de91a68 | 413 | printf("\r\nSX1276 "); |
dudmuck | 0:be215de91a68 | 414 | else if (radio.type == SX1272) |
dudmuck | 0:be215de91a68 | 415 | printf("\r\nSX1272 "); |
dudmuck | 0:be215de91a68 | 416 | |
dudmuck | 0:be215de91a68 | 417 | radio.RegOpMode.octet = radio.read_reg(REG_OPMODE); |
dudmuck | 0:be215de91a68 | 418 | if (!radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 0:be215de91a68 | 419 | printf("FSK\r\n"); |
dudmuck | 0:be215de91a68 | 420 | return; |
dudmuck | 0:be215de91a68 | 421 | } |
dudmuck | 0:be215de91a68 | 422 | |
dudmuck | 1:1cd0afbed23c | 423 | lora_print_dio(); |
dudmuck | 0:be215de91a68 | 424 | printf("LoRa "); |
dudmuck | 0:be215de91a68 | 425 | |
dudmuck | 0:be215de91a68 | 426 | // printing LoRa registers at 0x0d -> 0x3f |
dudmuck | 0:be215de91a68 | 427 | |
dudmuck | 1:1cd0afbed23c | 428 | lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG); |
dudmuck | 1:1cd0afbed23c | 429 | lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2); |
dudmuck | 0:be215de91a68 | 430 | |
dudmuck | 1:1cd0afbed23c | 431 | lora_printCodingRate(false); // false: transmitted coding rate |
dudmuck | 1:1cd0afbed23c | 432 | lora_printHeaderMode(); |
dudmuck | 1:1cd0afbed23c | 433 | lora_printBw(); |
dudmuck | 1:1cd0afbed23c | 434 | lora_printSf(); |
dudmuck | 1:1cd0afbed23c | 435 | lora_printRxPayloadCrcOn(); |
dudmuck | 0:be215de91a68 | 436 | // RegModemStat |
dudmuck | 0:be215de91a68 | 437 | printf("ModemStat:0x%02x\r\n", radio.read_reg(REG_LR_MODEMSTAT)); |
dudmuck | 0:be215de91a68 | 438 | |
dudmuck | 0:be215de91a68 | 439 | // fifo ptrs: |
dudmuck | 1:1cd0afbed23c | 440 | lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH); |
dudmuck | 1:1cd0afbed23c | 441 | lora.RegRxMaxPayloadLength = radio.read_reg(REG_LR_RX_MAX_PAYLOADLENGTH); |
dudmuck | 0:be215de91a68 | 442 | printf("fifoptr=0x%02x txbase=0x%02x rxbase=0x%02x payloadLength=0x%02x maxlen=0x%02x", |
dudmuck | 0:be215de91a68 | 443 | radio.read_reg(REG_LR_FIFOADDRPTR), |
dudmuck | 0:be215de91a68 | 444 | radio.read_reg(REG_LR_FIFOTXBASEADDR), |
dudmuck | 0:be215de91a68 | 445 | radio.read_reg(REG_LR_FIFORXBASEADDR), |
dudmuck | 1:1cd0afbed23c | 446 | lora.RegPayloadLength, |
dudmuck | 1:1cd0afbed23c | 447 | lora.RegRxMaxPayloadLength |
dudmuck | 0:be215de91a68 | 448 | ); |
dudmuck | 0:be215de91a68 | 449 | |
dudmuck | 1:1cd0afbed23c | 450 | lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS); |
dudmuck | 0:be215de91a68 | 451 | printLoraIrqs_(false); |
dudmuck | 0:be215de91a68 | 452 | |
dudmuck | 1:1cd0afbed23c | 453 | lora.RegHopPeriod = radio.read_reg(REG_LR_HOPPERIOD); |
dudmuck | 1:1cd0afbed23c | 454 | if (lora.RegHopPeriod != 0) { |
dudmuck | 1:1cd0afbed23c | 455 | printf("\r\nHopPeriod:0x%02x\r\n", lora.RegHopPeriod); |
dudmuck | 0:be215de91a68 | 456 | } |
dudmuck | 0:be215de91a68 | 457 | |
dudmuck | 0:be215de91a68 | 458 | printf("SymbTimeout:0x%03x ", radio.read_u16(REG_LR_MODEMCONFIG2) & 0x3ff); |
dudmuck | 0:be215de91a68 | 459 | |
dudmuck | 1:1cd0afbed23c | 460 | lora.RegPreamble = radio.read_u16(REG_LR_PREAMBLEMSB); |
dudmuck | 4:7a9007dfc0e5 | 461 | printf("PreambleLength:%d ", lora.RegPreamble); |
dudmuck | 0:be215de91a68 | 462 | |
dudmuck | 0:be215de91a68 | 463 | if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER || radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER_SINGLE) { |
dudmuck | 0:be215de91a68 | 464 | d = radio.read_reg(REG_LR_RSSIVALUE); |
dudmuck | 0:be215de91a68 | 465 | printf("rssi:%ddBm ", d-120); |
dudmuck | 0:be215de91a68 | 466 | } |
dudmuck | 0:be215de91a68 | 467 | |
dudmuck | 1:1cd0afbed23c | 468 | lora_printTxContinuousMode(); |
dudmuck | 0:be215de91a68 | 469 | |
dudmuck | 0:be215de91a68 | 470 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 471 | lora_printAgcAutoOn(); |
dudmuck | 0:be215de91a68 | 472 | if (radio.type == SX1272) { |
dudmuck | 1:1cd0afbed23c | 473 | printf(" LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize); |
dudmuck | 0:be215de91a68 | 474 | } |
dudmuck | 0:be215de91a68 | 475 | |
dudmuck | 0:be215de91a68 | 476 | printf("\r\nHeaderCount:%d PacketCount:%d, ", |
dudmuck | 0:be215de91a68 | 477 | radio.read_u16(REG_LR_RXHEADERCNTVALUE_MSB), radio.read_u16(REG_LR_RXPACKETCNTVALUE_MSB)); |
dudmuck | 0:be215de91a68 | 478 | |
dudmuck | 0:be215de91a68 | 479 | printf("Lora detection threshold:%02x\r\n", radio.read_reg(REG_LR_DETECTION_THRESHOLD)); |
dudmuck | 1:1cd0afbed23c | 480 | lora.RegTest31.octet = radio.read_reg(REG_LR_TEST31); |
dudmuck | 1:1cd0afbed23c | 481 | printf("detect_trig_same_peaks_nb:%d\r\n", lora.RegTest31.bits.detect_trig_same_peaks_nb); |
dudmuck | 0:be215de91a68 | 482 | |
dudmuck | 0:be215de91a68 | 483 | if (radio.type == SX1272) { |
dudmuck | 1:1cd0afbed23c | 484 | lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG); |
dudmuck | 1:1cd0afbed23c | 485 | printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize); |
dudmuck | 0:be215de91a68 | 486 | } else if (radio.type == SX1276) { |
dudmuck | 1:1cd0afbed23c | 487 | lora.RegModemConfig3.octet = radio.read_reg(REG_LR_MODEMCONFIG3); |
dudmuck | 1:1cd0afbed23c | 488 | printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig3.sx1276bits.LowDataRateOptimize); |
dudmuck | 0:be215de91a68 | 489 | } |
dudmuck | 0:be215de91a68 | 490 | |
dudmuck | 0:be215de91a68 | 491 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 492 | //printf("A %02x\r\n", radio.RegModemConfig2.octet); |
dudmuck | 0:be215de91a68 | 493 | } |
dudmuck | 0:be215de91a68 | 494 | |
dudmuck | 1:1cd0afbed23c | 495 | uint16_t |
dudmuck | 1:1cd0afbed23c | 496 | fsk_get_PayloadLength(void) |
dudmuck | 1:1cd0afbed23c | 497 | { |
dudmuck | 1:1cd0afbed23c | 498 | fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2); |
dudmuck | 1:1cd0afbed23c | 499 | |
dudmuck | 1:1cd0afbed23c | 500 | return fsk.RegPktConfig2.bits.PayloadLength; |
dudmuck | 1:1cd0afbed23c | 501 | } |
dudmuck | 1:1cd0afbed23c | 502 | |
dudmuck | 1:1cd0afbed23c | 503 | void fsk_printAddressFiltering() |
dudmuck | 1:1cd0afbed23c | 504 | { |
dudmuck | 1:1cd0afbed23c | 505 | uint8_t FSKRegNodeAdrs, FSKRegBroadcastAdrs; |
dudmuck | 1:1cd0afbed23c | 506 | |
dudmuck | 1:1cd0afbed23c | 507 | printf(" AddressFiltering:"); |
dudmuck | 1:1cd0afbed23c | 508 | switch (fsk.RegPktConfig1.bits.AddressFiltering) { |
dudmuck | 1:1cd0afbed23c | 509 | case 0: printf("off"); break; |
dudmuck | 1:1cd0afbed23c | 510 | case 1: // NodeAddress |
dudmuck | 1:1cd0afbed23c | 511 | FSKRegNodeAdrs = radio.read_reg(REG_FSK_NODEADRS); |
dudmuck | 1:1cd0afbed23c | 512 | printf("NodeAdrs:%02x\n", FSKRegNodeAdrs); |
dudmuck | 1:1cd0afbed23c | 513 | break; |
dudmuck | 1:1cd0afbed23c | 514 | case 2: // NodeAddress & BroadcastAddress |
dudmuck | 1:1cd0afbed23c | 515 | FSKRegNodeAdrs = radio.read_reg(REG_FSK_NODEADRS); |
dudmuck | 1:1cd0afbed23c | 516 | printf("NodeAdrs:%02x ", FSKRegNodeAdrs); |
dudmuck | 1:1cd0afbed23c | 517 | FSKRegBroadcastAdrs = radio.read_reg(REG_FSK_BROADCASTADRS); |
dudmuck | 1:1cd0afbed23c | 518 | printf("BroadcastAdrs:%02x\n", FSKRegBroadcastAdrs ); |
dudmuck | 1:1cd0afbed23c | 519 | break; |
dudmuck | 1:1cd0afbed23c | 520 | default: |
dudmuck | 1:1cd0afbed23c | 521 | printf("%d", fsk.RegPktConfig1.bits.AddressFiltering); |
dudmuck | 1:1cd0afbed23c | 522 | break; |
dudmuck | 1:1cd0afbed23c | 523 | } |
dudmuck | 1:1cd0afbed23c | 524 | } |
dudmuck | 1:1cd0afbed23c | 525 | |
dudmuck | 1:1cd0afbed23c | 526 | void fsk_print_IrqFlags2() |
dudmuck | 1:1cd0afbed23c | 527 | { |
dudmuck | 2:c6b23a43a9d9 | 528 | RegIrqFlags2_t RegIrqFlags2; |
dudmuck | 1:1cd0afbed23c | 529 | |
dudmuck | 1:1cd0afbed23c | 530 | printf("IrqFlags2: "); |
dudmuck | 2:c6b23a43a9d9 | 531 | RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2); |
dudmuck | 2:c6b23a43a9d9 | 532 | if (RegIrqFlags2.bits.FifoFull) |
dudmuck | 1:1cd0afbed23c | 533 | printf("FifoFull "); |
dudmuck | 2:c6b23a43a9d9 | 534 | if (RegIrqFlags2.bits.FifoEmpty) |
dudmuck | 1:1cd0afbed23c | 535 | printf("FifoEmpty "); |
dudmuck | 2:c6b23a43a9d9 | 536 | if (RegIrqFlags2.bits.FifoLevel) |
dudmuck | 1:1cd0afbed23c | 537 | printf("FifoLevel "); |
dudmuck | 2:c6b23a43a9d9 | 538 | if (RegIrqFlags2.bits.FifoOverrun) |
dudmuck | 1:1cd0afbed23c | 539 | printf("FifoOverrun "); |
dudmuck | 2:c6b23a43a9d9 | 540 | if (RegIrqFlags2.bits.PacketSent) |
dudmuck | 1:1cd0afbed23c | 541 | printf("PacketSent "); |
dudmuck | 2:c6b23a43a9d9 | 542 | if (RegIrqFlags2.bits.PayloadReady) |
dudmuck | 1:1cd0afbed23c | 543 | printf("PayloadReady "); |
dudmuck | 2:c6b23a43a9d9 | 544 | if (RegIrqFlags2.bits.CrcOk) |
dudmuck | 1:1cd0afbed23c | 545 | printf("CrcOk "); |
dudmuck | 2:c6b23a43a9d9 | 546 | if (RegIrqFlags2.bits.LowBat) |
dudmuck | 1:1cd0afbed23c | 547 | printf("LowBat "); |
dudmuck | 2:c6b23a43a9d9 | 548 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 549 | } |
dudmuck | 1:1cd0afbed23c | 550 | |
dudmuck | 1:1cd0afbed23c | 551 | void |
dudmuck | 1:1cd0afbed23c | 552 | fsk_print_status() |
dudmuck | 1:1cd0afbed23c | 553 | { |
dudmuck | 1:1cd0afbed23c | 554 | //uint16_t s; |
dudmuck | 2:c6b23a43a9d9 | 555 | RegIrqFlags1_t RegIrqFlags1; |
dudmuck | 1:1cd0afbed23c | 556 | |
dudmuck | 1:1cd0afbed23c | 557 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 1:1cd0afbed23c | 558 | printf("LoRa\r\n"); |
dudmuck | 1:1cd0afbed23c | 559 | return; |
dudmuck | 1:1cd0afbed23c | 560 | } |
dudmuck | 1:1cd0afbed23c | 561 | |
dudmuck | 1:1cd0afbed23c | 562 | if (radio.RegOpMode.bits.ModulationType == 0) { |
dudmuck | 1:1cd0afbed23c | 563 | printf("FSK "); |
dudmuck | 1:1cd0afbed23c | 564 | switch (radio.RegOpMode.bits.ModulationShaping) { |
dudmuck | 1:1cd0afbed23c | 565 | case 1: printf("BT1.0 "); break; |
dudmuck | 1:1cd0afbed23c | 566 | case 2: printf("BT0.5 "); break; |
dudmuck | 1:1cd0afbed23c | 567 | case 3: printf("BT0.3 "); break; |
dudmuck | 1:1cd0afbed23c | 568 | } |
dudmuck | 1:1cd0afbed23c | 569 | } else if (radio.RegOpMode.bits.ModulationType == 1) { |
dudmuck | 1:1cd0afbed23c | 570 | printf("OOK "); |
dudmuck | 1:1cd0afbed23c | 571 | } |
dudmuck | 1:1cd0afbed23c | 572 | |
dudmuck | 3:ab386fa756cc | 573 | printf("%dbps fdev:%dHz\r\n", fsk.get_bitrate(), fsk.get_tx_fdev_hz()); |
dudmuck | 1:1cd0afbed23c | 574 | |
dudmuck | 1:1cd0afbed23c | 575 | fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2); |
dudmuck | 1:1cd0afbed23c | 576 | |
dudmuck | 1:1cd0afbed23c | 577 | fsk_print_dio(); |
dudmuck | 1:1cd0afbed23c | 578 | |
dudmuck | 1:1cd0afbed23c | 579 | printf("rxbw:%dHz ", fsk.get_rx_bw_hz(REG_FSK_RXBW)); |
dudmuck | 1:1cd0afbed23c | 580 | printf("afcbw:%dHz\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW)); |
dudmuck | 1:1cd0afbed23c | 581 | |
dudmuck | 1:1cd0afbed23c | 582 | fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG); |
dudmuck | 1:1cd0afbed23c | 583 | printf("RssiOffset:%ddB smoothing:%dsamples\r\n", fsk.RegRssiConfig.bits.RssiOffset, 1 << (fsk.RegRssiConfig.bits.RssiSmoothing+1)); |
dudmuck | 1:1cd0afbed23c | 584 | |
dudmuck | 1:1cd0afbed23c | 585 | |
dudmuck | 1:1cd0afbed23c | 586 | fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG); |
dudmuck | 1:1cd0afbed23c | 587 | |
dudmuck | 1:1cd0afbed23c | 588 | if (fsk.RegPktConfig2.bits.DataModePacket) { |
dudmuck | 1:1cd0afbed23c | 589 | uint16_t len; |
dudmuck | 1:1cd0afbed23c | 590 | /* packet mode */ |
dudmuck | 1:1cd0afbed23c | 591 | len = fsk_get_PayloadLength(); |
dudmuck | 1:1cd0afbed23c | 592 | printf("packet RegPayloadLength:0x%03x ", len); |
dudmuck | 1:1cd0afbed23c | 593 | |
dudmuck | 1:1cd0afbed23c | 594 | if (fsk.RegPktConfig2.bits.BeaconOn) |
dudmuck | 1:1cd0afbed23c | 595 | printf("BeaconOn "); |
dudmuck | 1:1cd0afbed23c | 596 | |
dudmuck | 1:1cd0afbed23c | 597 | fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH); |
dudmuck | 1:1cd0afbed23c | 598 | printf("FifoThreshold:%d TxStartCondition:", fsk.RegFifoThreshold.bits.FifoThreshold); |
dudmuck | 1:1cd0afbed23c | 599 | if (fsk.RegFifoThreshold.bits.TxStartCondition) |
dudmuck | 1:1cd0afbed23c | 600 | printf("!FifoEmpty"); |
dudmuck | 1:1cd0afbed23c | 601 | else |
dudmuck | 1:1cd0afbed23c | 602 | printf("FifoLevel"); |
dudmuck | 1:1cd0afbed23c | 603 | |
dudmuck | 1:1cd0afbed23c | 604 | printf("\r\nAutoRestartRxMode:"); |
dudmuck | 1:1cd0afbed23c | 605 | switch (fsk.RegSyncConfig.bits.AutoRestartRxMode) { |
dudmuck | 1:1cd0afbed23c | 606 | case 0: printf("off "); break; |
dudmuck | 1:1cd0afbed23c | 607 | case 1: printf("no-pll-wait "); break; |
dudmuck | 1:1cd0afbed23c | 608 | case 2: printf("pll-wait "); break; |
dudmuck | 1:1cd0afbed23c | 609 | case 3: printf("3 "); break; |
dudmuck | 1:1cd0afbed23c | 610 | } |
dudmuck | 1:1cd0afbed23c | 611 | //...todo |
dudmuck | 1:1cd0afbed23c | 612 | |
dudmuck | 1:1cd0afbed23c | 613 | printf("PreambleSize:%d ", radio.read_u16(REG_FSK_PREAMBLEMSB)); |
dudmuck | 1:1cd0afbed23c | 614 | |
dudmuck | 1:1cd0afbed23c | 615 | fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK); |
dudmuck | 1:1cd0afbed23c | 616 | if (fsk.RegOokPeak.bits.barker_en) |
dudmuck | 1:1cd0afbed23c | 617 | printf("barker "); |
dudmuck | 1:1cd0afbed23c | 618 | if (!fsk.RegOokPeak.bits.BitSyncOn) |
dudmuck | 1:1cd0afbed23c | 619 | printf("BitSyncOff "); |
dudmuck | 1:1cd0afbed23c | 620 | //...todo |
dudmuck | 1:1cd0afbed23c | 621 | |
dudmuck | 1:1cd0afbed23c | 622 | fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1); |
dudmuck | 1:1cd0afbed23c | 623 | if (fsk.RegPktConfig1.bits.PacketFormatVariable) |
dudmuck | 1:1cd0afbed23c | 624 | printf("variable"); |
dudmuck | 1:1cd0afbed23c | 625 | else |
dudmuck | 1:1cd0afbed23c | 626 | printf("fixed"); |
dudmuck | 1:1cd0afbed23c | 627 | printf("-length\r\ncrc"); |
dudmuck | 1:1cd0afbed23c | 628 | if (fsk.RegPktConfig1.bits.CrcOn) { |
dudmuck | 1:1cd0afbed23c | 629 | printf("On"); |
dudmuck | 1:1cd0afbed23c | 630 | } else |
dudmuck | 1:1cd0afbed23c | 631 | printf("Off"); |
dudmuck | 1:1cd0afbed23c | 632 | printf(" crctype:"); |
dudmuck | 1:1cd0afbed23c | 633 | if (fsk.RegPktConfig1.bits.CrCWhiteningType) |
dudmuck | 1:1cd0afbed23c | 634 | printf("IBM"); |
dudmuck | 1:1cd0afbed23c | 635 | else |
dudmuck | 1:1cd0afbed23c | 636 | printf("CCITT"); |
dudmuck | 1:1cd0afbed23c | 637 | printf(" dcFree:"); |
dudmuck | 1:1cd0afbed23c | 638 | switch (fsk.RegPktConfig1.bits.DcFree) { |
dudmuck | 1:1cd0afbed23c | 639 | case 0: printf("none "); break; |
dudmuck | 1:1cd0afbed23c | 640 | case 1: printf("Manchester "); break; |
dudmuck | 1:1cd0afbed23c | 641 | case 2: printf("Whitening "); break; |
dudmuck | 1:1cd0afbed23c | 642 | case 3: printf("[41mreserved[0m "); break; |
dudmuck | 1:1cd0afbed23c | 643 | } |
dudmuck | 1:1cd0afbed23c | 644 | fsk_printAddressFiltering(); |
dudmuck | 1:1cd0afbed23c | 645 | |
dudmuck | 1:1cd0afbed23c | 646 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 647 | fsk_print_IrqFlags2(); |
dudmuck | 1:1cd0afbed23c | 648 | } else { |
dudmuck | 1:1cd0afbed23c | 649 | /* continuous mode */ |
dudmuck | 1:1cd0afbed23c | 650 | printf("[7mcontinuous[27m "); |
dudmuck | 1:1cd0afbed23c | 651 | } |
dudmuck | 1:1cd0afbed23c | 652 | |
dudmuck | 1:1cd0afbed23c | 653 | fsk.RegPreambleDetect.octet = radio.read_reg(REG_FSK_PREAMBLEDETECT); |
dudmuck | 1:1cd0afbed23c | 654 | printf("PreambleDetect:"); |
dudmuck | 1:1cd0afbed23c | 655 | if (fsk.RegPreambleDetect.bits.PreambleDetectorOn) { |
dudmuck | 1:1cd0afbed23c | 656 | printf("size=%d,tol=%d ", |
dudmuck | 1:1cd0afbed23c | 657 | fsk.RegPreambleDetect.bits.PreambleDetectorSize, |
dudmuck | 1:1cd0afbed23c | 658 | fsk.RegPreambleDetect.bits.PreambleDetectorTol); |
dudmuck | 1:1cd0afbed23c | 659 | } else |
dudmuck | 1:1cd0afbed23c | 660 | printf("Off "); |
dudmuck | 1:1cd0afbed23c | 661 | |
dudmuck | 1:1cd0afbed23c | 662 | printf(" syncsize:%d ", fsk.RegSyncConfig.bits.SyncSize); |
dudmuck | 1:1cd0afbed23c | 663 | printf(" : %02x ", radio.read_reg(REG_FSK_SYNCVALUE1)); |
dudmuck | 1:1cd0afbed23c | 664 | printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE2)); |
dudmuck | 1:1cd0afbed23c | 665 | printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE3)); |
dudmuck | 1:1cd0afbed23c | 666 | printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE4)); |
dudmuck | 1:1cd0afbed23c | 667 | printf("\r\n"); // end sync config |
dudmuck | 1:1cd0afbed23c | 668 | |
dudmuck | 1:1cd0afbed23c | 669 | fsk.RegAfcFei.octet = radio.read_reg(REG_FSK_AFCFEI); |
dudmuck | 1:1cd0afbed23c | 670 | printf("afcAutoClear:"); |
dudmuck | 1:1cd0afbed23c | 671 | if (fsk.RegAfcFei.bits.AfcAutoClearOn) |
dudmuck | 1:1cd0afbed23c | 672 | printf("On"); |
dudmuck | 1:1cd0afbed23c | 673 | else |
dudmuck | 1:1cd0afbed23c | 674 | printf("OFF"); |
dudmuck | 1:1cd0afbed23c | 675 | printf(" afc:%dHz ", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB))); |
dudmuck | 1:1cd0afbed23c | 676 | |
dudmuck | 1:1cd0afbed23c | 677 | printf("fei:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_FEIMSB))); |
dudmuck | 1:1cd0afbed23c | 678 | |
dudmuck | 1:1cd0afbed23c | 679 | fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG); |
dudmuck | 1:1cd0afbed23c | 680 | printf("RxTrigger:"); |
dudmuck | 1:1cd0afbed23c | 681 | switch (fsk.RegRxConfig.bits.RxTrigger) { |
dudmuck | 1:1cd0afbed23c | 682 | case 0: printf("none "); break; |
dudmuck | 1:1cd0afbed23c | 683 | case 1: printf("rssi "); break; |
dudmuck | 1:1cd0afbed23c | 684 | case 6: printf("preamble "); break; |
dudmuck | 1:1cd0afbed23c | 685 | case 7: printf("both "); break; |
dudmuck | 1:1cd0afbed23c | 686 | default: printf("-%d- ", fsk.RegRxConfig.bits.RxTrigger); break; |
dudmuck | 1:1cd0afbed23c | 687 | } |
dudmuck | 1:1cd0afbed23c | 688 | printf("AfcAuto:"); |
dudmuck | 1:1cd0afbed23c | 689 | if (fsk.RegRxConfig.bits.AfcAutoOn) |
dudmuck | 1:1cd0afbed23c | 690 | printf("On "); |
dudmuck | 1:1cd0afbed23c | 691 | else |
dudmuck | 1:1cd0afbed23c | 692 | printf("OFF "); |
dudmuck | 1:1cd0afbed23c | 693 | if (!fsk.RegRxConfig.bits.AgcAutoOn) { |
dudmuck | 1:1cd0afbed23c | 694 | radio.RegLna.octet = radio.read_reg(REG_LNA); |
dudmuck | 1:1cd0afbed23c | 695 | printf("AgcAutoOff:G%d ", radio.RegLna.bits.LnaGain); |
dudmuck | 1:1cd0afbed23c | 696 | } |
dudmuck | 1:1cd0afbed23c | 697 | |
dudmuck | 1:1cd0afbed23c | 698 | fsk.RegTimerResol.octet = radio.read_reg(REG_FSK_TIMERRESOL); |
dudmuck | 1:1cd0afbed23c | 699 | if (fsk.RegTimerResol.bits.hlm_started) |
dudmuck | 1:1cd0afbed23c | 700 | printf("[35mhlm_started[0m "); |
dudmuck | 1:1cd0afbed23c | 701 | else |
dudmuck | 1:1cd0afbed23c | 702 | printf("hlm_stopped "); |
dudmuck | 1:1cd0afbed23c | 703 | |
dudmuck | 1:1cd0afbed23c | 704 | fsk.RegRssiThresh = radio.read_reg(REG_FSK_RSSITHRESH); |
dudmuck | 1:1cd0afbed23c | 705 | printf("rssiThreshold:-%.1f@%02x ", fsk.RegRssiThresh / 2.0, REG_FSK_RSSITHRESH); |
dudmuck | 1:1cd0afbed23c | 706 | |
dudmuck | 1:1cd0afbed23c | 707 | radio.RegOpMode.octet = radio.read_reg(REG_OPMODE); |
dudmuck | 1:1cd0afbed23c | 708 | if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER || |
dudmuck | 1:1cd0afbed23c | 709 | radio.RegOpMode.bits.Mode == RF_OPMODE_SYNTHESIZER_RX) |
dudmuck | 1:1cd0afbed23c | 710 | { |
dudmuck | 1:1cd0afbed23c | 711 | printf("rssi:-%.1f ", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0); |
dudmuck | 1:1cd0afbed23c | 712 | } |
dudmuck | 1:1cd0afbed23c | 713 | |
dudmuck | 1:1cd0afbed23c | 714 | fsk.RegSeqConfig1.octet = radio.read_reg(REG_FSK_SEQCONFIG1); |
dudmuck | 1:1cd0afbed23c | 715 | printf("\r\nsequencer: "); |
dudmuck | 1:1cd0afbed23c | 716 | printf("FromStart:"); |
dudmuck | 1:1cd0afbed23c | 717 | switch (fsk.RegSeqConfig1.bits.FromStart) { |
dudmuck | 1:1cd0afbed23c | 718 | case 0: |
dudmuck | 1:1cd0afbed23c | 719 | printf("lowPowerSelection-"); |
dudmuck | 1:1cd0afbed23c | 720 | if (fsk.RegSeqConfig1.bits.LowPowerSelection) |
dudmuck | 1:1cd0afbed23c | 721 | printf("idle"); |
dudmuck | 1:1cd0afbed23c | 722 | else |
dudmuck | 1:1cd0afbed23c | 723 | printf("sequencerOff"); |
dudmuck | 1:1cd0afbed23c | 724 | break; |
dudmuck | 1:1cd0afbed23c | 725 | case 1: printf("rx"); break; |
dudmuck | 1:1cd0afbed23c | 726 | case 2: printf("tx"); break; |
dudmuck | 1:1cd0afbed23c | 727 | case 3: printf("tx on fifolevel"); break; |
dudmuck | 1:1cd0afbed23c | 728 | } |
dudmuck | 1:1cd0afbed23c | 729 | printf(" lowPowerSelection:"); |
dudmuck | 1:1cd0afbed23c | 730 | if (fsk.RegSeqConfig1.bits.LowPowerSelection) |
dudmuck | 1:1cd0afbed23c | 731 | printf("idle"); |
dudmuck | 1:1cd0afbed23c | 732 | else |
dudmuck | 1:1cd0afbed23c | 733 | printf("SequencerOff"); |
dudmuck | 1:1cd0afbed23c | 734 | if (fsk.RegSeqConfig1.bits.FromStart != 0 && |
dudmuck | 1:1cd0afbed23c | 735 | fsk.RegSeqConfig1.bits.LowPowerSelection != 0) |
dudmuck | 1:1cd0afbed23c | 736 | { // if sequencer enabled: |
dudmuck | 1:1cd0afbed23c | 737 | printf("\r\nsequencer: IdleMode:"); |
dudmuck | 1:1cd0afbed23c | 738 | if (fsk.RegSeqConfig1.bits.IdleMode) |
dudmuck | 1:1cd0afbed23c | 739 | printf("Sleep"); |
dudmuck | 1:1cd0afbed23c | 740 | else |
dudmuck | 1:1cd0afbed23c | 741 | printf("standby"); |
dudmuck | 1:1cd0afbed23c | 742 | printf("\r\nsequencer: FromIdle to:"); |
dudmuck | 1:1cd0afbed23c | 743 | if (fsk.RegSeqConfig1.bits.FromIdle) |
dudmuck | 1:1cd0afbed23c | 744 | printf("rx"); |
dudmuck | 1:1cd0afbed23c | 745 | else |
dudmuck | 1:1cd0afbed23c | 746 | printf("tx"); |
dudmuck | 1:1cd0afbed23c | 747 | printf("\r\nsequencer: FromTransmit to:"); |
dudmuck | 1:1cd0afbed23c | 748 | if (fsk.RegSeqConfig1.bits.FromTransmit) |
dudmuck | 1:1cd0afbed23c | 749 | printf("rx-on-PacketSent"); |
dudmuck | 1:1cd0afbed23c | 750 | else { |
dudmuck | 1:1cd0afbed23c | 751 | printf("lowPowerSelection-"); |
dudmuck | 1:1cd0afbed23c | 752 | if (fsk.RegSeqConfig1.bits.LowPowerSelection) |
dudmuck | 1:1cd0afbed23c | 753 | printf("idle"); |
dudmuck | 1:1cd0afbed23c | 754 | else |
dudmuck | 1:1cd0afbed23c | 755 | printf("SequencerOff"); |
dudmuck | 1:1cd0afbed23c | 756 | printf("-on-PacketSent"); |
dudmuck | 1:1cd0afbed23c | 757 | } |
dudmuck | 1:1cd0afbed23c | 758 | fsk.RegSeqConfig2.octet = radio.read_reg(REG_FSK_SEQCONFIG2); |
dudmuck | 1:1cd0afbed23c | 759 | printf("\r\nsequencer: FromReceive:"); |
dudmuck | 1:1cd0afbed23c | 760 | switch (fsk.RegSeqConfig2.bits.FromReceive) { |
dudmuck | 1:1cd0afbed23c | 761 | case 1: printf("PacketRecevied on PayloadReady"); break; |
dudmuck | 1:1cd0afbed23c | 762 | case 2: |
dudmuck | 1:1cd0afbed23c | 763 | printf("lowPowerSelection-"); |
dudmuck | 1:1cd0afbed23c | 764 | if (fsk.RegSeqConfig1.bits.LowPowerSelection) |
dudmuck | 1:1cd0afbed23c | 765 | printf("idle"); |
dudmuck | 1:1cd0afbed23c | 766 | else |
dudmuck | 1:1cd0afbed23c | 767 | printf("SequencerOff"); |
dudmuck | 1:1cd0afbed23c | 768 | printf("-on-payloadReady"); |
dudmuck | 1:1cd0afbed23c | 769 | break; |
dudmuck | 1:1cd0afbed23c | 770 | case 3: printf("PacketRecevied-on-CrcOk"); break; |
dudmuck | 1:1cd0afbed23c | 771 | case 4: printf("SequencerOff-on-Rssi"); break; |
dudmuck | 1:1cd0afbed23c | 772 | case 5: printf("SequencerOff-on-SyncAddress"); break; |
dudmuck | 1:1cd0afbed23c | 773 | case 6: printf("SequencerOff-PreambleDetect"); break; |
dudmuck | 1:1cd0afbed23c | 774 | default: printf("-%d-", fsk.RegSeqConfig2.bits.FromReceive); break; |
dudmuck | 1:1cd0afbed23c | 775 | } |
dudmuck | 1:1cd0afbed23c | 776 | printf("\r\nsequencer: FromRxTimeout:"); |
dudmuck | 1:1cd0afbed23c | 777 | switch (fsk.RegSeqConfig2.bits.FromRxTimeout) { |
dudmuck | 1:1cd0afbed23c | 778 | case 0: printf("rx"); break; |
dudmuck | 1:1cd0afbed23c | 779 | case 1: printf("tx"); break; |
dudmuck | 1:1cd0afbed23c | 780 | case 2: |
dudmuck | 1:1cd0afbed23c | 781 | printf("lowPowerSelection-"); |
dudmuck | 1:1cd0afbed23c | 782 | if (fsk.RegSeqConfig1.bits.LowPowerSelection) |
dudmuck | 1:1cd0afbed23c | 783 | printf("idle"); |
dudmuck | 1:1cd0afbed23c | 784 | else |
dudmuck | 1:1cd0afbed23c | 785 | printf("SequencerOff"); |
dudmuck | 1:1cd0afbed23c | 786 | break; |
dudmuck | 1:1cd0afbed23c | 787 | case 3: printf("SequencerOff"); break; |
dudmuck | 1:1cd0afbed23c | 788 | } |
dudmuck | 1:1cd0afbed23c | 789 | printf("\r\nsequencer: FromPacketReceived to:"); |
dudmuck | 1:1cd0afbed23c | 790 | switch (fsk.RegSeqConfig2.bits.FromPacketReceived) { |
dudmuck | 1:1cd0afbed23c | 791 | case 0: printf("SequencerOff"); break; |
dudmuck | 1:1cd0afbed23c | 792 | case 1: printf("tx on FifoEmpty"); break; |
dudmuck | 1:1cd0afbed23c | 793 | case 2: |
dudmuck | 1:1cd0afbed23c | 794 | printf("lowPowerSelection-"); |
dudmuck | 1:1cd0afbed23c | 795 | if (fsk.RegSeqConfig1.bits.LowPowerSelection) |
dudmuck | 1:1cd0afbed23c | 796 | printf("idle"); |
dudmuck | 1:1cd0afbed23c | 797 | else |
dudmuck | 1:1cd0afbed23c | 798 | printf("sequencerOff"); |
dudmuck | 1:1cd0afbed23c | 799 | break; |
dudmuck | 1:1cd0afbed23c | 800 | case 3: printf("rx via fs"); break; |
dudmuck | 1:1cd0afbed23c | 801 | case 4: printf("rx"); break; |
dudmuck | 1:1cd0afbed23c | 802 | } |
dudmuck | 1:1cd0afbed23c | 803 | |
dudmuck | 1:1cd0afbed23c | 804 | fsk.RegTimerResol.octet = radio.read_reg(REG_FSK_TIMERRESOL); |
dudmuck | 1:1cd0afbed23c | 805 | printf("\r\nsequencer: timer1:"); |
dudmuck | 1:1cd0afbed23c | 806 | switch (fsk.RegTimerResol.bits.timer1_resol) { |
dudmuck | 1:1cd0afbed23c | 807 | case 0: printf("off"); break; |
dudmuck | 1:1cd0afbed23c | 808 | case 1: printf("%dus", radio.read_reg(REG_FSK_TIMER1COEF) * 64); break; |
dudmuck | 1:1cd0afbed23c | 809 | case 2: printf("%.1fms", radio.read_reg(REG_FSK_TIMER1COEF) * 4.1); break; |
dudmuck | 1:1cd0afbed23c | 810 | case 3: printf("%.1fs", radio.read_reg(REG_FSK_TIMER1COEF) * 0.262); break; |
dudmuck | 1:1cd0afbed23c | 811 | } |
dudmuck | 1:1cd0afbed23c | 812 | |
dudmuck | 1:1cd0afbed23c | 813 | printf(" timer2:"); |
dudmuck | 1:1cd0afbed23c | 814 | switch (fsk.RegTimerResol.bits.timer2_resol) { |
dudmuck | 1:1cd0afbed23c | 815 | case 0: printf("off"); break; |
dudmuck | 1:1cd0afbed23c | 816 | case 1: printf("%dus", radio.read_reg(REG_FSK_TIMER2COEF) * 64); break; |
dudmuck | 1:1cd0afbed23c | 817 | case 2: printf("%.1fms", radio.read_reg(REG_FSK_TIMER2COEF) * 4.1); break; |
dudmuck | 1:1cd0afbed23c | 818 | case 3: printf("%.1fs", radio.read_reg(REG_FSK_TIMER2COEF) * 0.262); break; |
dudmuck | 1:1cd0afbed23c | 819 | } |
dudmuck | 1:1cd0afbed23c | 820 | } // ..if sequencer enabled |
dudmuck | 1:1cd0afbed23c | 821 | |
dudmuck | 1:1cd0afbed23c | 822 | printf("\r\nIrqFlags1:"); |
dudmuck | 2:c6b23a43a9d9 | 823 | RegIrqFlags1.octet = radio.read_reg(REG_FSK_IRQFLAGS1); |
dudmuck | 2:c6b23a43a9d9 | 824 | if (RegIrqFlags1.bits.ModeReady) |
dudmuck | 1:1cd0afbed23c | 825 | printf("ModeReady "); |
dudmuck | 2:c6b23a43a9d9 | 826 | if (RegIrqFlags1.bits.RxReady) |
dudmuck | 1:1cd0afbed23c | 827 | printf("RxReady "); |
dudmuck | 2:c6b23a43a9d9 | 828 | if (RegIrqFlags1.bits.TxReady) |
dudmuck | 1:1cd0afbed23c | 829 | printf("TxReady "); |
dudmuck | 2:c6b23a43a9d9 | 830 | if (RegIrqFlags1.bits.PllLock) |
dudmuck | 1:1cd0afbed23c | 831 | printf("PllLock "); |
dudmuck | 2:c6b23a43a9d9 | 832 | if (RegIrqFlags1.bits.Rssi) |
dudmuck | 1:1cd0afbed23c | 833 | printf("Rssi "); |
dudmuck | 2:c6b23a43a9d9 | 834 | if (RegIrqFlags1.bits.Timeout) |
dudmuck | 1:1cd0afbed23c | 835 | printf("Timeout "); |
dudmuck | 2:c6b23a43a9d9 | 836 | if (RegIrqFlags1.bits.PreambleDetect) |
dudmuck | 1:1cd0afbed23c | 837 | printf("PreambleDetect "); |
dudmuck | 2:c6b23a43a9d9 | 838 | if (RegIrqFlags1.bits.SyncAddressMatch) |
dudmuck | 1:1cd0afbed23c | 839 | printf("SyncAddressMatch "); |
dudmuck | 1:1cd0afbed23c | 840 | |
dudmuck | 1:1cd0afbed23c | 841 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 842 | |
dudmuck | 1:1cd0afbed23c | 843 | /* TODO if (!SX1272FSK->RegPktConfig1.bits.PacketFormatVariable) { // if fixed-length packet format: |
dudmuck | 1:1cd0afbed23c | 844 | s = fsk_get_PayloadLength(); |
dudmuck | 1:1cd0afbed23c | 845 | if (s > FSK_LARGE_PKT_THRESHOLD) |
dudmuck | 1:1cd0afbed23c | 846 | flags.fifo_flow_ctl = 1; |
dudmuck | 1:1cd0afbed23c | 847 | else |
dudmuck | 1:1cd0afbed23c | 848 | flags.fifo_flow_ctl = 0; |
dudmuck | 1:1cd0afbed23c | 849 | }*/ |
dudmuck | 1:1cd0afbed23c | 850 | |
dudmuck | 1:1cd0afbed23c | 851 | fsk.RegImageCal.octet = radio.read_reg(REG_FSK_IMAGECAL); |
dudmuck | 1:1cd0afbed23c | 852 | if (fsk.RegImageCal.bits.TempMonitorOff) { |
dudmuck | 1:1cd0afbed23c | 853 | printf("[42mTempMonitorOff[\r0m\n"); |
dudmuck | 1:1cd0afbed23c | 854 | } else { |
dudmuck | 1:1cd0afbed23c | 855 | printf("TempThreshold:"); |
dudmuck | 1:1cd0afbed23c | 856 | switch (fsk.RegImageCal.bits.TempThreshold) { |
dudmuck | 1:1cd0afbed23c | 857 | case 0: printf("5C"); break; |
dudmuck | 1:1cd0afbed23c | 858 | case 1: printf("10C"); break; |
dudmuck | 1:1cd0afbed23c | 859 | case 2: printf("15C"); break; |
dudmuck | 1:1cd0afbed23c | 860 | case 3: printf("20C"); break; |
dudmuck | 1:1cd0afbed23c | 861 | } |
dudmuck | 1:1cd0afbed23c | 862 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 863 | } |
dudmuck | 1:1cd0afbed23c | 864 | if (fsk.RegImageCal.bits.ImageCalRunning) |
dudmuck | 1:1cd0afbed23c | 865 | printf("[33mImageCalRunning[\r0m\n"); |
dudmuck | 1:1cd0afbed23c | 866 | |
dudmuck | 1:1cd0afbed23c | 867 | /* printf("flags.fifo_flow_ctl:%d pktidx:%d rx_pktlen:%d", flags.fifo_flow_ctl, pktidx, rx_pktlen); |
dudmuck | 1:1cd0afbed23c | 868 | printf("\n"); |
dudmuck | 1:1cd0afbed23c | 869 | |
dudmuck | 1:1cd0afbed23c | 870 | //printf("DIO0_PIN:%d\n", digitalRead(DIO0_PIN)); |
dudmuck | 1:1cd0afbed23c | 871 | printf("pkt_buf_len=%d remaining=%d\n", pk*/ |
dudmuck | 1:1cd0afbed23c | 872 | } |
dudmuck | 1:1cd0afbed23c | 873 | |
dudmuck | 0:be215de91a68 | 874 | void printOpMode() |
dudmuck | 0:be215de91a68 | 875 | { |
dudmuck | 0:be215de91a68 | 876 | radio.RegOpMode.octet = radio.read_reg(REG_OPMODE); |
dudmuck | 0:be215de91a68 | 877 | switch (radio.RegOpMode.bits.Mode) { |
dudmuck | 0:be215de91a68 | 878 | case RF_OPMODE_SLEEP: printf("[7msleep[0m"); break; |
dudmuck | 0:be215de91a68 | 879 | case RF_OPMODE_STANDBY: printf("[7mstby[0m"); break; |
dudmuck | 0:be215de91a68 | 880 | case RF_OPMODE_SYNTHESIZER_TX: printf("[33mfstx[0m"); break; |
dudmuck | 0:be215de91a68 | 881 | case RF_OPMODE_TRANSMITTER: printf("[31mtx[0m"); break; |
dudmuck | 0:be215de91a68 | 882 | case RF_OPMODE_SYNTHESIZER_RX: printf("[33mfsrx[0m"); break; |
dudmuck | 0:be215de91a68 | 883 | case RF_OPMODE_RECEIVER: printf("[32mrx[0m"); break; |
dudmuck | 0:be215de91a68 | 884 | case 6: |
dudmuck | 0:be215de91a68 | 885 | if (radio.RegOpMode.bits.LongRangeMode) |
dudmuck | 0:be215de91a68 | 886 | printf("[42mrxs[0m"); |
dudmuck | 0:be215de91a68 | 887 | else |
dudmuck | 0:be215de91a68 | 888 | printf("-6-"); |
dudmuck | 0:be215de91a68 | 889 | break; // todo: different lora/fsk |
dudmuck | 0:be215de91a68 | 890 | case 7: |
dudmuck | 0:be215de91a68 | 891 | if (radio.RegOpMode.bits.LongRangeMode) |
dudmuck | 0:be215de91a68 | 892 | printf("[45mcad[0m"); |
dudmuck | 0:be215de91a68 | 893 | else |
dudmuck | 0:be215de91a68 | 894 | printf("-7-"); |
dudmuck | 0:be215de91a68 | 895 | break; // todo: different lora/fsk |
dudmuck | 0:be215de91a68 | 896 | } |
dudmuck | 0:be215de91a68 | 897 | } |
dudmuck | 0:be215de91a68 | 898 | |
dudmuck | 0:be215de91a68 | 899 | void |
dudmuck | 0:be215de91a68 | 900 | printPa() |
dudmuck | 0:be215de91a68 | 901 | { |
dudmuck | 0:be215de91a68 | 902 | radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG); |
dudmuck | 0:be215de91a68 | 903 | if (radio.RegPaConfig.bits.PaSelect) { |
dudmuck | 0:be215de91a68 | 904 | float output_dBm = 17 - (15-radio.RegPaConfig.bits.OutputPower); |
dudmuck | 0:be215de91a68 | 905 | printf(" PABOOST OutputPower=%.1fdBm", output_dBm); |
dudmuck | 0:be215de91a68 | 906 | } else { |
dudmuck | 0:be215de91a68 | 907 | float pmax = (0.6*radio.RegPaConfig.bits.MaxPower) + 10.8; |
dudmuck | 0:be215de91a68 | 908 | float output_dBm = pmax - (15-radio.RegPaConfig.bits.OutputPower); |
dudmuck | 0:be215de91a68 | 909 | printf(" RFO pmax=%.1fdBm OutputPower=%.1fdBm", pmax, output_dBm); |
dudmuck | 0:be215de91a68 | 910 | } |
dudmuck | 0:be215de91a68 | 911 | } |
dudmuck | 0:be215de91a68 | 912 | |
dudmuck | 0:be215de91a68 | 913 | void /* things always present, whether lora or fsk */ |
dudmuck | 0:be215de91a68 | 914 | common_print_status() |
dudmuck | 0:be215de91a68 | 915 | { |
dudmuck | 0:be215de91a68 | 916 | printf("version:0x%02x %.3fMHz ", radio.read_reg(REG_VERSION), radio.get_frf_MHz()); |
dudmuck | 0:be215de91a68 | 917 | printOpMode(); |
dudmuck | 0:be215de91a68 | 918 | |
dudmuck | 0:be215de91a68 | 919 | printPa(); |
dudmuck | 0:be215de91a68 | 920 | |
dudmuck | 0:be215de91a68 | 921 | radio.RegOcp.octet = radio.read_reg(REG_OCP); |
dudmuck | 0:be215de91a68 | 922 | if (radio.RegOcp.bits.OcpOn) { |
dudmuck | 0:be215de91a68 | 923 | int imax = 0; |
dudmuck | 0:be215de91a68 | 924 | if (radio.RegOcp.bits.OcpTrim < 16) |
dudmuck | 0:be215de91a68 | 925 | imax = 45 + (5 * radio.RegOcp.bits.OcpTrim); |
dudmuck | 0:be215de91a68 | 926 | else if (radio.RegOcp.bits.OcpTrim < 28) |
dudmuck | 0:be215de91a68 | 927 | imax = -30 + (10 * radio.RegOcp.bits.OcpTrim); |
dudmuck | 0:be215de91a68 | 928 | else |
dudmuck | 0:be215de91a68 | 929 | imax = 240; |
dudmuck | 0:be215de91a68 | 930 | printf(" OcpOn %dmA ", imax); |
dudmuck | 0:be215de91a68 | 931 | } else |
dudmuck | 0:be215de91a68 | 932 | printf(" OcpOFF "); |
dudmuck | 0:be215de91a68 | 933 | |
dudmuck | 0:be215de91a68 | 934 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 935 | |
dudmuck | 0:be215de91a68 | 936 | } |
dudmuck | 0:be215de91a68 | 937 | |
dudmuck | 0:be215de91a68 | 938 | void print_rx_buf(int len) |
dudmuck | 0:be215de91a68 | 939 | { |
dudmuck | 0:be215de91a68 | 940 | int i; |
dudmuck | 0:be215de91a68 | 941 | |
dudmuck | 0:be215de91a68 | 942 | printf("000:"); |
dudmuck | 0:be215de91a68 | 943 | for (i = 0; i < len; i++) { |
dudmuck | 0:be215de91a68 | 944 | //printf("(%d)%02x ", i % 16, rx_buf[i]); |
dudmuck | 0:be215de91a68 | 945 | printf("%02x ", radio.rx_buf[i]); |
dudmuck | 0:be215de91a68 | 946 | if (i % 16 == 15 && i != len-1) |
dudmuck | 0:be215de91a68 | 947 | printf("\r\n%03d:", i+1); |
dudmuck | 0:be215de91a68 | 948 | |
dudmuck | 0:be215de91a68 | 949 | } |
dudmuck | 0:be215de91a68 | 950 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 951 | } |
dudmuck | 0:be215de91a68 | 952 | |
dudmuck | 0:be215de91a68 | 953 | void |
dudmuck | 0:be215de91a68 | 954 | service_radio() |
dudmuck | 0:be215de91a68 | 955 | { |
dudmuck | 1:1cd0afbed23c | 956 | service_action_e act; |
dudmuck | 1:1cd0afbed23c | 957 | |
dudmuck | 1:1cd0afbed23c | 958 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 4:7a9007dfc0e5 | 959 | |
dudmuck | 1:1cd0afbed23c | 960 | act = lora.service(); |
dudmuck | 0:be215de91a68 | 961 | |
dudmuck | 1:1cd0afbed23c | 962 | switch (act) { |
dudmuck | 1:1cd0afbed23c | 963 | case SERVICE_READ_FIFO: |
dudmuck | 1:1cd0afbed23c | 964 | float dbm; |
dudmuck | 1:1cd0afbed23c | 965 | if (app == APP_NONE) { |
dudmuck | 1:1cd0afbed23c | 966 | printLoraIrqs_(false); |
dudmuck | 1:1cd0afbed23c | 967 | if (lora.RegHopPeriod > 0) { |
dudmuck | 1:1cd0afbed23c | 968 | lora.RegHopChannel.octet = radio.read_reg(REG_LR_HOPCHANNEL); |
dudmuck | 1:1cd0afbed23c | 969 | printf("HopCH:%d ", lora.RegHopChannel.bits.FhssPresentChannel); |
dudmuck | 1:1cd0afbed23c | 970 | } |
dudmuck | 1:1cd0afbed23c | 971 | lora_printCodingRate(true); // true: of received packet |
dudmuck | 1:1cd0afbed23c | 972 | dbm = lora.get_pkt_rssi(); |
dudmuck | 1:1cd0afbed23c | 973 | printf(" crc%s %.1fdB %.1fdBm\r\n", |
dudmuck | 1:1cd0afbed23c | 974 | lora.RegHopChannel.bits.RxPayloadCrcOn ? "On" : "OFF", |
dudmuck | 1:1cd0afbed23c | 975 | lora.RegPktSnrValue / 4.0, |
dudmuck | 1:1cd0afbed23c | 976 | dbm |
dudmuck | 1:1cd0afbed23c | 977 | ); |
dudmuck | 1:1cd0afbed23c | 978 | print_rx_buf(lora.RegRxNbBytes); |
dudmuck | 1:1cd0afbed23c | 979 | } else if (app == APP_CHAT) { |
dudmuck | 1:1cd0afbed23c | 980 | if (lora.RegHopChannel.bits.RxPayloadCrcOn) { |
dudmuck | 1:1cd0afbed23c | 981 | if (lora.RegIrqFlags.bits.PayloadCrcError) |
dudmuck | 1:1cd0afbed23c | 982 | printf("crcError\r\n"); |
dudmuck | 1:1cd0afbed23c | 983 | else { |
dudmuck | 1:1cd0afbed23c | 984 | int n = lora.RegRxNbBytes; |
dudmuck | 1:1cd0afbed23c | 985 | radio.rx_buf[n++] = '\r'; |
dudmuck | 1:1cd0afbed23c | 986 | radio.rx_buf[n++] = '\n'; |
dudmuck | 1:1cd0afbed23c | 987 | radio.rx_buf[n] = 0; // null terminate |
dudmuck | 1:1cd0afbed23c | 988 | printf((char *)radio.rx_buf); |
dudmuck | 1:1cd0afbed23c | 989 | } |
dudmuck | 1:1cd0afbed23c | 990 | } else |
dudmuck | 1:1cd0afbed23c | 991 | printf("crcOff\r\n"); |
dudmuck | 1:1cd0afbed23c | 992 | |
dudmuck | 1:1cd0afbed23c | 993 | // clear Irq flags |
dudmuck | 1:1cd0afbed23c | 994 | radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet); |
dudmuck | 1:1cd0afbed23c | 995 | // should still be in receive mode |
dudmuck | 0:be215de91a68 | 996 | } |
dudmuck | 1:1cd0afbed23c | 997 | break; |
dudmuck | 1:1cd0afbed23c | 998 | case SERVICE_TX_DONE: |
dudmuck | 1:1cd0afbed23c | 999 | if (app == APP_CHAT) { |
dudmuck | 1:1cd0afbed23c | 1000 | lora.start_rx(); |
dudmuck | 1:1cd0afbed23c | 1001 | } |
dudmuck | 1:1cd0afbed23c | 1002 | break; |
dudmuck | 1:1cd0afbed23c | 1003 | case SERVICE_ERROR: |
dudmuck | 1:1cd0afbed23c | 1004 | printf("error\r\n"); |
dudmuck | 1:1cd0afbed23c | 1005 | break; |
dudmuck | 1:1cd0afbed23c | 1006 | } // ...switch (act) |
dudmuck | 1:1cd0afbed23c | 1007 | } else { |
dudmuck | 1:1cd0afbed23c | 1008 | /* FSK: */ |
dudmuck | 1:1cd0afbed23c | 1009 | act = fsk.service(); |
dudmuck | 1:1cd0afbed23c | 1010 | |
dudmuck | 1:1cd0afbed23c | 1011 | switch (act) { |
dudmuck | 1:1cd0afbed23c | 1012 | case SERVICE_READ_FIFO: |
dudmuck | 2:c6b23a43a9d9 | 1013 | if (app == APP_CHAT) { |
dudmuck | 2:c6b23a43a9d9 | 1014 | int n = fsk.rx_buf_length; |
dudmuck | 2:c6b23a43a9d9 | 1015 | radio.rx_buf[n++] = '\r'; |
dudmuck | 2:c6b23a43a9d9 | 1016 | radio.rx_buf[n++] = '\n'; |
dudmuck | 2:c6b23a43a9d9 | 1017 | radio.rx_buf[n] = 0; // null terminate |
dudmuck | 2:c6b23a43a9d9 | 1018 | printf((char *)radio.rx_buf); |
dudmuck | 2:c6b23a43a9d9 | 1019 | } else { |
dudmuck | 2:c6b23a43a9d9 | 1020 | int i; |
dudmuck | 2:c6b23a43a9d9 | 1021 | if (fsk.RegRxConfig.bits.AfcAutoOn) |
dudmuck | 2:c6b23a43a9d9 | 1022 | printf("%dHz ", (int)(FREQ_STEP_HZ * fsk.RegAfcValue)); |
dudmuck | 2:c6b23a43a9d9 | 1023 | printf("%d: ", fsk.rx_buf_length); |
dudmuck | 2:c6b23a43a9d9 | 1024 | for (i = 0; i < fsk.rx_buf_length; i++) |
dudmuck | 2:c6b23a43a9d9 | 1025 | printf("%02x ", radio.rx_buf[i]); |
dudmuck | 2:c6b23a43a9d9 | 1026 | printf("\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1027 | } |
dudmuck | 1:1cd0afbed23c | 1028 | break; |
dudmuck | 2:c6b23a43a9d9 | 1029 | case SERVICE_TX_DONE: |
dudmuck | 2:c6b23a43a9d9 | 1030 | if (app == APP_CHAT) { |
dudmuck | 2:c6b23a43a9d9 | 1031 | fsk.start_rx(); |
dudmuck | 2:c6b23a43a9d9 | 1032 | } |
dudmuck | 2:c6b23a43a9d9 | 1033 | break; |
dudmuck | 1:1cd0afbed23c | 1034 | } // ...switch (act) |
dudmuck | 1:1cd0afbed23c | 1035 | } |
dudmuck | 0:be215de91a68 | 1036 | } |
dudmuck | 0:be215de91a68 | 1037 | |
dudmuck | 0:be215de91a68 | 1038 | int get_kbd_str(char* buf, int size) |
dudmuck | 0:be215de91a68 | 1039 | { |
dudmuck | 0:be215de91a68 | 1040 | char c; |
dudmuck | 0:be215de91a68 | 1041 | int i; |
dudmuck | 0:be215de91a68 | 1042 | static int prev_len; |
dudmuck | 0:be215de91a68 | 1043 | |
dudmuck | 0:be215de91a68 | 1044 | for (i = 0;;) { |
dudmuck | 0:be215de91a68 | 1045 | if (pc.readable()) { |
dudmuck | 0:be215de91a68 | 1046 | c = pc.getc(); |
dudmuck | 0:be215de91a68 | 1047 | if (c == 8 && i > 0) { |
dudmuck | 0:be215de91a68 | 1048 | pc.putc(8); |
dudmuck | 0:be215de91a68 | 1049 | pc.putc(' '); |
dudmuck | 0:be215de91a68 | 1050 | pc.putc(8); |
dudmuck | 0:be215de91a68 | 1051 | i--; |
dudmuck | 0:be215de91a68 | 1052 | } else if (c == '\r') { |
dudmuck | 0:be215de91a68 | 1053 | if (i == 0) { |
dudmuck | 0:be215de91a68 | 1054 | return prev_len; // repeat previous |
dudmuck | 0:be215de91a68 | 1055 | } else { |
dudmuck | 0:be215de91a68 | 1056 | buf[i] = 0; // null terminate |
dudmuck | 0:be215de91a68 | 1057 | prev_len = i; |
dudmuck | 0:be215de91a68 | 1058 | return i; |
dudmuck | 0:be215de91a68 | 1059 | } |
dudmuck | 0:be215de91a68 | 1060 | } else if (c == 3) { |
dudmuck | 0:be215de91a68 | 1061 | // ctrl-C abort |
dudmuck | 0:be215de91a68 | 1062 | return -1; |
dudmuck | 0:be215de91a68 | 1063 | } else if (i < size) { |
dudmuck | 0:be215de91a68 | 1064 | buf[i++] = c; |
dudmuck | 0:be215de91a68 | 1065 | pc.putc(c); |
dudmuck | 0:be215de91a68 | 1066 | } |
dudmuck | 4:7a9007dfc0e5 | 1067 | } else { |
dudmuck | 0:be215de91a68 | 1068 | service_radio(); |
modtronix | 5:d6e7fb9446ff | 1069 | |
modtronix | 5:d6e7fb9446ff | 1070 | //Enable Auto Transmit |
modtronix | 5:d6e7fb9446ff | 1071 | #if (AUTO_TRANSMIT==1) |
modtronix | 5:d6e7fb9446ff | 1072 | if (tmr.read_ms() > t) { |
modtronix | 5:d6e7fb9446ff | 1073 | t = t + 1000; |
modtronix | 5:d6e7fb9446ff | 1074 | if (initDone==3) { |
modtronix | 5:d6e7fb9446ff | 1075 | led2 = !led2; |
modtronix | 5:d6e7fb9446ff | 1076 | strcpy(buf, "t"); |
modtronix | 5:d6e7fb9446ff | 1077 | } |
modtronix | 5:d6e7fb9446ff | 1078 | else { |
modtronix | 5:d6e7fb9446ff | 1079 | if (initDone==0) { |
modtronix | 5:d6e7fb9446ff | 1080 | // 't1' = Lora, F=915MHz, BW=500, SF=12, Payload Lenght=9 |
modtronix | 5:d6e7fb9446ff | 1081 | // 't2' = Lora, F=915MHz, BW=250, SF=12, Payload Lenght=9 |
modtronix | 5:d6e7fb9446ff | 1082 | // 't3' = Lora, F=915MHz, BW=125, SF=12, Payload Lenght=9 |
modtronix | 5:d6e7fb9446ff | 1083 | // 't4' = Lora, F=915MHz, BW=62.5, SF=12, Payload Lenght=9 |
modtronix | 5:d6e7fb9446ff | 1084 | strcpy(buf, "t2"); |
modtronix | 5:d6e7fb9446ff | 1085 | } |
modtronix | 5:d6e7fb9446ff | 1086 | else if (initDone==1) { |
modtronix | 5:d6e7fb9446ff | 1087 | strcpy(buf, "C"); //Toggle CRC, first time this is sent CRC is turned off |
modtronix | 5:d6e7fb9446ff | 1088 | } |
modtronix | 5:d6e7fb9446ff | 1089 | else if (initDone==2) { |
modtronix | 5:d6e7fb9446ff | 1090 | strcpy(buf, "ld1"); //Low Datarate Optimize on |
modtronix | 5:d6e7fb9446ff | 1091 | } |
modtronix | 5:d6e7fb9446ff | 1092 | initDone++; |
modtronix | 5:d6e7fb9446ff | 1093 | } |
modtronix | 5:d6e7fb9446ff | 1094 | pc.puts(buf); |
modtronix | 5:d6e7fb9446ff | 1095 | pc.putc('\r'); |
modtronix | 5:d6e7fb9446ff | 1096 | return strlen(buf); |
modtronix | 5:d6e7fb9446ff | 1097 | } //if (tmr.read_ms() > t) { |
modtronix | 5:d6e7fb9446ff | 1098 | #endif |
dudmuck | 4:7a9007dfc0e5 | 1099 | } |
dudmuck | 0:be215de91a68 | 1100 | } // ...for() |
modtronix | 5:d6e7fb9446ff | 1101 | |
dudmuck | 0:be215de91a68 | 1102 | } |
dudmuck | 0:be215de91a68 | 1103 | |
dudmuck | 0:be215de91a68 | 1104 | void |
dudmuck | 0:be215de91a68 | 1105 | console_chat() |
dudmuck | 0:be215de91a68 | 1106 | { |
dudmuck | 0:be215de91a68 | 1107 | int i, len = get_kbd_str(pcbuf, sizeof(pcbuf)); |
dudmuck | 0:be215de91a68 | 1108 | if (len < 0) { |
dudmuck | 0:be215de91a68 | 1109 | printf("chat abort\r\n"); |
dudmuck | 0:be215de91a68 | 1110 | app = APP_NONE; |
dudmuck | 0:be215de91a68 | 1111 | return; |
dudmuck | 0:be215de91a68 | 1112 | } else { |
modtronix | 5:d6e7fb9446ff | 1113 | printf("console_chat....\r\n"); |
dudmuck | 0:be215de91a68 | 1114 | for (i = 0; i < len; i++) |
dudmuck | 0:be215de91a68 | 1115 | radio.tx_buf[i] = pcbuf[i]; |
dudmuck | 1:1cd0afbed23c | 1116 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 1:1cd0afbed23c | 1117 | lora.RegPayloadLength = len; |
dudmuck | 1:1cd0afbed23c | 1118 | radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength); |
dudmuck | 1:1cd0afbed23c | 1119 | lora.start_tx(len); |
dudmuck | 2:c6b23a43a9d9 | 1120 | } else { |
dudmuck | 2:c6b23a43a9d9 | 1121 | fsk.start_tx(len); |
dudmuck | 2:c6b23a43a9d9 | 1122 | } |
dudmuck | 0:be215de91a68 | 1123 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 1124 | } |
dudmuck | 0:be215de91a68 | 1125 | } |
dudmuck | 0:be215de91a68 | 1126 | |
dudmuck | 0:be215de91a68 | 1127 | void |
dudmuck | 0:be215de91a68 | 1128 | console() |
dudmuck | 0:be215de91a68 | 1129 | { |
dudmuck | 0:be215de91a68 | 1130 | int len, i; |
dudmuck | 2:c6b23a43a9d9 | 1131 | uint32_t ui; |
dudmuck | 0:be215de91a68 | 1132 | uint8_t a, d; |
dudmuck | 1:1cd0afbed23c | 1133 | static uint16_t fsk_tx_length; |
modtronix | 5:d6e7fb9446ff | 1134 | |
dudmuck | 0:be215de91a68 | 1135 | len = get_kbd_str(pcbuf, sizeof(pcbuf)); |
dudmuck | 0:be215de91a68 | 1136 | if (len < 0) { |
dudmuck | 0:be215de91a68 | 1137 | printf("abort\r\n"); |
dudmuck | 0:be215de91a68 | 1138 | return; |
dudmuck | 0:be215de91a68 | 1139 | } |
modtronix | 5:d6e7fb9446ff | 1140 | |
dudmuck | 0:be215de91a68 | 1141 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 1142 | if (len == 1) { |
dudmuck | 0:be215de91a68 | 1143 | switch (pcbuf[0]) { |
dudmuck | 0:be215de91a68 | 1144 | case 'i': |
dudmuck | 3:ab386fa756cc | 1145 | printf("init\r\n"); |
dudmuck | 0:be215de91a68 | 1146 | radio.init(); |
dudmuck | 3:ab386fa756cc | 1147 | if (!radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 3:ab386fa756cc | 1148 | fsk.init(); // put FSK modem to some functioning default |
dudmuck | 3:ab386fa756cc | 1149 | } else { |
dudmuck | 3:ab386fa756cc | 1150 | // lora configuration is more simple |
dudmuck | 3:ab386fa756cc | 1151 | } |
dudmuck | 0:be215de91a68 | 1152 | break; |
dudmuck | 0:be215de91a68 | 1153 | case 'h': |
dudmuck | 0:be215de91a68 | 1154 | printf("hw_reset()\r\n"); |
dudmuck | 0:be215de91a68 | 1155 | radio.hw_reset(); |
dudmuck | 0:be215de91a68 | 1156 | break; |
dudmuck | 0:be215de91a68 | 1157 | case 'R': |
dudmuck | 0:be215de91a68 | 1158 | // read all registers |
dudmuck | 0:be215de91a68 | 1159 | for (a = 1; a < 0x71; a++) { |
dudmuck | 0:be215de91a68 | 1160 | d = radio.read_reg(a); |
dudmuck | 0:be215de91a68 | 1161 | //update_shadow_regs(selected_radio, a, d); |
dudmuck | 0:be215de91a68 | 1162 | printf("%02x: %02x\r\n", a, d); |
dudmuck | 0:be215de91a68 | 1163 | } |
dudmuck | 0:be215de91a68 | 1164 | break; |
dudmuck | 0:be215de91a68 | 1165 | case 'T': |
dudmuck | 1:1cd0afbed23c | 1166 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 1:1cd0afbed23c | 1167 | lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2); |
dudmuck | 1:1cd0afbed23c | 1168 | //printf("a %02x\r\n", radio.RegModemConfig2.octet); |
dudmuck | 1:1cd0afbed23c | 1169 | lora.RegModemConfig2.sx1276bits.TxContinuousMode ^= 1; // same for sx1272 and sx1276 |
dudmuck | 1:1cd0afbed23c | 1170 | //printf("b %02x\r\n", radio.RegModemConfig2.octet); |
dudmuck | 1:1cd0afbed23c | 1171 | radio.write_reg(REG_LR_MODEMCONFIG2, lora.RegModemConfig2.octet); |
dudmuck | 1:1cd0afbed23c | 1172 | lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG); |
dudmuck | 1:1cd0afbed23c | 1173 | //printf("c %02x\r\n", radio.RegModemConfig2.octet); |
dudmuck | 1:1cd0afbed23c | 1174 | lora_printTxContinuousMode(); |
dudmuck | 1:1cd0afbed23c | 1175 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 1176 | } |
dudmuck | 0:be215de91a68 | 1177 | break; |
dudmuck | 0:be215de91a68 | 1178 | case 'C': |
dudmuck | 2:c6b23a43a9d9 | 1179 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 2:c6b23a43a9d9 | 1180 | lora.setRxPayloadCrcOn(!lora.getRxPayloadCrcOn()); |
dudmuck | 2:c6b23a43a9d9 | 1181 | lora_printRxPayloadCrcOn(); |
dudmuck | 2:c6b23a43a9d9 | 1182 | } else { |
dudmuck | 2:c6b23a43a9d9 | 1183 | printf("CrcOn:"); |
dudmuck | 2:c6b23a43a9d9 | 1184 | fsk.RegPktConfig1.bits.CrcOn ^= 1; |
dudmuck | 2:c6b23a43a9d9 | 1185 | radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet); |
dudmuck | 2:c6b23a43a9d9 | 1186 | if (fsk.RegPktConfig1.bits.CrcOn) |
dudmuck | 2:c6b23a43a9d9 | 1187 | printf("On\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1188 | else |
dudmuck | 2:c6b23a43a9d9 | 1189 | printf("Off\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1190 | if (fsk.RegPktConfig2.bits.DataModePacket && radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) { |
dudmuck | 2:c6b23a43a9d9 | 1191 | fsk.config_dio0_for_pktmode_rx(); |
dudmuck | 2:c6b23a43a9d9 | 1192 | } |
dudmuck | 2:c6b23a43a9d9 | 1193 | } |
dudmuck | 0:be215de91a68 | 1194 | printf("\r\n"); |
dudmuck | 0:be215de91a68 | 1195 | break; |
dudmuck | 0:be215de91a68 | 1196 | case 'B': |
dudmuck | 0:be215de91a68 | 1197 | radio.RegPaConfig.bits.PaSelect ^= 1; |
dudmuck | 0:be215de91a68 | 1198 | radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet); |
dudmuck | 0:be215de91a68 | 1199 | printPa(); |
dudmuck | 0:be215de91a68 | 1200 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 1201 | break; |
dudmuck | 1:1cd0afbed23c | 1202 | case 'L': |
dudmuck | 1:1cd0afbed23c | 1203 | if (radio.RegOpMode.bits.LongRangeMode) |
dudmuck | 1:1cd0afbed23c | 1204 | fsk.enable(); |
dudmuck | 1:1cd0afbed23c | 1205 | else |
dudmuck | 1:1cd0afbed23c | 1206 | lora.enable(); |
dudmuck | 1:1cd0afbed23c | 1207 | |
dudmuck | 1:1cd0afbed23c | 1208 | radio.RegOpMode.octet = radio.read_reg(REG_OPMODE); |
dudmuck | 1:1cd0afbed23c | 1209 | if (radio.RegOpMode.bits.LongRangeMode) |
dudmuck | 1:1cd0afbed23c | 1210 | printf("LoRa\r\n"); |
dudmuck | 1:1cd0afbed23c | 1211 | else |
dudmuck | 1:1cd0afbed23c | 1212 | printf("FSK\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1213 | break; |
dudmuck | 2:c6b23a43a9d9 | 1214 | case 's': |
dudmuck | 2:c6b23a43a9d9 | 1215 | if (!radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 2:c6b23a43a9d9 | 1216 | fsk.RegFifoThreshold.bits.TxStartCondition ^= 1; |
dudmuck | 2:c6b23a43a9d9 | 1217 | radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet); |
dudmuck | 2:c6b23a43a9d9 | 1218 | printf("TxStartCondition:"); |
dudmuck | 2:c6b23a43a9d9 | 1219 | if (fsk.RegFifoThreshold.bits.TxStartCondition) |
dudmuck | 2:c6b23a43a9d9 | 1220 | printf("!FifoEmpty\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1221 | else |
dudmuck | 2:c6b23a43a9d9 | 1222 | printf("FifoLevel\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1223 | } |
dudmuck | 2:c6b23a43a9d9 | 1224 | break; |
modtronix | 5:d6e7fb9446ff | 1225 | case 't': |
modtronix | 5:d6e7fb9446ff | 1226 | if (radio.RegOpMode.bits.LongRangeMode) { |
modtronix | 5:d6e7fb9446ff | 1227 | printf("Test...\r\n"); |
modtronix | 5:d6e7fb9446ff | 1228 | |
modtronix | 5:d6e7fb9446ff | 1229 | //MODTRONIX |
modtronix | 5:d6e7fb9446ff | 1230 | //For the devkit, in LoRa mode, the packet is built up as follows. |
modtronix | 5:d6e7fb9446ff | 1231 | //Preample = 8 |
modtronix | 5:d6e7fb9446ff | 1232 | //Header = 8 |
modtronix | 5:d6e7fb9446ff | 1233 | //Payload 0: Platform ID |
modtronix | 5:d6e7fb9446ff | 1234 | //Payload 1-4: Packet Count |
modtronix | 5:d6e7fb9446ff | 1235 | //Payload 5: 'P' |
modtronix | 5:d6e7fb9446ff | 1236 | //Payload 6: 'E' |
modtronix | 5:d6e7fb9446ff | 1237 | //Payload 7: 'R' |
modtronix | 5:d6e7fb9446ff | 1238 | //Payload 8: FCS |
modtronix | 5:d6e7fb9446ff | 1239 | |
modtronix | 5:d6e7fb9446ff | 1240 | //Platform ID |
modtronix | 5:d6e7fb9446ff | 1241 | radio.tx_buf[0] = 0; |
modtronix | 5:d6e7fb9446ff | 1242 | |
modtronix | 5:d6e7fb9446ff | 1243 | //Count |
modtronix | 5:d6e7fb9446ff | 1244 | radio.tx_buf[1] = 0; |
modtronix | 5:d6e7fb9446ff | 1245 | radio.tx_buf[2] = 0; |
modtronix | 5:d6e7fb9446ff | 1246 | radio.tx_buf[3] = 0; |
modtronix | 5:d6e7fb9446ff | 1247 | radio.tx_buf[4] = tx_cnt++; |
modtronix | 5:d6e7fb9446ff | 1248 | |
modtronix | 5:d6e7fb9446ff | 1249 | //PER |
modtronix | 5:d6e7fb9446ff | 1250 | radio.tx_buf[5] = 'P'; |
modtronix | 5:d6e7fb9446ff | 1251 | radio.tx_buf[6] = 'E'; |
modtronix | 5:d6e7fb9446ff | 1252 | radio.tx_buf[7] = 'R'; |
modtronix | 5:d6e7fb9446ff | 1253 | |
modtronix | 5:d6e7fb9446ff | 1254 | //FCS |
modtronix | 5:d6e7fb9446ff | 1255 | radio.tx_buf[8] = 0; |
modtronix | 5:d6e7fb9446ff | 1256 | |
modtronix | 5:d6e7fb9446ff | 1257 | lora.RegPayloadLength = 9; |
modtronix | 5:d6e7fb9446ff | 1258 | lora.start_tx(lora.RegPayloadLength); |
modtronix | 5:d6e7fb9446ff | 1259 | } |
modtronix | 5:d6e7fb9446ff | 1260 | else { |
modtronix | 5:d6e7fb9446ff | 1261 | printf("Not LoRa Mode!\r\n"); |
modtronix | 5:d6e7fb9446ff | 1262 | } |
modtronix | 5:d6e7fb9446ff | 1263 | |
modtronix | 5:d6e7fb9446ff | 1264 | break; |
dudmuck | 2:c6b23a43a9d9 | 1265 | case 'f': |
dudmuck | 2:c6b23a43a9d9 | 1266 | if (!radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 2:c6b23a43a9d9 | 1267 | printf("PacketFormat:"); |
dudmuck | 2:c6b23a43a9d9 | 1268 | fsk.RegPktConfig1.bits.PacketFormatVariable ^= 1; |
dudmuck | 2:c6b23a43a9d9 | 1269 | radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet); |
dudmuck | 2:c6b23a43a9d9 | 1270 | if (fsk.RegPktConfig1.bits.PacketFormatVariable) |
dudmuck | 2:c6b23a43a9d9 | 1271 | printf("variable\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1272 | else |
dudmuck | 2:c6b23a43a9d9 | 1273 | printf("fixed\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1274 | /*if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) |
dudmuck | 2:c6b23a43a9d9 | 1275 | reset_flow();*/ |
dudmuck | 2:c6b23a43a9d9 | 1276 | } |
dudmuck | 2:c6b23a43a9d9 | 1277 | break; |
dudmuck | 2:c6b23a43a9d9 | 1278 | case 'E': |
dudmuck | 2:c6b23a43a9d9 | 1279 | if (!radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 2:c6b23a43a9d9 | 1280 | RegIrqFlags2_t RegIrqFlags2; |
dudmuck | 2:c6b23a43a9d9 | 1281 | RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2); |
dudmuck | 2:c6b23a43a9d9 | 1282 | while (!RegIrqFlags2.bits.FifoEmpty) { |
dudmuck | 2:c6b23a43a9d9 | 1283 | if (pc.readable()) |
dudmuck | 2:c6b23a43a9d9 | 1284 | break; |
dudmuck | 2:c6b23a43a9d9 | 1285 | printf("%02x\r\n", radio.read_reg(REG_FIFO)); |
dudmuck | 2:c6b23a43a9d9 | 1286 | RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2); |
dudmuck | 2:c6b23a43a9d9 | 1287 | } |
dudmuck | 2:c6b23a43a9d9 | 1288 | } |
dudmuck | 2:c6b23a43a9d9 | 1289 | break; |
dudmuck | 2:c6b23a43a9d9 | 1290 | case 'A': |
dudmuck | 2:c6b23a43a9d9 | 1291 | if (!radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 2:c6b23a43a9d9 | 1292 | fsk.RegRxConfig.bits.AfcAutoOn ^= 1; |
dudmuck | 2:c6b23a43a9d9 | 1293 | radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet); |
dudmuck | 2:c6b23a43a9d9 | 1294 | printf("AfcAuto:"); |
dudmuck | 2:c6b23a43a9d9 | 1295 | if (fsk.RegRxConfig.bits.AfcAutoOn) |
dudmuck | 2:c6b23a43a9d9 | 1296 | printf("On\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1297 | else |
dudmuck | 2:c6b23a43a9d9 | 1298 | printf("OFF\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1299 | break; |
dudmuck | 2:c6b23a43a9d9 | 1300 | } |
dudmuck | 2:c6b23a43a9d9 | 1301 | break; |
dudmuck | 0:be215de91a68 | 1302 | case '?': |
dudmuck | 1:1cd0afbed23c | 1303 | printf("L toggle LongRangeMode/FSK\r\n"); |
dudmuck | 0:be215de91a68 | 1304 | printf("i radio_init\r\n"); |
dudmuck | 0:be215de91a68 | 1305 | printf("h hw_reset\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1306 | printf("tx[%%d] transmit\r\n"); |
dudmuck | 1:1cd0afbed23c | 1307 | printf("rx receive\r\n"); |
dudmuck | 0:be215de91a68 | 1308 | printf("C toggle crcOn\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1309 | printf("op[%%d] get/set output power\r\n"); |
dudmuck | 1:1cd0afbed23c | 1310 | printf("d[0-5] change DIO pin assignment\r\n"); |
dudmuck | 3:ab386fa756cc | 1311 | printf("frf[%%f} get/set operating frequency (MHz)\r\n"); |
dudmuck | 1:1cd0afbed23c | 1312 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 2:c6b23a43a9d9 | 1313 | printf("pl[%%d] LORA get/set RegPayloadLength\r\n"); |
dudmuck | 1:1cd0afbed23c | 1314 | printf("cr[1234] LORA set coding rate \r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1315 | printf("bw[%%d] LORA get/set bandwidth\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1316 | printf("sf[%%d] LORA get/set spreading factor\r\n"); |
dudmuck | 1:1cd0afbed23c | 1317 | printf("T LORA toggle TxContinuousMode\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1318 | printf("hp[%%d] LORA get/set hop period\r\n"); |
dudmuck | 1:1cd0afbed23c | 1319 | printf("hm LORA toggle explicit/explicit header mode\r\n"); |
modtronix | 5:d6e7fb9446ff | 1320 | printf("ld[%%d] LORA get/set low datarate optimize\r\n"); |
dudmuck | 1:1cd0afbed23c | 1321 | } else { |
dudmuck | 2:c6b23a43a9d9 | 1322 | printf("bw[a][%%d] FSK get-set rxbw (bwa=afcbw)\r\n"); |
dudmuck | 3:ab386fa756cc | 1323 | printf("br[%%d] FSK get-set bitrate\r\n"); |
dudmuck | 3:ab386fa756cc | 1324 | printf("fdev[%%d] FSK get-set TX frequency deviation (hz)\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1325 | printf("rt FSK change RxTrigger\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1326 | printf("pd FSK enable/disable preamble detector\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1327 | printf("pt FSK get-set PreambleDetectorTol\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1328 | printf("ss[%%d] FSK get-set SyncSize\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1329 | printf("S[%%x] FSK get-set sync word\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1330 | printf("s FSK toggle TxStartCondition\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1331 | printf("f FSK toggle PacketFormat fixed-variable\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1332 | printf("E FSK empty out the fifo\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1333 | printf("ac FSK AfcClear\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1334 | printf("A FSK toggle AfcAutoOn\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1335 | printf("mp FSK toggle MapPreambleDetect\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1336 | printf("ar FSK change AutoRestartRxMode\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1337 | printf("alc FSK toggle AfcAutoClearOn\r\n"); |
dudmuck | 3:ab386fa756cc | 1338 | printf("pre[%%d} FSK get-set TX preamble length\r\n"); |
dudmuck | 1:1cd0afbed23c | 1339 | } |
dudmuck | 0:be215de91a68 | 1340 | break; |
dudmuck | 0:be215de91a68 | 1341 | case '.': |
dudmuck | 1:1cd0afbed23c | 1342 | if (radio.RegOpMode.bits.LongRangeMode) |
dudmuck | 1:1cd0afbed23c | 1343 | lora_print_status(); |
dudmuck | 1:1cd0afbed23c | 1344 | else |
dudmuck | 1:1cd0afbed23c | 1345 | fsk_print_status(); |
dudmuck | 0:be215de91a68 | 1346 | common_print_status(); |
dudmuck | 0:be215de91a68 | 1347 | break; |
dudmuck | 0:be215de91a68 | 1348 | } // ...switch (pcbuf[0]) |
dudmuck | 0:be215de91a68 | 1349 | } else { |
dudmuck | 0:be215de91a68 | 1350 | if (pcbuf[0] == 't' && pcbuf[1] == 'x') { // TX |
dudmuck | 1:1cd0afbed23c | 1351 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 1:1cd0afbed23c | 1352 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 2:c6b23a43a9d9 | 1353 | sscanf(pcbuf+2, "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1354 | lora.RegPayloadLength = i; |
dudmuck | 1:1cd0afbed23c | 1355 | } |
dudmuck | 1:1cd0afbed23c | 1356 | tx_cnt++; |
dudmuck | 1:1cd0afbed23c | 1357 | for (i = 0; i < lora.RegPayloadLength; i++) |
dudmuck | 1:1cd0afbed23c | 1358 | radio.tx_buf[i] = tx_cnt; |
dudmuck | 1:1cd0afbed23c | 1359 | lora.start_tx(lora.RegPayloadLength); |
dudmuck | 2:c6b23a43a9d9 | 1360 | } else { // FSK: |
dudmuck | 1:1cd0afbed23c | 1361 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 2:c6b23a43a9d9 | 1362 | sscanf(pcbuf+2, "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1363 | fsk_tx_length = i; |
dudmuck | 1:1cd0afbed23c | 1364 | } |
dudmuck | 2:c6b23a43a9d9 | 1365 | if (radio.RegOpMode.bits.Mode != RF_OPMODE_TRANSMITTER) { // if not already busy transmitting |
dudmuck | 2:c6b23a43a9d9 | 1366 | tx_cnt++; |
dudmuck | 2:c6b23a43a9d9 | 1367 | for (i = 0; i < fsk_tx_length; i++) { |
dudmuck | 2:c6b23a43a9d9 | 1368 | radio.tx_buf[i] = tx_cnt; |
dudmuck | 2:c6b23a43a9d9 | 1369 | } |
dudmuck | 2:c6b23a43a9d9 | 1370 | fsk.start_tx(fsk_tx_length); |
dudmuck | 2:c6b23a43a9d9 | 1371 | } |
dudmuck | 0:be215de91a68 | 1372 | } |
modtronix | 5:d6e7fb9446ff | 1373 | //MODTRONIX Added |
modtronix | 5:d6e7fb9446ff | 1374 | // 't1' = Lora, F=915MHz, BW=500, SF=12, Payload Lenght=9 |
modtronix | 5:d6e7fb9446ff | 1375 | // 't2' = Lora, F=915MHz, BW=250, SF=12, Payload Lenght=9 |
modtronix | 5:d6e7fb9446ff | 1376 | // 't3' = Lora, F=915MHz, BW=125, SF=12, Payload Lenght=9 |
modtronix | 5:d6e7fb9446ff | 1377 | // 't4' = Lora, F=915MHz, BW=62.5, SF=12, Payload Lenght=9 |
modtronix | 5:d6e7fb9446ff | 1378 | } else if (pcbuf[0] == 't' && (pcbuf[1] >= '0' && pcbuf[1] <= '9')) { |
modtronix | 5:d6e7fb9446ff | 1379 | //Lora mode |
modtronix | 5:d6e7fb9446ff | 1380 | if (!radio.RegOpMode.bits.LongRangeMode) { |
modtronix | 5:d6e7fb9446ff | 1381 | lora.enable(); |
modtronix | 5:d6e7fb9446ff | 1382 | } |
modtronix | 5:d6e7fb9446ff | 1383 | radio.RegOpMode.octet = radio.read_reg(REG_OPMODE); |
modtronix | 5:d6e7fb9446ff | 1384 | if (radio.RegOpMode.bits.LongRangeMode) |
modtronix | 5:d6e7fb9446ff | 1385 | printf("LoRa\r\n"); |
modtronix | 5:d6e7fb9446ff | 1386 | else |
modtronix | 5:d6e7fb9446ff | 1387 | printf("FSK\r\n"); |
modtronix | 5:d6e7fb9446ff | 1388 | |
modtronix | 5:d6e7fb9446ff | 1389 | //BW = 250k (9=500, 8=250, 7=125, 6=62.5) |
modtronix | 5:d6e7fb9446ff | 1390 | sscanf(pcbuf+1, "%d", &i); |
modtronix | 5:d6e7fb9446ff | 1391 | radio.set_opmode(RF_OPMODE_STANDBY); |
modtronix | 5:d6e7fb9446ff | 1392 | lora.setBw(10-i); //1=9, 2=8, .... |
modtronix | 5:d6e7fb9446ff | 1393 | lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG); |
modtronix | 5:d6e7fb9446ff | 1394 | printf("Current "); |
modtronix | 5:d6e7fb9446ff | 1395 | lora_printBw(); |
modtronix | 5:d6e7fb9446ff | 1396 | printf("\r\n"); |
modtronix | 5:d6e7fb9446ff | 1397 | |
modtronix | 5:d6e7fb9446ff | 1398 | //Frequency = 915MHz |
modtronix | 5:d6e7fb9446ff | 1399 | radio.set_frf_MHz(915); |
modtronix | 5:d6e7fb9446ff | 1400 | printf("%fMHz\r\n", radio.get_frf_MHz()); |
modtronix | 5:d6e7fb9446ff | 1401 | |
modtronix | 5:d6e7fb9446ff | 1402 | //SF=12 |
modtronix | 5:d6e7fb9446ff | 1403 | lora.setSf(12); |
modtronix | 5:d6e7fb9446ff | 1404 | printf("SF=12\r\n"); |
modtronix | 5:d6e7fb9446ff | 1405 | |
modtronix | 5:d6e7fb9446ff | 1406 | //Payload Length = 9 |
modtronix | 5:d6e7fb9446ff | 1407 | lora.RegPayloadLength = 9; |
modtronix | 5:d6e7fb9446ff | 1408 | radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength); |
modtronix | 5:d6e7fb9446ff | 1409 | lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH); |
modtronix | 5:d6e7fb9446ff | 1410 | printf("PayloadLength:%d\r\n", lora.RegPayloadLength); |
modtronix | 5:d6e7fb9446ff | 1411 | //MODTRONIX |
modtronix | 5:d6e7fb9446ff | 1412 | //Toggle "LowDataRateOptimize bit |
modtronix | 5:d6e7fb9446ff | 1413 | } else if (pcbuf[0] == 'l' && pcbuf[1] == 'd' && (pcbuf[2] == '0' || pcbuf[2] == '1') && radio.RegOpMode.bits.LongRangeMode) { |
modtronix | 5:d6e7fb9446ff | 1414 | lora.setLowDataRateOptimize(pcbuf[2]=='0'?0:1); |
modtronix | 5:d6e7fb9446ff | 1415 | |
modtronix | 5:d6e7fb9446ff | 1416 | if (radio.type == SX1272) { |
modtronix | 5:d6e7fb9446ff | 1417 | lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG); |
modtronix | 5:d6e7fb9446ff | 1418 | printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize); |
modtronix | 5:d6e7fb9446ff | 1419 | } else if (radio.type == SX1276) { |
modtronix | 5:d6e7fb9446ff | 1420 | lora.RegModemConfig3.octet = radio.read_reg(REG_LR_MODEMCONFIG3); |
modtronix | 5:d6e7fb9446ff | 1421 | printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig3.sx1276bits.LowDataRateOptimize); |
modtronix | 5:d6e7fb9446ff | 1422 | } |
dudmuck | 1:1cd0afbed23c | 1423 | } else if (pcbuf[0] == 'h' && pcbuf[1] == 'p' && radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 0:be215de91a68 | 1424 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 0:be215de91a68 | 1425 | sscanf(pcbuf+2, "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1426 | lora.RegHopPeriod = i; |
dudmuck | 1:1cd0afbed23c | 1427 | radio.write_reg(REG_LR_HOPPERIOD, lora.RegHopPeriod); |
dudmuck | 0:be215de91a68 | 1428 | if (radio.RegDioMapping1.bits.Dio1Mapping != 1) { |
dudmuck | 0:be215de91a68 | 1429 | radio.RegDioMapping1.bits.Dio1Mapping = 1; |
dudmuck | 0:be215de91a68 | 1430 | radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet); |
dudmuck | 0:be215de91a68 | 1431 | } |
dudmuck | 0:be215de91a68 | 1432 | } |
dudmuck | 1:1cd0afbed23c | 1433 | lora.RegHopPeriod = radio.read_reg(REG_LR_HOPPERIOD); |
dudmuck | 1:1cd0afbed23c | 1434 | printf("HopPeriod:0x%02x\r\n", lora.RegHopPeriod); |
dudmuck | 2:c6b23a43a9d9 | 1435 | } else if (pcbuf[0] == 'r' && pcbuf[1] == 't' && !radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 2:c6b23a43a9d9 | 1436 | printf("RxTrigger:"); |
dudmuck | 2:c6b23a43a9d9 | 1437 | switch (fsk.RegRxConfig.bits.RxTrigger) { |
dudmuck | 2:c6b23a43a9d9 | 1438 | case 0: fsk.RegRxConfig.bits.RxTrigger = 1; |
dudmuck | 2:c6b23a43a9d9 | 1439 | printf("rssi\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1440 | break; |
dudmuck | 2:c6b23a43a9d9 | 1441 | case 1: fsk.RegRxConfig.bits.RxTrigger = 6; |
dudmuck | 2:c6b23a43a9d9 | 1442 | printf("preamble\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1443 | break; |
dudmuck | 2:c6b23a43a9d9 | 1444 | case 6: fsk.RegRxConfig.bits.RxTrigger = 7; |
dudmuck | 2:c6b23a43a9d9 | 1445 | printf("both\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1446 | break; |
dudmuck | 2:c6b23a43a9d9 | 1447 | case 7: fsk.RegRxConfig.bits.RxTrigger = 0; |
dudmuck | 2:c6b23a43a9d9 | 1448 | printf("none\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1449 | break; |
dudmuck | 2:c6b23a43a9d9 | 1450 | default: fsk.RegRxConfig.bits.RxTrigger = 0; |
dudmuck | 2:c6b23a43a9d9 | 1451 | printf("none\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1452 | break; |
dudmuck | 2:c6b23a43a9d9 | 1453 | } |
dudmuck | 2:c6b23a43a9d9 | 1454 | radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet); |
dudmuck | 0:be215de91a68 | 1455 | } else if (pcbuf[0] == 'r' && pcbuf[1] == 'x') { // RX |
dudmuck | 2:c6b23a43a9d9 | 1456 | if (radio.RegOpMode.bits.LongRangeMode) |
dudmuck | 2:c6b23a43a9d9 | 1457 | lora.start_rx(); |
dudmuck | 2:c6b23a43a9d9 | 1458 | else |
dudmuck | 2:c6b23a43a9d9 | 1459 | fsk.start_rx(); |
dudmuck | 0:be215de91a68 | 1460 | } else if (pcbuf[0] == 'r' && pcbuf[1] == ' ') { // read single register |
dudmuck | 0:be215de91a68 | 1461 | sscanf(pcbuf+2, "%x", &i); |
dudmuck | 0:be215de91a68 | 1462 | printf("%02x: %02x\r\n", i, radio.read_reg(i)); |
dudmuck | 0:be215de91a68 | 1463 | } else if (pcbuf[0] == 'w' && pcbuf[1] == ' ') { // write single register |
dudmuck | 0:be215de91a68 | 1464 | sscanf(pcbuf+2, "%x %x", &i, &len); |
dudmuck | 0:be215de91a68 | 1465 | radio.write_reg(i, len); |
dudmuck | 0:be215de91a68 | 1466 | printf("%02x: %02x\r\n", i, radio.read_reg(i)); |
dudmuck | 2:c6b23a43a9d9 | 1467 | } else if (pcbuf[0] == 'm' && pcbuf[1] == 'p' && !radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 2:c6b23a43a9d9 | 1468 | radio.RegDioMapping2.bits.MapPreambleDetect ^= 1; |
dudmuck | 2:c6b23a43a9d9 | 1469 | radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet); |
dudmuck | 2:c6b23a43a9d9 | 1470 | printf("MapPreambleDetect:"); |
dudmuck | 2:c6b23a43a9d9 | 1471 | if (radio.RegDioMapping2.bits.MapPreambleDetect) |
dudmuck | 2:c6b23a43a9d9 | 1472 | printf("preamble\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1473 | else |
dudmuck | 2:c6b23a43a9d9 | 1474 | printf("rssi\r\n"); |
dudmuck | 0:be215de91a68 | 1475 | } else if (pcbuf[0] == 'o' && pcbuf[1] == 'p') { |
dudmuck | 0:be215de91a68 | 1476 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 0:be215de91a68 | 1477 | sscanf(pcbuf+2, "%d", &i); |
dudmuck | 0:be215de91a68 | 1478 | radio.RegPaConfig.bits.OutputPower = i; |
dudmuck | 0:be215de91a68 | 1479 | radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet); |
dudmuck | 0:be215de91a68 | 1480 | } |
dudmuck | 0:be215de91a68 | 1481 | radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG); |
dudmuck | 0:be215de91a68 | 1482 | printf("OutputPower:%d\r\n", radio.RegPaConfig.bits.OutputPower); |
dudmuck | 1:1cd0afbed23c | 1483 | } else if (pcbuf[0] == 'c' && pcbuf[1] == 'r' && radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 0:be215de91a68 | 1484 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') |
dudmuck | 1:1cd0afbed23c | 1485 | lora.setCodingRate(pcbuf[2] - '0'); |
dudmuck | 1:1cd0afbed23c | 1486 | lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG); |
dudmuck | 1:1cd0afbed23c | 1487 | lora_printCodingRate(false); // false: transmitted |
dudmuck | 0:be215de91a68 | 1488 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 1489 | } else if (pcbuf[0] == 'h' && pcbuf[1] == 'm' && radio.RegOpMode.bits.LongRangeMode) { // toggle implicit/explicit |
dudmuck | 1:1cd0afbed23c | 1490 | lora.setHeaderMode(!lora.getHeaderMode()); |
dudmuck | 1:1cd0afbed23c | 1491 | lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG); |
dudmuck | 1:1cd0afbed23c | 1492 | lora_printHeaderMode(); |
dudmuck | 0:be215de91a68 | 1493 | printf("\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1494 | } else if (pcbuf[0] == 'a' && pcbuf[1] == 'l' && !radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 2:c6b23a43a9d9 | 1495 | fsk.RegAfcFei.bits.AfcAutoClearOn ^= 1; |
dudmuck | 2:c6b23a43a9d9 | 1496 | printf("AfcAutoClearOn: "); |
dudmuck | 2:c6b23a43a9d9 | 1497 | radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet); |
dudmuck | 2:c6b23a43a9d9 | 1498 | if (fsk.RegAfcFei.bits.AfcAutoClearOn) |
dudmuck | 2:c6b23a43a9d9 | 1499 | printf("ON\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1500 | else |
dudmuck | 2:c6b23a43a9d9 | 1501 | printf("off\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1502 | } else if (pcbuf[0] == 'a' && pcbuf[1] == 'r' && !radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 2:c6b23a43a9d9 | 1503 | fsk.RegSyncConfig.bits.AutoRestartRxMode++; |
dudmuck | 2:c6b23a43a9d9 | 1504 | radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet); |
dudmuck | 2:c6b23a43a9d9 | 1505 | fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG); |
dudmuck | 2:c6b23a43a9d9 | 1506 | printf("AutoRestartRxMode:"); |
dudmuck | 2:c6b23a43a9d9 | 1507 | switch (fsk.RegSyncConfig.bits.AutoRestartRxMode) { |
dudmuck | 2:c6b23a43a9d9 | 1508 | case 0: printf("off "); break; |
dudmuck | 2:c6b23a43a9d9 | 1509 | case 1: printf("no-pll-wait "); break; |
dudmuck | 2:c6b23a43a9d9 | 1510 | case 2: printf("pll-wait "); break; |
dudmuck | 2:c6b23a43a9d9 | 1511 | case 3: printf("3 "); break; |
dudmuck | 2:c6b23a43a9d9 | 1512 | } |
dudmuck | 2:c6b23a43a9d9 | 1513 | printf("\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1514 | } else if (pcbuf[0] == 'a' && pcbuf[1] == 'c' && !radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 2:c6b23a43a9d9 | 1515 | printf("clear afc: "); |
dudmuck | 2:c6b23a43a9d9 | 1516 | fsk.RegAfcFei.bits.AfcClear = 1; |
dudmuck | 2:c6b23a43a9d9 | 1517 | radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet); |
dudmuck | 2:c6b23a43a9d9 | 1518 | fsk.RegAfcFei.bits.AfcClear = 0; |
dudmuck | 3:ab386fa756cc | 1519 | printf("%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB))); |
dudmuck | 3:ab386fa756cc | 1520 | } else if (pcbuf[0] == 'b' && pcbuf[1] == 'r' && !radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 3:ab386fa756cc | 1521 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 3:ab386fa756cc | 1522 | sscanf(&pcbuf[2], "%d", &i); |
dudmuck | 3:ab386fa756cc | 1523 | fsk.set_bitrate(i); |
dudmuck | 3:ab386fa756cc | 1524 | } |
dudmuck | 3:ab386fa756cc | 1525 | printf("%dbps\r\n", fsk.get_bitrate()); |
dudmuck | 0:be215de91a68 | 1526 | } else if (pcbuf[0] == 'b' && pcbuf[1] == 'w') { |
dudmuck | 1:1cd0afbed23c | 1527 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 1:1cd0afbed23c | 1528 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 1:1cd0afbed23c | 1529 | radio.set_opmode(RF_OPMODE_STANDBY); |
dudmuck | 1:1cd0afbed23c | 1530 | sscanf(&pcbuf[2], "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1531 | lora.setBw(i); |
dudmuck | 1:1cd0afbed23c | 1532 | } else |
dudmuck | 1:1cd0afbed23c | 1533 | lora_printAllBw(); |
dudmuck | 1:1cd0afbed23c | 1534 | lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG); |
dudmuck | 1:1cd0afbed23c | 1535 | printf("current "); |
dudmuck | 1:1cd0afbed23c | 1536 | lora_printBw(); |
dudmuck | 1:1cd0afbed23c | 1537 | printf("\r\n"); |
dudmuck | 1:1cd0afbed23c | 1538 | } else { // FSK: |
dudmuck | 1:1cd0afbed23c | 1539 | if (pcbuf[2] == 'a') { |
dudmuck | 1:1cd0afbed23c | 1540 | if (pcbuf[3] >= '0' && pcbuf[3] <= '9') { |
dudmuck | 1:1cd0afbed23c | 1541 | radio.set_opmode(RF_OPMODE_STANDBY); |
dudmuck | 1:1cd0afbed23c | 1542 | sscanf(&pcbuf[3], "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1543 | fsk.set_rx_dcc_bw_hz(i, 1); |
dudmuck | 1:1cd0afbed23c | 1544 | } |
dudmuck | 1:1cd0afbed23c | 1545 | printf("afcbw:%dHz\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW)); |
dudmuck | 1:1cd0afbed23c | 1546 | } else { |
dudmuck | 1:1cd0afbed23c | 1547 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 1:1cd0afbed23c | 1548 | radio.set_opmode(RF_OPMODE_STANDBY); |
dudmuck | 1:1cd0afbed23c | 1549 | sscanf(&pcbuf[2], "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1550 | fsk.set_rx_dcc_bw_hz(i, 0); |
dudmuck | 1:1cd0afbed23c | 1551 | } |
dudmuck | 1:1cd0afbed23c | 1552 | printf("rxbw:%dHz\r\n", fsk.get_rx_bw_hz(REG_FSK_RXBW)); |
dudmuck | 1:1cd0afbed23c | 1553 | } |
dudmuck | 1:1cd0afbed23c | 1554 | } |
dudmuck | 0:be215de91a68 | 1555 | } else if (pcbuf[0] == 'v' && pcbuf[1] == 'h') { |
dudmuck | 1:1cd0afbed23c | 1556 | lora.poll_vh ^= 1; |
dudmuck | 1:1cd0afbed23c | 1557 | printf("poll_vh:%d\r\n", lora.poll_vh); |
dudmuck | 2:c6b23a43a9d9 | 1558 | } else if (pcbuf[0] == 'S' && !radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 2:c6b23a43a9d9 | 1559 | if (pcbuf[1] == '0') { |
dudmuck | 2:c6b23a43a9d9 | 1560 | sscanf(pcbuf+1, "%x", &ui); |
dudmuck | 2:c6b23a43a9d9 | 1561 | if (ui < 0x100) { |
dudmuck | 2:c6b23a43a9d9 | 1562 | fsk.RegSyncConfig.bits.SyncSize = 0; |
dudmuck | 2:c6b23a43a9d9 | 1563 | radio.write_reg(REG_FSK_SYNCVALUE1, ui); |
dudmuck | 2:c6b23a43a9d9 | 1564 | } else if (ui < 0x10000) { |
dudmuck | 2:c6b23a43a9d9 | 1565 | fsk.RegSyncConfig.bits.SyncSize = 1; |
dudmuck | 3:ab386fa756cc | 1566 | radio.write_reg(REG_FSK_SYNCVALUE2, ui & 0xff); |
dudmuck | 3:ab386fa756cc | 1567 | radio.write_reg(REG_FSK_SYNCVALUE1, ui >> 8); |
dudmuck | 2:c6b23a43a9d9 | 1568 | } else if (ui < 0x1000000) { |
dudmuck | 2:c6b23a43a9d9 | 1569 | fsk.RegSyncConfig.bits.SyncSize = 2; |
dudmuck | 3:ab386fa756cc | 1570 | radio.write_reg(REG_FSK_SYNCVALUE3, ui & 0xff); |
dudmuck | 2:c6b23a43a9d9 | 1571 | radio.write_reg(REG_FSK_SYNCVALUE2, (ui >> 8) & 0xff); |
dudmuck | 3:ab386fa756cc | 1572 | radio.write_reg(REG_FSK_SYNCVALUE1, ui >> 16); |
dudmuck | 2:c6b23a43a9d9 | 1573 | } else { |
dudmuck | 2:c6b23a43a9d9 | 1574 | fsk.RegSyncConfig.bits.SyncSize = 3; |
dudmuck | 3:ab386fa756cc | 1575 | radio.write_reg(REG_FSK_SYNCVALUE4, ui & 0xff); |
dudmuck | 3:ab386fa756cc | 1576 | radio.write_reg(REG_FSK_SYNCVALUE3, (ui >> 8) & 0xff); |
dudmuck | 3:ab386fa756cc | 1577 | radio.write_reg(REG_FSK_SYNCVALUE2, (ui >> 16) & 0xff); |
dudmuck | 3:ab386fa756cc | 1578 | radio.write_reg(REG_FSK_SYNCVALUE1, ui >> 24); |
dudmuck | 2:c6b23a43a9d9 | 1579 | } |
dudmuck | 2:c6b23a43a9d9 | 1580 | radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet); |
dudmuck | 2:c6b23a43a9d9 | 1581 | } |
dudmuck | 2:c6b23a43a9d9 | 1582 | fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG); |
dudmuck | 2:c6b23a43a9d9 | 1583 | printf("%d: ", fsk.RegSyncConfig.bits.SyncSize); |
dudmuck | 2:c6b23a43a9d9 | 1584 | for (i = 0; i <= fsk.RegSyncConfig.bits.SyncSize; i++) |
dudmuck | 2:c6b23a43a9d9 | 1585 | printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE1+i)); |
dudmuck | 2:c6b23a43a9d9 | 1586 | printf("\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1587 | } else if (pcbuf[0] == 's' && pcbuf[1] == 's' && !radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 2:c6b23a43a9d9 | 1588 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 2:c6b23a43a9d9 | 1589 | sscanf(pcbuf+2, "%d", &i); |
dudmuck | 2:c6b23a43a9d9 | 1590 | fsk.RegSyncConfig.bits.SyncSize = i; |
dudmuck | 2:c6b23a43a9d9 | 1591 | radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet); |
dudmuck | 2:c6b23a43a9d9 | 1592 | } |
dudmuck | 2:c6b23a43a9d9 | 1593 | fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG); |
dudmuck | 2:c6b23a43a9d9 | 1594 | printf("SyncSize:%d\r\n", fsk.RegSyncConfig.bits.SyncSize); |
modtronix | 5:d6e7fb9446ff | 1595 | } else if (pcbuf[0] == 's' && pcbuf[1] == 'f' && radio.RegOpMode.bits.LongRangeMode) { //sf%d = SF |
dudmuck | 0:be215de91a68 | 1596 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 0:be215de91a68 | 1597 | sscanf(pcbuf+2, "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1598 | lora.setSf(i); |
dudmuck | 1:1cd0afbed23c | 1599 | if (i == 6 && !lora.getHeaderMode()) { |
dudmuck | 0:be215de91a68 | 1600 | printf("SF6: to implicit header mode\r\n"); |
dudmuck | 1:1cd0afbed23c | 1601 | lora.setHeaderMode(true); |
dudmuck | 0:be215de91a68 | 1602 | } |
dudmuck | 0:be215de91a68 | 1603 | } |
dudmuck | 1:1cd0afbed23c | 1604 | lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2); |
dudmuck | 1:1cd0afbed23c | 1605 | lora_printSf(); |
dudmuck | 0:be215de91a68 | 1606 | printf("\r\n"); |
dudmuck | 3:ab386fa756cc | 1607 | } else if (pcbuf[0] == 'f' && pcbuf[1] == 'd' && pcbuf[2] == 'e' && !radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 3:ab386fa756cc | 1608 | if (pcbuf[4] >= '0' && pcbuf[4] <= '9') { |
dudmuck | 3:ab386fa756cc | 1609 | sscanf(pcbuf+4, "%d", &i); |
dudmuck | 3:ab386fa756cc | 1610 | fsk.set_tx_fdev_hz(i); |
dudmuck | 3:ab386fa756cc | 1611 | } |
dudmuck | 3:ab386fa756cc | 1612 | printf("fdev:%dHz\r\n", fsk.get_tx_fdev_hz()); |
modtronix | 5:d6e7fb9446ff | 1613 | } else if (pcbuf[0] == 'f' && pcbuf[1] == 'r' && pcbuf[2] == 'f') { //fr |
dudmuck | 0:be215de91a68 | 1614 | if (pcbuf[3] >= '0' && pcbuf[3] <= '9') { |
dudmuck | 0:be215de91a68 | 1615 | float MHz; |
dudmuck | 0:be215de91a68 | 1616 | sscanf(pcbuf+3, "%f", &MHz); |
dudmuck | 0:be215de91a68 | 1617 | //printf("MHz:%f\r\n", MHz); |
dudmuck | 0:be215de91a68 | 1618 | radio.set_frf_MHz(MHz); |
dudmuck | 3:ab386fa756cc | 1619 | } |
dudmuck | 3:ab386fa756cc | 1620 | printf("%fMHz\r\n", radio.get_frf_MHz()); |
modtronix | 5:d6e7fb9446ff | 1621 | } else if (pcbuf[0] == 'p' && pcbuf[1] == 'r' && pcbuf[2] == 'e') { //pr%d = preamble length |
dudmuck | 4:7a9007dfc0e5 | 1622 | if (radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 4:7a9007dfc0e5 | 1623 | if (pcbuf[3] >= '0' && pcbuf[3] <= '9') { |
dudmuck | 4:7a9007dfc0e5 | 1624 | sscanf(pcbuf+3, "%d", &i); |
dudmuck | 4:7a9007dfc0e5 | 1625 | radio.write_u16(REG_LR_PREAMBLEMSB, i); |
dudmuck | 4:7a9007dfc0e5 | 1626 | } |
dudmuck | 4:7a9007dfc0e5 | 1627 | lora.RegPreamble = radio.read_u16(REG_LR_PREAMBLEMSB); |
dudmuck | 4:7a9007dfc0e5 | 1628 | printf("lora PreambleLength:%d\r\n", lora.RegPreamble); |
dudmuck | 4:7a9007dfc0e5 | 1629 | } else { |
dudmuck | 4:7a9007dfc0e5 | 1630 | if (pcbuf[3] >= '0' && pcbuf[3] <= '9') { |
dudmuck | 4:7a9007dfc0e5 | 1631 | sscanf(pcbuf+3, "%d", &i); |
dudmuck | 4:7a9007dfc0e5 | 1632 | radio.write_u16(REG_FSK_PREAMBLEMSB, i); |
dudmuck | 4:7a9007dfc0e5 | 1633 | } |
dudmuck | 4:7a9007dfc0e5 | 1634 | printf("FSK TX PreambleSize:%d\r\n", radio.read_u16(REG_FSK_PREAMBLEMSB)); |
dudmuck | 3:ab386fa756cc | 1635 | } |
modtronix | 5:d6e7fb9446ff | 1636 | } else if (pcbuf[0] == 'p' && pcbuf[1] == 't' && !radio.RegOpMode.bits.LongRangeMode) { //pt%d = PreambleDetectTo |
dudmuck | 2:c6b23a43a9d9 | 1637 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 2:c6b23a43a9d9 | 1638 | sscanf(pcbuf+2, "%d", &i); |
dudmuck | 2:c6b23a43a9d9 | 1639 | fsk.RegPreambleDetect.bits.PreambleDetectorTol = i; |
dudmuck | 2:c6b23a43a9d9 | 1640 | radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet); |
dudmuck | 2:c6b23a43a9d9 | 1641 | } |
dudmuck | 2:c6b23a43a9d9 | 1642 | fsk.RegPreambleDetect.octet = radio.read_reg(REG_FSK_PREAMBLEDETECT); |
dudmuck | 2:c6b23a43a9d9 | 1643 | printf("PreambleDetectorTol:%d\r\n", fsk.RegPreambleDetect.bits.PreambleDetectorTol); |
dudmuck | 2:c6b23a43a9d9 | 1644 | } else if (pcbuf[0] == 'p' && pcbuf[1] == 'd' && !radio.RegOpMode.bits.LongRangeMode) { |
dudmuck | 2:c6b23a43a9d9 | 1645 | fsk.RegPreambleDetect.bits.PreambleDetectorOn ^= 1; |
dudmuck | 2:c6b23a43a9d9 | 1646 | radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet); |
dudmuck | 2:c6b23a43a9d9 | 1647 | printf("PreambleDetector:"); |
dudmuck | 2:c6b23a43a9d9 | 1648 | if (fsk.RegPreambleDetect.bits.PreambleDetectorOn) |
dudmuck | 2:c6b23a43a9d9 | 1649 | printf("On\r\n"); |
dudmuck | 2:c6b23a43a9d9 | 1650 | else |
dudmuck | 2:c6b23a43a9d9 | 1651 | printf("OFF\r\n"); |
modtronix | 5:d6e7fb9446ff | 1652 | } else if (pcbuf[0] == 'p' && pcbuf[1] == 'l' && radio.RegOpMode.bits.LongRangeMode) { //pl%d = Payload Length |
dudmuck | 0:be215de91a68 | 1653 | if (pcbuf[2] >= '0' && pcbuf[2] <= '9') { |
dudmuck | 0:be215de91a68 | 1654 | sscanf(pcbuf+2, "%d", &i); |
dudmuck | 1:1cd0afbed23c | 1655 | lora.RegPayloadLength = i; |
dudmuck | 1:1cd0afbed23c | 1656 | radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength); |
dudmuck | 0:be215de91a68 | 1657 | } |
dudmuck | 1:1cd0afbed23c | 1658 | lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH); |
dudmuck | 1:1cd0afbed23c | 1659 | printf("PayloadLength:%d\r\n", lora.RegPayloadLength); |
dudmuck | 0:be215de91a68 | 1660 | } else if (pcbuf[0] == 'd' && pcbuf[1] >= '0' && pcbuf[1] <= '5') { |
dudmuck | 0:be215de91a68 | 1661 | switch (pcbuf[1]) { |
dudmuck | 0:be215de91a68 | 1662 | case '0': |
dudmuck | 0:be215de91a68 | 1663 | radio.RegDioMapping1.bits.Dio0Mapping++; |
dudmuck | 0:be215de91a68 | 1664 | radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet); |
dudmuck | 0:be215de91a68 | 1665 | break; |
dudmuck | 0:be215de91a68 | 1666 | case '1': |
dudmuck | 0:be215de91a68 | 1667 | radio.RegDioMapping1.bits.Dio1Mapping++; |
dudmuck | 0:be215de91a68 | 1668 | radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet); |
dudmuck | 0:be215de91a68 | 1669 | break; |
dudmuck | 0:be215de91a68 | 1670 | case '2': |
dudmuck | 0:be215de91a68 | 1671 | radio.RegDioMapping1.bits.Dio2Mapping++; |
dudmuck | 0:be215de91a68 | 1672 | radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet); |
dudmuck | 0:be215de91a68 | 1673 | break; |
dudmuck | 0:be215de91a68 | 1674 | case '3': |
dudmuck | 0:be215de91a68 | 1675 | radio.RegDioMapping1.bits.Dio3Mapping++; |
dudmuck | 0:be215de91a68 | 1676 | radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet); |
dudmuck | 0:be215de91a68 | 1677 | break; |
dudmuck | 0:be215de91a68 | 1678 | case '4': |
dudmuck | 0:be215de91a68 | 1679 | radio.RegDioMapping2.bits.Dio4Mapping++; |
dudmuck | 0:be215de91a68 | 1680 | radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping2.octet); |
dudmuck | 0:be215de91a68 | 1681 | break; |
dudmuck | 0:be215de91a68 | 1682 | case '5': |
dudmuck | 0:be215de91a68 | 1683 | radio.RegDioMapping2.bits.Dio5Mapping++; |
dudmuck | 0:be215de91a68 | 1684 | radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping2.octet); |
dudmuck | 0:be215de91a68 | 1685 | break; |
dudmuck | 0:be215de91a68 | 1686 | } // ...switch (pcbuf[1]) |
dudmuck | 1:1cd0afbed23c | 1687 | if (radio.RegOpMode.bits.LongRangeMode) |
dudmuck | 1:1cd0afbed23c | 1688 | lora_print_dio(); |
dudmuck | 1:1cd0afbed23c | 1689 | else |
dudmuck | 1:1cd0afbed23c | 1690 | fsk_print_dio(); |
dudmuck | 0:be215de91a68 | 1691 | } else if (pcbuf[0] == 's' && pcbuf[1] == 't' && pcbuf[2] == 'b') { |
dudmuck | 0:be215de91a68 | 1692 | radio.set_opmode(RF_OPMODE_STANDBY); |
dudmuck | 0:be215de91a68 | 1693 | } else if (pcbuf[0] == 's' && pcbuf[1] == 'l' && pcbuf[2] == 'e') { |
dudmuck | 0:be215de91a68 | 1694 | radio.set_opmode(RF_OPMODE_SLEEP); |
dudmuck | 0:be215de91a68 | 1695 | } else if (pcbuf[0] == 'c' && pcbuf[1] == 'h' && pcbuf[2] == 'a') { |
dudmuck | 0:be215de91a68 | 1696 | app = APP_CHAT; |
dudmuck | 1:1cd0afbed23c | 1697 | lora.start_rx(); |
dudmuck | 0:be215de91a68 | 1698 | printf("chat start\r\n"); |
dudmuck | 0:be215de91a68 | 1699 | } |
dudmuck | 0:be215de91a68 | 1700 | } |
dudmuck | 0:be215de91a68 | 1701 | printf("> "); |
dudmuck | 0:be215de91a68 | 1702 | fflush(stdout); |
modtronix | 5:d6e7fb9446ff | 1703 | |
dudmuck | 0:be215de91a68 | 1704 | } |
dudmuck | 0:be215de91a68 | 1705 | |
dudmuck | 0:be215de91a68 | 1706 | int main() |
dudmuck | 0:be215de91a68 | 1707 | { |
dudmuck | 0:be215de91a68 | 1708 | pc.baud(57600); |
dudmuck | 0:be215de91a68 | 1709 | |
modtronix | 5:d6e7fb9446ff | 1710 | mybuf[0] = 0; |
modtronix | 5:d6e7fb9446ff | 1711 | initDone=0; |
modtronix | 5:d6e7fb9446ff | 1712 | tmr.start(); |
modtronix | 5:d6e7fb9446ff | 1713 | t = tmr.read_ms() + 5000; //Start transmitting messages after ? seconds |
modtronix | 5:d6e7fb9446ff | 1714 | |
modtronix | 5:d6e7fb9446ff | 1715 | //Required for V7 of SX127x library, but V7 doesn't work for this program! |
modtronix | 5:d6e7fb9446ff | 1716 | radio.rf_switch.attach(rfsw_callback); |
modtronix | 5:d6e7fb9446ff | 1717 | |
dudmuck | 0:be215de91a68 | 1718 | while(1) { |
dudmuck | 0:be215de91a68 | 1719 | switch (app) { |
dudmuck | 0:be215de91a68 | 1720 | case APP_NONE: |
dudmuck | 0:be215de91a68 | 1721 | console(); |
dudmuck | 0:be215de91a68 | 1722 | break; |
dudmuck | 0:be215de91a68 | 1723 | case APP_CHAT: |
dudmuck | 0:be215de91a68 | 1724 | console_chat(); |
dudmuck | 0:be215de91a68 | 1725 | break; |
dudmuck | 0:be215de91a68 | 1726 | } // ...switch (app) |
modtronix | 5:d6e7fb9446ff | 1727 | |
dudmuck | 0:be215de91a68 | 1728 | } // ...while(1) |
dudmuck | 0:be215de91a68 | 1729 | } |
dudmuck | 0:be215de91a68 | 1730 | |
modtronix | 5:d6e7fb9446ff | 1731 |