SDL Library

Dependents:   H261_decoder

Committer:
miruga27
Date:
Thu Sep 22 00:03:09 2016 +0000
Revision:
0:7fb6877b5d7c
SDL

Who changed what in which revision?

UserRevisionLine numberNew contents of line
miruga27 0:7fb6877b5d7c 1 /*
miruga27 0:7fb6877b5d7c 2 Simple DirectMedia Layer
miruga27 0:7fb6877b5d7c 3 Copyright (C) 1997-2014 Sam Lantinga <slouken@libsdl.org>
miruga27 0:7fb6877b5d7c 4
miruga27 0:7fb6877b5d7c 5 This software is provided 'as-is', without any express or implied
miruga27 0:7fb6877b5d7c 6 warranty. In no event will the authors be held liable for any damages
miruga27 0:7fb6877b5d7c 7 arising from the use of this software.
miruga27 0:7fb6877b5d7c 8
miruga27 0:7fb6877b5d7c 9 Permission is granted to anyone to use this software for any purpose,
miruga27 0:7fb6877b5d7c 10 including commercial applications, and to alter it and redistribute it
miruga27 0:7fb6877b5d7c 11 freely, subject to the following restrictions:
miruga27 0:7fb6877b5d7c 12
miruga27 0:7fb6877b5d7c 13 1. The origin of this software must not be misrepresented; you must not
miruga27 0:7fb6877b5d7c 14 claim that you wrote the original software. If you use this software
miruga27 0:7fb6877b5d7c 15 in a product, an acknowledgment in the product documentation would be
miruga27 0:7fb6877b5d7c 16 appreciated but is not required.
miruga27 0:7fb6877b5d7c 17 2. Altered source versions must be plainly marked as such, and must not be
miruga27 0:7fb6877b5d7c 18 misrepresented as being the original software.
miruga27 0:7fb6877b5d7c 19 3. This notice may not be removed or altered from any source distribution.
miruga27 0:7fb6877b5d7c 20 */
miruga27 0:7fb6877b5d7c 21
miruga27 0:7fb6877b5d7c 22 /**
miruga27 0:7fb6877b5d7c 23 * \file SDL_cpuinfo.h
miruga27 0:7fb6877b5d7c 24 *
miruga27 0:7fb6877b5d7c 25 * CPU feature detection for SDL.
miruga27 0:7fb6877b5d7c 26 */
miruga27 0:7fb6877b5d7c 27
miruga27 0:7fb6877b5d7c 28 #ifndef _SDL_cpuinfo_h
miruga27 0:7fb6877b5d7c 29 #define _SDL_cpuinfo_h
miruga27 0:7fb6877b5d7c 30
miruga27 0:7fb6877b5d7c 31 #include "SDL_stdinc.h"
miruga27 0:7fb6877b5d7c 32
miruga27 0:7fb6877b5d7c 33 /* Need to do this here because intrin.h has C++ code in it */
miruga27 0:7fb6877b5d7c 34 /* Visual Studio 2005 has a bug where intrin.h conflicts with winnt.h */
miruga27 0:7fb6877b5d7c 35 #if defined(_MSC_VER) && (_MSC_VER >= 1500)
miruga27 0:7fb6877b5d7c 36 #include <intrin.h>
miruga27 0:7fb6877b5d7c 37 #ifndef _WIN64
miruga27 0:7fb6877b5d7c 38 #define __MMX__
miruga27 0:7fb6877b5d7c 39 #define __3dNOW__
miruga27 0:7fb6877b5d7c 40 #endif
miruga27 0:7fb6877b5d7c 41 #define __SSE__
miruga27 0:7fb6877b5d7c 42 #define __SSE2__
miruga27 0:7fb6877b5d7c 43 #elif defined(__MINGW64_VERSION_MAJOR)
miruga27 0:7fb6877b5d7c 44 #include <intrin.h>
miruga27 0:7fb6877b5d7c 45 #else
miruga27 0:7fb6877b5d7c 46 #ifdef __ALTIVEC__
miruga27 0:7fb6877b5d7c 47 #if HAVE_ALTIVEC_H && !defined(__APPLE_ALTIVEC__)
miruga27 0:7fb6877b5d7c 48 #include <altivec.h>
miruga27 0:7fb6877b5d7c 49 #undef pixel
miruga27 0:7fb6877b5d7c 50 #endif
miruga27 0:7fb6877b5d7c 51 #endif
miruga27 0:7fb6877b5d7c 52 #ifdef __MMX__
miruga27 0:7fb6877b5d7c 53 #include <mmintrin.h>
miruga27 0:7fb6877b5d7c 54 #endif
miruga27 0:7fb6877b5d7c 55 #ifdef __3dNOW__
miruga27 0:7fb6877b5d7c 56 #include <mm3dnow.h>
miruga27 0:7fb6877b5d7c 57 #endif
miruga27 0:7fb6877b5d7c 58 #ifdef __SSE__
miruga27 0:7fb6877b5d7c 59 #include <xmmintrin.h>
miruga27 0:7fb6877b5d7c 60 #endif
miruga27 0:7fb6877b5d7c 61 #ifdef __SSE2__
miruga27 0:7fb6877b5d7c 62 #include <emmintrin.h>
miruga27 0:7fb6877b5d7c 63 #endif
miruga27 0:7fb6877b5d7c 64 #endif
miruga27 0:7fb6877b5d7c 65
miruga27 0:7fb6877b5d7c 66 #include "begin_code.h"
miruga27 0:7fb6877b5d7c 67 /* Set up for C function definitions, even when using C++ */
miruga27 0:7fb6877b5d7c 68 #ifdef __cplusplus
miruga27 0:7fb6877b5d7c 69 extern "C" {
miruga27 0:7fb6877b5d7c 70 #endif
miruga27 0:7fb6877b5d7c 71
miruga27 0:7fb6877b5d7c 72 /* This is a guess for the cacheline size used for padding.
miruga27 0:7fb6877b5d7c 73 * Most x86 processors have a 64 byte cache line.
miruga27 0:7fb6877b5d7c 74 * The 64-bit PowerPC processors have a 128 byte cache line.
miruga27 0:7fb6877b5d7c 75 * We'll use the larger value to be generally safe.
miruga27 0:7fb6877b5d7c 76 */
miruga27 0:7fb6877b5d7c 77 #define SDL_CACHELINE_SIZE 128
miruga27 0:7fb6877b5d7c 78
miruga27 0:7fb6877b5d7c 79 /**
miruga27 0:7fb6877b5d7c 80 * This function returns the number of CPU cores available.
miruga27 0:7fb6877b5d7c 81 */
miruga27 0:7fb6877b5d7c 82 extern DECLSPEC int SDLCALL SDL_GetCPUCount(void);
miruga27 0:7fb6877b5d7c 83
miruga27 0:7fb6877b5d7c 84 /**
miruga27 0:7fb6877b5d7c 85 * This function returns the L1 cache line size of the CPU
miruga27 0:7fb6877b5d7c 86 *
miruga27 0:7fb6877b5d7c 87 * This is useful for determining multi-threaded structure padding
miruga27 0:7fb6877b5d7c 88 * or SIMD prefetch sizes.
miruga27 0:7fb6877b5d7c 89 */
miruga27 0:7fb6877b5d7c 90 extern DECLSPEC int SDLCALL SDL_GetCPUCacheLineSize(void);
miruga27 0:7fb6877b5d7c 91
miruga27 0:7fb6877b5d7c 92 /**
miruga27 0:7fb6877b5d7c 93 * This function returns true if the CPU has the RDTSC instruction.
miruga27 0:7fb6877b5d7c 94 */
miruga27 0:7fb6877b5d7c 95 extern DECLSPEC SDL_bool SDLCALL SDL_HasRDTSC(void);
miruga27 0:7fb6877b5d7c 96
miruga27 0:7fb6877b5d7c 97 /**
miruga27 0:7fb6877b5d7c 98 * This function returns true if the CPU has AltiVec features.
miruga27 0:7fb6877b5d7c 99 */
miruga27 0:7fb6877b5d7c 100 extern DECLSPEC SDL_bool SDLCALL SDL_HasAltiVec(void);
miruga27 0:7fb6877b5d7c 101
miruga27 0:7fb6877b5d7c 102 /**
miruga27 0:7fb6877b5d7c 103 * This function returns true if the CPU has MMX features.
miruga27 0:7fb6877b5d7c 104 */
miruga27 0:7fb6877b5d7c 105 extern DECLSPEC SDL_bool SDLCALL SDL_HasMMX(void);
miruga27 0:7fb6877b5d7c 106
miruga27 0:7fb6877b5d7c 107 /**
miruga27 0:7fb6877b5d7c 108 * This function returns true if the CPU has 3DNow! features.
miruga27 0:7fb6877b5d7c 109 */
miruga27 0:7fb6877b5d7c 110 extern DECLSPEC SDL_bool SDLCALL SDL_Has3DNow(void);
miruga27 0:7fb6877b5d7c 111
miruga27 0:7fb6877b5d7c 112 /**
miruga27 0:7fb6877b5d7c 113 * This function returns true if the CPU has SSE features.
miruga27 0:7fb6877b5d7c 114 */
miruga27 0:7fb6877b5d7c 115 extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE(void);
miruga27 0:7fb6877b5d7c 116
miruga27 0:7fb6877b5d7c 117 /**
miruga27 0:7fb6877b5d7c 118 * This function returns true if the CPU has SSE2 features.
miruga27 0:7fb6877b5d7c 119 */
miruga27 0:7fb6877b5d7c 120 extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE2(void);
miruga27 0:7fb6877b5d7c 121
miruga27 0:7fb6877b5d7c 122 /**
miruga27 0:7fb6877b5d7c 123 * This function returns true if the CPU has SSE3 features.
miruga27 0:7fb6877b5d7c 124 */
miruga27 0:7fb6877b5d7c 125 extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE3(void);
miruga27 0:7fb6877b5d7c 126
miruga27 0:7fb6877b5d7c 127 /**
miruga27 0:7fb6877b5d7c 128 * This function returns true if the CPU has SSE4.1 features.
miruga27 0:7fb6877b5d7c 129 */
miruga27 0:7fb6877b5d7c 130 extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE41(void);
miruga27 0:7fb6877b5d7c 131
miruga27 0:7fb6877b5d7c 132 /**
miruga27 0:7fb6877b5d7c 133 * This function returns true if the CPU has SSE4.2 features.
miruga27 0:7fb6877b5d7c 134 */
miruga27 0:7fb6877b5d7c 135 extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE42(void);
miruga27 0:7fb6877b5d7c 136
miruga27 0:7fb6877b5d7c 137 /**
miruga27 0:7fb6877b5d7c 138 * This function returns true if the CPU has AVX features.
miruga27 0:7fb6877b5d7c 139 */
miruga27 0:7fb6877b5d7c 140 extern DECLSPEC SDL_bool SDLCALL SDL_HasAVX(void);
miruga27 0:7fb6877b5d7c 141
miruga27 0:7fb6877b5d7c 142 /**
miruga27 0:7fb6877b5d7c 143 * This function returns the amount of RAM configured in the system, in MB.
miruga27 0:7fb6877b5d7c 144 */
miruga27 0:7fb6877b5d7c 145 extern DECLSPEC int SDLCALL SDL_GetSystemRAM(void);
miruga27 0:7fb6877b5d7c 146
miruga27 0:7fb6877b5d7c 147
miruga27 0:7fb6877b5d7c 148 /* Ends C function definitions when using C++ */
miruga27 0:7fb6877b5d7c 149 #ifdef __cplusplus
miruga27 0:7fb6877b5d7c 150 }
miruga27 0:7fb6877b5d7c 151 #endif
miruga27 0:7fb6877b5d7c 152 #include "close_code.h"
miruga27 0:7fb6877b5d7c 153
miruga27 0:7fb6877b5d7c 154 #endif /* _SDL_cpuinfo_h */
miruga27 0:7fb6877b5d7c 155
miruga27 0:7fb6877b5d7c 156 /* vi: set ts=4 sw=4 expandtab: */