SDL standard library

Dependents:   H261_encoder

Committer:
miruga27
Date:
Wed Sep 07 18:46:53 2016 +0000
Revision:
0:dda4f4550403
7/09/2016;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
miruga27 0:dda4f4550403 1 /*
miruga27 0:dda4f4550403 2 Simple DirectMedia Layer
miruga27 0:dda4f4550403 3 Copyright (C) 1997-2014 Sam Lantinga <slouken@libsdl.org>
miruga27 0:dda4f4550403 4
miruga27 0:dda4f4550403 5 This software is provided 'as-is', without any express or implied
miruga27 0:dda4f4550403 6 warranty. In no event will the authors be held liable for any damages
miruga27 0:dda4f4550403 7 arising from the use of this software.
miruga27 0:dda4f4550403 8
miruga27 0:dda4f4550403 9 Permission is granted to anyone to use this software for any purpose,
miruga27 0:dda4f4550403 10 including commercial applications, and to alter it and redistribute it
miruga27 0:dda4f4550403 11 freely, subject to the following restrictions:
miruga27 0:dda4f4550403 12
miruga27 0:dda4f4550403 13 1. The origin of this software must not be misrepresented; you must not
miruga27 0:dda4f4550403 14 claim that you wrote the original software. If you use this software
miruga27 0:dda4f4550403 15 in a product, an acknowledgment in the product documentation would be
miruga27 0:dda4f4550403 16 appreciated but is not required.
miruga27 0:dda4f4550403 17 2. Altered source versions must be plainly marked as such, and must not be
miruga27 0:dda4f4550403 18 misrepresented as being the original software.
miruga27 0:dda4f4550403 19 3. This notice may not be removed or altered from any source distribution.
miruga27 0:dda4f4550403 20 */
miruga27 0:dda4f4550403 21
miruga27 0:dda4f4550403 22 /**
miruga27 0:dda4f4550403 23 * \file SDL_cpuinfo.h
miruga27 0:dda4f4550403 24 *
miruga27 0:dda4f4550403 25 * CPU feature detection for SDL.
miruga27 0:dda4f4550403 26 */
miruga27 0:dda4f4550403 27
miruga27 0:dda4f4550403 28 #ifndef _SDL_cpuinfo_h
miruga27 0:dda4f4550403 29 #define _SDL_cpuinfo_h
miruga27 0:dda4f4550403 30
miruga27 0:dda4f4550403 31 #include "SDL_stdinc.h"
miruga27 0:dda4f4550403 32
miruga27 0:dda4f4550403 33 /* Need to do this here because intrin.h has C++ code in it */
miruga27 0:dda4f4550403 34 /* Visual Studio 2005 has a bug where intrin.h conflicts with winnt.h */
miruga27 0:dda4f4550403 35 #if defined(_MSC_VER) && (_MSC_VER >= 1500)
miruga27 0:dda4f4550403 36 #include <intrin.h>
miruga27 0:dda4f4550403 37 #ifndef _WIN64
miruga27 0:dda4f4550403 38 #define __MMX__
miruga27 0:dda4f4550403 39 #define __3dNOW__
miruga27 0:dda4f4550403 40 #endif
miruga27 0:dda4f4550403 41 #define __SSE__
miruga27 0:dda4f4550403 42 #define __SSE2__
miruga27 0:dda4f4550403 43 #elif defined(__MINGW64_VERSION_MAJOR)
miruga27 0:dda4f4550403 44 #include <intrin.h>
miruga27 0:dda4f4550403 45 #else
miruga27 0:dda4f4550403 46 #ifdef __ALTIVEC__
miruga27 0:dda4f4550403 47 #if HAVE_ALTIVEC_H && !defined(__APPLE_ALTIVEC__)
miruga27 0:dda4f4550403 48 #include <altivec.h>
miruga27 0:dda4f4550403 49 #undef pixel
miruga27 0:dda4f4550403 50 #endif
miruga27 0:dda4f4550403 51 #endif
miruga27 0:dda4f4550403 52 #ifdef __MMX__
miruga27 0:dda4f4550403 53 #include <mmintrin.h>
miruga27 0:dda4f4550403 54 #endif
miruga27 0:dda4f4550403 55 #ifdef __3dNOW__
miruga27 0:dda4f4550403 56 #include <mm3dnow.h>
miruga27 0:dda4f4550403 57 #endif
miruga27 0:dda4f4550403 58 #ifdef __SSE__
miruga27 0:dda4f4550403 59 #include <xmmintrin.h>
miruga27 0:dda4f4550403 60 #endif
miruga27 0:dda4f4550403 61 #ifdef __SSE2__
miruga27 0:dda4f4550403 62 #include <emmintrin.h>
miruga27 0:dda4f4550403 63 #endif
miruga27 0:dda4f4550403 64 #endif
miruga27 0:dda4f4550403 65
miruga27 0:dda4f4550403 66 #include "begin_code.h"
miruga27 0:dda4f4550403 67 /* Set up for C function definitions, even when using C++ */
miruga27 0:dda4f4550403 68 #ifdef __cplusplus
miruga27 0:dda4f4550403 69 extern "C" {
miruga27 0:dda4f4550403 70 #endif
miruga27 0:dda4f4550403 71
miruga27 0:dda4f4550403 72 /* This is a guess for the cacheline size used for padding.
miruga27 0:dda4f4550403 73 * Most x86 processors have a 64 byte cache line.
miruga27 0:dda4f4550403 74 * The 64-bit PowerPC processors have a 128 byte cache line.
miruga27 0:dda4f4550403 75 * We'll use the larger value to be generally safe.
miruga27 0:dda4f4550403 76 */
miruga27 0:dda4f4550403 77 #define SDL_CACHELINE_SIZE 128
miruga27 0:dda4f4550403 78
miruga27 0:dda4f4550403 79 /**
miruga27 0:dda4f4550403 80 * This function returns the number of CPU cores available.
miruga27 0:dda4f4550403 81 */
miruga27 0:dda4f4550403 82 extern DECLSPEC int SDLCALL SDL_GetCPUCount(void);
miruga27 0:dda4f4550403 83
miruga27 0:dda4f4550403 84 /**
miruga27 0:dda4f4550403 85 * This function returns the L1 cache line size of the CPU
miruga27 0:dda4f4550403 86 *
miruga27 0:dda4f4550403 87 * This is useful for determining multi-threaded structure padding
miruga27 0:dda4f4550403 88 * or SIMD prefetch sizes.
miruga27 0:dda4f4550403 89 */
miruga27 0:dda4f4550403 90 extern DECLSPEC int SDLCALL SDL_GetCPUCacheLineSize(void);
miruga27 0:dda4f4550403 91
miruga27 0:dda4f4550403 92 /**
miruga27 0:dda4f4550403 93 * This function returns true if the CPU has the RDTSC instruction.
miruga27 0:dda4f4550403 94 */
miruga27 0:dda4f4550403 95 extern DECLSPEC SDL_bool SDLCALL SDL_HasRDTSC(void);
miruga27 0:dda4f4550403 96
miruga27 0:dda4f4550403 97 /**
miruga27 0:dda4f4550403 98 * This function returns true if the CPU has AltiVec features.
miruga27 0:dda4f4550403 99 */
miruga27 0:dda4f4550403 100 extern DECLSPEC SDL_bool SDLCALL SDL_HasAltiVec(void);
miruga27 0:dda4f4550403 101
miruga27 0:dda4f4550403 102 /**
miruga27 0:dda4f4550403 103 * This function returns true if the CPU has MMX features.
miruga27 0:dda4f4550403 104 */
miruga27 0:dda4f4550403 105 extern DECLSPEC SDL_bool SDLCALL SDL_HasMMX(void);
miruga27 0:dda4f4550403 106
miruga27 0:dda4f4550403 107 /**
miruga27 0:dda4f4550403 108 * This function returns true if the CPU has 3DNow! features.
miruga27 0:dda4f4550403 109 */
miruga27 0:dda4f4550403 110 extern DECLSPEC SDL_bool SDLCALL SDL_Has3DNow(void);
miruga27 0:dda4f4550403 111
miruga27 0:dda4f4550403 112 /**
miruga27 0:dda4f4550403 113 * This function returns true if the CPU has SSE features.
miruga27 0:dda4f4550403 114 */
miruga27 0:dda4f4550403 115 extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE(void);
miruga27 0:dda4f4550403 116
miruga27 0:dda4f4550403 117 /**
miruga27 0:dda4f4550403 118 * This function returns true if the CPU has SSE2 features.
miruga27 0:dda4f4550403 119 */
miruga27 0:dda4f4550403 120 extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE2(void);
miruga27 0:dda4f4550403 121
miruga27 0:dda4f4550403 122 /**
miruga27 0:dda4f4550403 123 * This function returns true if the CPU has SSE3 features.
miruga27 0:dda4f4550403 124 */
miruga27 0:dda4f4550403 125 extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE3(void);
miruga27 0:dda4f4550403 126
miruga27 0:dda4f4550403 127 /**
miruga27 0:dda4f4550403 128 * This function returns true if the CPU has SSE4.1 features.
miruga27 0:dda4f4550403 129 */
miruga27 0:dda4f4550403 130 extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE41(void);
miruga27 0:dda4f4550403 131
miruga27 0:dda4f4550403 132 /**
miruga27 0:dda4f4550403 133 * This function returns true if the CPU has SSE4.2 features.
miruga27 0:dda4f4550403 134 */
miruga27 0:dda4f4550403 135 extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE42(void);
miruga27 0:dda4f4550403 136
miruga27 0:dda4f4550403 137 /**
miruga27 0:dda4f4550403 138 * This function returns true if the CPU has AVX features.
miruga27 0:dda4f4550403 139 */
miruga27 0:dda4f4550403 140 extern DECLSPEC SDL_bool SDLCALL SDL_HasAVX(void);
miruga27 0:dda4f4550403 141
miruga27 0:dda4f4550403 142 /**
miruga27 0:dda4f4550403 143 * This function returns the amount of RAM configured in the system, in MB.
miruga27 0:dda4f4550403 144 */
miruga27 0:dda4f4550403 145 extern DECLSPEC int SDLCALL SDL_GetSystemRAM(void);
miruga27 0:dda4f4550403 146
miruga27 0:dda4f4550403 147
miruga27 0:dda4f4550403 148 /* Ends C function definitions when using C++ */
miruga27 0:dda4f4550403 149 #ifdef __cplusplus
miruga27 0:dda4f4550403 150 }
miruga27 0:dda4f4550403 151 #endif
miruga27 0:dda4f4550403 152 #include "close_code.h"
miruga27 0:dda4f4550403 153
miruga27 0:dda4f4550403 154 #endif /* _SDL_cpuinfo_h */
miruga27 0:dda4f4550403 155
miruga27 0:dda4f4550403 156 /* vi: set ts=4 sw=4 expandtab: */