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TARGET_NUCLEO_F767ZI/stm32f7xx_hal_pwr.h@122:f9eeca106725, 2016-07-07 (annotated)
- Committer:
- Kojto
- Date:
- Thu Jul 07 14:34:11 2016 +0100
- Revision:
- 122:f9eeca106725
Release 122 of the mbed library
Changes:
- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4
- Thread safety addition - mbed API should contain a statement about thread safety
- critical section API addition
- CAS API (core_util_atomic_incr/decr)
- DEVICE_ are generated from targets.json file, device.h deprecated
- Callback replaces FunctionPointer to provide std like interface
- mbed HAL API docs improvements
- toolchain - prexif attributes with MBED_
- add new attributes - packed, weak, forcedinline, align
- target.json - contains targets definitions
- ST - L1XX - Cube update to 1.5
- SPI clock selection fix (clock from APB domain)
- F7 - Cube update v1.4.0
- L0 - baudrate init fix
- L1 - Cube update v1.5
- F3 - baudrate init fix, 3 targets CAN support
- F4 - Cube update v1.12.0, 3 targets CAN support
- L4XX - Cube update v1.5.1
- F0 - update Cube to v1.5.0
- L4 - 2 targets (L476RG/VG) CAN support
- NXP - pwm clock fix for KSDK2 MCU
- LPC2368 - remove ARM toolchain support - due to regression
- KSDK2 - fix SPI , I2C address and repeat start
- Silabs - some fixes backported from mbed 3
- Renesas - RZ_A1H - SystemCoreClockUpdate addition
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Kojto | 122:f9eeca106725 | 1 | /** |
Kojto | 122:f9eeca106725 | 2 | ****************************************************************************** |
Kojto | 122:f9eeca106725 | 3 | * @file stm32f7xx_hal_pwr.h |
Kojto | 122:f9eeca106725 | 4 | * @author MCD Application Team |
Kojto | 122:f9eeca106725 | 5 | * @version V1.1.0 |
Kojto | 122:f9eeca106725 | 6 | * @date 22-April-2016 |
Kojto | 122:f9eeca106725 | 7 | * @brief Header file of PWR HAL module. |
Kojto | 122:f9eeca106725 | 8 | ****************************************************************************** |
Kojto | 122:f9eeca106725 | 9 | * @attention |
Kojto | 122:f9eeca106725 | 10 | * |
Kojto | 122:f9eeca106725 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
Kojto | 122:f9eeca106725 | 12 | * |
Kojto | 122:f9eeca106725 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
Kojto | 122:f9eeca106725 | 14 | * are permitted provided that the following conditions are met: |
Kojto | 122:f9eeca106725 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
Kojto | 122:f9eeca106725 | 16 | * this list of conditions and the following disclaimer. |
Kojto | 122:f9eeca106725 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
Kojto | 122:f9eeca106725 | 18 | * this list of conditions and the following disclaimer in the documentation |
Kojto | 122:f9eeca106725 | 19 | * and/or other materials provided with the distribution. |
Kojto | 122:f9eeca106725 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
Kojto | 122:f9eeca106725 | 21 | * may be used to endorse or promote products derived from this software |
Kojto | 122:f9eeca106725 | 22 | * without specific prior written permission. |
Kojto | 122:f9eeca106725 | 23 | * |
Kojto | 122:f9eeca106725 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
Kojto | 122:f9eeca106725 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
Kojto | 122:f9eeca106725 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Kojto | 122:f9eeca106725 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
Kojto | 122:f9eeca106725 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
Kojto | 122:f9eeca106725 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
Kojto | 122:f9eeca106725 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
Kojto | 122:f9eeca106725 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
Kojto | 122:f9eeca106725 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
Kojto | 122:f9eeca106725 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Kojto | 122:f9eeca106725 | 34 | * |
Kojto | 122:f9eeca106725 | 35 | ****************************************************************************** |
Kojto | 122:f9eeca106725 | 36 | */ |
Kojto | 122:f9eeca106725 | 37 | |
Kojto | 122:f9eeca106725 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
Kojto | 122:f9eeca106725 | 39 | #ifndef __STM32F7xx_HAL_PWR_H |
Kojto | 122:f9eeca106725 | 40 | #define __STM32F7xx_HAL_PWR_H |
Kojto | 122:f9eeca106725 | 41 | |
Kojto | 122:f9eeca106725 | 42 | #ifdef __cplusplus |
Kojto | 122:f9eeca106725 | 43 | extern "C" { |
Kojto | 122:f9eeca106725 | 44 | #endif |
Kojto | 122:f9eeca106725 | 45 | |
Kojto | 122:f9eeca106725 | 46 | /* Includes ------------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 47 | #include "stm32f7xx_hal_def.h" |
Kojto | 122:f9eeca106725 | 48 | |
Kojto | 122:f9eeca106725 | 49 | /** @addtogroup STM32F7xx_HAL_Driver |
Kojto | 122:f9eeca106725 | 50 | * @{ |
Kojto | 122:f9eeca106725 | 51 | */ |
Kojto | 122:f9eeca106725 | 52 | |
Kojto | 122:f9eeca106725 | 53 | /** @addtogroup PWR |
Kojto | 122:f9eeca106725 | 54 | * @{ |
Kojto | 122:f9eeca106725 | 55 | */ |
Kojto | 122:f9eeca106725 | 56 | |
Kojto | 122:f9eeca106725 | 57 | /* Exported types ------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 58 | |
Kojto | 122:f9eeca106725 | 59 | /** @defgroup PWR_Exported_Types PWR Exported Types |
Kojto | 122:f9eeca106725 | 60 | * @{ |
Kojto | 122:f9eeca106725 | 61 | */ |
Kojto | 122:f9eeca106725 | 62 | |
Kojto | 122:f9eeca106725 | 63 | /** |
Kojto | 122:f9eeca106725 | 64 | * @brief PWR PVD configuration structure definition |
Kojto | 122:f9eeca106725 | 65 | */ |
Kojto | 122:f9eeca106725 | 66 | typedef struct |
Kojto | 122:f9eeca106725 | 67 | { |
Kojto | 122:f9eeca106725 | 68 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. |
Kojto | 122:f9eeca106725 | 69 | This parameter can be a value of @ref PWR_PVD_detection_level */ |
Kojto | 122:f9eeca106725 | 70 | |
Kojto | 122:f9eeca106725 | 71 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. |
Kojto | 122:f9eeca106725 | 72 | This parameter can be a value of @ref PWR_PVD_Mode */ |
Kojto | 122:f9eeca106725 | 73 | }PWR_PVDTypeDef; |
Kojto | 122:f9eeca106725 | 74 | |
Kojto | 122:f9eeca106725 | 75 | /** |
Kojto | 122:f9eeca106725 | 76 | * @} |
Kojto | 122:f9eeca106725 | 77 | */ |
Kojto | 122:f9eeca106725 | 78 | |
Kojto | 122:f9eeca106725 | 79 | /* Exported constants --------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 80 | /** @defgroup PWR_Exported_Constants PWR Exported Constants |
Kojto | 122:f9eeca106725 | 81 | * @{ |
Kojto | 122:f9eeca106725 | 82 | */ |
Kojto | 122:f9eeca106725 | 83 | |
Kojto | 122:f9eeca106725 | 84 | /** @defgroup PWR_PVD_detection_level PWR PVD detection level |
Kojto | 122:f9eeca106725 | 85 | * @{ |
Kojto | 122:f9eeca106725 | 86 | */ |
Kojto | 122:f9eeca106725 | 87 | #define PWR_PVDLEVEL_0 PWR_CR1_PLS_LEV0 |
Kojto | 122:f9eeca106725 | 88 | #define PWR_PVDLEVEL_1 PWR_CR1_PLS_LEV1 |
Kojto | 122:f9eeca106725 | 89 | #define PWR_PVDLEVEL_2 PWR_CR1_PLS_LEV2 |
Kojto | 122:f9eeca106725 | 90 | #define PWR_PVDLEVEL_3 PWR_CR1_PLS_LEV3 |
Kojto | 122:f9eeca106725 | 91 | #define PWR_PVDLEVEL_4 PWR_CR1_PLS_LEV4 |
Kojto | 122:f9eeca106725 | 92 | #define PWR_PVDLEVEL_5 PWR_CR1_PLS_LEV5 |
Kojto | 122:f9eeca106725 | 93 | #define PWR_PVDLEVEL_6 PWR_CR1_PLS_LEV6 |
Kojto | 122:f9eeca106725 | 94 | #define PWR_PVDLEVEL_7 PWR_CR1_PLS_LEV7/* External input analog voltage |
Kojto | 122:f9eeca106725 | 95 | (Compare internally to VREFINT) */ |
Kojto | 122:f9eeca106725 | 96 | |
Kojto | 122:f9eeca106725 | 97 | /** |
Kojto | 122:f9eeca106725 | 98 | * @} |
Kojto | 122:f9eeca106725 | 99 | */ |
Kojto | 122:f9eeca106725 | 100 | |
Kojto | 122:f9eeca106725 | 101 | /** @defgroup PWR_PVD_Mode PWR PVD Mode |
Kojto | 122:f9eeca106725 | 102 | * @{ |
Kojto | 122:f9eeca106725 | 103 | */ |
Kojto | 122:f9eeca106725 | 104 | #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000U) /*!< basic mode is used */ |
Kojto | 122:f9eeca106725 | 105 | #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */ |
Kojto | 122:f9eeca106725 | 106 | #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */ |
Kojto | 122:f9eeca106725 | 107 | #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ |
Kojto | 122:f9eeca106725 | 108 | #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001U) /*!< Event Mode with Rising edge trigger detection */ |
Kojto | 122:f9eeca106725 | 109 | #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002U) /*!< Event Mode with Falling edge trigger detection */ |
Kojto | 122:f9eeca106725 | 110 | #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */ |
Kojto | 122:f9eeca106725 | 111 | /** |
Kojto | 122:f9eeca106725 | 112 | * @} |
Kojto | 122:f9eeca106725 | 113 | */ |
Kojto | 122:f9eeca106725 | 114 | |
Kojto | 122:f9eeca106725 | 115 | /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode |
Kojto | 122:f9eeca106725 | 116 | * @{ |
Kojto | 122:f9eeca106725 | 117 | */ |
Kojto | 122:f9eeca106725 | 118 | #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000U) |
Kojto | 122:f9eeca106725 | 119 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPDS |
Kojto | 122:f9eeca106725 | 120 | /** |
Kojto | 122:f9eeca106725 | 121 | * @} |
Kojto | 122:f9eeca106725 | 122 | */ |
Kojto | 122:f9eeca106725 | 123 | |
Kojto | 122:f9eeca106725 | 124 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry |
Kojto | 122:f9eeca106725 | 125 | * @{ |
Kojto | 122:f9eeca106725 | 126 | */ |
Kojto | 122:f9eeca106725 | 127 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01U) |
Kojto | 122:f9eeca106725 | 128 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02U) |
Kojto | 122:f9eeca106725 | 129 | /** |
Kojto | 122:f9eeca106725 | 130 | * @} |
Kojto | 122:f9eeca106725 | 131 | */ |
Kojto | 122:f9eeca106725 | 132 | |
Kojto | 122:f9eeca106725 | 133 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry |
Kojto | 122:f9eeca106725 | 134 | * @{ |
Kojto | 122:f9eeca106725 | 135 | */ |
Kojto | 122:f9eeca106725 | 136 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01U) |
Kojto | 122:f9eeca106725 | 137 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02U) |
Kojto | 122:f9eeca106725 | 138 | /** |
Kojto | 122:f9eeca106725 | 139 | * @} |
Kojto | 122:f9eeca106725 | 140 | */ |
Kojto | 122:f9eeca106725 | 141 | |
Kojto | 122:f9eeca106725 | 142 | /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale |
Kojto | 122:f9eeca106725 | 143 | * @{ |
Kojto | 122:f9eeca106725 | 144 | */ |
Kojto | 122:f9eeca106725 | 145 | #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR1_VOS |
Kojto | 122:f9eeca106725 | 146 | #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR1_VOS_1 |
Kojto | 122:f9eeca106725 | 147 | #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR1_VOS_0 |
Kojto | 122:f9eeca106725 | 148 | /** |
Kojto | 122:f9eeca106725 | 149 | * @} |
Kojto | 122:f9eeca106725 | 150 | */ |
Kojto | 122:f9eeca106725 | 151 | |
Kojto | 122:f9eeca106725 | 152 | /** @defgroup PWR_Flag PWR Flag |
Kojto | 122:f9eeca106725 | 153 | * @{ |
Kojto | 122:f9eeca106725 | 154 | */ |
Kojto | 122:f9eeca106725 | 155 | #define PWR_FLAG_WU PWR_CSR1_WUIF |
Kojto | 122:f9eeca106725 | 156 | #define PWR_FLAG_SB PWR_CSR1_SBF |
Kojto | 122:f9eeca106725 | 157 | #define PWR_FLAG_PVDO PWR_CSR1_PVDO |
Kojto | 122:f9eeca106725 | 158 | #define PWR_FLAG_BRR PWR_CSR1_BRR |
Kojto | 122:f9eeca106725 | 159 | #define PWR_FLAG_VOSRDY PWR_CSR1_VOSRDY |
Kojto | 122:f9eeca106725 | 160 | /** |
Kojto | 122:f9eeca106725 | 161 | * @} |
Kojto | 122:f9eeca106725 | 162 | */ |
Kojto | 122:f9eeca106725 | 163 | |
Kojto | 122:f9eeca106725 | 164 | /** |
Kojto | 122:f9eeca106725 | 165 | * @} |
Kojto | 122:f9eeca106725 | 166 | */ |
Kojto | 122:f9eeca106725 | 167 | |
Kojto | 122:f9eeca106725 | 168 | /* Exported macro ------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 169 | /** @defgroup PWR_Exported_Macro PWR Exported Macro |
Kojto | 122:f9eeca106725 | 170 | * @{ |
Kojto | 122:f9eeca106725 | 171 | */ |
Kojto | 122:f9eeca106725 | 172 | |
Kojto | 122:f9eeca106725 | 173 | /** @brief macros configure the main internal regulator output voltage. |
Kojto | 122:f9eeca106725 | 174 | * @param __REGULATOR__: specifies the regulator output voltage to achieve |
Kojto | 122:f9eeca106725 | 175 | * a tradeoff between performance and power consumption when the device does |
Kojto | 122:f9eeca106725 | 176 | * not operate at the maximum frequency (refer to the datasheets for more details). |
Kojto | 122:f9eeca106725 | 177 | * This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 178 | * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode |
Kojto | 122:f9eeca106725 | 179 | * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode |
Kojto | 122:f9eeca106725 | 180 | * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode |
Kojto | 122:f9eeca106725 | 181 | * @retval None |
Kojto | 122:f9eeca106725 | 182 | */ |
Kojto | 122:f9eeca106725 | 183 | #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \ |
Kojto | 122:f9eeca106725 | 184 | __IO uint32_t tmpreg; \ |
Kojto | 122:f9eeca106725 | 185 | MODIFY_REG(PWR->CR1, PWR_CR1_VOS, (__REGULATOR__)); \ |
Kojto | 122:f9eeca106725 | 186 | /* Delay after an RCC peripheral clock enabling */ \ |
Kojto | 122:f9eeca106725 | 187 | tmpreg = READ_BIT(PWR->CR1, PWR_CR1_VOS); \ |
Kojto | 122:f9eeca106725 | 188 | UNUSED(tmpreg); \ |
Kojto | 122:f9eeca106725 | 189 | } while(0) |
Kojto | 122:f9eeca106725 | 190 | |
Kojto | 122:f9eeca106725 | 191 | /** @brief Check PWR flag is set or not. |
Kojto | 122:f9eeca106725 | 192 | * @param __FLAG__: specifies the flag to check. |
Kojto | 122:f9eeca106725 | 193 | * This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 194 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event |
Kojto | 122:f9eeca106725 | 195 | * was received on the internal wakeup line in standby mode (RTC alarm (Alarm A or Alarm B), |
Kojto | 122:f9eeca106725 | 196 | * RTC Tamper event, RTC TimeStamp event or RTC Wakeup)). |
Kojto | 122:f9eeca106725 | 197 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was |
Kojto | 122:f9eeca106725 | 198 | * resumed from StandBy mode. |
Kojto | 122:f9eeca106725 | 199 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled |
Kojto | 122:f9eeca106725 | 200 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode |
Kojto | 122:f9eeca106725 | 201 | * For this reason, this bit is equal to 0 after Standby or reset |
Kojto | 122:f9eeca106725 | 202 | * until the PVDE bit is set. |
Kojto | 122:f9eeca106725 | 203 | * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset |
Kojto | 122:f9eeca106725 | 204 | * when the device wakes up from Standby mode or by a system reset |
Kojto | 122:f9eeca106725 | 205 | * or power reset. |
Kojto | 122:f9eeca106725 | 206 | * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage |
Kojto | 122:f9eeca106725 | 207 | * scaling output selection is ready. |
Kojto | 122:f9eeca106725 | 208 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
Kojto | 122:f9eeca106725 | 209 | */ |
Kojto | 122:f9eeca106725 | 210 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR1 & (__FLAG__)) == (__FLAG__)) |
Kojto | 122:f9eeca106725 | 211 | |
Kojto | 122:f9eeca106725 | 212 | /** @brief Clear the PWR's pending flags. |
Kojto | 122:f9eeca106725 | 213 | * @param __FLAG__: specifies the flag to clear. |
Kojto | 122:f9eeca106725 | 214 | * This parameter can be one of the following values: |
Kojto | 122:f9eeca106725 | 215 | * @arg PWR_FLAG_SB: StandBy flag |
Kojto | 122:f9eeca106725 | 216 | */ |
Kojto | 122:f9eeca106725 | 217 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR1 |= (__FLAG__) << 2) |
Kojto | 122:f9eeca106725 | 218 | |
Kojto | 122:f9eeca106725 | 219 | /** |
Kojto | 122:f9eeca106725 | 220 | * @brief Enable the PVD Exti Line 16. |
Kojto | 122:f9eeca106725 | 221 | * @retval None. |
Kojto | 122:f9eeca106725 | 222 | */ |
Kojto | 122:f9eeca106725 | 223 | #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) |
Kojto | 122:f9eeca106725 | 224 | |
Kojto | 122:f9eeca106725 | 225 | /** |
Kojto | 122:f9eeca106725 | 226 | * @brief Disable the PVD EXTI Line 16. |
Kojto | 122:f9eeca106725 | 227 | * @retval None. |
Kojto | 122:f9eeca106725 | 228 | */ |
Kojto | 122:f9eeca106725 | 229 | #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) |
Kojto | 122:f9eeca106725 | 230 | |
Kojto | 122:f9eeca106725 | 231 | /** |
Kojto | 122:f9eeca106725 | 232 | * @brief Enable event on PVD Exti Line 16. |
Kojto | 122:f9eeca106725 | 233 | * @retval None. |
Kojto | 122:f9eeca106725 | 234 | */ |
Kojto | 122:f9eeca106725 | 235 | #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) |
Kojto | 122:f9eeca106725 | 236 | |
Kojto | 122:f9eeca106725 | 237 | /** |
Kojto | 122:f9eeca106725 | 238 | * @brief Disable event on PVD Exti Line 16. |
Kojto | 122:f9eeca106725 | 239 | * @retval None. |
Kojto | 122:f9eeca106725 | 240 | */ |
Kojto | 122:f9eeca106725 | 241 | #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) |
Kojto | 122:f9eeca106725 | 242 | |
Kojto | 122:f9eeca106725 | 243 | /** |
Kojto | 122:f9eeca106725 | 244 | * @brief Enable the PVD Extended Interrupt Rising Trigger. |
Kojto | 122:f9eeca106725 | 245 | * @retval None. |
Kojto | 122:f9eeca106725 | 246 | */ |
Kojto | 122:f9eeca106725 | 247 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) |
Kojto | 122:f9eeca106725 | 248 | |
Kojto | 122:f9eeca106725 | 249 | /** |
Kojto | 122:f9eeca106725 | 250 | * @brief Disable the PVD Extended Interrupt Rising Trigger. |
Kojto | 122:f9eeca106725 | 251 | * @retval None. |
Kojto | 122:f9eeca106725 | 252 | */ |
Kojto | 122:f9eeca106725 | 253 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) |
Kojto | 122:f9eeca106725 | 254 | |
Kojto | 122:f9eeca106725 | 255 | /** |
Kojto | 122:f9eeca106725 | 256 | * @brief Enable the PVD Extended Interrupt Falling Trigger. |
Kojto | 122:f9eeca106725 | 257 | * @retval None. |
Kojto | 122:f9eeca106725 | 258 | */ |
Kojto | 122:f9eeca106725 | 259 | #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) |
Kojto | 122:f9eeca106725 | 260 | |
Kojto | 122:f9eeca106725 | 261 | |
Kojto | 122:f9eeca106725 | 262 | /** |
Kojto | 122:f9eeca106725 | 263 | * @brief Disable the PVD Extended Interrupt Falling Trigger. |
Kojto | 122:f9eeca106725 | 264 | * @retval None. |
Kojto | 122:f9eeca106725 | 265 | */ |
Kojto | 122:f9eeca106725 | 266 | #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) |
Kojto | 122:f9eeca106725 | 267 | |
Kojto | 122:f9eeca106725 | 268 | |
Kojto | 122:f9eeca106725 | 269 | /** |
Kojto | 122:f9eeca106725 | 270 | * @brief PVD EXTI line configuration: set rising & falling edge trigger. |
Kojto | 122:f9eeca106725 | 271 | * @retval None. |
Kojto | 122:f9eeca106725 | 272 | */ |
Kojto | 122:f9eeca106725 | 273 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); |
Kojto | 122:f9eeca106725 | 274 | |
Kojto | 122:f9eeca106725 | 275 | /** |
Kojto | 122:f9eeca106725 | 276 | * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. |
Kojto | 122:f9eeca106725 | 277 | * @retval None. |
Kojto | 122:f9eeca106725 | 278 | */ |
Kojto | 122:f9eeca106725 | 279 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); |
Kojto | 122:f9eeca106725 | 280 | |
Kojto | 122:f9eeca106725 | 281 | /** |
Kojto | 122:f9eeca106725 | 282 | * @brief checks whether the specified PVD Exti interrupt flag is set or not. |
Kojto | 122:f9eeca106725 | 283 | * @retval EXTI PVD Line Status. |
Kojto | 122:f9eeca106725 | 284 | */ |
Kojto | 122:f9eeca106725 | 285 | #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) |
Kojto | 122:f9eeca106725 | 286 | |
Kojto | 122:f9eeca106725 | 287 | /** |
Kojto | 122:f9eeca106725 | 288 | * @brief Clear the PVD Exti flag. |
Kojto | 122:f9eeca106725 | 289 | * @retval None. |
Kojto | 122:f9eeca106725 | 290 | */ |
Kojto | 122:f9eeca106725 | 291 | #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) |
Kojto | 122:f9eeca106725 | 292 | |
Kojto | 122:f9eeca106725 | 293 | /** |
Kojto | 122:f9eeca106725 | 294 | * @brief Generates a Software interrupt on PVD EXTI line. |
Kojto | 122:f9eeca106725 | 295 | * @retval None |
Kojto | 122:f9eeca106725 | 296 | */ |
Kojto | 122:f9eeca106725 | 297 | #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) |
Kojto | 122:f9eeca106725 | 298 | |
Kojto | 122:f9eeca106725 | 299 | /** |
Kojto | 122:f9eeca106725 | 300 | * @} |
Kojto | 122:f9eeca106725 | 301 | */ |
Kojto | 122:f9eeca106725 | 302 | |
Kojto | 122:f9eeca106725 | 303 | /* Include PWR HAL Extension module */ |
Kojto | 122:f9eeca106725 | 304 | #include "stm32f7xx_hal_pwr_ex.h" |
Kojto | 122:f9eeca106725 | 305 | |
Kojto | 122:f9eeca106725 | 306 | /* Exported functions --------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 307 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions |
Kojto | 122:f9eeca106725 | 308 | * @{ |
Kojto | 122:f9eeca106725 | 309 | */ |
Kojto | 122:f9eeca106725 | 310 | |
Kojto | 122:f9eeca106725 | 311 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions |
Kojto | 122:f9eeca106725 | 312 | * @{ |
Kojto | 122:f9eeca106725 | 313 | */ |
Kojto | 122:f9eeca106725 | 314 | /* Initialization and de-initialization functions *****************************/ |
Kojto | 122:f9eeca106725 | 315 | void HAL_PWR_DeInit(void); |
Kojto | 122:f9eeca106725 | 316 | void HAL_PWR_EnableBkUpAccess(void); |
Kojto | 122:f9eeca106725 | 317 | void HAL_PWR_DisableBkUpAccess(void); |
Kojto | 122:f9eeca106725 | 318 | /** |
Kojto | 122:f9eeca106725 | 319 | * @} |
Kojto | 122:f9eeca106725 | 320 | */ |
Kojto | 122:f9eeca106725 | 321 | |
Kojto | 122:f9eeca106725 | 322 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions |
Kojto | 122:f9eeca106725 | 323 | * @{ |
Kojto | 122:f9eeca106725 | 324 | */ |
Kojto | 122:f9eeca106725 | 325 | /* Peripheral Control functions **********************************************/ |
Kojto | 122:f9eeca106725 | 326 | /* PVD configuration */ |
Kojto | 122:f9eeca106725 | 327 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); |
Kojto | 122:f9eeca106725 | 328 | void HAL_PWR_EnablePVD(void); |
Kojto | 122:f9eeca106725 | 329 | void HAL_PWR_DisablePVD(void); |
Kojto | 122:f9eeca106725 | 330 | |
Kojto | 122:f9eeca106725 | 331 | /* WakeUp pins configuration */ |
Kojto | 122:f9eeca106725 | 332 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity); |
Kojto | 122:f9eeca106725 | 333 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); |
Kojto | 122:f9eeca106725 | 334 | |
Kojto | 122:f9eeca106725 | 335 | /* Low Power modes entry */ |
Kojto | 122:f9eeca106725 | 336 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); |
Kojto | 122:f9eeca106725 | 337 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); |
Kojto | 122:f9eeca106725 | 338 | void HAL_PWR_EnterSTANDBYMode(void); |
Kojto | 122:f9eeca106725 | 339 | |
Kojto | 122:f9eeca106725 | 340 | /* Power PVD IRQ Handler */ |
Kojto | 122:f9eeca106725 | 341 | void HAL_PWR_PVD_IRQHandler(void); |
Kojto | 122:f9eeca106725 | 342 | void HAL_PWR_PVDCallback(void); |
Kojto | 122:f9eeca106725 | 343 | |
Kojto | 122:f9eeca106725 | 344 | /* Cortex System Control functions *******************************************/ |
Kojto | 122:f9eeca106725 | 345 | void HAL_PWR_EnableSleepOnExit(void); |
Kojto | 122:f9eeca106725 | 346 | void HAL_PWR_DisableSleepOnExit(void); |
Kojto | 122:f9eeca106725 | 347 | void HAL_PWR_EnableSEVOnPend(void); |
Kojto | 122:f9eeca106725 | 348 | void HAL_PWR_DisableSEVOnPend(void); |
Kojto | 122:f9eeca106725 | 349 | /** |
Kojto | 122:f9eeca106725 | 350 | * @} |
Kojto | 122:f9eeca106725 | 351 | */ |
Kojto | 122:f9eeca106725 | 352 | |
Kojto | 122:f9eeca106725 | 353 | /** |
Kojto | 122:f9eeca106725 | 354 | * @} |
Kojto | 122:f9eeca106725 | 355 | */ |
Kojto | 122:f9eeca106725 | 356 | |
Kojto | 122:f9eeca106725 | 357 | /* Private types -------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 358 | /* Private variables ---------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 359 | /* Private constants ---------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 360 | /** @defgroup PWR_Private_Constants PWR Private Constants |
Kojto | 122:f9eeca106725 | 361 | * @{ |
Kojto | 122:f9eeca106725 | 362 | */ |
Kojto | 122:f9eeca106725 | 363 | |
Kojto | 122:f9eeca106725 | 364 | /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line |
Kojto | 122:f9eeca106725 | 365 | * @{ |
Kojto | 122:f9eeca106725 | 366 | */ |
Kojto | 122:f9eeca106725 | 367 | #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_IM16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ |
Kojto | 122:f9eeca106725 | 368 | /** |
Kojto | 122:f9eeca106725 | 369 | * @} |
Kojto | 122:f9eeca106725 | 370 | */ |
Kojto | 122:f9eeca106725 | 371 | |
Kojto | 122:f9eeca106725 | 372 | /** |
Kojto | 122:f9eeca106725 | 373 | * @} |
Kojto | 122:f9eeca106725 | 374 | */ |
Kojto | 122:f9eeca106725 | 375 | /* Private macros ------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 376 | /** @defgroup PWR_Private_Macros PWR Private Macros |
Kojto | 122:f9eeca106725 | 377 | * @{ |
Kojto | 122:f9eeca106725 | 378 | */ |
Kojto | 122:f9eeca106725 | 379 | |
Kojto | 122:f9eeca106725 | 380 | /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters |
Kojto | 122:f9eeca106725 | 381 | * @{ |
Kojto | 122:f9eeca106725 | 382 | */ |
Kojto | 122:f9eeca106725 | 383 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ |
Kojto | 122:f9eeca106725 | 384 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ |
Kojto | 122:f9eeca106725 | 385 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ |
Kojto | 122:f9eeca106725 | 386 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) |
Kojto | 122:f9eeca106725 | 387 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ |
Kojto | 122:f9eeca106725 | 388 | ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ |
Kojto | 122:f9eeca106725 | 389 | ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ |
Kojto | 122:f9eeca106725 | 390 | ((MODE) == PWR_PVD_MODE_NORMAL)) |
Kojto | 122:f9eeca106725 | 391 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ |
Kojto | 122:f9eeca106725 | 392 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) |
Kojto | 122:f9eeca106725 | 393 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) |
Kojto | 122:f9eeca106725 | 394 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) |
Kojto | 122:f9eeca106725 | 395 | #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ |
Kojto | 122:f9eeca106725 | 396 | ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \ |
Kojto | 122:f9eeca106725 | 397 | ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3)) |
Kojto | 122:f9eeca106725 | 398 | |
Kojto | 122:f9eeca106725 | 399 | /** |
Kojto | 122:f9eeca106725 | 400 | * @} |
Kojto | 122:f9eeca106725 | 401 | */ |
Kojto | 122:f9eeca106725 | 402 | |
Kojto | 122:f9eeca106725 | 403 | /** |
Kojto | 122:f9eeca106725 | 404 | * @} |
Kojto | 122:f9eeca106725 | 405 | */ |
Kojto | 122:f9eeca106725 | 406 | |
Kojto | 122:f9eeca106725 | 407 | /** |
Kojto | 122:f9eeca106725 | 408 | * @} |
Kojto | 122:f9eeca106725 | 409 | */ |
Kojto | 122:f9eeca106725 | 410 | |
Kojto | 122:f9eeca106725 | 411 | /** |
Kojto | 122:f9eeca106725 | 412 | * @} |
Kojto | 122:f9eeca106725 | 413 | */ |
Kojto | 122:f9eeca106725 | 414 | |
Kojto | 122:f9eeca106725 | 415 | #ifdef __cplusplus |
Kojto | 122:f9eeca106725 | 416 | } |
Kojto | 122:f9eeca106725 | 417 | #endif |
Kojto | 122:f9eeca106725 | 418 | |
Kojto | 122:f9eeca106725 | 419 | |
Kojto | 122:f9eeca106725 | 420 | #endif /* __STM32F7xx_HAL_PWR_H */ |
Kojto | 122:f9eeca106725 | 421 | |
Kojto | 122:f9eeca106725 | 422 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |