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TARGET_K66F/TOOLCHAIN_IAR/fsl_enet.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2015 - 2016, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 3 * Copyright 2016-2017 NXP
AnnaBridge 171:3a7713b1edbc 4 *
AnnaBridge 171:3a7713b1edbc 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 6 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 9 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 13 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 14 *
AnnaBridge 171:3a7713b1edbc 15 * o Neither the name of the copyright holder nor the names of its
AnnaBridge 171:3a7713b1edbc 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 17 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 18 *
AnnaBridge 171:3a7713b1edbc 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 29 */
AnnaBridge 171:3a7713b1edbc 30 #ifndef _FSL_ENET_H_
AnnaBridge 171:3a7713b1edbc 31 #define _FSL_ENET_H_
AnnaBridge 171:3a7713b1edbc 32
AnnaBridge 171:3a7713b1edbc 33 #include "fsl_common.h"
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 /*!
AnnaBridge 171:3a7713b1edbc 36 * @addtogroup enet
AnnaBridge 171:3a7713b1edbc 37 * @{
AnnaBridge 171:3a7713b1edbc 38 */
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 42 * Definitions
AnnaBridge 171:3a7713b1edbc 43 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 44
AnnaBridge 171:3a7713b1edbc 45 /*! @name Driver version */
AnnaBridge 171:3a7713b1edbc 46 /*@{*/
AnnaBridge 171:3a7713b1edbc 47 /*! @brief Defines the driver version. */
AnnaBridge 171:3a7713b1edbc 48 #define FSL_ENET_DRIVER_VERSION (MAKE_VERSION(2, 1, 1)) /*!< Version 2.1.1. */
AnnaBridge 171:3a7713b1edbc 49 /*@}*/
AnnaBridge 171:3a7713b1edbc 50
AnnaBridge 171:3a7713b1edbc 51 /*! @name Control and status region bit masks of the receive buffer descriptor. */
AnnaBridge 171:3a7713b1edbc 52 /*@{*/
AnnaBridge 171:3a7713b1edbc 53 #define ENET_BUFFDESCRIPTOR_RX_EMPTY_MASK 0x8000U /*!< Empty bit mask. */
AnnaBridge 171:3a7713b1edbc 54 #define ENET_BUFFDESCRIPTOR_RX_SOFTOWNER1_MASK 0x4000U /*!< Software owner one mask. */
AnnaBridge 171:3a7713b1edbc 55 #define ENET_BUFFDESCRIPTOR_RX_WRAP_MASK 0x2000U /*!< Next buffer descriptor is the start address. */
AnnaBridge 171:3a7713b1edbc 56 #define ENET_BUFFDESCRIPTOR_RX_SOFTOWNER2_Mask 0x1000U /*!< Software owner two mask. */
AnnaBridge 171:3a7713b1edbc 57 #define ENET_BUFFDESCRIPTOR_RX_LAST_MASK 0x0800U /*!< Last BD of the frame mask. */
AnnaBridge 171:3a7713b1edbc 58 #define ENET_BUFFDESCRIPTOR_RX_MISS_MASK 0x0100U /*!< Received because of the promiscuous mode. */
AnnaBridge 171:3a7713b1edbc 59 #define ENET_BUFFDESCRIPTOR_RX_BROADCAST_MASK 0x0080U /*!< Broadcast packet mask. */
AnnaBridge 171:3a7713b1edbc 60 #define ENET_BUFFDESCRIPTOR_RX_MULTICAST_MASK 0x0040U /*!< Multicast packet mask. */
AnnaBridge 171:3a7713b1edbc 61 #define ENET_BUFFDESCRIPTOR_RX_LENVLIOLATE_MASK 0x0020U /*!< Length violation mask. */
AnnaBridge 171:3a7713b1edbc 62 #define ENET_BUFFDESCRIPTOR_RX_NOOCTET_MASK 0x0010U /*!< Non-octet aligned frame mask. */
AnnaBridge 171:3a7713b1edbc 63 #define ENET_BUFFDESCRIPTOR_RX_CRC_MASK 0x0004U /*!< CRC error mask. */
AnnaBridge 171:3a7713b1edbc 64 #define ENET_BUFFDESCRIPTOR_RX_OVERRUN_MASK 0x0002U /*!< FIFO overrun mask. */
AnnaBridge 171:3a7713b1edbc 65 #define ENET_BUFFDESCRIPTOR_RX_TRUNC_MASK 0x0001U /*!< Frame is truncated mask. */
AnnaBridge 171:3a7713b1edbc 66 /*@}*/
AnnaBridge 171:3a7713b1edbc 67
AnnaBridge 171:3a7713b1edbc 68 /*! @name Control and status bit masks of the transmit buffer descriptor. */
AnnaBridge 171:3a7713b1edbc 69 /*@{*/
AnnaBridge 171:3a7713b1edbc 70 #define ENET_BUFFDESCRIPTOR_TX_READY_MASK 0x8000U /*!< Ready bit mask. */
AnnaBridge 171:3a7713b1edbc 71 #define ENET_BUFFDESCRIPTOR_TX_SOFTOWENER1_MASK 0x4000U /*!< Software owner one mask. */
AnnaBridge 171:3a7713b1edbc 72 #define ENET_BUFFDESCRIPTOR_TX_WRAP_MASK 0x2000U /*!< Wrap buffer descriptor mask. */
AnnaBridge 171:3a7713b1edbc 73 #define ENET_BUFFDESCRIPTOR_TX_SOFTOWENER2_MASK 0x1000U /*!< Software owner two mask. */
AnnaBridge 171:3a7713b1edbc 74 #define ENET_BUFFDESCRIPTOR_TX_LAST_MASK 0x0800U /*!< Last BD of the frame mask. */
AnnaBridge 171:3a7713b1edbc 75 #define ENET_BUFFDESCRIPTOR_TX_TRANMITCRC_MASK 0x0400U /*!< Transmit CRC mask. */
AnnaBridge 171:3a7713b1edbc 76 /*@}*/
AnnaBridge 171:3a7713b1edbc 77
AnnaBridge 171:3a7713b1edbc 78 /* Extended control regions for enhanced buffer descriptors. */
AnnaBridge 171:3a7713b1edbc 79 #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
AnnaBridge 171:3a7713b1edbc 80 /*! @name First extended control region bit masks of the receive buffer descriptor. */
AnnaBridge 171:3a7713b1edbc 81 /*@{*/
AnnaBridge 171:3a7713b1edbc 82 #define ENET_BUFFDESCRIPTOR_RX_IPV4_MASK 0x0001U /*!< Ipv4 frame mask. */
AnnaBridge 171:3a7713b1edbc 83 #define ENET_BUFFDESCRIPTOR_RX_IPV6_MASK 0x0002U /*!< Ipv6 frame mask. */
AnnaBridge 171:3a7713b1edbc 84 #define ENET_BUFFDESCRIPTOR_RX_VLAN_MASK 0x0004U /*!< VLAN frame mask. */
AnnaBridge 171:3a7713b1edbc 85 #define ENET_BUFFDESCRIPTOR_RX_PROTOCOLCHECKSUM_MASK 0x0010U /*!< Protocol checksum error mask. */
AnnaBridge 171:3a7713b1edbc 86 #define ENET_BUFFDESCRIPTOR_RX_IPHEADCHECKSUM_MASK 0x0020U /*!< IP header checksum error mask. */
AnnaBridge 171:3a7713b1edbc 87 /*@}*/
AnnaBridge 171:3a7713b1edbc 88
AnnaBridge 171:3a7713b1edbc 89 /*! @name Second extended control region bit masks of the receive buffer descriptor. */
AnnaBridge 171:3a7713b1edbc 90 /*@{*/
AnnaBridge 171:3a7713b1edbc 91 #define ENET_BUFFDESCRIPTOR_RX_INTERRUPT_MASK 0x0080U /*!< BD interrupt mask. */
AnnaBridge 171:3a7713b1edbc 92 #define ENET_BUFFDESCRIPTOR_RX_UNICAST_MASK 0x0100U /*!< Unicast frame mask. */
AnnaBridge 171:3a7713b1edbc 93 #define ENET_BUFFDESCRIPTOR_RX_COLLISION_MASK 0x0200U /*!< BD collision mask. */
AnnaBridge 171:3a7713b1edbc 94 #define ENET_BUFFDESCRIPTOR_RX_PHYERR_MASK 0x0400U /*!< PHY error mask. */
AnnaBridge 171:3a7713b1edbc 95 #define ENET_BUFFDESCRIPTOR_RX_MACERR_MASK 0x8000U /*!< Mac error mask. */
AnnaBridge 171:3a7713b1edbc 96 /*@}*/
AnnaBridge 171:3a7713b1edbc 97
AnnaBridge 171:3a7713b1edbc 98 /*! @name First extended control region bit masks of the transmit buffer descriptor. */
AnnaBridge 171:3a7713b1edbc 99 /*@{*/
AnnaBridge 171:3a7713b1edbc 100 #define ENET_BUFFDESCRIPTOR_TX_ERR_MASK 0x8000U /*!< Transmit error mask. */
AnnaBridge 171:3a7713b1edbc 101 #define ENET_BUFFDESCRIPTOR_TX_UNDERFLOWERR_MASK 0x2000U /*!< Underflow error mask. */
AnnaBridge 171:3a7713b1edbc 102 #define ENET_BUFFDESCRIPTOR_TX_EXCCOLLISIONERR_MASK 0x1000U /*!< Excess collision error mask. */
AnnaBridge 171:3a7713b1edbc 103 #define ENET_BUFFDESCRIPTOR_TX_FRAMEERR_MASK 0x0800U /*!< Frame error mask. */
AnnaBridge 171:3a7713b1edbc 104 #define ENET_BUFFDESCRIPTOR_TX_LATECOLLISIONERR_MASK 0x0400U /*!< Late collision error mask. */
AnnaBridge 171:3a7713b1edbc 105 #define ENET_BUFFDESCRIPTOR_TX_OVERFLOWERR_MASK 0x0200U /*!< Overflow error mask. */
AnnaBridge 171:3a7713b1edbc 106 #define ENET_BUFFDESCRIPTOR_TX_TIMESTAMPERR_MASK 0x0100U /*!< Timestamp error mask. */
AnnaBridge 171:3a7713b1edbc 107 /*@}*/
AnnaBridge 171:3a7713b1edbc 108
AnnaBridge 171:3a7713b1edbc 109 /*! @name Second extended control region bit masks of the transmit buffer descriptor. */
AnnaBridge 171:3a7713b1edbc 110 /*@{*/
AnnaBridge 171:3a7713b1edbc 111 #define ENET_BUFFDESCRIPTOR_TX_INTERRUPT_MASK 0x4000U /*!< Interrupt mask. */
AnnaBridge 171:3a7713b1edbc 112 #define ENET_BUFFDESCRIPTOR_TX_TIMESTAMP_MASK 0x2000U /*!< Timestamp flag mask. */
AnnaBridge 171:3a7713b1edbc 113 /*@}*/
AnnaBridge 171:3a7713b1edbc 114 #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
AnnaBridge 171:3a7713b1edbc 115
AnnaBridge 171:3a7713b1edbc 116 /*! @brief Defines the receive error status flag mask. */
AnnaBridge 171:3a7713b1edbc 117 #define ENET_BUFFDESCRIPTOR_RX_ERR_MASK \
AnnaBridge 171:3a7713b1edbc 118 (ENET_BUFFDESCRIPTOR_RX_TRUNC_MASK | ENET_BUFFDESCRIPTOR_RX_OVERRUN_MASK | \
AnnaBridge 171:3a7713b1edbc 119 ENET_BUFFDESCRIPTOR_RX_LENVLIOLATE_MASK | ENET_BUFFDESCRIPTOR_RX_NOOCTET_MASK | ENET_BUFFDESCRIPTOR_RX_CRC_MASK)
AnnaBridge 171:3a7713b1edbc 120 #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
AnnaBridge 171:3a7713b1edbc 121 #define ENET_BUFFDESCRIPTOR_RX_EXT_ERR_MASK \
AnnaBridge 171:3a7713b1edbc 122 (ENET_BUFFDESCRIPTOR_RX_MACERR_MASK | ENET_BUFFDESCRIPTOR_RX_PHYERR_MASK | ENET_BUFFDESCRIPTOR_RX_COLLISION_MASK)
AnnaBridge 171:3a7713b1edbc 123 #endif
AnnaBridge 171:3a7713b1edbc 124 #define ENET_TX_INTERRUPT (kENET_TxFrameInterrupt | kENET_TxBufferInterrupt)
AnnaBridge 171:3a7713b1edbc 125 #define ENET_RX_INTERRUPT (kENET_RxFrameInterrupt | kENET_RxBufferInterrupt)
AnnaBridge 171:3a7713b1edbc 126 #define ENET_TS_INTERRUPT (kENET_TsTimerInterrupt | kENET_TsAvailInterrupt)
AnnaBridge 171:3a7713b1edbc 127 #define ENET_ERR_INTERRUPT (kENET_BabrInterrupt | kENET_BabtInterrupt | kENET_EBusERInterrupt | \
AnnaBridge 171:3a7713b1edbc 128 kENET_LateCollisionInterrupt | kENET_RetryLimitInterrupt | kENET_UnderrunInterrupt | kENET_PayloadRxInterrupt)
AnnaBridge 171:3a7713b1edbc 129
AnnaBridge 171:3a7713b1edbc 130
AnnaBridge 171:3a7713b1edbc 131 /*! @name Defines the maximum Ethernet frame size. */
AnnaBridge 171:3a7713b1edbc 132 /*@{*/
AnnaBridge 171:3a7713b1edbc 133 #define ENET_FRAME_MAX_FRAMELEN 1518U /*!< Default maximum Ethernet frame size. */
AnnaBridge 171:3a7713b1edbc 134 /*@}*/
AnnaBridge 171:3a7713b1edbc 135
AnnaBridge 171:3a7713b1edbc 136 #define ENET_FIFO_MIN_RX_FULL 5U /*!< ENET minimum receive FIFO full. */
AnnaBridge 171:3a7713b1edbc 137 #define ENET_RX_MIN_BUFFERSIZE 256U /*!< ENET minimum buffer size. */
AnnaBridge 171:3a7713b1edbc 138
AnnaBridge 171:3a7713b1edbc 139 /*! @brief Defines the PHY address scope for the ENET. */
AnnaBridge 171:3a7713b1edbc 140 #define ENET_PHY_MAXADDRESS (ENET_MMFR_PA_MASK >> ENET_MMFR_PA_SHIFT)
AnnaBridge 171:3a7713b1edbc 141
AnnaBridge 171:3a7713b1edbc 142 /*! @brief Defines the status return codes for transaction. */
AnnaBridge 171:3a7713b1edbc 143 enum _enet_status
AnnaBridge 171:3a7713b1edbc 144 {
AnnaBridge 171:3a7713b1edbc 145 kStatus_ENET_RxFrameError = MAKE_STATUS(kStatusGroup_ENET, 0U), /*!< A frame received but data error happen. */
AnnaBridge 171:3a7713b1edbc 146 kStatus_ENET_RxFrameFail = MAKE_STATUS(kStatusGroup_ENET, 1U), /*!< Failed to receive a frame. */
AnnaBridge 171:3a7713b1edbc 147 kStatus_ENET_RxFrameEmpty = MAKE_STATUS(kStatusGroup_ENET, 2U), /*!< No frame arrive. */
AnnaBridge 171:3a7713b1edbc 148 kStatus_ENET_TxFrameBusy =
AnnaBridge 171:3a7713b1edbc 149 MAKE_STATUS(kStatusGroup_ENET, 3U), /*!< Transmit buffer descriptors are under process. */
AnnaBridge 171:3a7713b1edbc 150 kStatus_ENET_TxFrameFail = MAKE_STATUS(kStatusGroup_ENET, 4U) /*!< Transmit frame fail. */
AnnaBridge 171:3a7713b1edbc 151 #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
AnnaBridge 171:3a7713b1edbc 152 ,
AnnaBridge 171:3a7713b1edbc 153 kStatus_ENET_PtpTsRingFull = MAKE_STATUS(kStatusGroup_ENET, 5U), /*!< Timestamp ring full. */
AnnaBridge 171:3a7713b1edbc 154 kStatus_ENET_PtpTsRingEmpty = MAKE_STATUS(kStatusGroup_ENET, 6U) /*!< Timestamp ring empty. */
AnnaBridge 171:3a7713b1edbc 155 #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
AnnaBridge 171:3a7713b1edbc 156 };
AnnaBridge 171:3a7713b1edbc 157
AnnaBridge 171:3a7713b1edbc 158 /*! @brief Defines the RMII or MII mode for data interface between the MAC and the PHY. */
AnnaBridge 171:3a7713b1edbc 159 typedef enum _enet_mii_mode
AnnaBridge 171:3a7713b1edbc 160 {
AnnaBridge 171:3a7713b1edbc 161 kENET_MiiMode = 0U, /*!< MII mode for data interface. */
AnnaBridge 171:3a7713b1edbc 162 kENET_RmiiMode /*!< RMII mode for data interface. */
AnnaBridge 171:3a7713b1edbc 163 } enet_mii_mode_t;
AnnaBridge 171:3a7713b1edbc 164
AnnaBridge 171:3a7713b1edbc 165 /*! @brief Defines the 10 Mbps or 100 Mbps speed for the MII data interface. */
AnnaBridge 171:3a7713b1edbc 166 typedef enum _enet_mii_speed
AnnaBridge 171:3a7713b1edbc 167 {
AnnaBridge 171:3a7713b1edbc 168 kENET_MiiSpeed10M = 0U, /*!< Speed 10 Mbps. */
AnnaBridge 171:3a7713b1edbc 169 kENET_MiiSpeed100M /*!< Speed 100 Mbps. */
AnnaBridge 171:3a7713b1edbc 170 } enet_mii_speed_t;
AnnaBridge 171:3a7713b1edbc 171
AnnaBridge 171:3a7713b1edbc 172 /*! @brief Defines the half or full duplex for the MII data interface. */
AnnaBridge 171:3a7713b1edbc 173 typedef enum _enet_mii_duplex
AnnaBridge 171:3a7713b1edbc 174 {
AnnaBridge 171:3a7713b1edbc 175 kENET_MiiHalfDuplex = 0U, /*!< Half duplex mode. */
AnnaBridge 171:3a7713b1edbc 176 kENET_MiiFullDuplex /*!< Full duplex mode. */
AnnaBridge 171:3a7713b1edbc 177 } enet_mii_duplex_t;
AnnaBridge 171:3a7713b1edbc 178
AnnaBridge 171:3a7713b1edbc 179 /*! @brief Defines the write operation for the MII management frame. */
AnnaBridge 171:3a7713b1edbc 180 typedef enum _enet_mii_write
AnnaBridge 171:3a7713b1edbc 181 {
AnnaBridge 171:3a7713b1edbc 182 kENET_MiiWriteNoCompliant = 0U, /*!< Write frame operation, but not MII-compliant. */
AnnaBridge 171:3a7713b1edbc 183 kENET_MiiWriteValidFrame /*!< Write frame operation for a valid MII management frame. */
AnnaBridge 171:3a7713b1edbc 184 } enet_mii_write_t;
AnnaBridge 171:3a7713b1edbc 185
AnnaBridge 171:3a7713b1edbc 186 /*! @brief Defines the read operation for the MII management frame. */
AnnaBridge 171:3a7713b1edbc 187 typedef enum _enet_mii_read
AnnaBridge 171:3a7713b1edbc 188 {
AnnaBridge 171:3a7713b1edbc 189 kENET_MiiReadValidFrame = 2U, /*!< Read frame operation for a valid MII management frame. */
AnnaBridge 171:3a7713b1edbc 190 kENET_MiiReadNoCompliant = 3U /*!< Read frame operation, but not MII-compliant. */
AnnaBridge 171:3a7713b1edbc 191 } enet_mii_read_t;
AnnaBridge 171:3a7713b1edbc 192
AnnaBridge 171:3a7713b1edbc 193 #if defined (FSL_FEATURE_ENET_HAS_EXTEND_MDIO) && FSL_FEATURE_ENET_HAS_EXTEND_MDIO
AnnaBridge 171:3a7713b1edbc 194 /*! @brief Define the MII opcode for extended MDIO_CLAUSES_45 Frame. */
AnnaBridge 171:3a7713b1edbc 195 typedef enum _enet_mii_extend_opcode {
AnnaBridge 171:3a7713b1edbc 196 kENET_MiiAddrWrite_C45 = 0U, /*!< Address Write operation. */
AnnaBridge 171:3a7713b1edbc 197 kENET_MiiWriteFrame_C45 = 1U, /*!< Write frame operation for a valid MII management frame. */
AnnaBridge 171:3a7713b1edbc 198 kENET_MiiReadFrame_C45 = 3U /*!< Read frame operation for a valid MII management frame. */
AnnaBridge 171:3a7713b1edbc 199 } enet_mii_extend_opcode;
AnnaBridge 171:3a7713b1edbc 200 #endif /* FSL_FEATURE_ENET_HAS_EXTEND_MDIO */
AnnaBridge 171:3a7713b1edbc 201
AnnaBridge 171:3a7713b1edbc 202 /*! @brief Defines a special configuration for ENET MAC controller.
AnnaBridge 171:3a7713b1edbc 203 *
AnnaBridge 171:3a7713b1edbc 204 * These control flags are provided for special user requirements.
AnnaBridge 171:3a7713b1edbc 205 * Normally, these control flags are unused for ENET initialization.
AnnaBridge 171:3a7713b1edbc 206 * For special requirements, set the flags to
AnnaBridge 171:3a7713b1edbc 207 * macSpecialConfig in the enet_config_t.
AnnaBridge 171:3a7713b1edbc 208 * The kENET_ControlStoreAndFwdDisable is used to disable the FIFO store
AnnaBridge 171:3a7713b1edbc 209 * and forward. FIFO store and forward means that the FIFO read/send is started
AnnaBridge 171:3a7713b1edbc 210 * when a complete frame is stored in TX/RX FIFO. If this flag is set,
AnnaBridge 171:3a7713b1edbc 211 * configure rxFifoFullThreshold and txFifoWatermark
AnnaBridge 171:3a7713b1edbc 212 * in the enet_config_t.
AnnaBridge 171:3a7713b1edbc 213 */
AnnaBridge 171:3a7713b1edbc 214 typedef enum _enet_special_control_flag
AnnaBridge 171:3a7713b1edbc 215 {
AnnaBridge 171:3a7713b1edbc 216 kENET_ControlFlowControlEnable = 0x0001U, /*!< Enable ENET flow control: pause frame. */
AnnaBridge 171:3a7713b1edbc 217 kENET_ControlRxPayloadCheckEnable = 0x0002U, /*!< Enable ENET receive payload length check. */
AnnaBridge 171:3a7713b1edbc 218 kENET_ControlRxPadRemoveEnable = 0x0004U, /*!< Padding is removed from received frames. */
AnnaBridge 171:3a7713b1edbc 219 kENET_ControlRxBroadCastRejectEnable = 0x0008U, /*!< Enable broadcast frame reject. */
AnnaBridge 171:3a7713b1edbc 220 kENET_ControlMacAddrInsert = 0x0010U, /*!< Enable MAC address insert. */
AnnaBridge 171:3a7713b1edbc 221 kENET_ControlStoreAndFwdDisable = 0x0020U, /*!< Enable FIFO store and forward. */
AnnaBridge 171:3a7713b1edbc 222 kENET_ControlSMIPreambleDisable = 0x0040U, /*!< Enable SMI preamble. */
AnnaBridge 171:3a7713b1edbc 223 kENET_ControlPromiscuousEnable = 0x0080U, /*!< Enable promiscuous mode. */
AnnaBridge 171:3a7713b1edbc 224 kENET_ControlMIILoopEnable = 0x0100U, /*!< Enable ENET MII loop back. */
AnnaBridge 171:3a7713b1edbc 225 kENET_ControlVLANTagEnable = 0x0200U /*!< Enable VLAN tag frame. */
AnnaBridge 171:3a7713b1edbc 226 } enet_special_control_flag_t;
AnnaBridge 171:3a7713b1edbc 227
AnnaBridge 171:3a7713b1edbc 228 /*! @brief List of interrupts supported by the peripheral. This
AnnaBridge 171:3a7713b1edbc 229 * enumeration uses one-bot encoding to allow a logical OR of multiple
AnnaBridge 171:3a7713b1edbc 230 * members. Members usually map to interrupt enable bits in one or more
AnnaBridge 171:3a7713b1edbc 231 * peripheral registers.
AnnaBridge 171:3a7713b1edbc 232 */
AnnaBridge 171:3a7713b1edbc 233 typedef enum _enet_interrupt_enable
AnnaBridge 171:3a7713b1edbc 234 {
AnnaBridge 171:3a7713b1edbc 235 kENET_BabrInterrupt = ENET_EIR_BABR_MASK, /*!< Babbling receive error interrupt source */
AnnaBridge 171:3a7713b1edbc 236 kENET_BabtInterrupt = ENET_EIR_BABT_MASK, /*!< Babbling transmit error interrupt source */
AnnaBridge 171:3a7713b1edbc 237 kENET_GraceStopInterrupt = ENET_EIR_GRA_MASK, /*!< Graceful stop complete interrupt source */
AnnaBridge 171:3a7713b1edbc 238 kENET_TxFrameInterrupt = ENET_EIR_TXF_MASK, /*!< TX FRAME interrupt source */
AnnaBridge 171:3a7713b1edbc 239 kENET_TxBufferInterrupt = ENET_EIR_TXB_MASK, /*!< TX BUFFER interrupt source */
AnnaBridge 171:3a7713b1edbc 240 kENET_RxFrameInterrupt = ENET_EIR_RXF_MASK, /*!< RX FRAME interrupt source */
AnnaBridge 171:3a7713b1edbc 241 kENET_RxBufferInterrupt = ENET_EIR_RXB_MASK, /*!< RX BUFFER interrupt source */
AnnaBridge 171:3a7713b1edbc 242 kENET_MiiInterrupt = ENET_EIR_MII_MASK, /*!< MII interrupt source */
AnnaBridge 171:3a7713b1edbc 243 kENET_EBusERInterrupt = ENET_EIR_EBERR_MASK, /*!< Ethernet bus error interrupt source */
AnnaBridge 171:3a7713b1edbc 244 kENET_LateCollisionInterrupt = ENET_EIR_LC_MASK, /*!< Late collision interrupt source */
AnnaBridge 171:3a7713b1edbc 245 kENET_RetryLimitInterrupt = ENET_EIR_RL_MASK, /*!< Collision Retry Limit interrupt source */
AnnaBridge 171:3a7713b1edbc 246 kENET_UnderrunInterrupt = ENET_EIR_UN_MASK, /*!< Transmit FIFO underrun interrupt source */
AnnaBridge 171:3a7713b1edbc 247 kENET_PayloadRxInterrupt = ENET_EIR_PLR_MASK, /*!< Payload Receive interrupt source */
AnnaBridge 171:3a7713b1edbc 248 kENET_WakeupInterrupt = ENET_EIR_WAKEUP_MASK, /*!< WAKEUP interrupt source */
AnnaBridge 171:3a7713b1edbc 249 kENET_TsAvailInterrupt = ENET_EIR_TS_AVAIL_MASK, /*!< TS AVAIL interrupt source for PTP */
AnnaBridge 171:3a7713b1edbc 250 kENET_TsTimerInterrupt = ENET_EIR_TS_TIMER_MASK /*!< TS WRAP interrupt source for PTP */
AnnaBridge 171:3a7713b1edbc 251 } enet_interrupt_enable_t;
AnnaBridge 171:3a7713b1edbc 252
AnnaBridge 171:3a7713b1edbc 253 /*! @brief Defines the common interrupt event for callback use. */
AnnaBridge 171:3a7713b1edbc 254 typedef enum _enet_event
AnnaBridge 171:3a7713b1edbc 255 {
AnnaBridge 171:3a7713b1edbc 256 kENET_RxEvent, /*!< Receive event. */
AnnaBridge 171:3a7713b1edbc 257 kENET_TxEvent, /*!< Transmit event. */
AnnaBridge 171:3a7713b1edbc 258 kENET_ErrEvent, /*!< Error event: BABR/BABT/EBERR/LC/RL/UN/PLR . */
AnnaBridge 171:3a7713b1edbc 259 kENET_WakeUpEvent, /*!< Wake up from sleep mode event. */
AnnaBridge 171:3a7713b1edbc 260 kENET_TimeStampEvent, /*!< Time stamp event. */
AnnaBridge 171:3a7713b1edbc 261 kENET_TimeStampAvailEvent /*!< Time stamp available event.*/
AnnaBridge 171:3a7713b1edbc 262 } enet_event_t;
AnnaBridge 171:3a7713b1edbc 263
AnnaBridge 171:3a7713b1edbc 264 /*! @brief Defines the transmit accelerator configuration. */
AnnaBridge 171:3a7713b1edbc 265 typedef enum _enet_tx_accelerator
AnnaBridge 171:3a7713b1edbc 266 {
AnnaBridge 171:3a7713b1edbc 267 kENET_TxAccelIsShift16Enabled = ENET_TACC_SHIFT16_MASK, /*!< Transmit FIFO shift-16. */
AnnaBridge 171:3a7713b1edbc 268 kENET_TxAccelIpCheckEnabled = ENET_TACC_IPCHK_MASK, /*!< Insert IP header checksum. */
AnnaBridge 171:3a7713b1edbc 269 kENET_TxAccelProtoCheckEnabled = ENET_TACC_PROCHK_MASK /*!< Insert protocol checksum. */
AnnaBridge 171:3a7713b1edbc 270 } enet_tx_accelerator_t;
AnnaBridge 171:3a7713b1edbc 271
AnnaBridge 171:3a7713b1edbc 272 /*! @brief Defines the receive accelerator configuration. */
AnnaBridge 171:3a7713b1edbc 273 typedef enum _enet_rx_accelerator
AnnaBridge 171:3a7713b1edbc 274 {
AnnaBridge 171:3a7713b1edbc 275 kENET_RxAccelPadRemoveEnabled = ENET_RACC_PADREM_MASK, /*!< Padding removal for short IP frames. */
AnnaBridge 171:3a7713b1edbc 276 kENET_RxAccelIpCheckEnabled = ENET_RACC_IPDIS_MASK, /*!< Discard with wrong IP header checksum. */
AnnaBridge 171:3a7713b1edbc 277 kENET_RxAccelProtoCheckEnabled = ENET_RACC_PRODIS_MASK, /*!< Discard with wrong protocol checksum. */
AnnaBridge 171:3a7713b1edbc 278 kENET_RxAccelMacCheckEnabled = ENET_RACC_LINEDIS_MASK, /*!< Discard with Mac layer errors. */
AnnaBridge 171:3a7713b1edbc 279 kENET_RxAccelisShift16Enabled = ENET_RACC_SHIFT16_MASK /*!< Receive FIFO shift-16. */
AnnaBridge 171:3a7713b1edbc 280 } enet_rx_accelerator_t;
AnnaBridge 171:3a7713b1edbc 281
AnnaBridge 171:3a7713b1edbc 282 #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
AnnaBridge 171:3a7713b1edbc 283 /*! @brief Defines the ENET PTP message related constant. */
AnnaBridge 171:3a7713b1edbc 284 typedef enum _enet_ptp_event_type
AnnaBridge 171:3a7713b1edbc 285 {
AnnaBridge 171:3a7713b1edbc 286 kENET_PtpEventMsgType = 3U, /*!< PTP event message type. */
AnnaBridge 171:3a7713b1edbc 287 kENET_PtpSrcPortIdLen = 10U, /*!< PTP message sequence id length. */
AnnaBridge 171:3a7713b1edbc 288 kENET_PtpEventPort = 319U, /*!< PTP event port number. */
AnnaBridge 171:3a7713b1edbc 289 kENET_PtpGnrlPort = 320U /*!< PTP general port number. */
AnnaBridge 171:3a7713b1edbc 290 } enet_ptp_event_type_t;
AnnaBridge 171:3a7713b1edbc 291
AnnaBridge 171:3a7713b1edbc 292 /*! @brief Defines the IEEE 1588 PTP timer channel numbers. */
AnnaBridge 171:3a7713b1edbc 293 typedef enum _enet_ptp_timer_channel
AnnaBridge 171:3a7713b1edbc 294 {
AnnaBridge 171:3a7713b1edbc 295 kENET_PtpTimerChannel1 = 0U, /*!< IEEE 1588 PTP timer Channel 1. */
AnnaBridge 171:3a7713b1edbc 296 kENET_PtpTimerChannel2, /*!< IEEE 1588 PTP timer Channel 2. */
AnnaBridge 171:3a7713b1edbc 297 kENET_PtpTimerChannel3, /*!< IEEE 1588 PTP timer Channel 3. */
AnnaBridge 171:3a7713b1edbc 298 kENET_PtpTimerChannel4 /*!< IEEE 1588 PTP timer Channel 4. */
AnnaBridge 171:3a7713b1edbc 299 } enet_ptp_timer_channel_t;
AnnaBridge 171:3a7713b1edbc 300
AnnaBridge 171:3a7713b1edbc 301 /*! @brief Defines the capture or compare mode for IEEE 1588 PTP timer channels. */
AnnaBridge 171:3a7713b1edbc 302 typedef enum _enet_ptp_timer_channel_mode
AnnaBridge 171:3a7713b1edbc 303 {
AnnaBridge 171:3a7713b1edbc 304 kENET_PtpChannelDisable = 0U, /*!< Disable timer channel. */
AnnaBridge 171:3a7713b1edbc 305 kENET_PtpChannelRisingCapture = 1U, /*!< Input capture on rising edge. */
AnnaBridge 171:3a7713b1edbc 306 kENET_PtpChannelFallingCapture = 2U, /*!< Input capture on falling edge. */
AnnaBridge 171:3a7713b1edbc 307 kENET_PtpChannelBothCapture = 3U, /*!< Input capture on both edges. */
AnnaBridge 171:3a7713b1edbc 308 kENET_PtpChannelSoftCompare = 4U, /*!< Output compare software only. */
AnnaBridge 171:3a7713b1edbc 309 kENET_PtpChannelToggleCompare = 5U, /*!< Toggle output on compare. */
AnnaBridge 171:3a7713b1edbc 310 kENET_PtpChannelClearCompare = 6U, /*!< Clear output on compare. */
AnnaBridge 171:3a7713b1edbc 311 kENET_PtpChannelSetCompare = 7U, /*!< Set output on compare. */
AnnaBridge 171:3a7713b1edbc 312 kENET_PtpChannelClearCompareSetOverflow = 10U, /*!< Clear output on compare, set output on overflow. */
AnnaBridge 171:3a7713b1edbc 313 kENET_PtpChannelSetCompareClearOverflow = 11U, /*!< Set output on compare, clear output on overflow. */
AnnaBridge 171:3a7713b1edbc 314 kENET_PtpChannelPulseLowonCompare = 14U, /*!< Pulse output low on compare for one IEEE 1588 clock cycle. */
AnnaBridge 171:3a7713b1edbc 315 kENET_PtpChannelPulseHighonCompare = 15U /*!< Pulse output high on compare for one IEEE 1588 clock cycle. */
AnnaBridge 171:3a7713b1edbc 316 } enet_ptp_timer_channel_mode_t;
AnnaBridge 171:3a7713b1edbc 317 #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
AnnaBridge 171:3a7713b1edbc 318
AnnaBridge 171:3a7713b1edbc 319 /*! @brief Defines the receive buffer descriptor structure for the little endian system.*/
AnnaBridge 171:3a7713b1edbc 320 typedef struct _enet_rx_bd_struct
AnnaBridge 171:3a7713b1edbc 321 {
AnnaBridge 171:3a7713b1edbc 322 uint16_t length; /*!< Buffer descriptor data length. */
AnnaBridge 171:3a7713b1edbc 323 uint16_t control; /*!< Buffer descriptor control and status. */
AnnaBridge 171:3a7713b1edbc 324 uint8_t *buffer; /*!< Data buffer pointer. */
AnnaBridge 171:3a7713b1edbc 325 #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
AnnaBridge 171:3a7713b1edbc 326 uint16_t controlExtend0; /*!< Extend buffer descriptor control0. */
AnnaBridge 171:3a7713b1edbc 327 uint16_t controlExtend1; /*!< Extend buffer descriptor control1. */
AnnaBridge 171:3a7713b1edbc 328 uint16_t payloadCheckSum; /*!< Internal payload checksum. */
AnnaBridge 171:3a7713b1edbc 329 uint8_t headerLength; /*!< Header length. */
AnnaBridge 171:3a7713b1edbc 330 uint8_t protocolTyte; /*!< Protocol type. */
AnnaBridge 171:3a7713b1edbc 331 uint16_t reserved0;
AnnaBridge 171:3a7713b1edbc 332 uint16_t controlExtend2; /*!< Extend buffer descriptor control2. */
AnnaBridge 171:3a7713b1edbc 333 uint32_t timestamp; /*!< Timestamp. */
AnnaBridge 171:3a7713b1edbc 334 uint16_t reserved1;
AnnaBridge 171:3a7713b1edbc 335 uint16_t reserved2;
AnnaBridge 171:3a7713b1edbc 336 uint16_t reserved3;
AnnaBridge 171:3a7713b1edbc 337 uint16_t reserved4;
AnnaBridge 171:3a7713b1edbc 338 #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
AnnaBridge 171:3a7713b1edbc 339 } enet_rx_bd_struct_t;
AnnaBridge 171:3a7713b1edbc 340
AnnaBridge 171:3a7713b1edbc 341 /*! @brief Defines the enhanced transmit buffer descriptor structure for the little endian system. */
AnnaBridge 171:3a7713b1edbc 342 typedef struct _enet_tx_bd_struct
AnnaBridge 171:3a7713b1edbc 343 {
AnnaBridge 171:3a7713b1edbc 344 uint16_t length; /*!< Buffer descriptor data length. */
AnnaBridge 171:3a7713b1edbc 345 uint16_t control; /*!< Buffer descriptor control and status. */
AnnaBridge 171:3a7713b1edbc 346 uint8_t *buffer; /*!< Data buffer pointer. */
AnnaBridge 171:3a7713b1edbc 347 #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
AnnaBridge 171:3a7713b1edbc 348 uint16_t controlExtend0; /*!< Extend buffer descriptor control0. */
AnnaBridge 171:3a7713b1edbc 349 uint16_t controlExtend1; /*!< Extend buffer descriptor control1. */
AnnaBridge 171:3a7713b1edbc 350 uint16_t reserved0;
AnnaBridge 171:3a7713b1edbc 351 uint16_t reserved1;
AnnaBridge 171:3a7713b1edbc 352 uint16_t reserved2;
AnnaBridge 171:3a7713b1edbc 353 uint16_t controlExtend2; /*!< Extend buffer descriptor control2. */
AnnaBridge 171:3a7713b1edbc 354 uint32_t timestamp; /*!< Timestamp. */
AnnaBridge 171:3a7713b1edbc 355 uint16_t reserved3;
AnnaBridge 171:3a7713b1edbc 356 uint16_t reserved4;
AnnaBridge 171:3a7713b1edbc 357 uint16_t reserved5;
AnnaBridge 171:3a7713b1edbc 358 uint16_t reserved6;
AnnaBridge 171:3a7713b1edbc 359 #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
AnnaBridge 171:3a7713b1edbc 360 } enet_tx_bd_struct_t;
AnnaBridge 171:3a7713b1edbc 361
AnnaBridge 171:3a7713b1edbc 362 /*! @brief Defines the ENET data error statistic structure. */
AnnaBridge 171:3a7713b1edbc 363 typedef struct _enet_data_error_stats
AnnaBridge 171:3a7713b1edbc 364 {
AnnaBridge 171:3a7713b1edbc 365 uint32_t statsRxLenGreaterErr; /*!< Receive length greater than RCR[MAX_FL]. */
AnnaBridge 171:3a7713b1edbc 366 uint32_t statsRxAlignErr; /*!< Receive non-octet alignment/ */
AnnaBridge 171:3a7713b1edbc 367 uint32_t statsRxFcsErr; /*!< Receive CRC error. */
AnnaBridge 171:3a7713b1edbc 368 uint32_t statsRxOverRunErr; /*!< Receive over run. */
AnnaBridge 171:3a7713b1edbc 369 uint32_t statsRxTruncateErr; /*!< Receive truncate. */
AnnaBridge 171:3a7713b1edbc 370 #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
AnnaBridge 171:3a7713b1edbc 371 uint32_t statsRxProtocolChecksumErr; /*!< Receive protocol checksum error. */
AnnaBridge 171:3a7713b1edbc 372 uint32_t statsRxIpHeadChecksumErr; /*!< Receive IP header checksum error. */
AnnaBridge 171:3a7713b1edbc 373 uint32_t statsRxMacErr; /*!< Receive Mac error. */
AnnaBridge 171:3a7713b1edbc 374 uint32_t statsRxPhyErr; /*!< Receive PHY error. */
AnnaBridge 171:3a7713b1edbc 375 uint32_t statsRxCollisionErr; /*!< Receive collision. */
AnnaBridge 171:3a7713b1edbc 376 uint32_t statsTxErr; /*!< The error happen when transmit the frame. */
AnnaBridge 171:3a7713b1edbc 377 uint32_t statsTxFrameErr; /*!< The transmit frame is error. */
AnnaBridge 171:3a7713b1edbc 378 uint32_t statsTxOverFlowErr; /*!< Transmit overflow. */
AnnaBridge 171:3a7713b1edbc 379 uint32_t statsTxLateCollisionErr; /*!< Transmit late collision. */
AnnaBridge 171:3a7713b1edbc 380 uint32_t statsTxExcessCollisionErr; /*!< Transmit excess collision.*/
AnnaBridge 171:3a7713b1edbc 381 uint32_t statsTxUnderFlowErr; /*!< Transmit under flow error. */
AnnaBridge 171:3a7713b1edbc 382 uint32_t statsTxTsErr; /*!< Transmit time stamp error. */
AnnaBridge 171:3a7713b1edbc 383 #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
AnnaBridge 171:3a7713b1edbc 384 } enet_data_error_stats_t;
AnnaBridge 171:3a7713b1edbc 385
AnnaBridge 171:3a7713b1edbc 386 /*! @brief Defines the receive buffer descriptor configuration structure.
AnnaBridge 171:3a7713b1edbc 387 *
AnnaBridge 171:3a7713b1edbc 388 * Note that for the internal DMA requirements, the buffers have a corresponding alignment requirements.
AnnaBridge 171:3a7713b1edbc 389 * 1. The aligned receive and transmit buffer size must be evenly divisible by ENET_BUFF_ALIGNMENT.
AnnaBridge 171:3a7713b1edbc 390 * when the data buffers are in cacheable region when cache is enabled, all those size should be
AnnaBridge 171:3a7713b1edbc 391 * aligned to the maximum value of "ENET_BUFF_ALIGNMENT" and the cache line size.
AnnaBridge 171:3a7713b1edbc 392 * 2. The aligned transmit and receive buffer descriptor start address must be at
AnnaBridge 171:3a7713b1edbc 393 * least 64 bit aligned. However, it's recommended to be evenly divisible by ENET_BUFF_ALIGNMENT.
AnnaBridge 171:3a7713b1edbc 394 * buffer descriptors should be put in non-cacheable region when cache is enabled.
AnnaBridge 171:3a7713b1edbc 395 * 3. The aligned transmit and receive data buffer start address must be evenly divisible by ENET_BUFF_ALIGNMENT.
AnnaBridge 171:3a7713b1edbc 396 * Receive buffers should be continuous with the total size equal to "rxBdNumber * rxBuffSizeAlign".
AnnaBridge 171:3a7713b1edbc 397 * Transmit buffers should be continuous with the total size equal to "txBdNumber * txBuffSizeAlign".
AnnaBridge 171:3a7713b1edbc 398 * when the data buffers are in cacheable region when cache is enabled, all those size should be
AnnaBridge 171:3a7713b1edbc 399 * aligned to the maximum value of "ENET_BUFF_ALIGNMENT" and the cache line size.
AnnaBridge 171:3a7713b1edbc 400 */
AnnaBridge 171:3a7713b1edbc 401 typedef struct _enet_buffer_config
AnnaBridge 171:3a7713b1edbc 402 {
AnnaBridge 171:3a7713b1edbc 403 uint16_t rxBdNumber; /*!< Receive buffer descriptor number. */
AnnaBridge 171:3a7713b1edbc 404 uint16_t txBdNumber; /*!< Transmit buffer descriptor number. */
AnnaBridge 171:3a7713b1edbc 405 uint32_t rxBuffSizeAlign; /*!< Aligned receive data buffer size. */
AnnaBridge 171:3a7713b1edbc 406 uint32_t txBuffSizeAlign; /*!< Aligned transmit data buffer size. */
AnnaBridge 171:3a7713b1edbc 407 volatile enet_rx_bd_struct_t *rxBdStartAddrAlign; /*!< Aligned receive buffer descriptor start address. */
AnnaBridge 171:3a7713b1edbc 408 volatile enet_tx_bd_struct_t *txBdStartAddrAlign; /*!< Aligned transmit buffer descriptor start address. */
AnnaBridge 171:3a7713b1edbc 409 uint8_t *rxBufferAlign; /*!< Receive data buffer start address. */
AnnaBridge 171:3a7713b1edbc 410 uint8_t *txBufferAlign; /*!< Transmit data buffer start address. */
AnnaBridge 171:3a7713b1edbc 411 } enet_buffer_config_t;
AnnaBridge 171:3a7713b1edbc 412
AnnaBridge 171:3a7713b1edbc 413 #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
AnnaBridge 171:3a7713b1edbc 414 /*! @brief Defines the ENET PTP time stamp structure. */
AnnaBridge 171:3a7713b1edbc 415 typedef struct _enet_ptp_time
AnnaBridge 171:3a7713b1edbc 416 {
AnnaBridge 171:3a7713b1edbc 417 uint64_t second; /*!< Second. */
AnnaBridge 171:3a7713b1edbc 418 uint32_t nanosecond; /*!< Nanosecond. */
AnnaBridge 171:3a7713b1edbc 419 } enet_ptp_time_t;
AnnaBridge 171:3a7713b1edbc 420
AnnaBridge 171:3a7713b1edbc 421 /*! @brief Defines the structure for the ENET PTP message data and timestamp data.*/
AnnaBridge 171:3a7713b1edbc 422 typedef struct _enet_ptp_time_data
AnnaBridge 171:3a7713b1edbc 423 {
AnnaBridge 171:3a7713b1edbc 424 uint8_t version; /*!< PTP version. */
AnnaBridge 171:3a7713b1edbc 425 uint8_t sourcePortId[kENET_PtpSrcPortIdLen]; /*!< PTP source port ID. */
AnnaBridge 171:3a7713b1edbc 426 uint16_t sequenceId; /*!< PTP sequence ID. */
AnnaBridge 171:3a7713b1edbc 427 uint8_t messageType; /*!< PTP message type. */
AnnaBridge 171:3a7713b1edbc 428 enet_ptp_time_t timeStamp; /*!< PTP timestamp. */
AnnaBridge 171:3a7713b1edbc 429 } enet_ptp_time_data_t;
AnnaBridge 171:3a7713b1edbc 430
AnnaBridge 171:3a7713b1edbc 431 /*! @brief Defines the ENET PTP ring buffer structure for the PTP message timestamp store.*/
AnnaBridge 171:3a7713b1edbc 432 typedef struct _enet_ptp_time_data_ring
AnnaBridge 171:3a7713b1edbc 433 {
AnnaBridge 171:3a7713b1edbc 434 uint32_t front; /*!< The first index of the ring. */
AnnaBridge 171:3a7713b1edbc 435 uint32_t end; /*!< The end index of the ring. */
AnnaBridge 171:3a7713b1edbc 436 uint32_t size; /*!< The size of the ring. */
AnnaBridge 171:3a7713b1edbc 437 enet_ptp_time_data_t *ptpTsData; /*!< PTP message data structure. */
AnnaBridge 171:3a7713b1edbc 438 } enet_ptp_time_data_ring_t;
AnnaBridge 171:3a7713b1edbc 439
AnnaBridge 171:3a7713b1edbc 440 /*! @brief Defines the ENET PTP configuration structure. */
AnnaBridge 171:3a7713b1edbc 441 typedef struct _enet_ptp_config
AnnaBridge 171:3a7713b1edbc 442 {
AnnaBridge 171:3a7713b1edbc 443 uint8_t ptpTsRxBuffNum; /*!< Receive 1588 timestamp buffer number*/
AnnaBridge 171:3a7713b1edbc 444 uint8_t ptpTsTxBuffNum; /*!< Transmit 1588 timestamp buffer number*/
AnnaBridge 171:3a7713b1edbc 445 enet_ptp_time_data_t *rxPtpTsData; /*!< The start address of 1588 receive timestamp buffers */
AnnaBridge 171:3a7713b1edbc 446 enet_ptp_time_data_t *txPtpTsData; /*!< The start address of 1588 transmit timestamp buffers */
AnnaBridge 171:3a7713b1edbc 447 enet_ptp_timer_channel_t channel; /*!< Used for ERRATA_2579: the PTP 1588 timer channel for time interrupt. */
AnnaBridge 171:3a7713b1edbc 448 uint32_t ptp1588ClockSrc_Hz; /*!< The clock source of the PTP 1588 timer. */
AnnaBridge 171:3a7713b1edbc 449 } enet_ptp_config_t;
AnnaBridge 171:3a7713b1edbc 450 #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
AnnaBridge 171:3a7713b1edbc 451
AnnaBridge 171:3a7713b1edbc 452 #if defined (FSL_FEATURE_ENET_HAS_INTERRUPT_COALESCE) && FSL_FEATURE_ENET_HAS_INTERRUPT_COALESCE
AnnaBridge 171:3a7713b1edbc 453 /*! @brief Defines the interrupt coalescing configure structure. */
AnnaBridge 171:3a7713b1edbc 454 typedef struct _enet_intcoalesce_config
AnnaBridge 171:3a7713b1edbc 455 {
AnnaBridge 171:3a7713b1edbc 456 uint8_t txCoalesceFrameCount[FSL_FEATURE_ENET_QUEUE]; /*!< Transmit interrupt coalescing frame count threshold. */
AnnaBridge 171:3a7713b1edbc 457 uint16_t txCoalesceTimeCount[FSL_FEATURE_ENET_QUEUE]; /*!< Transmit interrupt coalescing timer count threshold. */
AnnaBridge 171:3a7713b1edbc 458 uint8_t rxCoalesceFrameCount[FSL_FEATURE_ENET_QUEUE]; /*!< Receive interrupt coalescing frame count threshold. */
AnnaBridge 171:3a7713b1edbc 459 uint16_t rxCoalesceTimeCount[FSL_FEATURE_ENET_QUEUE]; /*!< Receive interrupt coalescing timer count threshold. */
AnnaBridge 171:3a7713b1edbc 460 } enet_intcoalesce_config_t;
AnnaBridge 171:3a7713b1edbc 461 #endif /* FSL_FEATURE_ENET_HAS_INTERRUPT_COALESCE */
AnnaBridge 171:3a7713b1edbc 462
AnnaBridge 171:3a7713b1edbc 463 /*! @brief Defines the basic configuration structure for the ENET device.
AnnaBridge 171:3a7713b1edbc 464 *
AnnaBridge 171:3a7713b1edbc 465 * Note:
AnnaBridge 171:3a7713b1edbc 466 * 1. macSpecialConfig is used for a special control configuration, a logical OR of
AnnaBridge 171:3a7713b1edbc 467 * "enet_special_control_flag_t". For a special configuration for MAC,
AnnaBridge 171:3a7713b1edbc 468 * set this parameter to 0.
AnnaBridge 171:3a7713b1edbc 469 * 2. txWatermark is used for a cut-through operation. It is in steps of 64 bytes.
AnnaBridge 171:3a7713b1edbc 470 * 0/1 - 64 bytes written to TX FIFO before transmission of a frame begins.
AnnaBridge 171:3a7713b1edbc 471 * 2 - 128 bytes written to TX FIFO ....
AnnaBridge 171:3a7713b1edbc 472 * 3 - 192 bytes written to TX FIFO ....
AnnaBridge 171:3a7713b1edbc 473 * The maximum of txWatermark is 0x2F - 4032 bytes written to TX FIFO.
AnnaBridge 171:3a7713b1edbc 474 * txWatermark allows minimizing the transmit latency to set the txWatermark to 0 or 1
AnnaBridge 171:3a7713b1edbc 475 * or for larger bus access latency 3 or larger due to contention for the system bus.
AnnaBridge 171:3a7713b1edbc 476 * 3. rxFifoFullThreshold is similar to the txWatermark for cut-through operation in RX.
AnnaBridge 171:3a7713b1edbc 477 * It is in 64-bit words. The minimum is ENET_FIFO_MIN_RX_FULL and the maximum is 0xFF.
AnnaBridge 171:3a7713b1edbc 478 * If the end of the frame is stored in FIFO and the frame size if smaller than the
AnnaBridge 171:3a7713b1edbc 479 * txWatermark, the frame is still transmitted. The rule is the
AnnaBridge 171:3a7713b1edbc 480 * same for rxFifoFullThreshold in the receive direction.
AnnaBridge 171:3a7713b1edbc 481 * 4. When "kENET_ControlFlowControlEnable" is set in the macSpecialConfig, ensure
AnnaBridge 171:3a7713b1edbc 482 * that the pauseDuration, rxFifoEmptyThreshold, and rxFifoStatEmptyThreshold
AnnaBridge 171:3a7713b1edbc 483 * are set for flow control enabled case.
AnnaBridge 171:3a7713b1edbc 484 * 5. When "kENET_ControlStoreAndFwdDisabled" is set in the macSpecialConfig, ensure
AnnaBridge 171:3a7713b1edbc 485 * that the rxFifoFullThreshold and txFifoWatermark are set for store and forward disable.
AnnaBridge 171:3a7713b1edbc 486 * 6. The rxAccelerConfig and txAccelerConfig default setting with 0 - accelerator
AnnaBridge 171:3a7713b1edbc 487 * are disabled. The "enet_tx_accelerator_t" and "enet_rx_accelerator_t" are
AnnaBridge 171:3a7713b1edbc 488 * recommended to be used to enable the transmit and receive accelerator.
AnnaBridge 171:3a7713b1edbc 489 * After the accelerators are enabled, the store and forward feature should be enabled.
AnnaBridge 171:3a7713b1edbc 490 * As a result, kENET_ControlStoreAndFwdDisabled should not be set.
AnnaBridge 171:3a7713b1edbc 491 */
AnnaBridge 171:3a7713b1edbc 492 typedef struct _enet_config
AnnaBridge 171:3a7713b1edbc 493 {
AnnaBridge 171:3a7713b1edbc 494 uint32_t macSpecialConfig; /*!< Mac special configuration. A logical OR of "enet_special_control_flag_t". */
AnnaBridge 171:3a7713b1edbc 495 uint32_t interrupt; /*!< Mac interrupt source. A logical OR of "enet_interrupt_enable_t". */
AnnaBridge 171:3a7713b1edbc 496 uint16_t rxMaxFrameLen; /*!< Receive maximum frame length. */
AnnaBridge 171:3a7713b1edbc 497 enet_mii_mode_t miiMode; /*!< MII mode. */
AnnaBridge 171:3a7713b1edbc 498 enet_mii_speed_t miiSpeed; /*!< MII Speed. */
AnnaBridge 171:3a7713b1edbc 499 enet_mii_duplex_t miiDuplex; /*!< MII duplex. */
AnnaBridge 171:3a7713b1edbc 500 uint8_t rxAccelerConfig; /*!< Receive accelerator, A logical OR of "enet_rx_accelerator_t". */
AnnaBridge 171:3a7713b1edbc 501 uint8_t txAccelerConfig; /*!< Transmit accelerator, A logical OR of "enet_rx_accelerator_t". */
AnnaBridge 171:3a7713b1edbc 502 uint16_t pauseDuration; /*!< For flow control enabled case: Pause duration. */
AnnaBridge 171:3a7713b1edbc 503 uint8_t rxFifoEmptyThreshold; /*!< For flow control enabled case: when RX FIFO level reaches this value,
AnnaBridge 171:3a7713b1edbc 504 it makes MAC generate XOFF pause frame. */
AnnaBridge 171:3a7713b1edbc 505 #if defined (FSL_FEATURE_ENET_HAS_RECEIVE_STATUS_THRESHOLD) && FSL_FEATURE_ENET_HAS_RECEIVE_STATUS_THRESHOLD
AnnaBridge 171:3a7713b1edbc 506 uint8_t rxFifoStatEmptyThreshold; /*!< For flow control enabled case: number of frames in the receive FIFO,
AnnaBridge 171:3a7713b1edbc 507 independent of size, that can be accept. If the limit is reached, reception
AnnaBridge 171:3a7713b1edbc 508 continues and a pause frame is triggered. */
AnnaBridge 171:3a7713b1edbc 509 #endif /* FSL_FEATURE_ENET_HAS_RECEIVE_STATUS_THRESHOLD */
AnnaBridge 171:3a7713b1edbc 510 uint8_t rxFifoFullThreshold; /*!< For store and forward disable case, the data required in RX FIFO to notify
AnnaBridge 171:3a7713b1edbc 511 the MAC receive ready status. */
AnnaBridge 171:3a7713b1edbc 512 uint8_t txFifoWatermark; /*!< For store and forward disable case, the data required in TX FIFO
AnnaBridge 171:3a7713b1edbc 513 before a frame transmit start. */
AnnaBridge 171:3a7713b1edbc 514 #if defined (FSL_FEATURE_ENET_HAS_INTERRUPT_COALESCE) && FSL_FEATURE_ENET_HAS_INTERRUPT_COALESCE
AnnaBridge 171:3a7713b1edbc 515 enet_intcoalesce_config_t *intCoalesceCfg; /* If the interrupt coalsecence is not required in the ring n(0,1,2), please set
AnnaBridge 171:3a7713b1edbc 516 to NULL. */
AnnaBridge 171:3a7713b1edbc 517 #endif /* FSL_FEATURE_ENET_HAS_INTERRUPT_COALESCE */
AnnaBridge 171:3a7713b1edbc 518 } enet_config_t;
AnnaBridge 171:3a7713b1edbc 519
AnnaBridge 171:3a7713b1edbc 520 /* Forward declaration of the handle typedef. */
AnnaBridge 171:3a7713b1edbc 521 typedef struct _enet_handle enet_handle_t;
AnnaBridge 171:3a7713b1edbc 522
AnnaBridge 171:3a7713b1edbc 523 /*! @brief ENET callback function. */
AnnaBridge 171:3a7713b1edbc 524 typedef void (*enet_callback_t)(ENET_Type *base, enet_handle_t *handle, enet_event_t event, void *userData);
AnnaBridge 171:3a7713b1edbc 525
AnnaBridge 171:3a7713b1edbc 526 /*! @brief Defines the ENET handler structure. */
AnnaBridge 171:3a7713b1edbc 527 struct _enet_handle
AnnaBridge 171:3a7713b1edbc 528 {
AnnaBridge 171:3a7713b1edbc 529 volatile enet_rx_bd_struct_t *rxBdBase; /*!< Receive buffer descriptor base address pointer. */
AnnaBridge 171:3a7713b1edbc 530 volatile enet_rx_bd_struct_t *rxBdCurrent; /*!< The current available receive buffer descriptor pointer. */
AnnaBridge 171:3a7713b1edbc 531 volatile enet_tx_bd_struct_t *txBdBase; /*!< Transmit buffer descriptor base address pointer. */
AnnaBridge 171:3a7713b1edbc 532 volatile enet_tx_bd_struct_t *txBdCurrent; /*!< The current available transmit buffer descriptor pointer. */
AnnaBridge 171:3a7713b1edbc 533 volatile enet_tx_bd_struct_t *txBdDirty; /*!< The dirty transmit buffer descriptor needed to be updated from. */
AnnaBridge 171:3a7713b1edbc 534 uint32_t rxBuffSizeAlign; /*!< Receive buffer size alignment. */
AnnaBridge 171:3a7713b1edbc 535 uint32_t txBuffSizeAlign; /*!< Transmit buffer size alignment. */
AnnaBridge 171:3a7713b1edbc 536 enet_callback_t callback; /*!< Callback function. */
AnnaBridge 171:3a7713b1edbc 537 void *userData; /*!< Callback function parameter.*/
AnnaBridge 171:3a7713b1edbc 538 #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
AnnaBridge 171:3a7713b1edbc 539 volatile enet_tx_bd_struct_t *txBdDirtyStatic; /*!< The dirty transmit buffer descriptor for error static update. */
AnnaBridge 171:3a7713b1edbc 540 volatile enet_tx_bd_struct_t *txBdDirtyTime; /*!< The dirty transmit buffer descriptor for time stamp update. */
AnnaBridge 171:3a7713b1edbc 541 uint64_t msTimerSecond; /*!< The second for Master PTP timer .*/
AnnaBridge 171:3a7713b1edbc 542 enet_ptp_time_data_ring_t rxPtpTsDataRing; /*!< Receive PTP 1588 time stamp data ring buffer. */
AnnaBridge 171:3a7713b1edbc 543 enet_ptp_time_data_ring_t txPtpTsDataRing; /*!< Transmit PTP 1588 time stamp data ring buffer. */
AnnaBridge 171:3a7713b1edbc 544 #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
AnnaBridge 171:3a7713b1edbc 545 };
AnnaBridge 171:3a7713b1edbc 546
AnnaBridge 171:3a7713b1edbc 547 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 548 * API
AnnaBridge 171:3a7713b1edbc 549 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 550
AnnaBridge 171:3a7713b1edbc 551 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 552 extern "C" {
AnnaBridge 171:3a7713b1edbc 553 #endif
AnnaBridge 171:3a7713b1edbc 554
AnnaBridge 171:3a7713b1edbc 555 /*!
AnnaBridge 171:3a7713b1edbc 556 * @name Initialization and de-initialization
AnnaBridge 171:3a7713b1edbc 557 * @{
AnnaBridge 171:3a7713b1edbc 558 */
AnnaBridge 171:3a7713b1edbc 559
AnnaBridge 171:3a7713b1edbc 560 /*!
AnnaBridge 171:3a7713b1edbc 561 * @brief Gets the ENET default configuration structure.
AnnaBridge 171:3a7713b1edbc 562 *
AnnaBridge 171:3a7713b1edbc 563 * The purpose of this API is to get the default ENET MAC controller
AnnaBridge 171:3a7713b1edbc 564 * configuration structure for ENET_Init(). Users may use the initialized
AnnaBridge 171:3a7713b1edbc 565 * structure unchanged in ENET_Init() or modify fields of the
AnnaBridge 171:3a7713b1edbc 566 * structure before calling ENET_Init().
AnnaBridge 171:3a7713b1edbc 567 * This is an example.
AnnaBridge 171:3a7713b1edbc 568 @code
AnnaBridge 171:3a7713b1edbc 569 enet_config_t config;
AnnaBridge 171:3a7713b1edbc 570 ENET_GetDefaultConfig(&config);
AnnaBridge 171:3a7713b1edbc 571 @endcode
AnnaBridge 171:3a7713b1edbc 572 * @param config The ENET mac controller configuration structure pointer.
AnnaBridge 171:3a7713b1edbc 573 */
AnnaBridge 171:3a7713b1edbc 574 void ENET_GetDefaultConfig(enet_config_t *config);
AnnaBridge 171:3a7713b1edbc 575
AnnaBridge 171:3a7713b1edbc 576 /*!
AnnaBridge 171:3a7713b1edbc 577 * @brief Initializes the ENET module.
AnnaBridge 171:3a7713b1edbc 578 *
AnnaBridge 171:3a7713b1edbc 579 * This function ungates the module clock and initializes it with the ENET configuration.
AnnaBridge 171:3a7713b1edbc 580 *
AnnaBridge 171:3a7713b1edbc 581 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 582 * @param handle ENET handler pointer.
AnnaBridge 171:3a7713b1edbc 583 * @param config ENET Mac configuration structure pointer.
AnnaBridge 171:3a7713b1edbc 584 * The "enet_config_t" type mac configuration return from ENET_GetDefaultConfig
AnnaBridge 171:3a7713b1edbc 585 * can be used directly. It is also possible to verify the Mac configuration using other methods.
AnnaBridge 171:3a7713b1edbc 586 * @param bufferConfig ENET buffer configuration structure pointer.
AnnaBridge 171:3a7713b1edbc 587 * The buffer configuration should be prepared for ENET Initialization.
AnnaBridge 171:3a7713b1edbc 588 * @param macAddr ENET mac address of the Ethernet device. This Mac address should be
AnnaBridge 171:3a7713b1edbc 589 * provided.
AnnaBridge 171:3a7713b1edbc 590 * @param srcClock_Hz The internal module clock source for MII clock.
AnnaBridge 171:3a7713b1edbc 591 *
AnnaBridge 171:3a7713b1edbc 592 * @note ENET has two buffer descriptors legacy buffer descriptors and
AnnaBridge 171:3a7713b1edbc 593 * enhanced IEEE 1588 buffer descriptors. The legacy descriptor is used by default. To
AnnaBridge 171:3a7713b1edbc 594 * use the IEEE 1588 feature, use the enhanced IEEE 1588 buffer descriptor
AnnaBridge 171:3a7713b1edbc 595 * by defining "ENET_ENHANCEDBUFFERDESCRIPTOR_MODE" and calling ENET_Ptp1588Configure()
AnnaBridge 171:3a7713b1edbc 596 * to configure the 1588 feature and related buffers after calling ENET_Init().
AnnaBridge 171:3a7713b1edbc 597 */
AnnaBridge 171:3a7713b1edbc 598 void ENET_Init(ENET_Type *base,
AnnaBridge 171:3a7713b1edbc 599 enet_handle_t *handle,
AnnaBridge 171:3a7713b1edbc 600 const enet_config_t *config,
AnnaBridge 171:3a7713b1edbc 601 const enet_buffer_config_t *bufferConfig,
AnnaBridge 171:3a7713b1edbc 602 uint8_t *macAddr,
AnnaBridge 171:3a7713b1edbc 603 uint32_t srcClock_Hz);
AnnaBridge 171:3a7713b1edbc 604 /*!
AnnaBridge 171:3a7713b1edbc 605 * @brief Deinitializes the ENET module.
AnnaBridge 171:3a7713b1edbc 606
AnnaBridge 171:3a7713b1edbc 607 * This function gates the module clock, clears ENET interrupts, and disables the ENET module.
AnnaBridge 171:3a7713b1edbc 608 *
AnnaBridge 171:3a7713b1edbc 609 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 610 */
AnnaBridge 171:3a7713b1edbc 611 void ENET_Deinit(ENET_Type *base);
AnnaBridge 171:3a7713b1edbc 612
AnnaBridge 171:3a7713b1edbc 613 /*!
AnnaBridge 171:3a7713b1edbc 614 * @brief Resets the ENET module.
AnnaBridge 171:3a7713b1edbc 615 *
AnnaBridge 171:3a7713b1edbc 616 * This function restores the ENET module to the reset state.
AnnaBridge 171:3a7713b1edbc 617 * Note that this function sets all registers to the
AnnaBridge 171:3a7713b1edbc 618 * reset state. As a result, the ENET module can't work after calling this function.
AnnaBridge 171:3a7713b1edbc 619 *
AnnaBridge 171:3a7713b1edbc 620 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 621 */
AnnaBridge 171:3a7713b1edbc 622 static inline void ENET_Reset(ENET_Type *base)
AnnaBridge 171:3a7713b1edbc 623 {
AnnaBridge 171:3a7713b1edbc 624 base->ECR |= ENET_ECR_RESET_MASK;
AnnaBridge 171:3a7713b1edbc 625 }
AnnaBridge 171:3a7713b1edbc 626
AnnaBridge 171:3a7713b1edbc 627 /* @} */
AnnaBridge 171:3a7713b1edbc 628
AnnaBridge 171:3a7713b1edbc 629 /*!
AnnaBridge 171:3a7713b1edbc 630 * @name MII interface operation
AnnaBridge 171:3a7713b1edbc 631 * @{
AnnaBridge 171:3a7713b1edbc 632 */
AnnaBridge 171:3a7713b1edbc 633
AnnaBridge 171:3a7713b1edbc 634 /*!
AnnaBridge 171:3a7713b1edbc 635 * @brief Sets the ENET MII speed and duplex.
AnnaBridge 171:3a7713b1edbc 636 *
AnnaBridge 171:3a7713b1edbc 637 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 638 * @param speed The speed of the RMII mode.
AnnaBridge 171:3a7713b1edbc 639 * @param duplex The duplex of the RMII mode.
AnnaBridge 171:3a7713b1edbc 640 */
AnnaBridge 171:3a7713b1edbc 641 void ENET_SetMII(ENET_Type *base, enet_mii_speed_t speed, enet_mii_duplex_t duplex);
AnnaBridge 171:3a7713b1edbc 642
AnnaBridge 171:3a7713b1edbc 643 /*!
AnnaBridge 171:3a7713b1edbc 644 * @brief Sets the ENET SMI (serial management interface) - MII management interface.
AnnaBridge 171:3a7713b1edbc 645 *
AnnaBridge 171:3a7713b1edbc 646 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 647 * @param srcClock_Hz This is the ENET module clock frequency. Normally it's the system clock. See clock distribution.
AnnaBridge 171:3a7713b1edbc 648 * @param isPreambleDisabled The preamble disable flag.
AnnaBridge 171:3a7713b1edbc 649 * - true Enables the preamble.
AnnaBridge 171:3a7713b1edbc 650 * - false Disables the preamble.
AnnaBridge 171:3a7713b1edbc 651 */
AnnaBridge 171:3a7713b1edbc 652 void ENET_SetSMI(ENET_Type *base, uint32_t srcClock_Hz, bool isPreambleDisabled);
AnnaBridge 171:3a7713b1edbc 653
AnnaBridge 171:3a7713b1edbc 654 /*!
AnnaBridge 171:3a7713b1edbc 655 * @brief Gets the ENET SMI- MII management interface configuration.
AnnaBridge 171:3a7713b1edbc 656 *
AnnaBridge 171:3a7713b1edbc 657 * This API is used to get the SMI configuration to check whether the MII management
AnnaBridge 171:3a7713b1edbc 658 * interface has been set.
AnnaBridge 171:3a7713b1edbc 659 *
AnnaBridge 171:3a7713b1edbc 660 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 661 * @return The SMI setup status true or false.
AnnaBridge 171:3a7713b1edbc 662 */
AnnaBridge 171:3a7713b1edbc 663 static inline bool ENET_GetSMI(ENET_Type *base)
AnnaBridge 171:3a7713b1edbc 664 {
AnnaBridge 171:3a7713b1edbc 665 return (0 != (base->MSCR & 0x7E));
AnnaBridge 171:3a7713b1edbc 666 }
AnnaBridge 171:3a7713b1edbc 667
AnnaBridge 171:3a7713b1edbc 668 /*!
AnnaBridge 171:3a7713b1edbc 669 * @brief Reads data from the PHY register through an SMI interface.
AnnaBridge 171:3a7713b1edbc 670 *
AnnaBridge 171:3a7713b1edbc 671 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 672 * @return The data read from PHY
AnnaBridge 171:3a7713b1edbc 673 */
AnnaBridge 171:3a7713b1edbc 674 static inline uint32_t ENET_ReadSMIData(ENET_Type *base)
AnnaBridge 171:3a7713b1edbc 675 {
AnnaBridge 171:3a7713b1edbc 676 return (uint32_t)((base->MMFR & ENET_MMFR_DATA_MASK) >> ENET_MMFR_DATA_SHIFT);
AnnaBridge 171:3a7713b1edbc 677 }
AnnaBridge 171:3a7713b1edbc 678
AnnaBridge 171:3a7713b1edbc 679 /*!
AnnaBridge 171:3a7713b1edbc 680 * @brief Starts an SMI (Serial Management Interface) read command.
AnnaBridge 171:3a7713b1edbc 681 *
AnnaBridge 171:3a7713b1edbc 682 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 683 * @param phyAddr The PHY address.
AnnaBridge 171:3a7713b1edbc 684 * @param phyReg The PHY register.
AnnaBridge 171:3a7713b1edbc 685 * @param operation The read operation.
AnnaBridge 171:3a7713b1edbc 686 */
AnnaBridge 171:3a7713b1edbc 687 void ENET_StartSMIRead(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, enet_mii_read_t operation);
AnnaBridge 171:3a7713b1edbc 688
AnnaBridge 171:3a7713b1edbc 689 /*!
AnnaBridge 171:3a7713b1edbc 690 * @brief Starts an SMI write command.
AnnaBridge 171:3a7713b1edbc 691 *
AnnaBridge 171:3a7713b1edbc 692 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 693 * @param phyAddr The PHY address.
AnnaBridge 171:3a7713b1edbc 694 * @param phyReg The PHY register.
AnnaBridge 171:3a7713b1edbc 695 * @param operation The write operation.
AnnaBridge 171:3a7713b1edbc 696 * @param data The data written to PHY.
AnnaBridge 171:3a7713b1edbc 697 */
AnnaBridge 171:3a7713b1edbc 698 void ENET_StartSMIWrite(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, enet_mii_write_t operation, uint32_t data);
AnnaBridge 171:3a7713b1edbc 699
AnnaBridge 171:3a7713b1edbc 700 #if defined (FSL_FEATURE_ENET_HAS_EXTEND_MDIO) && FSL_FEATURE_ENET_HAS_EXTEND_MDIO
AnnaBridge 171:3a7713b1edbc 701 /*!
AnnaBridge 171:3a7713b1edbc 702 * @brief Starts the extended IEEE802.3 Clause 45 MDIO format SMI read command.
AnnaBridge 171:3a7713b1edbc 703 *
AnnaBridge 171:3a7713b1edbc 704 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 705 * @param phyAddr The PHY address.
AnnaBridge 171:3a7713b1edbc 706 * @param phyReg The PHY register. For MDIO IEEE802.3 Clause 45,
AnnaBridge 171:3a7713b1edbc 707 * the phyReg is a 21-bits combination of the devaddr (5 bits device address)
AnnaBridge 171:3a7713b1edbc 708 * and the regAddr (16 bits phy register): phyReg = (devaddr << 16) | regAddr.
AnnaBridge 171:3a7713b1edbc 709 */
AnnaBridge 171:3a7713b1edbc 710 void ENET_StartExtC45SMIRead(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg);
AnnaBridge 171:3a7713b1edbc 711
AnnaBridge 171:3a7713b1edbc 712 /*!
AnnaBridge 171:3a7713b1edbc 713 * @brief Starts the extended IEEE802.3 Clause 45 MDIO format SMI write command.
AnnaBridge 171:3a7713b1edbc 714 *
AnnaBridge 171:3a7713b1edbc 715 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 716 * @param phyAddr The PHY address.
AnnaBridge 171:3a7713b1edbc 717 * @param phyReg The PHY register. For MDIO IEEE802.3 Clause 45,
AnnaBridge 171:3a7713b1edbc 718 * the phyReg is a 21-bits combination of the devaddr (5 bits device address)
AnnaBridge 171:3a7713b1edbc 719 * and the regAddr (16 bits phy register): phyReg = (devaddr << 16) | regAddr.
AnnaBridge 171:3a7713b1edbc 720 * @param data The data written to PHY.
AnnaBridge 171:3a7713b1edbc 721 */
AnnaBridge 171:3a7713b1edbc 722 void ENET_StartExtC45SMIWrite(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data);
AnnaBridge 171:3a7713b1edbc 723 #endif /* FSL_FEATURE_ENET_HAS_EXTEND_MDIO */
AnnaBridge 171:3a7713b1edbc 724
AnnaBridge 171:3a7713b1edbc 725 /* @} */
AnnaBridge 171:3a7713b1edbc 726
AnnaBridge 171:3a7713b1edbc 727 /*!
AnnaBridge 171:3a7713b1edbc 728 * @name MAC Address Filter
AnnaBridge 171:3a7713b1edbc 729 * @{
AnnaBridge 171:3a7713b1edbc 730 */
AnnaBridge 171:3a7713b1edbc 731
AnnaBridge 171:3a7713b1edbc 732 /*!
AnnaBridge 171:3a7713b1edbc 733 * @brief Sets the ENET module Mac address.
AnnaBridge 171:3a7713b1edbc 734 *
AnnaBridge 171:3a7713b1edbc 735 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 736 * @param macAddr The six-byte Mac address pointer.
AnnaBridge 171:3a7713b1edbc 737 * The pointer is allocated by application and input into the API.
AnnaBridge 171:3a7713b1edbc 738 */
AnnaBridge 171:3a7713b1edbc 739 void ENET_SetMacAddr(ENET_Type *base, uint8_t *macAddr);
AnnaBridge 171:3a7713b1edbc 740
AnnaBridge 171:3a7713b1edbc 741 /*!
AnnaBridge 171:3a7713b1edbc 742 * @brief Gets the ENET module Mac address.
AnnaBridge 171:3a7713b1edbc 743 *
AnnaBridge 171:3a7713b1edbc 744 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 745 * @param macAddr The six-byte Mac address pointer.
AnnaBridge 171:3a7713b1edbc 746 * The pointer is allocated by application and input into the API.
AnnaBridge 171:3a7713b1edbc 747 */
AnnaBridge 171:3a7713b1edbc 748 void ENET_GetMacAddr(ENET_Type *base, uint8_t *macAddr);
AnnaBridge 171:3a7713b1edbc 749
AnnaBridge 171:3a7713b1edbc 750 /*!
AnnaBridge 171:3a7713b1edbc 751 * @brief Adds the ENET device to a multicast group.
AnnaBridge 171:3a7713b1edbc 752 *
AnnaBridge 171:3a7713b1edbc 753 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 754 * @param address The six-byte multicast group address which is provided by application.
AnnaBridge 171:3a7713b1edbc 755 */
AnnaBridge 171:3a7713b1edbc 756 void ENET_AddMulticastGroup(ENET_Type *base, uint8_t *address);
AnnaBridge 171:3a7713b1edbc 757
AnnaBridge 171:3a7713b1edbc 758 /*!
AnnaBridge 171:3a7713b1edbc 759 * @brief Moves the ENET device from a multicast group.
AnnaBridge 171:3a7713b1edbc 760 *
AnnaBridge 171:3a7713b1edbc 761 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 762 * @param address The six-byte multicast group address which is provided by application.
AnnaBridge 171:3a7713b1edbc 763 */
AnnaBridge 171:3a7713b1edbc 764 void ENET_LeaveMulticastGroup(ENET_Type *base, uint8_t *address);
AnnaBridge 171:3a7713b1edbc 765
AnnaBridge 171:3a7713b1edbc 766 /* @} */
AnnaBridge 171:3a7713b1edbc 767
AnnaBridge 171:3a7713b1edbc 768 /*!
AnnaBridge 171:3a7713b1edbc 769 * @name Other basic operations
AnnaBridge 171:3a7713b1edbc 770 * @{
AnnaBridge 171:3a7713b1edbc 771 */
AnnaBridge 171:3a7713b1edbc 772
AnnaBridge 171:3a7713b1edbc 773 /*!
AnnaBridge 171:3a7713b1edbc 774 * @brief Activates ENET read or receive.
AnnaBridge 171:3a7713b1edbc 775 *
AnnaBridge 171:3a7713b1edbc 776 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 777 *
AnnaBridge 171:3a7713b1edbc 778 * @note This must be called after the MAC configuration and
AnnaBridge 171:3a7713b1edbc 779 * state are ready. It must be called after the ENET_Init() and
AnnaBridge 171:3a7713b1edbc 780 * ENET_Ptp1588Configure(). This should be called when the ENET receive required.
AnnaBridge 171:3a7713b1edbc 781 */
AnnaBridge 171:3a7713b1edbc 782 static inline void ENET_ActiveRead(ENET_Type *base)
AnnaBridge 171:3a7713b1edbc 783 {
AnnaBridge 171:3a7713b1edbc 784 base->RDAR = ENET_RDAR_RDAR_MASK;
AnnaBridge 171:3a7713b1edbc 785 }
AnnaBridge 171:3a7713b1edbc 786
AnnaBridge 171:3a7713b1edbc 787 /*!
AnnaBridge 171:3a7713b1edbc 788 * @brief Enables/disables the MAC to enter sleep mode.
AnnaBridge 171:3a7713b1edbc 789 * This function is used to set the MAC enter sleep mode.
AnnaBridge 171:3a7713b1edbc 790 * When entering sleep mode, the magic frame wakeup interrupt should be enabled
AnnaBridge 171:3a7713b1edbc 791 * to wake up MAC from the sleep mode and reset it to normal mode.
AnnaBridge 171:3a7713b1edbc 792 *
AnnaBridge 171:3a7713b1edbc 793 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 794 * @param enable True enable sleep mode, false disable sleep mode.
AnnaBridge 171:3a7713b1edbc 795 */
AnnaBridge 171:3a7713b1edbc 796 static inline void ENET_EnableSleepMode(ENET_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 797 {
AnnaBridge 171:3a7713b1edbc 798 if (enable)
AnnaBridge 171:3a7713b1edbc 799 {
AnnaBridge 171:3a7713b1edbc 800 /* When this field is set, MAC enters sleep mode. */
AnnaBridge 171:3a7713b1edbc 801 base->ECR |= ENET_ECR_SLEEP_MASK | ENET_ECR_MAGICEN_MASK;
AnnaBridge 171:3a7713b1edbc 802 }
AnnaBridge 171:3a7713b1edbc 803 else
AnnaBridge 171:3a7713b1edbc 804 { /* MAC exits sleep mode. */
AnnaBridge 171:3a7713b1edbc 805 base->ECR &= ~(ENET_ECR_SLEEP_MASK | ENET_ECR_MAGICEN_MASK);
AnnaBridge 171:3a7713b1edbc 806 }
AnnaBridge 171:3a7713b1edbc 807 }
AnnaBridge 171:3a7713b1edbc 808
AnnaBridge 171:3a7713b1edbc 809 /*!
AnnaBridge 171:3a7713b1edbc 810 * @brief Gets ENET transmit and receive accelerator functions from the MAC controller.
AnnaBridge 171:3a7713b1edbc 811 *
AnnaBridge 171:3a7713b1edbc 812 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 813 * @param txAccelOption The transmit accelerator option. The "enet_tx_accelerator_t" is
AnnaBridge 171:3a7713b1edbc 814 * recommended as the mask to get the exact the accelerator option.
AnnaBridge 171:3a7713b1edbc 815 * @param rxAccelOption The receive accelerator option. The "enet_rx_accelerator_t" is
AnnaBridge 171:3a7713b1edbc 816 * recommended as the mask to get the exact the accelerator option.
AnnaBridge 171:3a7713b1edbc 817 */
AnnaBridge 171:3a7713b1edbc 818 static inline void ENET_GetAccelFunction(ENET_Type *base, uint32_t *txAccelOption, uint32_t *rxAccelOption)
AnnaBridge 171:3a7713b1edbc 819 {
AnnaBridge 171:3a7713b1edbc 820 assert(txAccelOption);
AnnaBridge 171:3a7713b1edbc 821 assert(txAccelOption);
AnnaBridge 171:3a7713b1edbc 822
AnnaBridge 171:3a7713b1edbc 823 *txAccelOption = base->TACC;
AnnaBridge 171:3a7713b1edbc 824 *rxAccelOption = base->RACC;
AnnaBridge 171:3a7713b1edbc 825 }
AnnaBridge 171:3a7713b1edbc 826
AnnaBridge 171:3a7713b1edbc 827 /* @} */
AnnaBridge 171:3a7713b1edbc 828
AnnaBridge 171:3a7713b1edbc 829 /*!
AnnaBridge 171:3a7713b1edbc 830 * @name Interrupts
AnnaBridge 171:3a7713b1edbc 831 * @{
AnnaBridge 171:3a7713b1edbc 832 */
AnnaBridge 171:3a7713b1edbc 833
AnnaBridge 171:3a7713b1edbc 834 /*!
AnnaBridge 171:3a7713b1edbc 835 * @brief Enables the ENET interrupt.
AnnaBridge 171:3a7713b1edbc 836 *
AnnaBridge 171:3a7713b1edbc 837 * This function enables the ENET interrupt according to the provided mask. The mask
AnnaBridge 171:3a7713b1edbc 838 * is a logical OR of enumeration members. See @ref enet_interrupt_enable_t.
AnnaBridge 171:3a7713b1edbc 839 * For example, to enable the TX frame interrupt and RX frame interrupt, do the following.
AnnaBridge 171:3a7713b1edbc 840 * @code
AnnaBridge 171:3a7713b1edbc 841 * ENET_EnableInterrupts(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt);
AnnaBridge 171:3a7713b1edbc 842 * @endcode
AnnaBridge 171:3a7713b1edbc 843 *
AnnaBridge 171:3a7713b1edbc 844 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 845 * @param mask ENET interrupts to enable. This is a logical OR of the
AnnaBridge 171:3a7713b1edbc 846 * enumeration :: enet_interrupt_enable_t.
AnnaBridge 171:3a7713b1edbc 847 */
AnnaBridge 171:3a7713b1edbc 848 static inline void ENET_EnableInterrupts(ENET_Type *base, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 849 {
AnnaBridge 171:3a7713b1edbc 850 base->EIMR |= mask;
AnnaBridge 171:3a7713b1edbc 851 }
AnnaBridge 171:3a7713b1edbc 852
AnnaBridge 171:3a7713b1edbc 853 /*!
AnnaBridge 171:3a7713b1edbc 854 * @brief Disables the ENET interrupt.
AnnaBridge 171:3a7713b1edbc 855 *
AnnaBridge 171:3a7713b1edbc 856 * This function disables the ENET interrupts according to the provided mask. The mask
AnnaBridge 171:3a7713b1edbc 857 * is a logical OR of enumeration members. See @ref enet_interrupt_enable_t.
AnnaBridge 171:3a7713b1edbc 858 * For example, to disable the TX frame interrupt and RX frame interrupt, do the following.
AnnaBridge 171:3a7713b1edbc 859 * @code
AnnaBridge 171:3a7713b1edbc 860 * ENET_DisableInterrupts(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt);
AnnaBridge 171:3a7713b1edbc 861 * @endcode
AnnaBridge 171:3a7713b1edbc 862 *
AnnaBridge 171:3a7713b1edbc 863 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 864 * @param mask ENET interrupts to disable. This is a logical OR of the
AnnaBridge 171:3a7713b1edbc 865 * enumeration :: enet_interrupt_enable_t.
AnnaBridge 171:3a7713b1edbc 866 */
AnnaBridge 171:3a7713b1edbc 867 static inline void ENET_DisableInterrupts(ENET_Type *base, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 868 {
AnnaBridge 171:3a7713b1edbc 869 base->EIMR &= ~mask;
AnnaBridge 171:3a7713b1edbc 870 }
AnnaBridge 171:3a7713b1edbc 871
AnnaBridge 171:3a7713b1edbc 872 /*!
AnnaBridge 171:3a7713b1edbc 873 * @brief Gets the ENET interrupt status flag.
AnnaBridge 171:3a7713b1edbc 874 *
AnnaBridge 171:3a7713b1edbc 875 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 876 * @return The event status of the interrupt source. This is the logical OR of members
AnnaBridge 171:3a7713b1edbc 877 * of the enumeration :: enet_interrupt_enable_t.
AnnaBridge 171:3a7713b1edbc 878 */
AnnaBridge 171:3a7713b1edbc 879 static inline uint32_t ENET_GetInterruptStatus(ENET_Type *base)
AnnaBridge 171:3a7713b1edbc 880 {
AnnaBridge 171:3a7713b1edbc 881 return base->EIR;
AnnaBridge 171:3a7713b1edbc 882 }
AnnaBridge 171:3a7713b1edbc 883
AnnaBridge 171:3a7713b1edbc 884 /*!
AnnaBridge 171:3a7713b1edbc 885 * @brief Clears the ENET interrupt events status flag.
AnnaBridge 171:3a7713b1edbc 886 *
AnnaBridge 171:3a7713b1edbc 887 * This function clears enabled ENET interrupts according to the provided mask. The mask
AnnaBridge 171:3a7713b1edbc 888 * is a logical OR of enumeration members. See the @ref enet_interrupt_enable_t.
AnnaBridge 171:3a7713b1edbc 889 * For example, to clear the TX frame interrupt and RX frame interrupt, do the following.
AnnaBridge 171:3a7713b1edbc 890 * @code
AnnaBridge 171:3a7713b1edbc 891 * ENET_ClearInterruptStatus(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt);
AnnaBridge 171:3a7713b1edbc 892 * @endcode
AnnaBridge 171:3a7713b1edbc 893 *
AnnaBridge 171:3a7713b1edbc 894 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 895 * @param mask ENET interrupt source to be cleared.
AnnaBridge 171:3a7713b1edbc 896 * This is the logical OR of members of the enumeration :: enet_interrupt_enable_t.
AnnaBridge 171:3a7713b1edbc 897 */
AnnaBridge 171:3a7713b1edbc 898 static inline void ENET_ClearInterruptStatus(ENET_Type *base, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 899 {
AnnaBridge 171:3a7713b1edbc 900 base->EIR = mask;
AnnaBridge 171:3a7713b1edbc 901 }
AnnaBridge 171:3a7713b1edbc 902
AnnaBridge 171:3a7713b1edbc 903 /* @} */
AnnaBridge 171:3a7713b1edbc 904
AnnaBridge 171:3a7713b1edbc 905 /*!
AnnaBridge 171:3a7713b1edbc 906 * @name Transactional operation
AnnaBridge 171:3a7713b1edbc 907 * @{
AnnaBridge 171:3a7713b1edbc 908 */
AnnaBridge 171:3a7713b1edbc 909
AnnaBridge 171:3a7713b1edbc 910 /*!
AnnaBridge 171:3a7713b1edbc 911 * @brief Sets the callback function.
AnnaBridge 171:3a7713b1edbc 912 * This API is provided for the application callback required case when ENET
AnnaBridge 171:3a7713b1edbc 913 * interrupt is enabled. This API should be called after calling ENET_Init.
AnnaBridge 171:3a7713b1edbc 914 *
AnnaBridge 171:3a7713b1edbc 915 * @param handle ENET handler pointer. Should be provided by application.
AnnaBridge 171:3a7713b1edbc 916 * @param callback The ENET callback function.
AnnaBridge 171:3a7713b1edbc 917 * @param userData The callback function parameter.
AnnaBridge 171:3a7713b1edbc 918 */
AnnaBridge 171:3a7713b1edbc 919 void ENET_SetCallback(enet_handle_t *handle, enet_callback_t callback, void *userData);
AnnaBridge 171:3a7713b1edbc 920
AnnaBridge 171:3a7713b1edbc 921 /*!
AnnaBridge 171:3a7713b1edbc 922 * @brief Gets the ENET the error statistics of a received frame.
AnnaBridge 171:3a7713b1edbc 923 *
AnnaBridge 171:3a7713b1edbc 924 * This API must be called after the ENET_GetRxFrameSize and before the ENET_ReadFrame().
AnnaBridge 171:3a7713b1edbc 925 * If the ENET_GetRxFrameSize returns kStatus_ENET_RxFrameError,
AnnaBridge 171:3a7713b1edbc 926 * the ENET_GetRxErrBeforeReadFrame can be used to get the exact error statistics.
AnnaBridge 171:3a7713b1edbc 927 * This is an example.
AnnaBridge 171:3a7713b1edbc 928 * @code
AnnaBridge 171:3a7713b1edbc 929 * status = ENET_GetRxFrameSize(&g_handle, &length);
AnnaBridge 171:3a7713b1edbc 930 * if (status == kStatus_ENET_RxFrameError)
AnnaBridge 171:3a7713b1edbc 931 * {
AnnaBridge 171:3a7713b1edbc 932 * // Get the error information of the received frame.
AnnaBridge 171:3a7713b1edbc 933 * ENET_GetRxErrBeforeReadFrame(&g_handle, &eErrStatic);
AnnaBridge 171:3a7713b1edbc 934 * // update the receive buffer.
AnnaBridge 171:3a7713b1edbc 935 * ENET_ReadFrame(EXAMPLE_ENET, &g_handle, NULL, 0);
AnnaBridge 171:3a7713b1edbc 936 * }
AnnaBridge 171:3a7713b1edbc 937 * @endcode
AnnaBridge 171:3a7713b1edbc 938 * @param handle The ENET handler structure pointer. This is the same handler pointer used in the ENET_Init.
AnnaBridge 171:3a7713b1edbc 939 * @param eErrorStatic The error statistics structure pointer.
AnnaBridge 171:3a7713b1edbc 940 */
AnnaBridge 171:3a7713b1edbc 941 void ENET_GetRxErrBeforeReadFrame(enet_handle_t *handle, enet_data_error_stats_t *eErrorStatic);
AnnaBridge 171:3a7713b1edbc 942
AnnaBridge 171:3a7713b1edbc 943 #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
AnnaBridge 171:3a7713b1edbc 944 /*!
AnnaBridge 171:3a7713b1edbc 945 * @brief Gets the ENET transmit frame statistics after the data send.
AnnaBridge 171:3a7713b1edbc 946 *
AnnaBridge 171:3a7713b1edbc 947 * This interface gets the error statistics of the transmit frame.
AnnaBridge 171:3a7713b1edbc 948 * Because the error information is reported by the uDMA after the data delivery, this interface
AnnaBridge 171:3a7713b1edbc 949 * should be called after the data transmit API. It is recommended to call this function on
AnnaBridge 171:3a7713b1edbc 950 * transmit interrupt handler. After calling the ENET_SendFrame, the
AnnaBridge 171:3a7713b1edbc 951 * transmit interrupt notifies the transmit completion.
AnnaBridge 171:3a7713b1edbc 952 *
AnnaBridge 171:3a7713b1edbc 953 * @param handle The PTP handler pointer. This is the same handler pointer used in the ENET_Init.
AnnaBridge 171:3a7713b1edbc 954 * @param eErrorStatic The error statistics structure pointer.
AnnaBridge 171:3a7713b1edbc 955 * @return The execute status.
AnnaBridge 171:3a7713b1edbc 956 */
AnnaBridge 171:3a7713b1edbc 957 status_t ENET_GetTxErrAfterSendFrame(enet_handle_t *handle, enet_data_error_stats_t *eErrorStatic);
AnnaBridge 171:3a7713b1edbc 958 #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
AnnaBridge 171:3a7713b1edbc 959 /*!
AnnaBridge 171:3a7713b1edbc 960 * @brief Gets the size of the read frame.
AnnaBridge 171:3a7713b1edbc 961 * This function gets a received frame size from the ENET buffer descriptors.
AnnaBridge 171:3a7713b1edbc 962 * @note The FCS of the frame is automatically removed by Mac and the size is the length without the FCS.
AnnaBridge 171:3a7713b1edbc 963 * After calling ENET_GetRxFrameSize, ENET_ReadFrame() should be called to update the
AnnaBridge 171:3a7713b1edbc 964 * receive buffers If the result is not "kStatus_ENET_RxFrameEmpty".
AnnaBridge 171:3a7713b1edbc 965 *
AnnaBridge 171:3a7713b1edbc 966 * @param handle The ENET handler structure. This is the same handler pointer used in the ENET_Init.
AnnaBridge 171:3a7713b1edbc 967 * @param length The length of the valid frame received.
AnnaBridge 171:3a7713b1edbc 968 * @retval kStatus_ENET_RxFrameEmpty No frame received. Should not call ENET_ReadFrame to read frame.
AnnaBridge 171:3a7713b1edbc 969 * @retval kStatus_ENET_RxFrameError Data error happens. ENET_ReadFrame should be called with NULL data
AnnaBridge 171:3a7713b1edbc 970 * and NULL length to update the receive buffers.
AnnaBridge 171:3a7713b1edbc 971 * @retval kStatus_Success Receive a frame Successfully then the ENET_ReadFrame
AnnaBridge 171:3a7713b1edbc 972 * should be called with the right data buffer and the captured data length input.
AnnaBridge 171:3a7713b1edbc 973 */
AnnaBridge 171:3a7713b1edbc 974 status_t ENET_GetRxFrameSize(enet_handle_t *handle, uint32_t *length);
AnnaBridge 171:3a7713b1edbc 975
AnnaBridge 171:3a7713b1edbc 976 /*!
AnnaBridge 171:3a7713b1edbc 977 * @brief Reads a frame from the ENET device.
AnnaBridge 171:3a7713b1edbc 978 * This function reads a frame (both the data and the length) from the ENET buffer descriptors.
AnnaBridge 171:3a7713b1edbc 979 * The ENET_GetRxFrameSize should be used to get the size of the prepared data buffer.
AnnaBridge 171:3a7713b1edbc 980 * This is an example.
AnnaBridge 171:3a7713b1edbc 981 * @code
AnnaBridge 171:3a7713b1edbc 982 * uint32_t length;
AnnaBridge 171:3a7713b1edbc 983 * enet_handle_t g_handle;
AnnaBridge 171:3a7713b1edbc 984 * //Get the received frame size firstly.
AnnaBridge 171:3a7713b1edbc 985 * status = ENET_GetRxFrameSize(&g_handle, &length);
AnnaBridge 171:3a7713b1edbc 986 * if (length != 0)
AnnaBridge 171:3a7713b1edbc 987 * {
AnnaBridge 171:3a7713b1edbc 988 * //Allocate memory here with the size of "length"
AnnaBridge 171:3a7713b1edbc 989 * uint8_t *data = memory allocate interface;
AnnaBridge 171:3a7713b1edbc 990 * if (!data)
AnnaBridge 171:3a7713b1edbc 991 * {
AnnaBridge 171:3a7713b1edbc 992 * ENET_ReadFrame(ENET, &g_handle, NULL, 0);
AnnaBridge 171:3a7713b1edbc 993 * //Add the console warning log.
AnnaBridge 171:3a7713b1edbc 994 * }
AnnaBridge 171:3a7713b1edbc 995 * else
AnnaBridge 171:3a7713b1edbc 996 * {
AnnaBridge 171:3a7713b1edbc 997 * status = ENET_ReadFrame(ENET, &g_handle, data, length);
AnnaBridge 171:3a7713b1edbc 998 * //Call stack input API to deliver the data to stack
AnnaBridge 171:3a7713b1edbc 999 * }
AnnaBridge 171:3a7713b1edbc 1000 * }
AnnaBridge 171:3a7713b1edbc 1001 * else if (status == kStatus_ENET_RxFrameError)
AnnaBridge 171:3a7713b1edbc 1002 * {
AnnaBridge 171:3a7713b1edbc 1003 * //Update the received buffer when a error frame is received.
AnnaBridge 171:3a7713b1edbc 1004 * ENET_ReadFrame(ENET, &g_handle, NULL, 0);
AnnaBridge 171:3a7713b1edbc 1005 * }
AnnaBridge 171:3a7713b1edbc 1006 * @endcode
AnnaBridge 171:3a7713b1edbc 1007 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1008 * @param handle The ENET handler structure. This is the same handler pointer used in the ENET_Init.
AnnaBridge 171:3a7713b1edbc 1009 * @param data The data buffer provided by user to store the frame which memory size should be at least "length".
AnnaBridge 171:3a7713b1edbc 1010 * @param length The size of the data buffer which is still the length of the received frame.
AnnaBridge 171:3a7713b1edbc 1011 * @return The execute status, successful or failure.
AnnaBridge 171:3a7713b1edbc 1012 */
AnnaBridge 171:3a7713b1edbc 1013 status_t ENET_ReadFrame(ENET_Type *base, enet_handle_t *handle, uint8_t *data, uint32_t length);
AnnaBridge 171:3a7713b1edbc 1014
AnnaBridge 171:3a7713b1edbc 1015 /*!
AnnaBridge 171:3a7713b1edbc 1016 * @brief Transmits an ENET frame.
AnnaBridge 171:3a7713b1edbc 1017 * @note The CRC is automatically appended to the data. Input the data
AnnaBridge 171:3a7713b1edbc 1018 * to send without the CRC.
AnnaBridge 171:3a7713b1edbc 1019 *
AnnaBridge 171:3a7713b1edbc 1020 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1021 * @param handle The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
AnnaBridge 171:3a7713b1edbc 1022 * @param data The data buffer provided by user to be send.
AnnaBridge 171:3a7713b1edbc 1023 * @param length The length of the data to be send.
AnnaBridge 171:3a7713b1edbc 1024 * @retval kStatus_Success Send frame succeed.
AnnaBridge 171:3a7713b1edbc 1025 * @retval kStatus_ENET_TxFrameBusy Transmit buffer descriptor is busy under transmission.
AnnaBridge 171:3a7713b1edbc 1026 * The transmit busy happens when the data send rate is over the MAC capacity.
AnnaBridge 171:3a7713b1edbc 1027 * The waiting mechanism is recommended to be added after each call return with
AnnaBridge 171:3a7713b1edbc 1028 * kStatus_ENET_TxFrameBusy.
AnnaBridge 171:3a7713b1edbc 1029 */
AnnaBridge 171:3a7713b1edbc 1030 status_t ENET_SendFrame(ENET_Type *base, enet_handle_t *handle, uint8_t *data, uint32_t length);
AnnaBridge 171:3a7713b1edbc 1031
AnnaBridge 171:3a7713b1edbc 1032 /*!
AnnaBridge 171:3a7713b1edbc 1033 * @brief The transmit IRQ handler.
AnnaBridge 171:3a7713b1edbc 1034 *
AnnaBridge 171:3a7713b1edbc 1035 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1036 * @param handle The ENET handler pointer.
AnnaBridge 171:3a7713b1edbc 1037 */
AnnaBridge 171:3a7713b1edbc 1038 void ENET_TransmitIRQHandler(ENET_Type *base, enet_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 1039
AnnaBridge 171:3a7713b1edbc 1040 /*!
AnnaBridge 171:3a7713b1edbc 1041 * @brief The receive IRQ handler.
AnnaBridge 171:3a7713b1edbc 1042 *
AnnaBridge 171:3a7713b1edbc 1043 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1044 * @param handle The ENET handler pointer.
AnnaBridge 171:3a7713b1edbc 1045 */
AnnaBridge 171:3a7713b1edbc 1046 void ENET_ReceiveIRQHandler(ENET_Type *base, enet_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 1047
AnnaBridge 171:3a7713b1edbc 1048 /*!
AnnaBridge 171:3a7713b1edbc 1049 * @brief The error IRQ handler.
AnnaBridge 171:3a7713b1edbc 1050 *
AnnaBridge 171:3a7713b1edbc 1051 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1052 * @param handle The ENET handler pointer.
AnnaBridge 171:3a7713b1edbc 1053 */
AnnaBridge 171:3a7713b1edbc 1054 void ENET_ErrorIRQHandler(ENET_Type *base, enet_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 1055
AnnaBridge 171:3a7713b1edbc 1056 /*!
AnnaBridge 171:3a7713b1edbc 1057 * @brief the common IRQ handler for the tx/rx/error etc irq handler.
AnnaBridge 171:3a7713b1edbc 1058 *
AnnaBridge 171:3a7713b1edbc 1059 * This is used for the combined tx/rx/error interrupt for single ring (ring 0).
AnnaBridge 171:3a7713b1edbc 1060 *
AnnaBridge 171:3a7713b1edbc 1061 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1062 */
AnnaBridge 171:3a7713b1edbc 1063 void ENET_CommonFrame0IRQHandler(ENET_Type *base);
AnnaBridge 171:3a7713b1edbc 1064 /* @} */
AnnaBridge 171:3a7713b1edbc 1065
AnnaBridge 171:3a7713b1edbc 1066 #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
AnnaBridge 171:3a7713b1edbc 1067 /*!
AnnaBridge 171:3a7713b1edbc 1068 * @name ENET PTP 1588 function operation
AnnaBridge 171:3a7713b1edbc 1069 * @{
AnnaBridge 171:3a7713b1edbc 1070 */
AnnaBridge 171:3a7713b1edbc 1071
AnnaBridge 171:3a7713b1edbc 1072 /*!
AnnaBridge 171:3a7713b1edbc 1073 * @brief Configures the ENET PTP IEEE 1588 feature with the basic configuration.
AnnaBridge 171:3a7713b1edbc 1074 * The function sets the clock for PTP 1588 timer and enables
AnnaBridge 171:3a7713b1edbc 1075 * time stamp interrupts and transmit interrupts for PTP 1588 features.
AnnaBridge 171:3a7713b1edbc 1076 * This API should be called when the 1588 feature is enabled
AnnaBridge 171:3a7713b1edbc 1077 * or the ENET_ENHANCEDBUFFERDESCRIPTOR_MODE is defined.
AnnaBridge 171:3a7713b1edbc 1078 * ENET_Init should be called before calling this API.
AnnaBridge 171:3a7713b1edbc 1079 *
AnnaBridge 171:3a7713b1edbc 1080 * @note The PTP 1588 time-stamp second increase though time-stamp interrupt handler
AnnaBridge 171:3a7713b1edbc 1081 * and the transmit time-stamp store is done through transmit interrupt handler.
AnnaBridge 171:3a7713b1edbc 1082 * As a result, the TS interrupt and TX interrupt are enabled when you call this API.
AnnaBridge 171:3a7713b1edbc 1083 *
AnnaBridge 171:3a7713b1edbc 1084 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1085 * @param handle ENET handler pointer.
AnnaBridge 171:3a7713b1edbc 1086 * @param ptpConfig The ENET PTP1588 configuration.
AnnaBridge 171:3a7713b1edbc 1087 */
AnnaBridge 171:3a7713b1edbc 1088 void ENET_Ptp1588Configure(ENET_Type *base, enet_handle_t *handle, enet_ptp_config_t *ptpConfig);
AnnaBridge 171:3a7713b1edbc 1089
AnnaBridge 171:3a7713b1edbc 1090 /*!
AnnaBridge 171:3a7713b1edbc 1091 * @brief Starts the ENET PTP 1588 Timer.
AnnaBridge 171:3a7713b1edbc 1092 * This function is used to initialize the PTP timer. After the PTP starts,
AnnaBridge 171:3a7713b1edbc 1093 * the PTP timer starts running.
AnnaBridge 171:3a7713b1edbc 1094 *
AnnaBridge 171:3a7713b1edbc 1095 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1096 * @param ptpClkSrc The clock source of the PTP timer.
AnnaBridge 171:3a7713b1edbc 1097 */
AnnaBridge 171:3a7713b1edbc 1098 void ENET_Ptp1588StartTimer(ENET_Type *base, uint32_t ptpClkSrc);
AnnaBridge 171:3a7713b1edbc 1099
AnnaBridge 171:3a7713b1edbc 1100 /*!
AnnaBridge 171:3a7713b1edbc 1101 * @brief Stops the ENET PTP 1588 Timer.
AnnaBridge 171:3a7713b1edbc 1102 * This function is used to stops the ENET PTP timer.
AnnaBridge 171:3a7713b1edbc 1103 *
AnnaBridge 171:3a7713b1edbc 1104 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1105 */
AnnaBridge 171:3a7713b1edbc 1106 static inline void ENET_Ptp1588StopTimer(ENET_Type *base)
AnnaBridge 171:3a7713b1edbc 1107 {
AnnaBridge 171:3a7713b1edbc 1108 /* Disable PTP timer and reset the timer. */
AnnaBridge 171:3a7713b1edbc 1109 base->ATCR &= ~ENET_ATCR_EN_MASK;
AnnaBridge 171:3a7713b1edbc 1110 base->ATCR |= ENET_ATCR_RESTART_MASK;
AnnaBridge 171:3a7713b1edbc 1111 }
AnnaBridge 171:3a7713b1edbc 1112
AnnaBridge 171:3a7713b1edbc 1113 /*!
AnnaBridge 171:3a7713b1edbc 1114 * @brief Adjusts the ENET PTP 1588 timer.
AnnaBridge 171:3a7713b1edbc 1115 *
AnnaBridge 171:3a7713b1edbc 1116 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1117 * @param corrIncrease The correction increment value. This value is added every time the correction
AnnaBridge 171:3a7713b1edbc 1118 * timer expires. A value less than the PTP timer frequency(1/ptpClkSrc) slows down the timer,
AnnaBridge 171:3a7713b1edbc 1119 * a value greater than the 1/ptpClkSrc speeds up the timer.
AnnaBridge 171:3a7713b1edbc 1120 * @param corrPeriod The PTP timer correction counter wrap-around value. This defines after how
AnnaBridge 171:3a7713b1edbc 1121 * many timer clock the correction counter should be reset and trigger a correction
AnnaBridge 171:3a7713b1edbc 1122 * increment on the timer. A value of 0 disables the correction counter and no correction occurs.
AnnaBridge 171:3a7713b1edbc 1123 */
AnnaBridge 171:3a7713b1edbc 1124 void ENET_Ptp1588AdjustTimer(ENET_Type *base, uint32_t corrIncrease, uint32_t corrPeriod);
AnnaBridge 171:3a7713b1edbc 1125
AnnaBridge 171:3a7713b1edbc 1126 /*!
AnnaBridge 171:3a7713b1edbc 1127 * @brief Sets the ENET PTP 1588 timer channel mode.
AnnaBridge 171:3a7713b1edbc 1128 *
AnnaBridge 171:3a7713b1edbc 1129 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1130 * @param channel The ENET PTP timer channel number.
AnnaBridge 171:3a7713b1edbc 1131 * @param mode The PTP timer channel mode, see "enet_ptp_timer_channel_mode_t".
AnnaBridge 171:3a7713b1edbc 1132 * @param intEnable Enables or disables the interrupt.
AnnaBridge 171:3a7713b1edbc 1133 */
AnnaBridge 171:3a7713b1edbc 1134 static inline void ENET_Ptp1588SetChannelMode(ENET_Type *base,
AnnaBridge 171:3a7713b1edbc 1135 enet_ptp_timer_channel_t channel,
AnnaBridge 171:3a7713b1edbc 1136 enet_ptp_timer_channel_mode_t mode,
AnnaBridge 171:3a7713b1edbc 1137 bool intEnable)
AnnaBridge 171:3a7713b1edbc 1138 {
AnnaBridge 171:3a7713b1edbc 1139 uint32_t tcrReg = 0;
AnnaBridge 171:3a7713b1edbc 1140
AnnaBridge 171:3a7713b1edbc 1141 tcrReg = ENET_TCSR_TMODE(mode) | ENET_TCSR_TIE(intEnable);
AnnaBridge 171:3a7713b1edbc 1142 /* Disable channel mode first. */
AnnaBridge 171:3a7713b1edbc 1143 base->CHANNEL[channel].TCSR = 0;
AnnaBridge 171:3a7713b1edbc 1144 base->CHANNEL[channel].TCSR = tcrReg;
AnnaBridge 171:3a7713b1edbc 1145 }
AnnaBridge 171:3a7713b1edbc 1146
AnnaBridge 171:3a7713b1edbc 1147 #if defined(FSL_FEATURE_ENET_HAS_TIMER_PWCONTROL) && FSL_FEATURE_ENET_HAS_TIMER_PWCONTROL
AnnaBridge 171:3a7713b1edbc 1148 /*!
AnnaBridge 171:3a7713b1edbc 1149 * @brief Sets ENET PTP 1588 timer channel mode pulse width.
AnnaBridge 171:3a7713b1edbc 1150 *
AnnaBridge 171:3a7713b1edbc 1151 * For the input "mode" in ENET_Ptp1588SetChannelMode, the kENET_PtpChannelPulseLowonCompare
AnnaBridge 171:3a7713b1edbc 1152 * kENET_PtpChannelPulseHighonCompare only support the pulse width for one 1588 clock.
AnnaBridge 171:3a7713b1edbc 1153 * this function is extended for control the pulse width from 1 to 32 1588 clock cycles.
AnnaBridge 171:3a7713b1edbc 1154 * so call this function if you need to set the timer channel mode for
AnnaBridge 171:3a7713b1edbc 1155 * kENET_PtpChannelPulseLowonCompare or kENET_PtpChannelPulseHighonCompare
AnnaBridge 171:3a7713b1edbc 1156 * with pulse width more than one 1588 clock,
AnnaBridge 171:3a7713b1edbc 1157 *
AnnaBridge 171:3a7713b1edbc 1158 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1159 * @param channel The ENET PTP timer channel number.
AnnaBridge 171:3a7713b1edbc 1160 * @param isOutputLow True --- timer channel is configured for output compare
AnnaBridge 171:3a7713b1edbc 1161 * pulse output low.
AnnaBridge 171:3a7713b1edbc 1162 * false --- timer channel is configured for output compare
AnnaBridge 171:3a7713b1edbc 1163 * pulse output high.
AnnaBridge 171:3a7713b1edbc 1164 * @param pulseWidth The pulse width control value, range from 0 ~ 31.
AnnaBridge 171:3a7713b1edbc 1165 * 0 --- pulse width is one 1588 clock cycle.
AnnaBridge 171:3a7713b1edbc 1166 * 31 --- pulse width is thirty two 1588 clock cycles.
AnnaBridge 171:3a7713b1edbc 1167 * @param intEnable Enables or disables the interrupt.
AnnaBridge 171:3a7713b1edbc 1168 */
AnnaBridge 171:3a7713b1edbc 1169 static inline void ENET_Ptp1588SetChannelOutputPulseWidth(ENET_Type *base,
AnnaBridge 171:3a7713b1edbc 1170 enet_ptp_timer_channel_t channel,
AnnaBridge 171:3a7713b1edbc 1171 bool isOutputLow,
AnnaBridge 171:3a7713b1edbc 1172 uint8_t pulseWidth,
AnnaBridge 171:3a7713b1edbc 1173 bool intEnable)
AnnaBridge 171:3a7713b1edbc 1174 {
AnnaBridge 171:3a7713b1edbc 1175 uint32_t tcrReg;
AnnaBridge 171:3a7713b1edbc 1176
AnnaBridge 171:3a7713b1edbc 1177 tcrReg = ENET_TCSR_TIE(intEnable) | ENET_TCSR_TPWC(pulseWidth);
AnnaBridge 171:3a7713b1edbc 1178
AnnaBridge 171:3a7713b1edbc 1179 if (isOutputLow)
AnnaBridge 171:3a7713b1edbc 1180 {
AnnaBridge 171:3a7713b1edbc 1181 tcrReg |= ENET_TCSR_TMODE(kENET_PtpChannelPulseLowonCompare);
AnnaBridge 171:3a7713b1edbc 1182 }
AnnaBridge 171:3a7713b1edbc 1183 else
AnnaBridge 171:3a7713b1edbc 1184 {
AnnaBridge 171:3a7713b1edbc 1185 tcrReg |= ENET_TCSR_TMODE(kENET_PtpChannelPulseHighonCompare);
AnnaBridge 171:3a7713b1edbc 1186 }
AnnaBridge 171:3a7713b1edbc 1187
AnnaBridge 171:3a7713b1edbc 1188 /* Disable channel mode first. */
AnnaBridge 171:3a7713b1edbc 1189 base->CHANNEL[channel].TCSR = 0;
AnnaBridge 171:3a7713b1edbc 1190 base->CHANNEL[channel].TCSR = tcrReg;
AnnaBridge 171:3a7713b1edbc 1191 }
AnnaBridge 171:3a7713b1edbc 1192 #endif /* FSL_FEATURE_ENET_HAS_TIMER_PWCONTROL */
AnnaBridge 171:3a7713b1edbc 1193
AnnaBridge 171:3a7713b1edbc 1194 /*!
AnnaBridge 171:3a7713b1edbc 1195 * @brief Sets the ENET PTP 1588 timer channel comparison value.
AnnaBridge 171:3a7713b1edbc 1196 *
AnnaBridge 171:3a7713b1edbc 1197 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1198 * @param channel The PTP timer channel, see "enet_ptp_timer_channel_t".
AnnaBridge 171:3a7713b1edbc 1199 * @param cmpValue The compare value for the compare setting.
AnnaBridge 171:3a7713b1edbc 1200 */
AnnaBridge 171:3a7713b1edbc 1201 static inline void ENET_Ptp1588SetChannelCmpValue(ENET_Type *base, enet_ptp_timer_channel_t channel, uint32_t cmpValue)
AnnaBridge 171:3a7713b1edbc 1202 {
AnnaBridge 171:3a7713b1edbc 1203 base->CHANNEL[channel].TCCR = cmpValue;
AnnaBridge 171:3a7713b1edbc 1204 }
AnnaBridge 171:3a7713b1edbc 1205
AnnaBridge 171:3a7713b1edbc 1206 /*!
AnnaBridge 171:3a7713b1edbc 1207 * @brief Gets the ENET PTP 1588 timer channel status.
AnnaBridge 171:3a7713b1edbc 1208 *
AnnaBridge 171:3a7713b1edbc 1209 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1210 * @param channel The IEEE 1588 timer channel number.
AnnaBridge 171:3a7713b1edbc 1211 * @return True or false, Compare or capture operation status
AnnaBridge 171:3a7713b1edbc 1212 */
AnnaBridge 171:3a7713b1edbc 1213 static inline bool ENET_Ptp1588GetChannelStatus(ENET_Type *base, enet_ptp_timer_channel_t channel)
AnnaBridge 171:3a7713b1edbc 1214 {
AnnaBridge 171:3a7713b1edbc 1215 return (0 != (base->CHANNEL[channel].TCSR & ENET_TCSR_TF_MASK));
AnnaBridge 171:3a7713b1edbc 1216 }
AnnaBridge 171:3a7713b1edbc 1217
AnnaBridge 171:3a7713b1edbc 1218 /*!
AnnaBridge 171:3a7713b1edbc 1219 * @brief Clears the ENET PTP 1588 timer channel status.
AnnaBridge 171:3a7713b1edbc 1220 *
AnnaBridge 171:3a7713b1edbc 1221 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1222 * @param channel The IEEE 1588 timer channel number.
AnnaBridge 171:3a7713b1edbc 1223 */
AnnaBridge 171:3a7713b1edbc 1224 static inline void ENET_Ptp1588ClearChannelStatus(ENET_Type *base, enet_ptp_timer_channel_t channel)
AnnaBridge 171:3a7713b1edbc 1225 {
AnnaBridge 171:3a7713b1edbc 1226 base->CHANNEL[channel].TCSR |= ENET_TCSR_TF_MASK;
AnnaBridge 171:3a7713b1edbc 1227 base->TGSR = (1U << channel);
AnnaBridge 171:3a7713b1edbc 1228 }
AnnaBridge 171:3a7713b1edbc 1229
AnnaBridge 171:3a7713b1edbc 1230 /*!
AnnaBridge 171:3a7713b1edbc 1231 * @brief Gets the current ENET time from the PTP 1588 timer.
AnnaBridge 171:3a7713b1edbc 1232 *
AnnaBridge 171:3a7713b1edbc 1233 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1234 * @param handle The ENET state pointer. This is the same state pointer used in the ENET_Init.
AnnaBridge 171:3a7713b1edbc 1235 * @param ptpTime The PTP timer structure.
AnnaBridge 171:3a7713b1edbc 1236 */
AnnaBridge 171:3a7713b1edbc 1237 void ENET_Ptp1588GetTimer(ENET_Type *base, enet_handle_t *handle, enet_ptp_time_t *ptpTime);
AnnaBridge 171:3a7713b1edbc 1238
AnnaBridge 171:3a7713b1edbc 1239 /*!
AnnaBridge 171:3a7713b1edbc 1240 * @brief Sets the ENET PTP 1588 timer to the assigned time.
AnnaBridge 171:3a7713b1edbc 1241 *
AnnaBridge 171:3a7713b1edbc 1242 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1243 * @param handle The ENET state pointer. This is the same state pointer used in the ENET_Init.
AnnaBridge 171:3a7713b1edbc 1244 * @param ptpTime The timer to be set to the PTP timer.
AnnaBridge 171:3a7713b1edbc 1245 */
AnnaBridge 171:3a7713b1edbc 1246 void ENET_Ptp1588SetTimer(ENET_Type *base, enet_handle_t *handle, enet_ptp_time_t *ptpTime);
AnnaBridge 171:3a7713b1edbc 1247
AnnaBridge 171:3a7713b1edbc 1248 /*!
AnnaBridge 171:3a7713b1edbc 1249 * @brief The IEEE 1588 PTP time stamp interrupt handler.
AnnaBridge 171:3a7713b1edbc 1250 *
AnnaBridge 171:3a7713b1edbc 1251 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 1252 * @param handle The ENET state pointer. This is the same state pointer used in the ENET_Init.
AnnaBridge 171:3a7713b1edbc 1253 */
AnnaBridge 171:3a7713b1edbc 1254 void ENET_Ptp1588TimerIRQHandler(ENET_Type *base, enet_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 1255
AnnaBridge 171:3a7713b1edbc 1256 /*!
AnnaBridge 171:3a7713b1edbc 1257 * @brief Gets the time stamp of the received frame.
AnnaBridge 171:3a7713b1edbc 1258 *
AnnaBridge 171:3a7713b1edbc 1259 * This function is used for PTP stack to get the timestamp captured by the ENET driver.
AnnaBridge 171:3a7713b1edbc 1260 *
AnnaBridge 171:3a7713b1edbc 1261 * @param handle The ENET handler pointer.This is the same state pointer used in
AnnaBridge 171:3a7713b1edbc 1262 * ENET_Init.
AnnaBridge 171:3a7713b1edbc 1263 * @param ptpTimeData The special PTP timestamp data for search the receive timestamp.
AnnaBridge 171:3a7713b1edbc 1264 * @retval kStatus_Success Get 1588 timestamp success.
AnnaBridge 171:3a7713b1edbc 1265 * @retval kStatus_ENET_PtpTsRingEmpty 1588 timestamp ring empty.
AnnaBridge 171:3a7713b1edbc 1266 * @retval kStatus_ENET_PtpTsRingFull 1588 timestamp ring full.
AnnaBridge 171:3a7713b1edbc 1267 */
AnnaBridge 171:3a7713b1edbc 1268 status_t ENET_GetRxFrameTime(enet_handle_t *handle, enet_ptp_time_data_t *ptpTimeData);
AnnaBridge 171:3a7713b1edbc 1269
AnnaBridge 171:3a7713b1edbc 1270 /*!
AnnaBridge 171:3a7713b1edbc 1271 * @brief Gets the time stamp of the transmit frame.
AnnaBridge 171:3a7713b1edbc 1272 *
AnnaBridge 171:3a7713b1edbc 1273 * This function is used for PTP stack to get the timestamp captured by the ENET driver.
AnnaBridge 171:3a7713b1edbc 1274 *
AnnaBridge 171:3a7713b1edbc 1275 * @param handle The ENET handler pointer.This is the same state pointer used in
AnnaBridge 171:3a7713b1edbc 1276 * ENET_Init.
AnnaBridge 171:3a7713b1edbc 1277 * @param ptpTimeData The special PTP timestamp data for search the receive timestamp.
AnnaBridge 171:3a7713b1edbc 1278 * @retval kStatus_Success Get 1588 timestamp success.
AnnaBridge 171:3a7713b1edbc 1279 * @retval kStatus_ENET_PtpTsRingEmpty 1588 timestamp ring empty.
AnnaBridge 171:3a7713b1edbc 1280 * @retval kStatus_ENET_PtpTsRingFull 1588 timestamp ring full.
AnnaBridge 171:3a7713b1edbc 1281 */
AnnaBridge 171:3a7713b1edbc 1282 status_t ENET_GetTxFrameTime(enet_handle_t *handle, enet_ptp_time_data_t *ptpTimeData);
AnnaBridge 171:3a7713b1edbc 1283 #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
AnnaBridge 171:3a7713b1edbc 1284 /* @} */
AnnaBridge 171:3a7713b1edbc 1285
AnnaBridge 171:3a7713b1edbc 1286 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 1287 }
AnnaBridge 171:3a7713b1edbc 1288 #endif
AnnaBridge 171:3a7713b1edbc 1289
AnnaBridge 171:3a7713b1edbc 1290 /*! @}*/
AnnaBridge 171:3a7713b1edbc 1291
AnnaBridge 171:3a7713b1edbc 1292 #endif /* _FSL_ENET_H_ */