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TARGET_EFM32ZG_STK3200/TARGET_Silicon_Labs/mbed_rtx.h@138:093f2bd7b9eb, 2017-03-14 (annotated)
- Committer:
- <>
- Date:
- Tue Mar 14 16:20:51 2017 +0000
- Revision:
- 138:093f2bd7b9eb
- Parent:
- 132:9baf128c2fab
- Child:
- 139:856d2700e60b
Release 138 of the mbed library
Ports for Upcoming Targets
Fixes and Changes
3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716
3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741
3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780
3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831
3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836
3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840
3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844
3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850
3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860
3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880
3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795
3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828
3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842
3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843
3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879
3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902
3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 128:9bcdf88f62b0 | 1 | /* mbed Microcontroller Library |
<> | 128:9bcdf88f62b0 | 2 | * Copyright (c) 2016 ARM Limited |
<> | 128:9bcdf88f62b0 | 3 | * |
<> | 128:9bcdf88f62b0 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 128:9bcdf88f62b0 | 5 | * you may not use this file except in compliance with the License. |
<> | 128:9bcdf88f62b0 | 6 | * You may obtain a copy of the License at |
<> | 128:9bcdf88f62b0 | 7 | * |
<> | 128:9bcdf88f62b0 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 128:9bcdf88f62b0 | 9 | * |
<> | 128:9bcdf88f62b0 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 128:9bcdf88f62b0 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 128:9bcdf88f62b0 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 128:9bcdf88f62b0 | 13 | * See the License for the specific language governing permissions and |
<> | 128:9bcdf88f62b0 | 14 | * limitations under the License. |
<> | 128:9bcdf88f62b0 | 15 | */ |
<> | 128:9bcdf88f62b0 | 16 | |
<> | 128:9bcdf88f62b0 | 17 | #ifndef MBED_MBED_RTX_H |
<> | 128:9bcdf88f62b0 | 18 | #define MBED_MBED_RTX_H |
<> | 128:9bcdf88f62b0 | 19 | |
<> | 128:9bcdf88f62b0 | 20 | #include "clocking.h" |
<> | 128:9bcdf88f62b0 | 21 | |
<> | 128:9bcdf88f62b0 | 22 | #ifndef OS_CLOCK |
<> | 128:9bcdf88f62b0 | 23 | #define OS_CLOCK REFERENCE_FREQUENCY |
<> | 128:9bcdf88f62b0 | 24 | #endif |
<> | 128:9bcdf88f62b0 | 25 | |
<> | 132:9baf128c2fab | 26 | #if defined(__CC_ARM) |
<> | 132:9baf128c2fab | 27 | extern uint32_t HEAP$$Base; |
<> | 132:9baf128c2fab | 28 | extern uint32_t HEAP$$Limit; |
<> | 132:9baf128c2fab | 29 | extern uint32_t STACK$$Limit; |
<> | 132:9baf128c2fab | 30 | extern uint32_t STACK$$Base; |
<> | 132:9baf128c2fab | 31 | #ifndef INITIAL_SP |
<> | 132:9baf128c2fab | 32 | #define INITIAL_SP ((uint32_t)&STACK$$Limit) |
<> | 132:9baf128c2fab | 33 | #endif |
<> | 132:9baf128c2fab | 34 | #define ISR_STACK_START ((uint32_t)&STACK$$Base) |
<> | 132:9baf128c2fab | 35 | #define ISR_STACK_SIZE ((uint32_t) ((uint32_t)&STACK$$Limit - (uint32_t)&STACK$$Base)) |
<> | 132:9baf128c2fab | 36 | #define HEAP_START ((unsigned char*) ((uint32_t)&HEAP$$Base)) |
<> | 132:9baf128c2fab | 37 | #define HEAP_SIZE ((uint32_t) ((uint32_t)&HEAP$$Limit - (uint32_t)&HEAP$$Base)) |
<> | 132:9baf128c2fab | 38 | #endif |
<> | 132:9baf128c2fab | 39 | |
<> | 128:9bcdf88f62b0 | 40 | #if defined(TARGET_EFM32GG_STK3700) |
<> | 128:9bcdf88f62b0 | 41 | |
<> | 128:9bcdf88f62b0 | 42 | #ifndef INITIAL_SP |
<> | 128:9bcdf88f62b0 | 43 | #define INITIAL_SP (0x20020000UL) |
<> | 128:9bcdf88f62b0 | 44 | #endif |
<> | 128:9bcdf88f62b0 | 45 | |
<> | 128:9bcdf88f62b0 | 46 | #ifndef OS_TASKCNT |
<> | 128:9bcdf88f62b0 | 47 | #define OS_TASKCNT 14 |
<> | 128:9bcdf88f62b0 | 48 | #endif |
<> | 128:9bcdf88f62b0 | 49 | #ifndef OS_MAINSTKSIZE |
<> | 128:9bcdf88f62b0 | 50 | #define OS_MAINSTKSIZE 256 |
<> | 128:9bcdf88f62b0 | 51 | #endif |
<> | 128:9bcdf88f62b0 | 52 | |
<> | 128:9bcdf88f62b0 | 53 | #elif defined(TARGET_EFM32HG_STK3400) |
<> | 128:9bcdf88f62b0 | 54 | |
<> | 128:9bcdf88f62b0 | 55 | #ifndef INITIAL_SP |
<> | 128:9bcdf88f62b0 | 56 | #define INITIAL_SP (0x20002000UL) |
<> | 128:9bcdf88f62b0 | 57 | #endif |
<> | 128:9bcdf88f62b0 | 58 | |
<> | 128:9bcdf88f62b0 | 59 | #ifndef OS_TASKCNT |
<> | 128:9bcdf88f62b0 | 60 | #define OS_TASKCNT 6 |
<> | 128:9bcdf88f62b0 | 61 | #endif |
<> | 128:9bcdf88f62b0 | 62 | #ifndef OS_MAINSTKSIZE |
<> | 128:9bcdf88f62b0 | 63 | #define OS_MAINSTKSIZE 112 |
<> | 128:9bcdf88f62b0 | 64 | #endif |
<> | 128:9bcdf88f62b0 | 65 | |
<> | 128:9bcdf88f62b0 | 66 | #elif defined(TARGET_EFM32LG_STK3600) |
<> | 128:9bcdf88f62b0 | 67 | |
<> | 128:9bcdf88f62b0 | 68 | #ifndef INITIAL_SP |
<> | 128:9bcdf88f62b0 | 69 | #define INITIAL_SP (0x20008000UL) |
<> | 128:9bcdf88f62b0 | 70 | #endif |
<> | 128:9bcdf88f62b0 | 71 | |
<> | 128:9bcdf88f62b0 | 72 | #ifndef OS_TASKCNT |
<> | 128:9bcdf88f62b0 | 73 | #define OS_TASKCNT 14 |
<> | 128:9bcdf88f62b0 | 74 | #endif |
<> | 128:9bcdf88f62b0 | 75 | #ifndef OS_MAINSTKSIZE |
<> | 128:9bcdf88f62b0 | 76 | #define OS_MAINSTKSIZE 128 |
<> | 128:9bcdf88f62b0 | 77 | #endif |
<> | 128:9bcdf88f62b0 | 78 | |
<> | 128:9bcdf88f62b0 | 79 | #elif defined(TARGET_EFM32PG_STK3401) |
<> | 128:9bcdf88f62b0 | 80 | |
<> | 128:9bcdf88f62b0 | 81 | #ifndef INITIAL_SP |
<> | 128:9bcdf88f62b0 | 82 | #define INITIAL_SP (0x20008000UL) |
<> | 128:9bcdf88f62b0 | 83 | #endif |
<> | 128:9bcdf88f62b0 | 84 | |
<> | 128:9bcdf88f62b0 | 85 | #ifndef OS_TASKCNT |
<> | 128:9bcdf88f62b0 | 86 | #define OS_TASKCNT 14 |
<> | 128:9bcdf88f62b0 | 87 | #endif |
<> | 128:9bcdf88f62b0 | 88 | #ifndef OS_MAINSTKSIZE |
<> | 128:9bcdf88f62b0 | 89 | #define OS_MAINSTKSIZE 128 |
<> | 128:9bcdf88f62b0 | 90 | #endif |
<> | 128:9bcdf88f62b0 | 91 | |
<> | 128:9bcdf88f62b0 | 92 | #elif defined(TARGET_EFM32WG_STK3800) |
<> | 128:9bcdf88f62b0 | 93 | |
<> | 128:9bcdf88f62b0 | 94 | #ifndef INITIAL_SP |
<> | 128:9bcdf88f62b0 | 95 | #define INITIAL_SP (0x20008000UL) |
<> | 128:9bcdf88f62b0 | 96 | #endif |
<> | 128:9bcdf88f62b0 | 97 | |
<> | 128:9bcdf88f62b0 | 98 | #ifndef OS_TASKCNT |
<> | 128:9bcdf88f62b0 | 99 | #define OS_TASKCNT 14 |
<> | 128:9bcdf88f62b0 | 100 | #endif |
<> | 128:9bcdf88f62b0 | 101 | #ifndef OS_MAINSTKSIZE |
<> | 128:9bcdf88f62b0 | 102 | #define OS_MAINSTKSIZE 128 |
<> | 128:9bcdf88f62b0 | 103 | #endif |
<> | 128:9bcdf88f62b0 | 104 | |
<> | 132:9baf128c2fab | 105 | #elif defined(TARGET_EFR32MG1) |
<> | 132:9baf128c2fab | 106 | |
<> | 132:9baf128c2fab | 107 | #ifndef INITIAL_SP |
<> | 132:9baf128c2fab | 108 | #define INITIAL_SP (0x20007C00UL) |
<> | 132:9baf128c2fab | 109 | #endif |
<> | 132:9baf128c2fab | 110 | |
<> | 132:9baf128c2fab | 111 | #ifndef OS_TASKCNT |
<> | 132:9baf128c2fab | 112 | #define OS_TASKCNT 5 |
<> | 132:9baf128c2fab | 113 | #endif |
<> | 132:9baf128c2fab | 114 | #ifndef OS_MAINSTKSIZE |
<> | 132:9baf128c2fab | 115 | #define OS_MAINSTKSIZE 256 |
<> | 132:9baf128c2fab | 116 | #endif |
<> | 132:9baf128c2fab | 117 | |
<> | 128:9bcdf88f62b0 | 118 | #endif |
<> | 128:9bcdf88f62b0 | 119 | |
<> | 128:9bcdf88f62b0 | 120 | #endif // MBED_MBED_RTX_H |