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Diff: TARGET_HEXIWEAR/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct
- Revision:
- 127:25aea2a3f4e3
- Parent:
- 123:b0220dba8be7
- Child:
- 138:093f2bd7b9eb
--- a/TARGET_HEXIWEAR/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct Fri Sep 16 13:57:13 2016 +0100 +++ b/TARGET_HEXIWEAR/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct Fri Sep 30 16:49:46 2016 +0100 @@ -1,20 +1,21 @@ #! armcc -E /* ** ################################################################### -** Processors: MK64FN1M0VDC12 +** Processors: MK64FN1M0CAJ12 +** MK64FN1M0VDC12 ** MK64FN1M0VLL12 ** MK64FN1M0VLQ12 ** MK64FN1M0VMD12 ** ** Compiler: Keil ARM C/C++ Compiler ** Reference manual: K64P144M120SF5RM, Rev.2, January 2014 -** Version: rev. 2.8, 2015-02-19 -** Build: b151009 +** Version: rev. 2.9, 2016-03-21 +** Build: b160406 ** ** Abstract: ** Linker file for the Keil ARM C/C++ Compiler ** -** Copyright (c) 2015 Freescale Semiconductor, Inc. +** Copyright (c) 2016 Freescale Semiconductor, Inc. ** All rights reserved. ** ** Redistribution and use in source and binary forms, with or without modification, @@ -49,6 +50,10 @@ */ #define __ram_vector_table__ 1 +/* Heap 1/4 of ram and stack 1/8 */ +#define __stack_size__ 0x8000 +#define __heap_size__ 0x10000 + #if (defined(__ram_vector_table__)) #define __ram_vector_table_size__ 0x00000400 #else @@ -73,24 +78,44 @@ #define m_data_2_start 0x20000000 #define m_data_2_size 0x00030000 +/* Sizes */ +#if (defined(__stack_size__)) + #define Stack_Size __stack_size__ +#else + #define Stack_Size 0x0400 +#endif -LR_m_text m_interrupts_start m_text_size+m_interrupts_size+m_flash_config_size { ; load region size_region +#if (defined(__heap_size__)) + #define Heap_Size __heap_size__ +#else + #define Heap_Size 0x0400 +#endif + +LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address * (RESET,+FIRST) } - ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address + ER_m_flash_config m_flash_config_start FIXED m_flash_config_size { ; load address = execution address * (FlashConfig) } ER_m_text m_text_start m_text_size { ; load address = execution address * (InRoot$$Sections) .ANY (+RO) } + +#if (defined(__ram_vector_table__)) + VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size { + } +#else + VECTOR_RAM m_interrupts_start EMPTY 0 { + } +#endif RW_m_data m_data_start m_data_size { ; RW data .ANY (+RW +ZI) } - RW_IRAM1 m_data_2_start m_data_2_size { ; RW data + RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data .ANY (+RW +ZI) } - VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size { + RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up } }