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TARGET_NUCLEO_F334R8/stm32f3xx_hal_tim.h@122:f9eeca106725, 2016-07-07 (annotated)

Committer:: Kojto
Date:: Thu Jul 07 14:34:11 2016 +0100
Revision:: 122:f9eeca106725
Parent:: 92:4fc01daae5a5
Child:: 123:b0220dba8be7

Release 122 of the mbed library



Changes:

- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4

- Thread safety addition - mbed API should contain a statement about thread safety

- critical section API addition

- CAS API (core_util_atomic_incr/decr)

- DEVICE_ are generated from targets.json file, device.h deprecated

- Callback replaces FunctionPointer to provide std like interface

- mbed HAL API docs improvements

- toolchain - prexif attributes with MBED_

            - add new attributes - packed, weak, forcedinline, align

- target.json - contains targets definitions

- ST - L1XX - Cube update to 1.5

     - SPI clock selection fix (clock from APB domain)

     - F7 - Cube update v1.4.0

     - L0 -  baudrate init fix

     - L1 - Cube update v1.5

     - F3 - baudrate init fix, 3 targets CAN support

     - F4 - Cube update v1.12.0, 3 targets CAN support

     - L4XX - Cube update v1.5.1

     - F0 - update Cube to v1.5.0

     - L4 - 2 targets (L476RG/VG) CAN support

- NXP - pwm clock fix for KSDK2 MCU

      - LPC2368 - remove ARM toolchain support - due to regression

      - KSDK2 - fix SPI , I2C address and repeat start

- Silabs - some fixes backported from mbed 3

- Renesas - RZ_A1H - SystemCoreClockUpdate addition

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	86:04dd9b1680ae	1	/**
bogdanm	86:04dd9b1680ae	2	******************************************************************************
bogdanm	86:04dd9b1680ae	3	* @file stm32f3xx_hal_tim.h
bogdanm	86:04dd9b1680ae	4	* @author MCD Application Team
Kojto	122:f9eeca106725	5	* @version V1.2.1
Kojto	122:f9eeca106725	6	* @date 29-April-2015
bogdanm	86:04dd9b1680ae	7	* @brief Header file of TIM HAL module.
bogdanm	86:04dd9b1680ae	8	******************************************************************************
bogdanm	86:04dd9b1680ae	9	* @attention
bogdanm	86:04dd9b1680ae	10	*
Kojto	122:f9eeca106725	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm	86:04dd9b1680ae	12	*
bogdanm	86:04dd9b1680ae	13	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	86:04dd9b1680ae	14	* are permitted provided that the following conditions are met:
bogdanm	86:04dd9b1680ae	15	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	86:04dd9b1680ae	16	* this list of conditions and the following disclaimer.
bogdanm	86:04dd9b1680ae	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	86:04dd9b1680ae	18	* this list of conditions and the following disclaimer in the documentation
bogdanm	86:04dd9b1680ae	19	* and/or other materials provided with the distribution.
bogdanm	86:04dd9b1680ae	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	86:04dd9b1680ae	21	* may be used to endorse or promote products derived from this software
bogdanm	86:04dd9b1680ae	22	* without specific prior written permission.
bogdanm	86:04dd9b1680ae	23	*
bogdanm	86:04dd9b1680ae	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	86:04dd9b1680ae	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	86:04dd9b1680ae	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	86:04dd9b1680ae	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	86:04dd9b1680ae	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	86:04dd9b1680ae	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	86:04dd9b1680ae	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	86:04dd9b1680ae	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	86:04dd9b1680ae	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	86:04dd9b1680ae	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	86:04dd9b1680ae	34	*
bogdanm	86:04dd9b1680ae	35	******************************************************************************
bogdanm	86:04dd9b1680ae	36	*/
bogdanm	86:04dd9b1680ae	37
bogdanm	86:04dd9b1680ae	38	/* Define to prevent recursive inclusion -------------------------------------*/
bogdanm	86:04dd9b1680ae	39	#ifndef __STM32F3xx_HAL_TIM_H
bogdanm	86:04dd9b1680ae	40	#define __STM32F3xx_HAL_TIM_H
bogdanm	86:04dd9b1680ae	41
bogdanm	86:04dd9b1680ae	42	#ifdef __cplusplus
bogdanm	86:04dd9b1680ae	43	extern "C" {
bogdanm	86:04dd9b1680ae	44	#endif
bogdanm	86:04dd9b1680ae	45
bogdanm	86:04dd9b1680ae	46	/* Includes ------------------------------------------------------------------*/
bogdanm	86:04dd9b1680ae	47	#include "stm32f3xx_hal_def.h"
bogdanm	86:04dd9b1680ae	48
bogdanm	86:04dd9b1680ae	49	/** @addtogroup STM32F3xx_HAL_Driver
bogdanm	86:04dd9b1680ae	50	* @{
bogdanm	86:04dd9b1680ae	51	*/
bogdanm	86:04dd9b1680ae	52
bogdanm	86:04dd9b1680ae	53	/** @addtogroup TIM
bogdanm	86:04dd9b1680ae	54	* @{
bogdanm	86:04dd9b1680ae	55	*/
bogdanm	86:04dd9b1680ae	56
bogdanm	86:04dd9b1680ae	57	/* Exported types ------------------------------------------------------------*/
bogdanm	92:4fc01daae5a5	58	/** @defgroup TIM_Exported_Types TIM Exported Types
bogdanm	92:4fc01daae5a5	59	* @{
bogdanm	92:4fc01daae5a5	60	*/
bogdanm	86:04dd9b1680ae	61	/**
bogdanm	86:04dd9b1680ae	62	* @brief TIM Time base Configuration Structure definition
bogdanm	86:04dd9b1680ae	63	*/
bogdanm	86:04dd9b1680ae	64	typedef struct
bogdanm	86:04dd9b1680ae	65	{
bogdanm	86:04dd9b1680ae	66	uint32_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
bogdanm	86:04dd9b1680ae	67	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
bogdanm	86:04dd9b1680ae	68
bogdanm	86:04dd9b1680ae	69	uint32_t CounterMode; /*!< Specifies the counter mode.
bogdanm	86:04dd9b1680ae	70	This parameter can be a value of @ref TIM_Counter_Mode */
bogdanm	86:04dd9b1680ae	71
bogdanm	86:04dd9b1680ae	72	uint32_t Period; /*!< Specifies the period value to be loaded into the active
bogdanm	86:04dd9b1680ae	73	Auto-Reload Register at the next update event.
bogdanm	86:04dd9b1680ae	74	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
bogdanm	86:04dd9b1680ae	75
bogdanm	86:04dd9b1680ae	76	uint32_t ClockDivision; /*!< Specifies the clock division.
bogdanm	86:04dd9b1680ae	77	This parameter can be a value of @ref TIM_ClockDivision */
bogdanm	86:04dd9b1680ae	78
bogdanm	86:04dd9b1680ae	79	uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
bogdanm	86:04dd9b1680ae	80	reaches zero, an update event is generated and counting restarts
bogdanm	86:04dd9b1680ae	81	from the RCR value (N).
bogdanm	86:04dd9b1680ae	82	This means in PWM mode that (N+1) corresponds to:
bogdanm	86:04dd9b1680ae	83	- the number of PWM periods in edge-aligned mode
bogdanm	86:04dd9b1680ae	84	- the number of half PWM period in center-aligned mode
Kojto	122:f9eeca106725	85	GP timers: this parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
Kojto	122:f9eeca106725	86	Advanced timers: this parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
bogdanm	86:04dd9b1680ae	87	} TIM_Base_InitTypeDef;
bogdanm	86:04dd9b1680ae	88
bogdanm	86:04dd9b1680ae	89	/**
bogdanm	86:04dd9b1680ae	90	* @brief TIM Output Compare Configuration Structure definition
bogdanm	86:04dd9b1680ae	91	*/
bogdanm	86:04dd9b1680ae	92	typedef struct
bogdanm	86:04dd9b1680ae	93	{
bogdanm	86:04dd9b1680ae	94	uint32_t OCMode; /*!< Specifies the TIM mode.
bogdanm	86:04dd9b1680ae	95	This parameter can be a value of @ref TIMEx_Output_Compare_and_PWM_modes */
bogdanm	86:04dd9b1680ae	96
bogdanm	86:04dd9b1680ae	97	uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
bogdanm	86:04dd9b1680ae	98	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
bogdanm	86:04dd9b1680ae	99
bogdanm	86:04dd9b1680ae	100	uint32_t OCPolarity; /*!< Specifies the output polarity.
bogdanm	86:04dd9b1680ae	101	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
bogdanm	86:04dd9b1680ae	102
bogdanm	86:04dd9b1680ae	103	uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
bogdanm	86:04dd9b1680ae	104	This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
bogdanm	86:04dd9b1680ae	105	@note This parameter is valid only for TIM1 and TIM8. */
bogdanm	86:04dd9b1680ae	106
bogdanm	86:04dd9b1680ae	107	uint32_t OCFastMode; /*!< Specifies the Fast mode state.
bogdanm	86:04dd9b1680ae	108	This parameter can be a value of @ref TIM_Output_Fast_State
bogdanm	86:04dd9b1680ae	109	@note This parameter is valid only in PWM1 and PWM2 mode. */
bogdanm	86:04dd9b1680ae	110
bogdanm	86:04dd9b1680ae	111
bogdanm	86:04dd9b1680ae	112	uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
bogdanm	86:04dd9b1680ae	113	This parameter can be a value of @ref TIM_Output_Compare_Idle_State
bogdanm	86:04dd9b1680ae	114	@note This parameter is valid only for TIM1 and TIM8. */
bogdanm	86:04dd9b1680ae	115
bogdanm	86:04dd9b1680ae	116	uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
bogdanm	86:04dd9b1680ae	117	This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
bogdanm	86:04dd9b1680ae	118	@note This parameter is valid only for TIM1 and TIM8. */
bogdanm	86:04dd9b1680ae	119	} TIM_OC_InitTypeDef;
bogdanm	86:04dd9b1680ae	120
bogdanm	86:04dd9b1680ae	121	/**
bogdanm	86:04dd9b1680ae	122	* @brief TIM One Pulse Mode Configuration Structure definition
bogdanm	86:04dd9b1680ae	123	*/
bogdanm	86:04dd9b1680ae	124	typedef struct
bogdanm	86:04dd9b1680ae	125	{
bogdanm	86:04dd9b1680ae	126	uint32_t OCMode; /*!< Specifies the TIM mode.
bogdanm	86:04dd9b1680ae	127	This parameter can be a value of @ref TIMEx_Output_Compare_and_PWM_modes */
bogdanm	86:04dd9b1680ae	128
bogdanm	86:04dd9b1680ae	129	uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
bogdanm	86:04dd9b1680ae	130	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
bogdanm	86:04dd9b1680ae	131
bogdanm	86:04dd9b1680ae	132	uint32_t OCPolarity; /*!< Specifies the output polarity.
bogdanm	86:04dd9b1680ae	133	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
bogdanm	86:04dd9b1680ae	134
bogdanm	86:04dd9b1680ae	135	uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
bogdanm	86:04dd9b1680ae	136	This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
bogdanm	86:04dd9b1680ae	137	@note This parameter is valid only for TIM1 and TIM8. */
bogdanm	86:04dd9b1680ae	138
bogdanm	86:04dd9b1680ae	139	uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
bogdanm	86:04dd9b1680ae	140	This parameter can be a value of @ref TIM_Output_Compare_Idle_State
bogdanm	86:04dd9b1680ae	141	@note This parameter is valid only for TIM1 and TIM8. */
bogdanm	86:04dd9b1680ae	142
bogdanm	86:04dd9b1680ae	143	uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
bogdanm	86:04dd9b1680ae	144	This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
bogdanm	86:04dd9b1680ae	145	@note This parameter is valid only for TIM1 and TIM8. */
bogdanm	86:04dd9b1680ae	146
bogdanm	86:04dd9b1680ae	147	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
bogdanm	86:04dd9b1680ae	148	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
bogdanm	86:04dd9b1680ae	149
bogdanm	86:04dd9b1680ae	150	uint32_t ICSelection; /*!< Specifies the input.
bogdanm	86:04dd9b1680ae	151	This parameter can be a value of @ref TIM_Input_Capture_Selection */
bogdanm	86:04dd9b1680ae	152
bogdanm	86:04dd9b1680ae	153	uint32_t ICFilter; /*!< Specifies the input capture filter.
bogdanm	86:04dd9b1680ae	154	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
bogdanm	86:04dd9b1680ae	155	} TIM_OnePulse_InitTypeDef;
bogdanm	86:04dd9b1680ae	156
bogdanm	86:04dd9b1680ae	157
bogdanm	86:04dd9b1680ae	158	/**
bogdanm	86:04dd9b1680ae	159	* @brief TIM Input Capture Configuration Structure definition
bogdanm	86:04dd9b1680ae	160	*/
bogdanm	86:04dd9b1680ae	161	typedef struct
bogdanm	86:04dd9b1680ae	162	{
bogdanm	86:04dd9b1680ae	163	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
bogdanm	86:04dd9b1680ae	164	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
bogdanm	86:04dd9b1680ae	165
bogdanm	86:04dd9b1680ae	166	uint32_t ICSelection; /*!< Specifies the input.
bogdanm	86:04dd9b1680ae	167	This parameter can be a value of @ref TIM_Input_Capture_Selection */
bogdanm	86:04dd9b1680ae	168
bogdanm	86:04dd9b1680ae	169	uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
bogdanm	86:04dd9b1680ae	170	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
bogdanm	86:04dd9b1680ae	171
bogdanm	86:04dd9b1680ae	172	uint32_t ICFilter; /*!< Specifies the input capture filter.
bogdanm	86:04dd9b1680ae	173	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
bogdanm	86:04dd9b1680ae	174	} TIM_IC_InitTypeDef;
bogdanm	86:04dd9b1680ae	175
bogdanm	86:04dd9b1680ae	176	/**
bogdanm	86:04dd9b1680ae	177	* @brief TIM Encoder Configuration Structure definition
bogdanm	86:04dd9b1680ae	178	*/
bogdanm	86:04dd9b1680ae	179	typedef struct
bogdanm	86:04dd9b1680ae	180	{
bogdanm	86:04dd9b1680ae	181	uint32_t EncoderMode; /*!< Specifies the active edge of the input signal.
bogdanm	86:04dd9b1680ae	182	This parameter can be a value of @ref TIM_Encoder_Mode */
bogdanm	86:04dd9b1680ae	183
bogdanm	86:04dd9b1680ae	184	uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
bogdanm	86:04dd9b1680ae	185	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
bogdanm	86:04dd9b1680ae	186
bogdanm	86:04dd9b1680ae	187	uint32_t IC1Selection; /*!< Specifies the input.
bogdanm	86:04dd9b1680ae	188	This parameter can be a value of @ref TIM_Input_Capture_Selection */
bogdanm	86:04dd9b1680ae	189
bogdanm	86:04dd9b1680ae	190	uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
bogdanm	86:04dd9b1680ae	191	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
bogdanm	86:04dd9b1680ae	192
bogdanm	86:04dd9b1680ae	193	uint32_t IC1Filter; /*!< Specifies the input capture filter.
bogdanm	86:04dd9b1680ae	194	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
bogdanm	86:04dd9b1680ae	195
bogdanm	86:04dd9b1680ae	196	uint32_t IC2Polarity; /*!< Specifies the active edge of the input signal.
bogdanm	86:04dd9b1680ae	197	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
bogdanm	86:04dd9b1680ae	198
bogdanm	86:04dd9b1680ae	199	uint32_t IC2Selection; /*!< Specifies the input.
bogdanm	86:04dd9b1680ae	200	This parameter can be a value of @ref TIM_Input_Capture_Selection */
bogdanm	86:04dd9b1680ae	201
bogdanm	86:04dd9b1680ae	202	uint32_t IC2Prescaler; /*!< Specifies the Input Capture Prescaler.
bogdanm	86:04dd9b1680ae	203	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
bogdanm	86:04dd9b1680ae	204
bogdanm	86:04dd9b1680ae	205	uint32_t IC2Filter; /*!< Specifies the input capture filter.
bogdanm	86:04dd9b1680ae	206	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
bogdanm	86:04dd9b1680ae	207	} TIM_Encoder_InitTypeDef;
bogdanm	86:04dd9b1680ae	208
bogdanm	86:04dd9b1680ae	209
bogdanm	86:04dd9b1680ae	210	/**
Kojto	122:f9eeca106725	211	* @brief TIM Clock Configuration Handle Structure definition
bogdanm	86:04dd9b1680ae	212	*/
bogdanm	86:04dd9b1680ae	213	typedef struct
bogdanm	86:04dd9b1680ae	214	{
bogdanm	86:04dd9b1680ae	215	uint32_t ClockSource; /*!< TIM clock sources
bogdanm	86:04dd9b1680ae	216	This parameter can be a value of @ref TIM_Clock_Source */
bogdanm	86:04dd9b1680ae	217	uint32_t ClockPolarity; /*!< TIM clock polarity
bogdanm	86:04dd9b1680ae	218	This parameter can be a value of @ref TIM_Clock_Polarity */
bogdanm	86:04dd9b1680ae	219	uint32_t ClockPrescaler; /*!< TIM clock prescaler
bogdanm	86:04dd9b1680ae	220	This parameter can be a value of @ref TIM_Clock_Prescaler */
bogdanm	86:04dd9b1680ae	221	uint32_t ClockFilter; /*!< TIM clock filter
Kojto	122:f9eeca106725	222	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
bogdanm	86:04dd9b1680ae	223	}TIM_ClockConfigTypeDef;
bogdanm	86:04dd9b1680ae	224
bogdanm	86:04dd9b1680ae	225	/**
Kojto	122:f9eeca106725	226	* @brief TIM Clear Input Configuration Handle Structure definition
bogdanm	86:04dd9b1680ae	227	*/
bogdanm	86:04dd9b1680ae	228	typedef struct
bogdanm	86:04dd9b1680ae	229	{
bogdanm	86:04dd9b1680ae	230	uint32_t ClearInputState; /*!< TIM clear Input state
bogdanm	86:04dd9b1680ae	231	This parameter can be ENABLE or DISABLE */
bogdanm	86:04dd9b1680ae	232	uint32_t ClearInputSource; /*!< TIM clear Input sources
bogdanm	86:04dd9b1680ae	233	This parameter can be a value of @ref TIMEx_ClearInput_Source */
bogdanm	86:04dd9b1680ae	234	uint32_t ClearInputPolarity; /*!< TIM Clear Input polarity
bogdanm	86:04dd9b1680ae	235	This parameter can be a value of @ref TIM_ClearInput_Polarity */
bogdanm	86:04dd9b1680ae	236	uint32_t ClearInputPrescaler; /*!< TIM Clear Input prescaler
bogdanm	86:04dd9b1680ae	237	This parameter can be a value of @ref TIM_ClearInput_Prescaler */
bogdanm	86:04dd9b1680ae	238	uint32_t ClearInputFilter; /*!< TIM Clear Input filter
Kojto	122:f9eeca106725	239	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
bogdanm	86:04dd9b1680ae	240	}TIM_ClearInputConfigTypeDef;
bogdanm	86:04dd9b1680ae	241
bogdanm	86:04dd9b1680ae	242	/**
bogdanm	86:04dd9b1680ae	243	* @brief TIM Slave configuration Structure definition
bogdanm	86:04dd9b1680ae	244	*/
bogdanm	86:04dd9b1680ae	245	typedef struct {
bogdanm	86:04dd9b1680ae	246	uint32_t SlaveMode; /*!< Slave mode selection
bogdanm	86:04dd9b1680ae	247	This parameter can be a value of @ref TIMEx_Slave_Mode */
bogdanm	86:04dd9b1680ae	248	uint32_t InputTrigger; /*!< Input Trigger source
bogdanm	86:04dd9b1680ae	249	This parameter can be a value of @ref TIM_Trigger_Selection */
bogdanm	86:04dd9b1680ae	250	uint32_t TriggerPolarity; /*!< Input Trigger polarity
bogdanm	86:04dd9b1680ae	251	This parameter can be a value of @ref TIM_Trigger_Polarity */
bogdanm	86:04dd9b1680ae	252	uint32_t TriggerPrescaler; /*!< Input trigger prescaler
bogdanm	86:04dd9b1680ae	253	This parameter can be a value of @ref TIM_Trigger_Prescaler */
bogdanm	86:04dd9b1680ae	254	uint32_t TriggerFilter; /*!< Input trigger filter
Kojto	122:f9eeca106725	255	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
bogdanm	86:04dd9b1680ae	256
bogdanm	86:04dd9b1680ae	257	}TIM_SlaveConfigTypeDef;
bogdanm	86:04dd9b1680ae	258
bogdanm	86:04dd9b1680ae	259	/**
bogdanm	86:04dd9b1680ae	260	* @brief HAL State structures definition
bogdanm	86:04dd9b1680ae	261	*/
bogdanm	86:04dd9b1680ae	262	typedef enum
bogdanm	86:04dd9b1680ae	263	{
bogdanm	86:04dd9b1680ae	264	HAL_TIM_STATE_RESET = 0x00, /!< Peripheral not yet initialized or disabled /
bogdanm	86:04dd9b1680ae	265	HAL_TIM_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
bogdanm	86:04dd9b1680ae	266	HAL_TIM_STATE_BUSY = 0x02, /!< An internal process is ongoing /
bogdanm	86:04dd9b1680ae	267	HAL_TIM_STATE_TIMEOUT = 0x03, /!< Timeout state /
bogdanm	86:04dd9b1680ae	268	HAL_TIM_STATE_ERROR = 0x04 /!< Reception process is ongoing /
bogdanm	86:04dd9b1680ae	269	}HAL_TIM_StateTypeDef;
bogdanm	86:04dd9b1680ae	270
bogdanm	86:04dd9b1680ae	271	/**
bogdanm	86:04dd9b1680ae	272	* @brief HAL Active channel structures definition
bogdanm	86:04dd9b1680ae	273	*/
bogdanm	86:04dd9b1680ae	274	typedef enum
bogdanm	86:04dd9b1680ae	275	{
bogdanm	86:04dd9b1680ae	276	HAL_TIM_ACTIVE_CHANNEL_1 = 0x01, /!< The active channel is 1 /
bogdanm	86:04dd9b1680ae	277	HAL_TIM_ACTIVE_CHANNEL_2 = 0x02, /!< The active channel is 2 /
bogdanm	86:04dd9b1680ae	278	HAL_TIM_ACTIVE_CHANNEL_3 = 0x04, /!< The active channel is 3 /
bogdanm	86:04dd9b1680ae	279	HAL_TIM_ACTIVE_CHANNEL_4 = 0x08, /!< The active channel is 4 /
bogdanm	86:04dd9b1680ae	280	HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00 /!< All active channels cleared /
bogdanm	86:04dd9b1680ae	281	}HAL_TIM_ActiveChannel;
bogdanm	86:04dd9b1680ae	282
bogdanm	86:04dd9b1680ae	283	/**
bogdanm	86:04dd9b1680ae	284	* @brief TIM Time Base Handle Structure definition
bogdanm	86:04dd9b1680ae	285	*/
bogdanm	86:04dd9b1680ae	286	typedef struct
bogdanm	86:04dd9b1680ae	287	{
bogdanm	86:04dd9b1680ae	288	TIM_TypeDef Instance; /!< Register base address */
bogdanm	86:04dd9b1680ae	289	TIM_Base_InitTypeDef Init; /!< TIM Time Base required parameters /
bogdanm	86:04dd9b1680ae	290	HAL_TIM_ActiveChannel Channel; /!< Active channel /
bogdanm	86:04dd9b1680ae	291	DMA_HandleTypeDef hdma[7]; /!< DMA Handlers array
Kojto	122:f9eeca106725	292	This array is accessed by a @ref TIM_DMA_Handle_index */
bogdanm	86:04dd9b1680ae	293	HAL_LockTypeDef Lock; /!< Locking object /
bogdanm	86:04dd9b1680ae	294	__IO HAL_TIM_StateTypeDef State; /!< TIM operation state /
bogdanm	86:04dd9b1680ae	295	}TIM_HandleTypeDef;
bogdanm	86:04dd9b1680ae	296
bogdanm	92:4fc01daae5a5	297	/**
bogdanm	92:4fc01daae5a5	298	* @}
bogdanm	92:4fc01daae5a5	299	*/
Kojto	122:f9eeca106725	300	/* End of exported types -----------------------------------------------------*/
bogdanm	92:4fc01daae5a5	301
bogdanm	86:04dd9b1680ae	302	/* Exported constants --------------------------------------------------------*/
bogdanm	92:4fc01daae5a5	303	/** @defgroup TIM_Exported_Constants TIM Exported Constants
bogdanm	86:04dd9b1680ae	304	* @{
bogdanm	86:04dd9b1680ae	305	*/
bogdanm	86:04dd9b1680ae	306
Kojto	122:f9eeca106725	307	/** @defgroup TIM_Input_Channel_Polarity TIM Input Channel Polarity
bogdanm	86:04dd9b1680ae	308	* @{
bogdanm	86:04dd9b1680ae	309	*/
bogdanm	86:04dd9b1680ae	310	#define TIM_INPUTCHANNELPOLARITY_RISING ((uint32_t)0x00000000) /!< Polarity for TIx source /
bogdanm	86:04dd9b1680ae	311	#define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /!< Polarity for TIx source /
bogdanm	86:04dd9b1680ae	312	#define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P \| TIM_CCER_CC1NP) /!< Polarity for TIx source /
bogdanm	86:04dd9b1680ae	313	/**
bogdanm	86:04dd9b1680ae	314	* @}
bogdanm	86:04dd9b1680ae	315	*/
bogdanm	86:04dd9b1680ae	316
bogdanm	92:4fc01daae5a5	317	/** @defgroup TIM_ETR_Polarity TIM ETR Polarity
bogdanm	86:04dd9b1680ae	318	* @{
bogdanm	86:04dd9b1680ae	319	*/
bogdanm	86:04dd9b1680ae	320	#define TIM_ETRPOLARITY_INVERTED (TIM_SMCR_ETP) /!< Polarity for ETR source /
bogdanm	86:04dd9b1680ae	321	#define TIM_ETRPOLARITY_NONINVERTED ((uint32_t)0x0000) /!< Polarity for ETR source /
bogdanm	86:04dd9b1680ae	322	/**
bogdanm	86:04dd9b1680ae	323	* @}
bogdanm	86:04dd9b1680ae	324	*/
bogdanm	86:04dd9b1680ae	325
bogdanm	92:4fc01daae5a5	326	/** @defgroup TIM_ETR_Prescaler TIM ETR Prescaler
bogdanm	86:04dd9b1680ae	327	* @{
bogdanm	86:04dd9b1680ae	328	*/
bogdanm	86:04dd9b1680ae	329	#define TIM_ETRPRESCALER_DIV1 ((uint32_t)0x0000) /!< No prescaler is used /
bogdanm	86:04dd9b1680ae	330	#define TIM_ETRPRESCALER_DIV2 (TIM_SMCR_ETPS_0) /!< ETR input source is divided by 2 /
bogdanm	86:04dd9b1680ae	331	#define TIM_ETRPRESCALER_DIV4 (TIM_SMCR_ETPS_1) /!< ETR input source is divided by 4 /
bogdanm	86:04dd9b1680ae	332	#define TIM_ETRPRESCALER_DIV8 (TIM_SMCR_ETPS) /!< ETR input source is divided by 8 /
bogdanm	86:04dd9b1680ae	333	/**
bogdanm	86:04dd9b1680ae	334	* @}
bogdanm	86:04dd9b1680ae	335	*/
bogdanm	86:04dd9b1680ae	336
bogdanm	92:4fc01daae5a5	337	/** @defgroup TIM_Counter_Mode TIM Counter Mode
bogdanm	86:04dd9b1680ae	338	* @{
bogdanm	86:04dd9b1680ae	339	*/
bogdanm	86:04dd9b1680ae	340	#define TIM_COUNTERMODE_UP ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	341	#define TIM_COUNTERMODE_DOWN TIM_CR1_DIR
bogdanm	86:04dd9b1680ae	342	#define TIM_COUNTERMODE_CENTERALIGNED1 TIM_CR1_CMS_0
bogdanm	86:04dd9b1680ae	343	#define TIM_COUNTERMODE_CENTERALIGNED2 TIM_CR1_CMS_1
bogdanm	86:04dd9b1680ae	344	#define TIM_COUNTERMODE_CENTERALIGNED3 TIM_CR1_CMS
bogdanm	86:04dd9b1680ae	345	/**
bogdanm	86:04dd9b1680ae	346	* @}
bogdanm	86:04dd9b1680ae	347	*/
bogdanm	86:04dd9b1680ae	348
bogdanm	92:4fc01daae5a5	349	/** @defgroup TIM_ClockDivision TIM Clock Division
bogdanm	86:04dd9b1680ae	350	* @{
bogdanm	86:04dd9b1680ae	351	*/
bogdanm	86:04dd9b1680ae	352	#define TIM_CLOCKDIVISION_DIV1 ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	353	#define TIM_CLOCKDIVISION_DIV2 (TIM_CR1_CKD_0)
bogdanm	86:04dd9b1680ae	354	#define TIM_CLOCKDIVISION_DIV4 (TIM_CR1_CKD_1)
bogdanm	86:04dd9b1680ae	355	/**
bogdanm	86:04dd9b1680ae	356	* @}
bogdanm	86:04dd9b1680ae	357	*/
bogdanm	86:04dd9b1680ae	358
bogdanm	92:4fc01daae5a5	359	/** @defgroup TIM_Output_Fast_State TIM Output Fast State
bogdanm	86:04dd9b1680ae	360	* @{
bogdanm	86:04dd9b1680ae	361	*/
bogdanm	86:04dd9b1680ae	362	#define TIM_OCFAST_DISABLE ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	363	#define TIM_OCFAST_ENABLE (TIM_CCMR1_OC1FE)
bogdanm	86:04dd9b1680ae	364	/**
bogdanm	86:04dd9b1680ae	365	* @}
bogdanm	86:04dd9b1680ae	366	*/
bogdanm	86:04dd9b1680ae	367
bogdanm	92:4fc01daae5a5	368	/** @defgroup TIM_Output_Compare_Polarity TIM Output Compare Polarity
bogdanm	86:04dd9b1680ae	369	* @{
bogdanm	86:04dd9b1680ae	370	*/
bogdanm	86:04dd9b1680ae	371	#define TIM_OCPOLARITY_HIGH ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	372	#define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P)
bogdanm	86:04dd9b1680ae	373	/**
bogdanm	86:04dd9b1680ae	374	* @}
bogdanm	86:04dd9b1680ae	375	*/
bogdanm	86:04dd9b1680ae	376
bogdanm	92:4fc01daae5a5	377	/** @defgroup TIM_Output_Compare_N_Polarity TIM Complementary Output Compare Polarity
bogdanm	86:04dd9b1680ae	378	* @{
bogdanm	86:04dd9b1680ae	379	*/
bogdanm	86:04dd9b1680ae	380	#define TIM_OCNPOLARITY_HIGH ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	381	#define TIM_OCNPOLARITY_LOW (TIM_CCER_CC1NP)
bogdanm	86:04dd9b1680ae	382	/**
bogdanm	86:04dd9b1680ae	383	* @}
bogdanm	86:04dd9b1680ae	384	*/
bogdanm	86:04dd9b1680ae	385
bogdanm	92:4fc01daae5a5	386	/** @defgroup TIM_Output_Compare_Idle_State TIM Output Compare Idle State
bogdanm	86:04dd9b1680ae	387	* @{
bogdanm	86:04dd9b1680ae	388	*/
bogdanm	86:04dd9b1680ae	389	#define TIM_OCIDLESTATE_SET (TIM_CR2_OIS1)
bogdanm	86:04dd9b1680ae	390	#define TIM_OCIDLESTATE_RESET ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	391	/**
bogdanm	86:04dd9b1680ae	392	* @}
bogdanm	86:04dd9b1680ae	393	*/
bogdanm	86:04dd9b1680ae	394
bogdanm	92:4fc01daae5a5	395	/** @defgroup TIM_Output_Compare_N_Idle_State TIM Complementary Output Compare Idle State
bogdanm	86:04dd9b1680ae	396	* @{
bogdanm	86:04dd9b1680ae	397	*/
bogdanm	86:04dd9b1680ae	398	#define TIM_OCNIDLESTATE_SET (TIM_CR2_OIS1N)
bogdanm	86:04dd9b1680ae	399	#define TIM_OCNIDLESTATE_RESET ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	400	/**
bogdanm	86:04dd9b1680ae	401	* @}
bogdanm	86:04dd9b1680ae	402	*/
bogdanm	86:04dd9b1680ae	403
bogdanm	92:4fc01daae5a5	404	/** @defgroup TIM_Input_Capture_Polarity TIM Input Capture Polarity
bogdanm	86:04dd9b1680ae	405	* @{
bogdanm	86:04dd9b1680ae	406	*/
bogdanm	86:04dd9b1680ae	407	#define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING
bogdanm	86:04dd9b1680ae	408	#define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING
bogdanm	86:04dd9b1680ae	409	#define TIM_ICPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE
bogdanm	86:04dd9b1680ae	410	/**
bogdanm	86:04dd9b1680ae	411	* @}
bogdanm	86:04dd9b1680ae	412	*/
bogdanm	86:04dd9b1680ae	413
bogdanm	92:4fc01daae5a5	414	/** @defgroup TIM_Input_Capture_Selection TIM Input Capture Selection
bogdanm	86:04dd9b1680ae	415	* @{
bogdanm	86:04dd9b1680ae	416	*/
bogdanm	86:04dd9b1680ae	417	#define TIM_ICSELECTION_DIRECTTI (TIM_CCMR1_CC1S_0) /*!< TIM Input 1, 2, 3 or 4 is selected to be
bogdanm	86:04dd9b1680ae	418	connected to IC1, IC2, IC3 or IC4, respectively */
bogdanm	86:04dd9b1680ae	419	#define TIM_ICSELECTION_INDIRECTTI (TIM_CCMR1_CC1S_1) /*!< TIM Input 1, 2, 3 or 4 is selected to be
bogdanm	86:04dd9b1680ae	420	connected to IC2, IC1, IC4 or IC3, respectively */
bogdanm	86:04dd9b1680ae	421	#define TIM_ICSELECTION_TRC (TIM_CCMR1_CC1S) /!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC /
bogdanm	86:04dd9b1680ae	422	/**
bogdanm	86:04dd9b1680ae	423	* @}
bogdanm	86:04dd9b1680ae	424	*/
bogdanm	86:04dd9b1680ae	425
bogdanm	92:4fc01daae5a5	426	/** @defgroup TIM_Input_Capture_Prescaler TIM Input Capture Prescaler
bogdanm	86:04dd9b1680ae	427	* @{
bogdanm	86:04dd9b1680ae	428	*/
bogdanm	86:04dd9b1680ae	429	#define TIM_ICPSC_DIV1 ((uint32_t)0x0000) /!< Capture performed each time an edge is detected on the capture input /
bogdanm	86:04dd9b1680ae	430	#define TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0) /!< Capture performed once every 2 events /
bogdanm	86:04dd9b1680ae	431	#define TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1) /!< Capture performed once every 4 events /
bogdanm	86:04dd9b1680ae	432	#define TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC) /!< Capture performed once every 8 events /
bogdanm	86:04dd9b1680ae	433	/**
bogdanm	86:04dd9b1680ae	434	* @}
bogdanm	86:04dd9b1680ae	435	*/
bogdanm	86:04dd9b1680ae	436
bogdanm	92:4fc01daae5a5	437	/** @defgroup TIM_One_Pulse_Mode TIM One Pulse Mode
bogdanm	86:04dd9b1680ae	438	* @{
bogdanm	86:04dd9b1680ae	439	*/
bogdanm	86:04dd9b1680ae	440	#define TIM_OPMODE_SINGLE (TIM_CR1_OPM)
bogdanm	86:04dd9b1680ae	441	#define TIM_OPMODE_REPETITIVE ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	442	/**
bogdanm	86:04dd9b1680ae	443	* @}
bogdanm	86:04dd9b1680ae	444	*/
Kojto	122:f9eeca106725	445
bogdanm	92:4fc01daae5a5	446	/** @defgroup TIM_Encoder_Mode TIM Encoder Mode
bogdanm	86:04dd9b1680ae	447	* @{
bogdanm	86:04dd9b1680ae	448	*/
bogdanm	86:04dd9b1680ae	449	#define TIM_ENCODERMODE_TI1 (TIM_SMCR_SMS_0)
bogdanm	86:04dd9b1680ae	450	#define TIM_ENCODERMODE_TI2 (TIM_SMCR_SMS_1)
bogdanm	86:04dd9b1680ae	451	#define TIM_ENCODERMODE_TI12 (TIM_SMCR_SMS_1 \| TIM_SMCR_SMS_0)
bogdanm	86:04dd9b1680ae	452	/**
bogdanm	86:04dd9b1680ae	453	* @}
bogdanm	86:04dd9b1680ae	454	*/
Kojto	122:f9eeca106725	455
Kojto	122:f9eeca106725	456	/** @defgroup TIM_Interrupt_definition TIM Interrupt Definition
bogdanm	86:04dd9b1680ae	457	* @{
bogdanm	86:04dd9b1680ae	458	*/
bogdanm	86:04dd9b1680ae	459	#define TIM_IT_UPDATE (TIM_DIER_UIE)
bogdanm	86:04dd9b1680ae	460	#define TIM_IT_CC1 (TIM_DIER_CC1IE)
bogdanm	86:04dd9b1680ae	461	#define TIM_IT_CC2 (TIM_DIER_CC2IE)
bogdanm	86:04dd9b1680ae	462	#define TIM_IT_CC3 (TIM_DIER_CC3IE)
bogdanm	86:04dd9b1680ae	463	#define TIM_IT_CC4 (TIM_DIER_CC4IE)
bogdanm	86:04dd9b1680ae	464	#define TIM_IT_COM (TIM_DIER_COMIE)
bogdanm	86:04dd9b1680ae	465	#define TIM_IT_TRIGGER (TIM_DIER_TIE)
bogdanm	86:04dd9b1680ae	466	#define TIM_IT_BREAK (TIM_DIER_BIE)
bogdanm	86:04dd9b1680ae	467	/**
bogdanm	86:04dd9b1680ae	468	* @}
bogdanm	86:04dd9b1680ae	469	*/
Kojto	122:f9eeca106725	470
Kojto	122:f9eeca106725	471	/** @defgroup TIM_Commutation_Source TIM Commutation Source
Kojto	122:f9eeca106725	472	* @{
Kojto	122:f9eeca106725	473	*/
bogdanm	86:04dd9b1680ae	474	#define TIM_COMMUTATION_TRGI (TIM_CR2_CCUS)
bogdanm	86:04dd9b1680ae	475	#define TIM_COMMUTATION_SOFTWARE ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	476
Kojto	122:f9eeca106725	477	/**
Kojto	122:f9eeca106725	478	* @}
Kojto	122:f9eeca106725	479	*/
Kojto	122:f9eeca106725	480
bogdanm	92:4fc01daae5a5	481	/** @defgroup TIM_DMA_sources TIM DMA Sources
bogdanm	86:04dd9b1680ae	482	* @{
bogdanm	86:04dd9b1680ae	483	*/
bogdanm	86:04dd9b1680ae	484	#define TIM_DMA_UPDATE (TIM_DIER_UDE)
bogdanm	86:04dd9b1680ae	485	#define TIM_DMA_CC1 (TIM_DIER_CC1DE)
bogdanm	86:04dd9b1680ae	486	#define TIM_DMA_CC2 (TIM_DIER_CC2DE)
bogdanm	86:04dd9b1680ae	487	#define TIM_DMA_CC3 (TIM_DIER_CC3DE)
bogdanm	86:04dd9b1680ae	488	#define TIM_DMA_CC4 (TIM_DIER_CC4DE)
bogdanm	86:04dd9b1680ae	489	#define TIM_DMA_COM (TIM_DIER_COMDE)
bogdanm	86:04dd9b1680ae	490	#define TIM_DMA_TRIGGER (TIM_DIER_TDE)
bogdanm	86:04dd9b1680ae	491	/**
bogdanm	86:04dd9b1680ae	492	* @}
Kojto	122:f9eeca106725	493	*/
bogdanm	86:04dd9b1680ae	494
bogdanm	92:4fc01daae5a5	495	/** @defgroup TIM_Flag_definition TIM Flag Definition
bogdanm	86:04dd9b1680ae	496	* @{
bogdanm	86:04dd9b1680ae	497	*/
bogdanm	86:04dd9b1680ae	498	#define TIM_FLAG_UPDATE (TIM_SR_UIF)
bogdanm	86:04dd9b1680ae	499	#define TIM_FLAG_CC1 (TIM_SR_CC1IF)
bogdanm	86:04dd9b1680ae	500	#define TIM_FLAG_CC2 (TIM_SR_CC2IF)
bogdanm	86:04dd9b1680ae	501	#define TIM_FLAG_CC3 (TIM_SR_CC3IF)
bogdanm	86:04dd9b1680ae	502	#define TIM_FLAG_CC4 (TIM_SR_CC4IF)
bogdanm	86:04dd9b1680ae	503	#define TIM_FLAG_COM (TIM_SR_COMIF)
bogdanm	86:04dd9b1680ae	504	#define TIM_FLAG_TRIGGER (TIM_SR_TIF)
bogdanm	86:04dd9b1680ae	505	#define TIM_FLAG_BREAK (TIM_SR_BIF)
bogdanm	86:04dd9b1680ae	506	#define TIM_FLAG_CC1OF (TIM_SR_CC1OF)
bogdanm	86:04dd9b1680ae	507	#define TIM_FLAG_CC2OF (TIM_SR_CC2OF)
bogdanm	86:04dd9b1680ae	508	#define TIM_FLAG_CC3OF (TIM_SR_CC3OF)
bogdanm	86:04dd9b1680ae	509	#define TIM_FLAG_CC4OF (TIM_SR_CC4OF)
bogdanm	86:04dd9b1680ae	510	/**
bogdanm	86:04dd9b1680ae	511	* @}
bogdanm	86:04dd9b1680ae	512	*/
bogdanm	86:04dd9b1680ae	513
bogdanm	92:4fc01daae5a5	514	/** @defgroup TIM_Clock_Source TIM Clock Source
bogdanm	86:04dd9b1680ae	515	* @{
bogdanm	86:04dd9b1680ae	516	*/
Kojto	122:f9eeca106725	517	#define TIM_CLOCKSOURCE_ETRMODE2 (TIM_SMCR_ETPS_1)
Kojto	122:f9eeca106725	518	#define TIM_CLOCKSOURCE_INTERNAL (TIM_SMCR_ETPS_0)
Kojto	122:f9eeca106725	519	#define TIM_CLOCKSOURCE_ITR0 ((uint32_t)0x0000)
Kojto	122:f9eeca106725	520	#define TIM_CLOCKSOURCE_ITR1 (TIM_SMCR_TS_0)
Kojto	122:f9eeca106725	521	#define TIM_CLOCKSOURCE_ITR2 (TIM_SMCR_TS_1)
Kojto	122:f9eeca106725	522	#define TIM_CLOCKSOURCE_ITR3 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_1)
Kojto	122:f9eeca106725	523	#define TIM_CLOCKSOURCE_TI1ED (TIM_SMCR_TS_2)
Kojto	122:f9eeca106725	524	#define TIM_CLOCKSOURCE_TI1 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_2)
Kojto	122:f9eeca106725	525	#define TIM_CLOCKSOURCE_TI2 (TIM_SMCR_TS_1 \| TIM_SMCR_TS_2)
Kojto	122:f9eeca106725	526	#define TIM_CLOCKSOURCE_ETRMODE1 (TIM_SMCR_TS)
bogdanm	86:04dd9b1680ae	527	/**
bogdanm	86:04dd9b1680ae	528	* @}
bogdanm	86:04dd9b1680ae	529	*/
bogdanm	86:04dd9b1680ae	530
bogdanm	92:4fc01daae5a5	531	/** @defgroup TIM_Clock_Polarity TIM Clock Polarity
bogdanm	86:04dd9b1680ae	532	* @{
bogdanm	86:04dd9b1680ae	533	*/
bogdanm	86:04dd9b1680ae	534	#define TIM_CLOCKPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx clock sources /
bogdanm	86:04dd9b1680ae	535	#define TIM_CLOCKPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx clock sources /
bogdanm	86:04dd9b1680ae	536	#define TIM_CLOCKPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /!< Polarity for TIx clock sources /
bogdanm	86:04dd9b1680ae	537	#define TIM_CLOCKPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /!< Polarity for TIx clock sources /
bogdanm	86:04dd9b1680ae	538	#define TIM_CLOCKPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /!< Polarity for TIx clock sources /
bogdanm	86:04dd9b1680ae	539	/**
bogdanm	86:04dd9b1680ae	540	* @}
bogdanm	86:04dd9b1680ae	541	*/
Kojto	122:f9eeca106725	542
bogdanm	92:4fc01daae5a5	543	/** @defgroup TIM_Clock_Prescaler TIM Clock Prescaler
bogdanm	86:04dd9b1680ae	544	* @{
bogdanm	86:04dd9b1680ae	545	*/
bogdanm	86:04dd9b1680ae	546	#define TIM_CLOCKPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
bogdanm	86:04dd9b1680ae	547	#define TIM_CLOCKPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR Clock: Capture performed once every 2 events. /
bogdanm	86:04dd9b1680ae	548	#define TIM_CLOCKPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR Clock: Capture performed once every 4 events. /
bogdanm	86:04dd9b1680ae	549	#define TIM_CLOCKPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR Clock: Capture performed once every 8 events. /
bogdanm	86:04dd9b1680ae	550	/**
bogdanm	86:04dd9b1680ae	551	* @}
bogdanm	86:04dd9b1680ae	552	*/
bogdanm	86:04dd9b1680ae	553
bogdanm	92:4fc01daae5a5	554	/** @defgroup TIM_ClearInput_Polarity TIM Clear Input Polarity
bogdanm	86:04dd9b1680ae	555	* @{
bogdanm	86:04dd9b1680ae	556	*/
bogdanm	86:04dd9b1680ae	557	#define TIM_CLEARINPUTPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx pin /
bogdanm	86:04dd9b1680ae	558	#define TIM_CLEARINPUTPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx pin /
bogdanm	86:04dd9b1680ae	559	/**
bogdanm	86:04dd9b1680ae	560	* @}
bogdanm	86:04dd9b1680ae	561	*/
bogdanm	86:04dd9b1680ae	562
bogdanm	92:4fc01daae5a5	563	/** @defgroup TIM_ClearInput_Prescaler TIM Clear Input Prescaler
bogdanm	86:04dd9b1680ae	564	* @{
bogdanm	86:04dd9b1680ae	565	*/
bogdanm	86:04dd9b1680ae	566	#define TIM_CLEARINPUTPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
bogdanm	86:04dd9b1680ae	567	#define TIM_CLEARINPUTPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR pin: Capture performed once every 2 events. /
bogdanm	86:04dd9b1680ae	568	#define TIM_CLEARINPUTPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR pin: Capture performed once every 4 events. /
bogdanm	86:04dd9b1680ae	569	#define TIM_CLEARINPUTPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR pin: Capture performed once every 8 events. /
bogdanm	86:04dd9b1680ae	570	/**
bogdanm	86:04dd9b1680ae	571	* @}
bogdanm	86:04dd9b1680ae	572	*/
bogdanm	86:04dd9b1680ae	573
Kojto	122:f9eeca106725	574	/** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state TIM OSSR Off State Selection for Run mode state
bogdanm	86:04dd9b1680ae	575	* @{
bogdanm	86:04dd9b1680ae	576	*/
Kojto	122:f9eeca106725	577	#define TIM_OSSR_ENABLE (TIM_BDTR_OSSR)
bogdanm	86:04dd9b1680ae	578	#define TIM_OSSR_DISABLE ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	579	/**
bogdanm	86:04dd9b1680ae	580	* @}
bogdanm	86:04dd9b1680ae	581	*/
bogdanm	86:04dd9b1680ae	582
Kojto	122:f9eeca106725	583	/** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state TIM OSSI Off State Selection for Idle mode state
bogdanm	86:04dd9b1680ae	584	* @{
bogdanm	86:04dd9b1680ae	585	*/
Kojto	122:f9eeca106725	586	#define TIM_OSSI_ENABLE (TIM_BDTR_OSSI)
bogdanm	86:04dd9b1680ae	587	#define TIM_OSSI_DISABLE ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	588	/**
bogdanm	86:04dd9b1680ae	589	* @}
bogdanm	86:04dd9b1680ae	590	*/
Kojto	122:f9eeca106725	591
Kojto	122:f9eeca106725	592	/** @defgroup TIM_Lock_level TIM Lock level
bogdanm	86:04dd9b1680ae	593	* @{
bogdanm	86:04dd9b1680ae	594	*/
Kojto	122:f9eeca106725	595	#define TIM_LOCKLEVEL_OFF ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	596	#define TIM_LOCKLEVEL_1 (TIM_BDTR_LOCK_0)
bogdanm	86:04dd9b1680ae	597	#define TIM_LOCKLEVEL_2 (TIM_BDTR_LOCK_1)
bogdanm	86:04dd9b1680ae	598	#define TIM_LOCKLEVEL_3 (TIM_BDTR_LOCK)
bogdanm	86:04dd9b1680ae	599	/**
bogdanm	86:04dd9b1680ae	600	* @}
bogdanm	86:04dd9b1680ae	601	*/
Kojto	122:f9eeca106725	602
Kojto	122:f9eeca106725	603	/** @defgroup TIM_Break_Input_enable_disable TIM Break Input Enable Disable
bogdanm	86:04dd9b1680ae	604	* @{
bogdanm	86:04dd9b1680ae	605	*/
bogdanm	86:04dd9b1680ae	606	#define TIM_BREAK_ENABLE (TIM_BDTR_BKE)
bogdanm	86:04dd9b1680ae	607	#define TIM_BREAK_DISABLE ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	608	/**
bogdanm	86:04dd9b1680ae	609	* @}
bogdanm	86:04dd9b1680ae	610	*/
Kojto	122:f9eeca106725	611
bogdanm	92:4fc01daae5a5	612	/** @defgroup TIM_Break_Polarity TIM Break Input Polarity
bogdanm	86:04dd9b1680ae	613	* @{
bogdanm	86:04dd9b1680ae	614	*/
bogdanm	86:04dd9b1680ae	615	#define TIM_BREAKPOLARITY_LOW ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	616	#define TIM_BREAKPOLARITY_HIGH (TIM_BDTR_BKP)
bogdanm	86:04dd9b1680ae	617	/**
bogdanm	86:04dd9b1680ae	618	* @}
bogdanm	86:04dd9b1680ae	619	*/
bogdanm	92:4fc01daae5a5	620	/** @defgroup TIM_AOE_Bit_Set_Reset TIM Automatic Output Enable
bogdanm	86:04dd9b1680ae	621	* @{
bogdanm	86:04dd9b1680ae	622	*/
bogdanm	86:04dd9b1680ae	623	#define TIM_AUTOMATICOUTPUT_ENABLE (TIM_BDTR_AOE)
Kojto	122:f9eeca106725	624	#define TIM_AUTOMATICOUTPUT_DISABLE ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	625	/**
bogdanm	86:04dd9b1680ae	626	* @}
bogdanm	86:04dd9b1680ae	627	*/
bogdanm	86:04dd9b1680ae	628
bogdanm	92:4fc01daae5a5	629	/** @defgroup TIM_Master_Mode_Selection TIM Master Mode Selection
bogdanm	86:04dd9b1680ae	630	* @{
bogdanm	86:04dd9b1680ae	631	*/
Kojto	122:f9eeca106725	632	#define TIM_TRGO_RESET ((uint32_t)0x0000)
Kojto	122:f9eeca106725	633	#define TIM_TRGO_ENABLE (TIM_CR2_MMS_0)
Kojto	122:f9eeca106725	634	#define TIM_TRGO_UPDATE (TIM_CR2_MMS_1)
Kojto	122:f9eeca106725	635	#define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 \| TIM_CR2_MMS_0))
Kojto	122:f9eeca106725	636	#define TIM_TRGO_OC1REF (TIM_CR2_MMS_2)
Kojto	122:f9eeca106725	637	#define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_0))
Kojto	122:f9eeca106725	638	#define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_1))
Kojto	122:f9eeca106725	639	#define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_1 \| TIM_CR2_MMS_0))
bogdanm	86:04dd9b1680ae	640	/**
bogdanm	86:04dd9b1680ae	641	* @}
Kojto	122:f9eeca106725	642	*/
Kojto	122:f9eeca106725	643
Kojto	122:f9eeca106725	644	/** @defgroup TIM_Master_Slave_Mode TIM Master Slave Mode
bogdanm	86:04dd9b1680ae	645	* @{
bogdanm	86:04dd9b1680ae	646	*/
bogdanm	86:04dd9b1680ae	647	#define TIM_MASTERSLAVEMODE_ENABLE ((uint32_t)0x0080)
bogdanm	86:04dd9b1680ae	648	#define TIM_MASTERSLAVEMODE_DISABLE ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	649	/**
bogdanm	86:04dd9b1680ae	650	* @}
bogdanm	86:04dd9b1680ae	651	*/
Kojto	122:f9eeca106725	652
bogdanm	92:4fc01daae5a5	653	/** @defgroup TIM_Trigger_Selection TIM Trigger Selection
bogdanm	86:04dd9b1680ae	654	* @{
bogdanm	86:04dd9b1680ae	655	*/
bogdanm	86:04dd9b1680ae	656	#define TIM_TS_ITR0 ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	657	#define TIM_TS_ITR1 ((uint32_t)0x0010)
bogdanm	86:04dd9b1680ae	658	#define TIM_TS_ITR2 ((uint32_t)0x0020)
bogdanm	86:04dd9b1680ae	659	#define TIM_TS_ITR3 ((uint32_t)0x0030)
bogdanm	86:04dd9b1680ae	660	#define TIM_TS_TI1F_ED ((uint32_t)0x0040)
bogdanm	86:04dd9b1680ae	661	#define TIM_TS_TI1FP1 ((uint32_t)0x0050)
bogdanm	86:04dd9b1680ae	662	#define TIM_TS_TI2FP2 ((uint32_t)0x0060)
bogdanm	86:04dd9b1680ae	663	#define TIM_TS_ETRF ((uint32_t)0x0070)
bogdanm	86:04dd9b1680ae	664	#define TIM_TS_NONE ((uint32_t)0xFFFF)
bogdanm	86:04dd9b1680ae	665	/**
bogdanm	86:04dd9b1680ae	666	* @}
bogdanm	86:04dd9b1680ae	667	*/
bogdanm	86:04dd9b1680ae	668
bogdanm	92:4fc01daae5a5	669	/** @defgroup TIM_Trigger_Polarity TIM Trigger Polarity
bogdanm	86:04dd9b1680ae	670	* @{
bogdanm	86:04dd9b1680ae	671	*/
bogdanm	86:04dd9b1680ae	672	#define TIM_TRIGGERPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx trigger sources /
bogdanm	86:04dd9b1680ae	673	#define TIM_TRIGGERPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx trigger sources /
bogdanm	86:04dd9b1680ae	674	#define TIM_TRIGGERPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /!< Polarity for TIxFPx or TI1_ED trigger sources /
bogdanm	86:04dd9b1680ae	675	#define TIM_TRIGGERPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /!< Polarity for TIxFPx or TI1_ED trigger sources /
bogdanm	86:04dd9b1680ae	676	#define TIM_TRIGGERPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /!< Polarity for TIxFPx or TI1_ED trigger sources /
bogdanm	86:04dd9b1680ae	677	/**
bogdanm	86:04dd9b1680ae	678	* @}
bogdanm	86:04dd9b1680ae	679	*/
bogdanm	86:04dd9b1680ae	680
bogdanm	92:4fc01daae5a5	681	/** @defgroup TIM_Trigger_Prescaler TIM Trigger Prescaler
bogdanm	86:04dd9b1680ae	682	* @{
bogdanm	86:04dd9b1680ae	683	*/
bogdanm	86:04dd9b1680ae	684	#define TIM_TRIGGERPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
bogdanm	86:04dd9b1680ae	685	#define TIM_TRIGGERPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR Trigger: Capture performed once every 2 events. /
bogdanm	86:04dd9b1680ae	686	#define TIM_TRIGGERPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR Trigger: Capture performed once every 4 events. /
bogdanm	86:04dd9b1680ae	687	#define TIM_TRIGGERPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR Trigger: Capture performed once every 8 events. /
bogdanm	86:04dd9b1680ae	688	/**
bogdanm	86:04dd9b1680ae	689	* @}
bogdanm	86:04dd9b1680ae	690	*/
bogdanm	86:04dd9b1680ae	691
bogdanm	92:4fc01daae5a5	692	/** @defgroup TIM_TI1_Selection TIM TI1 Input Selection
bogdanm	86:04dd9b1680ae	693	* @{
bogdanm	86:04dd9b1680ae	694	*/
bogdanm	86:04dd9b1680ae	695	#define TIM_TI1SELECTION_CH1 ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	696	#define TIM_TI1SELECTION_XORCOMBINATION (TIM_CR2_TI1S)
bogdanm	86:04dd9b1680ae	697	/**
bogdanm	86:04dd9b1680ae	698	* @}
bogdanm	86:04dd9b1680ae	699	*/
bogdanm	86:04dd9b1680ae	700
bogdanm	92:4fc01daae5a5	701	/** @defgroup TIM_DMA_Burst_Length TIM DMA Burst Length
bogdanm	86:04dd9b1680ae	702	* @{
bogdanm	86:04dd9b1680ae	703	*/
Kojto	122:f9eeca106725	704	#define TIM_DMABURSTLENGTH_1TRANSFER (0x00000000)
Kojto	122:f9eeca106725	705	#define TIM_DMABURSTLENGTH_2TRANSFERS (0x00000100)
Kojto	122:f9eeca106725	706	#define TIM_DMABURSTLENGTH_3TRANSFERS (0x00000200)
Kojto	122:f9eeca106725	707	#define TIM_DMABURSTLENGTH_4TRANSFERS (0x00000300)
Kojto	122:f9eeca106725	708	#define TIM_DMABURSTLENGTH_5TRANSFERS (0x00000400)
Kojto	122:f9eeca106725	709	#define TIM_DMABURSTLENGTH_6TRANSFERS (0x00000500)
Kojto	122:f9eeca106725	710	#define TIM_DMABURSTLENGTH_7TRANSFERS (0x00000600)
Kojto	122:f9eeca106725	711	#define TIM_DMABURSTLENGTH_8TRANSFERS (0x00000700)
Kojto	122:f9eeca106725	712	#define TIM_DMABURSTLENGTH_9TRANSFERS (0x00000800)
Kojto	122:f9eeca106725	713	#define TIM_DMABURSTLENGTH_10TRANSFERS (0x00000900)
Kojto	122:f9eeca106725	714	#define TIM_DMABURSTLENGTH_11TRANSFERS (0x00000A00)
Kojto	122:f9eeca106725	715	#define TIM_DMABURSTLENGTH_12TRANSFERS (0x00000B00)
Kojto	122:f9eeca106725	716	#define TIM_DMABURSTLENGTH_13TRANSFERS (0x00000C00)
Kojto	122:f9eeca106725	717	#define TIM_DMABURSTLENGTH_14TRANSFERS (0x00000D00)
Kojto	122:f9eeca106725	718	#define TIM_DMABURSTLENGTH_15TRANSFERS (0x00000E00)
Kojto	122:f9eeca106725	719	#define TIM_DMABURSTLENGTH_16TRANSFERS (0x00000F00)
Kojto	122:f9eeca106725	720	#define TIM_DMABURSTLENGTH_17TRANSFERS (0x00001000)
Kojto	122:f9eeca106725	721	#define TIM_DMABURSTLENGTH_18TRANSFERS (0x00001100)
bogdanm	86:04dd9b1680ae	722	/**
bogdanm	86:04dd9b1680ae	723	* @}
bogdanm	86:04dd9b1680ae	724	*/
bogdanm	86:04dd9b1680ae	725
Kojto	122:f9eeca106725	726	/** @defgroup TIM_DMA_Handle_index TIM DMA Handle Index
bogdanm	86:04dd9b1680ae	727	* @{
bogdanm	86:04dd9b1680ae	728	*/
bogdanm	86:04dd9b1680ae	729	#define TIM_DMA_ID_UPDATE ((uint16_t) 0x0) /!< Index of the DMA handle used for Update DMA requests /
bogdanm	86:04dd9b1680ae	730	#define TIM_DMA_ID_CC1 ((uint16_t) 0x1) /!< Index of the DMA handle used for Capture/Compare 1 DMA requests /
bogdanm	86:04dd9b1680ae	731	#define TIM_DMA_ID_CC2 ((uint16_t) 0x2) /!< Index of the DMA handle used for Capture/Compare 2 DMA requests /
bogdanm	86:04dd9b1680ae	732	#define TIM_DMA_ID_CC3 ((uint16_t) 0x3) /!< Index of the DMA handle used for Capture/Compare 3 DMA requests /
bogdanm	86:04dd9b1680ae	733	#define TIM_DMA_ID_CC4 ((uint16_t) 0x4) /!< Index of the DMA handle used for Capture/Compare 4 DMA requests /
bogdanm	86:04dd9b1680ae	734	#define TIM_DMA_ID_COMMUTATION ((uint16_t) 0x5) /!< Index of the DMA handle used for Commutation DMA requests /
bogdanm	86:04dd9b1680ae	735	#define TIM_DMA_ID_TRIGGER ((uint16_t) 0x6) /!< Index of the DMA handle used for Trigger DMA requests /
bogdanm	86:04dd9b1680ae	736	/**
bogdanm	86:04dd9b1680ae	737	* @}
bogdanm	86:04dd9b1680ae	738	*/
bogdanm	86:04dd9b1680ae	739
Kojto	122:f9eeca106725	740	/** @defgroup TIM_Channel_CC_State TIM Capture/Compare Channel State
bogdanm	86:04dd9b1680ae	741	* @{
bogdanm	86:04dd9b1680ae	742	*/
bogdanm	86:04dd9b1680ae	743	#define TIM_CCx_ENABLE ((uint32_t)0x0001)
bogdanm	86:04dd9b1680ae	744	#define TIM_CCx_DISABLE ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	745	#define TIM_CCxN_ENABLE ((uint32_t)0x0004)
bogdanm	86:04dd9b1680ae	746	#define TIM_CCxN_DISABLE ((uint32_t)0x0000)
bogdanm	86:04dd9b1680ae	747	/**
bogdanm	86:04dd9b1680ae	748	* @}
Kojto	122:f9eeca106725	749	*/
bogdanm	86:04dd9b1680ae	750
bogdanm	86:04dd9b1680ae	751	/**
bogdanm	86:04dd9b1680ae	752	* @}
Kojto	122:f9eeca106725	753	*/
Kojto	122:f9eeca106725	754	/* End of exported constants -------------------------------------------------*/
Kojto	122:f9eeca106725	755
bogdanm	86:04dd9b1680ae	756	/* Exported macros -----------------------------------------------------------*/
bogdanm	92:4fc01daae5a5	757	/** @defgroup TIM_Exported_Macros TIM Exported Macros
bogdanm	86:04dd9b1680ae	758	* @{
bogdanm	86:04dd9b1680ae	759	*/
bogdanm	86:04dd9b1680ae	760
bogdanm	86:04dd9b1680ae	761	/** @brief Reset TIM handle state
bogdanm	86:04dd9b1680ae	762	* @param __HANDLE__: TIM handle.
bogdanm	86:04dd9b1680ae	763	* @retval None
bogdanm	86:04dd9b1680ae	764	*/
bogdanm	86:04dd9b1680ae	765	#define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TIM_STATE_RESET)
bogdanm	86:04dd9b1680ae	766
bogdanm	86:04dd9b1680ae	767	/**
bogdanm	86:04dd9b1680ae	768	* @brief Enable the TIM peripheral.
bogdanm	86:04dd9b1680ae	769	* @param __HANDLE__: TIM handle
bogdanm	86:04dd9b1680ae	770	* @retval None
bogdanm	86:04dd9b1680ae	771	*/
bogdanm	86:04dd9b1680ae	772	#define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1\|=(TIM_CR1_CEN))
bogdanm	86:04dd9b1680ae	773
bogdanm	86:04dd9b1680ae	774	/**
bogdanm	86:04dd9b1680ae	775	* @brief Enable the TIM main Output.
bogdanm	86:04dd9b1680ae	776	* @param __HANDLE__: TIM handle
bogdanm	86:04dd9b1680ae	777	* @retval None
bogdanm	86:04dd9b1680ae	778	*/
bogdanm	86:04dd9b1680ae	779	#define __HAL_TIM_MOE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->BDTR\|=(TIM_BDTR_MOE))
bogdanm	86:04dd9b1680ae	780
bogdanm	86:04dd9b1680ae	781	/**
bogdanm	86:04dd9b1680ae	782	* @brief Disable the TIM peripheral.
bogdanm	86:04dd9b1680ae	783	* @param __HANDLE__: TIM handle
bogdanm	86:04dd9b1680ae	784	* @retval None
bogdanm	86:04dd9b1680ae	785	*/
bogdanm	86:04dd9b1680ae	786	#define __HAL_TIM_DISABLE(__HANDLE__) \
bogdanm	86:04dd9b1680ae	787	do { \
Kojto	122:f9eeca106725	788	if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \
bogdanm	86:04dd9b1680ae	789	{ \
Kojto	122:f9eeca106725	790	if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \
bogdanm	86:04dd9b1680ae	791	{ \
bogdanm	86:04dd9b1680ae	792	(__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
bogdanm	86:04dd9b1680ae	793	} \
bogdanm	86:04dd9b1680ae	794	} \
bogdanm	86:04dd9b1680ae	795	} while(0)
bogdanm	86:04dd9b1680ae	796	/* The Main Output Enable of a timer instance is disabled only if all the CCx and CCxN
bogdanm	86:04dd9b1680ae	797	channels have been disabled */
bogdanm	86:04dd9b1680ae	798	/**
bogdanm	86:04dd9b1680ae	799	* @brief Disable the TIM main Output.
bogdanm	86:04dd9b1680ae	800	* @param __HANDLE__: TIM handle
bogdanm	86:04dd9b1680ae	801	* @retval None
Kojto	122:f9eeca106725	802	* @note The Main Output Enable of a timer instance is disabled only if all the CCx and CCxN channels have been disabled
bogdanm	86:04dd9b1680ae	803	*/
bogdanm	86:04dd9b1680ae	804	#define __HAL_TIM_MOE_DISABLE(__HANDLE__) \
bogdanm	86:04dd9b1680ae	805	do { \
Kojto	122:f9eeca106725	806	if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \
bogdanm	86:04dd9b1680ae	807	{ \
Kojto	122:f9eeca106725	808	if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \
bogdanm	86:04dd9b1680ae	809	{ \
bogdanm	86:04dd9b1680ae	810	(__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE); \
bogdanm	86:04dd9b1680ae	811	} \
bogdanm	86:04dd9b1680ae	812	} \
bogdanm	86:04dd9b1680ae	813	} while(0)
bogdanm	86:04dd9b1680ae	814
Kojto	122:f9eeca106725	815	/**
Kojto	122:f9eeca106725	816	* @brief Enables the specified TIM interrupt.
Kojto	122:f9eeca106725	817	* @param __HANDLE__: specifies the TIM Handle.
Kojto	122:f9eeca106725	818	* @param __INTERRUPT__: specifies the TIM interrupt source to enable.
Kojto	122:f9eeca106725	819	* This parameter can be one of the following values:
Kojto	122:f9eeca106725	820	* @arg TIM_IT_UPDATE: Update interrupt
Kojto	122:f9eeca106725	821	* @arg TIM_IT_CC1: Capture/Compare 1 interrupt
Kojto	122:f9eeca106725	822	* @arg TIM_IT_CC2: Capture/Compare 2 interrupt
Kojto	122:f9eeca106725	823	* @arg TIM_IT_CC3: Capture/Compare 3 interrupt
Kojto	122:f9eeca106725	824	* @arg TIM_IT_CC4: Capture/Compare 4 interrupt
Kojto	122:f9eeca106725	825	* @arg TIM_IT_COM: Commutation interrupt
Kojto	122:f9eeca106725	826	* @arg TIM_IT_TRIGGER: Trigger interrupt
Kojto	122:f9eeca106725	827	* @arg TIM_IT_BREAK: Break interrupt
Kojto	122:f9eeca106725	828	* @retval None
Kojto	122:f9eeca106725	829	*/
bogdanm	86:04dd9b1680ae	830	#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER \|= (__INTERRUPT__))
Kojto	122:f9eeca106725	831
Kojto	122:f9eeca106725	832	/**
Kojto	122:f9eeca106725	833	* @brief Disables the specified TIM interrupt.
Kojto	122:f9eeca106725	834	* @param __HANDLE__: specifies the TIM Handle.
Kojto	122:f9eeca106725	835	* @param __INTERRUPT__: specifies the TIM interrupt source to disable.
Kojto	122:f9eeca106725	836	* This parameter can be one of the following values:
Kojto	122:f9eeca106725	837	* @arg TIM_IT_UPDATE: Update interrupt
Kojto	122:f9eeca106725	838	* @arg TIM_IT_CC1: Capture/Compare 1 interrupt
Kojto	122:f9eeca106725	839	* @arg TIM_IT_CC2: Capture/Compare 2 interrupt
Kojto	122:f9eeca106725	840	* @arg TIM_IT_CC3: Capture/Compare 3 interrupt
Kojto	122:f9eeca106725	841	* @arg TIM_IT_CC4: Capture/Compare 4 interrupt
Kojto	122:f9eeca106725	842	* @arg TIM_IT_COM: Commutation interrupt
Kojto	122:f9eeca106725	843	* @arg TIM_IT_TRIGGER: Trigger interrupt
Kojto	122:f9eeca106725	844	* @arg TIM_IT_BREAK: Break interrupt
Kojto	122:f9eeca106725	845	* @retval None
Kojto	122:f9eeca106725	846	*/
bogdanm	86:04dd9b1680ae	847	#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__))
Kojto	122:f9eeca106725	848
Kojto	122:f9eeca106725	849	/**
Kojto	122:f9eeca106725	850	* @brief Enables the specified DMA request.
Kojto	122:f9eeca106725	851	* @param __HANDLE__: specifies the TIM Handle.
Kojto	122:f9eeca106725	852	* @param __DMA__: specifies the TIM DMA request to enable.
Kojto	122:f9eeca106725	853	* This parameter can be one of the following values:
Kojto	122:f9eeca106725	854	* @arg TIM_DMA_UPDATE: Update DMA request
Kojto	122:f9eeca106725	855	* @arg TIM_DMA_CC1: Capture/Compare 1 DMA request
Kojto	122:f9eeca106725	856	* @arg TIM_DMA_CC2: Capture/Compare 2 DMA request
Kojto	122:f9eeca106725	857	* @arg TIM_DMA_CC3: Capture/Compare 3 DMA request
Kojto	122:f9eeca106725	858	* @arg TIM_DMA_CC4: Capture/Compare 4 DMA request
Kojto	122:f9eeca106725	859	* @arg TIM_DMA_COM: Commutation DMA request
Kojto	122:f9eeca106725	860	* @arg TIM_DMA_TRIGGER: Trigger DMA request
Kojto	122:f9eeca106725	861	* @retval None
Kojto	122:f9eeca106725	862	*/
Kojto	122:f9eeca106725	863	#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER \|= (__DMA__))
Kojto	122:f9eeca106725	864
Kojto	122:f9eeca106725	865	/**
Kojto	122:f9eeca106725	866	* @brief Disables the specified DMA request.
Kojto	122:f9eeca106725	867	* @param __HANDLE__: specifies the TIM Handle.
Kojto	122:f9eeca106725	868	* @param __DMA__: specifies the TIM DMA request to disable.
Kojto	122:f9eeca106725	869	* This parameter can be one of the following values:
Kojto	122:f9eeca106725	870	* @arg TIM_DMA_UPDATE: Update DMA request
Kojto	122:f9eeca106725	871	* @arg TIM_DMA_CC1: Capture/Compare 1 DMA request
Kojto	122:f9eeca106725	872	* @arg TIM_DMA_CC2: Capture/Compare 2 DMA request
Kojto	122:f9eeca106725	873	* @arg TIM_DMA_CC3: Capture/Compare 3 DMA request
Kojto	122:f9eeca106725	874	* @arg TIM_DMA_CC4: Capture/Compare 4 DMA request
Kojto	122:f9eeca106725	875	* @arg TIM_DMA_COM: Commutation DMA request
Kojto	122:f9eeca106725	876	* @arg TIM_DMA_TRIGGER: Trigger DMA request
Kojto	122:f9eeca106725	877	* @retval None
Kojto	122:f9eeca106725	878	*/
bogdanm	86:04dd9b1680ae	879	#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__))
Kojto	122:f9eeca106725	880
Kojto	122:f9eeca106725	881	/**
Kojto	122:f9eeca106725	882	* @brief Checks whether the specified TIM interrupt flag is set or not.
Kojto	122:f9eeca106725	883	* @param __HANDLE__: specifies the TIM Handle.
Kojto	122:f9eeca106725	884	* @param __FLAG__: specifies the TIM interrupt flag to check.
Kojto	122:f9eeca106725	885	* This parameter can be one of the following values:
Kojto	122:f9eeca106725	886	* @arg TIM_FLAG_UPDATE: Update interrupt flag
Kojto	122:f9eeca106725	887	* @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag
Kojto	122:f9eeca106725	888	* @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag
Kojto	122:f9eeca106725	889	* @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag
Kojto	122:f9eeca106725	890	* @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag
Kojto	122:f9eeca106725	891	* @arg TIM_FLAG_COM: Commutation interrupt flag
Kojto	122:f9eeca106725	892	* @arg TIM_FLAG_TRIGGER: Trigger interrupt flag
Kojto	122:f9eeca106725	893	* @arg TIM_FLAG_BREAK: Break interrupt flag
Kojto	122:f9eeca106725	894	* @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag
Kojto	122:f9eeca106725	895	* @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag
Kojto	122:f9eeca106725	896	* @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag
Kojto	122:f9eeca106725	897	* @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag
Kojto	122:f9eeca106725	898	* @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto	122:f9eeca106725	899	*/
bogdanm	86:04dd9b1680ae	900	#define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__))
Kojto	122:f9eeca106725	901
Kojto	122:f9eeca106725	902	/**
Kojto	122:f9eeca106725	903	* @brief Clears the specified TIM interrupt flag.
Kojto	122:f9eeca106725	904	* @param __HANDLE__: specifies the TIM Handle.
Kojto	122:f9eeca106725	905	* @param __FLAG__: specifies the TIM interrupt flag to clear.
Kojto	122:f9eeca106725	906	* This parameter can be one of the following values:
Kojto	122:f9eeca106725	907	* @arg TIM_FLAG_UPDATE: Update interrupt flag
Kojto	122:f9eeca106725	908	* @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag
Kojto	122:f9eeca106725	909	* @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag
Kojto	122:f9eeca106725	910	* @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag
Kojto	122:f9eeca106725	911	* @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag
Kojto	122:f9eeca106725	912	* @arg TIM_FLAG_COM: Commutation interrupt flag
Kojto	122:f9eeca106725	913	* @arg TIM_FLAG_TRIGGER: Trigger interrupt flag
Kojto	122:f9eeca106725	914	* @arg TIM_FLAG_BREAK: Break interrupt flag
Kojto	122:f9eeca106725	915	* @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag
Kojto	122:f9eeca106725	916	* @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag
Kojto	122:f9eeca106725	917	* @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag
Kojto	122:f9eeca106725	918	* @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag
Kojto	122:f9eeca106725	919	* @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto	122:f9eeca106725	920	*/
bogdanm	86:04dd9b1680ae	921	#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
bogdanm	86:04dd9b1680ae	922
Kojto	122:f9eeca106725	923	/**
Kojto	122:f9eeca106725	924	* @brief Checks whether the specified TIM interrupt has occurred or not.
Kojto	122:f9eeca106725	925	* @param __HANDLE__: TIM handle
Kojto	122:f9eeca106725	926	* @param __INTERRUPT__: specifies the TIM interrupt source to check.
Kojto	122:f9eeca106725	927	* @retval The state of TIM_IT (SET or RESET).
Kojto	122:f9eeca106725	928	*/
Kojto	122:f9eeca106725	929	#define __HAL_TIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
Kojto	122:f9eeca106725	930
Kojto	122:f9eeca106725	931	/**
Kojto	122:f9eeca106725	932	* @brief Clear the TIM interrupt pending bits
Kojto	122:f9eeca106725	933	* @param __HANDLE__: TIM handle
Kojto	122:f9eeca106725	934	* @param __INTERRUPT__: specifies the interrupt pending bit to clear.
Kojto	122:f9eeca106725	935	* @retval None
Kojto	122:f9eeca106725	936	*/
bogdanm	86:04dd9b1680ae	937	#define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__))
bogdanm	86:04dd9b1680ae	938
Kojto	122:f9eeca106725	939	/**
Kojto	122:f9eeca106725	940	* @brief Indicates whether or not the TIM Counter is used as downcounter
Kojto	122:f9eeca106725	941	* @param __HANDLE__: TIM handle.
Kojto	122:f9eeca106725	942	* @retval False (Counter used as upcounter) or True (Counter used as downcounter)
Kojto	122:f9eeca106725	943	* @note This macro is particularly usefull to get the counting mode when the timer operates in Center-aligned mode or Encoder mode.
Kojto	122:f9eeca106725	944	*/
Kojto	122:f9eeca106725	945	#define __HAL_TIM_IS_TIM_COUNTING_DOWN(__HANDLE__) (((__HANDLE__)->Instance->CR1 &(TIM_CR1_DIR)) == (TIM_CR1_DIR))
bogdanm	86:04dd9b1680ae	946
Kojto	122:f9eeca106725	947	/**
Kojto	122:f9eeca106725	948	* @brief Sets the TIM active prescaler register value on update event.
Kojto	122:f9eeca106725	949	* @param __HANDLE__: TIM handle.
Kojto	122:f9eeca106725	950	* @param __PRESC__: specifies the active prescaler register new value.
Kojto	122:f9eeca106725	951	* @retval None
Kojto	122:f9eeca106725	952	*/
Kojto	122:f9eeca106725	953	#define __HAL_TIM_SET_PRESCALER (__HANDLE__, __PRESC__) ((__HANDLE__)->Instance->PSC = (__PRESC__))
bogdanm	86:04dd9b1680ae	954
bogdanm	86:04dd9b1680ae	955	/**
bogdanm	86:04dd9b1680ae	956	* @brief Sets the TIM Counter Register value on runtime.
bogdanm	86:04dd9b1680ae	957	* @param __HANDLE__: TIM handle.
bogdanm	86:04dd9b1680ae	958	* @param __COUNTER__: specifies the Counter register new value.
bogdanm	86:04dd9b1680ae	959	* @retval None
bogdanm	86:04dd9b1680ae	960	*/
Kojto	122:f9eeca106725	961	#define __HAL_TIM_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CNT = (__COUNTER__))
bogdanm	86:04dd9b1680ae	962
bogdanm	86:04dd9b1680ae	963	/**
bogdanm	86:04dd9b1680ae	964	* @brief Gets the TIM Counter Register value on runtime.
bogdanm	86:04dd9b1680ae	965	* @param __HANDLE__: TIM handle.
bogdanm	86:04dd9b1680ae	966	* @retval None
bogdanm	86:04dd9b1680ae	967	*/
Kojto	122:f9eeca106725	968	#define __HAL_TIM_GET_COUNTER(__HANDLE__) \
bogdanm	86:04dd9b1680ae	969	((__HANDLE__)->Instance->CNT)
bogdanm	86:04dd9b1680ae	970
bogdanm	86:04dd9b1680ae	971	/**
bogdanm	86:04dd9b1680ae	972	* @brief Sets the TIM Autoreload Register value on runtime without calling
bogdanm	86:04dd9b1680ae	973	* another time any Init function.
bogdanm	86:04dd9b1680ae	974	* @param __HANDLE__: TIM handle.
bogdanm	86:04dd9b1680ae	975	* @param __AUTORELOAD__: specifies the Counter register new value.
bogdanm	86:04dd9b1680ae	976	* @retval None
bogdanm	86:04dd9b1680ae	977	*/
Kojto	122:f9eeca106725	978	#define __HAL_TIM_SET_AUTORELOAD(__HANDLE__, __AUTORELOAD__) \
bogdanm	86:04dd9b1680ae	979	do{ \
bogdanm	86:04dd9b1680ae	980	(__HANDLE__)->Instance->ARR = (__AUTORELOAD__); \
bogdanm	86:04dd9b1680ae	981	(__HANDLE__)->Init.Period = (__AUTORELOAD__); \
bogdanm	86:04dd9b1680ae	982	} while(0)
bogdanm	86:04dd9b1680ae	983
bogdanm	86:04dd9b1680ae	984	/**
bogdanm	86:04dd9b1680ae	985	* @brief Gets the TIM Autoreload Register value on runtime
bogdanm	86:04dd9b1680ae	986	* @param __HANDLE__: TIM handle.
bogdanm	86:04dd9b1680ae	987	* @retval None
bogdanm	86:04dd9b1680ae	988	*/
Kojto	122:f9eeca106725	989	#define __HAL_TIM_GET_AUTORELOAD(__HANDLE__) \
bogdanm	86:04dd9b1680ae	990	((__HANDLE__)->Instance->ARR)
bogdanm	86:04dd9b1680ae	991
bogdanm	86:04dd9b1680ae	992	/**
bogdanm	86:04dd9b1680ae	993	* @brief Sets the TIM Clock Division value on runtime without calling
bogdanm	86:04dd9b1680ae	994	* another time any Init function.
bogdanm	86:04dd9b1680ae	995	* @param __HANDLE__: TIM handle.
bogdanm	86:04dd9b1680ae	996	* @param __CKD__: specifies the clock division value.
bogdanm	86:04dd9b1680ae	997	* This parameter can be one of the following value:
bogdanm	86:04dd9b1680ae	998	* @arg TIM_CLOCKDIVISION_DIV1
bogdanm	86:04dd9b1680ae	999	* @arg TIM_CLOCKDIVISION_DIV2
bogdanm	86:04dd9b1680ae	1000	* @arg TIM_CLOCKDIVISION_DIV4
bogdanm	86:04dd9b1680ae	1001	* @retval None
bogdanm	86:04dd9b1680ae	1002	*/
Kojto	122:f9eeca106725	1003	#define __HAL_TIM_SET_CLOCKDIVISION(__HANDLE__, __CKD__) \
bogdanm	86:04dd9b1680ae	1004	do{ \
bogdanm	86:04dd9b1680ae	1005	(__HANDLE__)->Instance->CR1 &= (uint16_t)(~TIM_CR1_CKD); \
bogdanm	86:04dd9b1680ae	1006	(__HANDLE__)->Instance->CR1 \|= (__CKD__); \
bogdanm	86:04dd9b1680ae	1007	(__HANDLE__)->Init.ClockDivision = (__CKD__); \
bogdanm	86:04dd9b1680ae	1008	} while(0)
bogdanm	86:04dd9b1680ae	1009
bogdanm	86:04dd9b1680ae	1010	/**
bogdanm	86:04dd9b1680ae	1011	* @brief Gets the TIM Clock Division value on runtime
bogdanm	86:04dd9b1680ae	1012	* @param __HANDLE__: TIM handle.
bogdanm	86:04dd9b1680ae	1013	* @retval None
bogdanm	86:04dd9b1680ae	1014	*/
Kojto	122:f9eeca106725	1015	#define __HAL_TIM_GET_CLOCKDIVISION(__HANDLE__) \
bogdanm	86:04dd9b1680ae	1016	((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD)
bogdanm	86:04dd9b1680ae	1017
bogdanm	86:04dd9b1680ae	1018	/**
bogdanm	86:04dd9b1680ae	1019	* @brief Sets the TIM Input Capture prescaler on runtime without calling
bogdanm	86:04dd9b1680ae	1020	* another time HAL_TIM_IC_ConfigChannel() function.
bogdanm	86:04dd9b1680ae	1021	* @param __HANDLE__: TIM handle.
Kojto	122:f9eeca106725	1022	* @param __CHANNEL__: TIM Channels to be configured.
bogdanm	86:04dd9b1680ae	1023	* This parameter can be one of the following values:
bogdanm	86:04dd9b1680ae	1024	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	86:04dd9b1680ae	1025	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	86:04dd9b1680ae	1026	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm	86:04dd9b1680ae	1027	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm	86:04dd9b1680ae	1028	* @param __ICPSC__: specifies the Input Capture4 prescaler new value.
bogdanm	86:04dd9b1680ae	1029	* This parameter can be one of the following values:
bogdanm	86:04dd9b1680ae	1030	* @arg TIM_ICPSC_DIV1: no prescaler
bogdanm	86:04dd9b1680ae	1031	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
bogdanm	86:04dd9b1680ae	1032	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
bogdanm	86:04dd9b1680ae	1033	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
bogdanm	86:04dd9b1680ae	1034	* @retval None
bogdanm	86:04dd9b1680ae	1035	*/
Kojto	122:f9eeca106725	1036	#define __HAL_TIM_SET_ICPRESCALER(__HANDLE__, __CHANNEL__, __ICPSC__) \
bogdanm	86:04dd9b1680ae	1037	do{ \
Kojto	122:f9eeca106725	1038	TIM_RESET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__)); \
Kojto	122:f9eeca106725	1039	TIM_SET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__), (__ICPSC__)); \
bogdanm	86:04dd9b1680ae	1040	} while(0)
bogdanm	86:04dd9b1680ae	1041
bogdanm	86:04dd9b1680ae	1042	/**
bogdanm	86:04dd9b1680ae	1043	* @brief Gets the TIM Input Capture prescaler on runtime
bogdanm	86:04dd9b1680ae	1044	* @param __HANDLE__: TIM handle.
Kojto	122:f9eeca106725	1045	* @param __CHANNEL__: TIM Channels to be configured.
bogdanm	86:04dd9b1680ae	1046	* This parameter can be one of the following values:
bogdanm	86:04dd9b1680ae	1047	* @arg TIM_CHANNEL_1: get input capture 1 prescaler value
bogdanm	86:04dd9b1680ae	1048	* @arg TIM_CHANNEL_2: get input capture 2 prescaler value
bogdanm	86:04dd9b1680ae	1049	* @arg TIM_CHANNEL_3: get input capture 3 prescaler value
bogdanm	86:04dd9b1680ae	1050	* @arg TIM_CHANNEL_4: get input capture 4 prescaler value
bogdanm	86:04dd9b1680ae	1051	* @retval None
bogdanm	86:04dd9b1680ae	1052	*/
Kojto	122:f9eeca106725	1053	#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \
bogdanm	86:04dd9b1680ae	1054	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\
bogdanm	86:04dd9b1680ae	1055	((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\
bogdanm	86:04dd9b1680ae	1056	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\
bogdanm	86:04dd9b1680ae	1057	(((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8)
bogdanm	86:04dd9b1680ae	1058
bogdanm	86:04dd9b1680ae	1059	/**
bogdanm	92:4fc01daae5a5	1060	* @brief Set the Update Request Source (URS) bit of the TIMx_CR1 register
bogdanm	92:4fc01daae5a5	1061	* @param __HANDLE__: TIM handle.
bogdanm	92:4fc01daae5a5	1062	* @note When the USR bit of the TIMx_CR1 register is set, only counter
bogdanm	92:4fc01daae5a5	1063	* overflow/underflow generates an update interrupt or DMA request (if
bogdanm	92:4fc01daae5a5	1064	* enabled)
bogdanm	92:4fc01daae5a5	1065	* @retval None
bogdanm	92:4fc01daae5a5	1066	*/
bogdanm	92:4fc01daae5a5	1067	#define __HAL_TIM_URS_ENABLE(__HANDLE__) \
bogdanm	92:4fc01daae5a5	1068	((__HANDLE__)->Instance->CR1\|= (TIM_CR1_URS))
bogdanm	92:4fc01daae5a5	1069
bogdanm	92:4fc01daae5a5	1070	/**
bogdanm	92:4fc01daae5a5	1071	* @brief Reset the Update Request Source (URS) bit of the TIMx_CR1 register
bogdanm	92:4fc01daae5a5	1072	* @param __HANDLE__: TIM handle.
bogdanm	92:4fc01daae5a5	1073	* @note When the USR bit of the TIMx_CR1 register is reset, any of the
bogdanm	92:4fc01daae5a5	1074	* following events generate an update interrupt or DMA request (if
bogdanm	92:4fc01daae5a5	1075	* enabled):
Kojto	122:f9eeca106725	1076	* (+) Counter overflow/underflow
Kojto	122:f9eeca106725	1077	* (+) Setting the UG bit
Kojto	122:f9eeca106725	1078	* (+) Update generation through the slave mode controller
bogdanm	92:4fc01daae5a5	1079	* @retval None
bogdanm	92:4fc01daae5a5	1080	*/
bogdanm	92:4fc01daae5a5	1081	#define __HAL_TIM_URS_DISABLE(__HANDLE__) \
bogdanm	92:4fc01daae5a5	1082	((__HANDLE__)->Instance->CR1&=~(TIM_CR1_URS))
bogdanm	92:4fc01daae5a5	1083
bogdanm	92:4fc01daae5a5	1084	/**
Kojto	122:f9eeca106725	1085	* @brief Sets the TIM Capture x input polarity on runtime.
Kojto	122:f9eeca106725	1086	* @param __HANDLE__: TIM handle.
Kojto	122:f9eeca106725	1087	* @param __CHANNEL__: TIM Channels to be configured.
Kojto	122:f9eeca106725	1088	* This parameter can be one of the following values:
Kojto	122:f9eeca106725	1089	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
Kojto	122:f9eeca106725	1090	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
Kojto	122:f9eeca106725	1091	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
Kojto	122:f9eeca106725	1092	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
Kojto	122:f9eeca106725	1093	* @param __POLARITY__: Polarity for TIx source
Kojto	122:f9eeca106725	1094	* @arg TIM_INPUTCHANNELPOLARITY_RISING: Rising Edge
Kojto	122:f9eeca106725	1095	* @arg TIM_INPUTCHANNELPOLARITY_FALLING: Falling Edge
Kojto	122:f9eeca106725	1096	* @arg TIM_INPUTCHANNELPOLARITY_BOTHEDGE: Rising and Falling Edge
Kojto	122:f9eeca106725	1097	* @retval None
Kojto	122:f9eeca106725	1098	*/
Kojto	122:f9eeca106725	1099	#define __HAL_TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \
Kojto	122:f9eeca106725	1100	do{ \
Kojto	122:f9eeca106725	1101	TIM_RESET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__)); \
Kojto	122:f9eeca106725	1102	TIM_SET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__), (__POLARITY__)); \
Kojto	122:f9eeca106725	1103	}while(0)
Kojto	122:f9eeca106725	1104
Kojto	122:f9eeca106725	1105	/**
Kojto	122:f9eeca106725	1106	* @}
Kojto	122:f9eeca106725	1107	*/
Kojto	122:f9eeca106725	1108	/* End of exported macros ----------------------------------------------------*/
Kojto	122:f9eeca106725	1109
Kojto	122:f9eeca106725	1110	/* Private Constants -----------------------------------------------------------*/
Kojto	122:f9eeca106725	1111	/** @defgroup TIM_Private_Constants TIM Private Constants
Kojto	122:f9eeca106725	1112	* @{
Kojto	122:f9eeca106725	1113	*/
Kojto	122:f9eeca106725	1114
Kojto	122:f9eeca106725	1115	/* The counter of a timer instance is disabled only if all the CCx and CCxN
Kojto	122:f9eeca106725	1116	channels have been disabled */
Kojto	122:f9eeca106725	1117	#define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E \| TIM_CCER_CC2E \| TIM_CCER_CC3E \| TIM_CCER_CC4E))
Kojto	122:f9eeca106725	1118	#define TIM_CCER_CCxNE_MASK ((uint32_t)(TIM_CCER_CC1NE \| TIM_CCER_CC2NE \| TIM_CCER_CC3NE))
Kojto	122:f9eeca106725	1119
Kojto	122:f9eeca106725	1120	/**
bogdanm	86:04dd9b1680ae	1121	* @}
bogdanm	86:04dd9b1680ae	1122	*/
Kojto	122:f9eeca106725	1123	/* End of private constants --------------------------------------------------*/
Kojto	122:f9eeca106725	1124
Kojto	122:f9eeca106725	1125	/* Private Macros -----------------------------------------------------------*/
Kojto	122:f9eeca106725	1126	/** @defgroup TIM_Private_Macros TIM Private Macros
Kojto	122:f9eeca106725	1127	* @{
Kojto	122:f9eeca106725	1128	*/
Kojto	122:f9eeca106725	1129
Kojto	122:f9eeca106725	1130	#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_COUNTERMODE_UP) \|\| \
Kojto	122:f9eeca106725	1131	((MODE) == TIM_COUNTERMODE_DOWN) \|\| \
Kojto	122:f9eeca106725	1132	((MODE) == TIM_COUNTERMODE_CENTERALIGNED1) \|\| \
Kojto	122:f9eeca106725	1133	((MODE) == TIM_COUNTERMODE_CENTERALIGNED2) \|\| \
Kojto	122:f9eeca106725	1134	((MODE) == TIM_COUNTERMODE_CENTERALIGNED3))
Kojto	122:f9eeca106725	1135
Kojto	122:f9eeca106725	1136	#define IS_TIM_CLOCKDIVISION_DIV(DIV) (((DIV) == TIM_CLOCKDIVISION_DIV1) \|\| \
Kojto	122:f9eeca106725	1137	((DIV) == TIM_CLOCKDIVISION_DIV2) \|\| \
Kojto	122:f9eeca106725	1138	((DIV) == TIM_CLOCKDIVISION_DIV4))
Kojto	122:f9eeca106725	1139
Kojto	122:f9eeca106725	1140
Kojto	122:f9eeca106725	1141	#define IS_TIM_FAST_STATE(STATE) (((STATE) == TIM_OCFAST_DISABLE) \|\| \
Kojto	122:f9eeca106725	1142	((STATE) == TIM_OCFAST_ENABLE))
Kojto	122:f9eeca106725	1143
Kojto	122:f9eeca106725	1144	#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPOLARITY_HIGH) \|\| \
Kojto	122:f9eeca106725	1145	((POLARITY) == TIM_OCPOLARITY_LOW))
Kojto	122:f9eeca106725	1146
Kojto	122:f9eeca106725	1147	#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPOLARITY_HIGH) \|\| \
Kojto	122:f9eeca106725	1148	((POLARITY) == TIM_OCNPOLARITY_LOW))
Kojto	122:f9eeca106725	1149
Kojto	122:f9eeca106725	1150	#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIDLESTATE_SET) \|\| \
Kojto	122:f9eeca106725	1151	((STATE) == TIM_OCIDLESTATE_RESET))
Kojto	122:f9eeca106725	1152
Kojto	122:f9eeca106725	1153	#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIDLESTATE_SET) \|\| \
Kojto	122:f9eeca106725	1154	((STATE) == TIM_OCNIDLESTATE_RESET))
Kojto	122:f9eeca106725	1155
Kojto	122:f9eeca106725	1156
Kojto	122:f9eeca106725	1157	#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPOLARITY_RISING) \|\| \
Kojto	122:f9eeca106725	1158	((POLARITY) == TIM_ICPOLARITY_FALLING) \|\| \
Kojto	122:f9eeca106725	1159	((POLARITY) == TIM_ICPOLARITY_BOTHEDGE))
Kojto	122:f9eeca106725	1160
Kojto	122:f9eeca106725	1161	#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSELECTION_DIRECTTI) \|\| \
Kojto	122:f9eeca106725	1162	((SELECTION) == TIM_ICSELECTION_INDIRECTTI) \|\| \
Kojto	122:f9eeca106725	1163	((SELECTION) == TIM_ICSELECTION_TRC))
Kojto	122:f9eeca106725	1164
Kojto	122:f9eeca106725	1165	#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) \|\| \
Kojto	122:f9eeca106725	1166	((PRESCALER) == TIM_ICPSC_DIV2) \|\| \
Kojto	122:f9eeca106725	1167	((PRESCALER) == TIM_ICPSC_DIV4) \|\| \
Kojto	122:f9eeca106725	1168	((PRESCALER) == TIM_ICPSC_DIV8))
Kojto	122:f9eeca106725	1169
Kojto	122:f9eeca106725	1170	#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMODE_SINGLE) \|\| \
Kojto	122:f9eeca106725	1171	((MODE) == TIM_OPMODE_REPETITIVE))
Kojto	122:f9eeca106725	1172
Kojto	122:f9eeca106725	1173	#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_ENCODERMODE_TI1) \|\| \
Kojto	122:f9eeca106725	1174	((MODE) == TIM_ENCODERMODE_TI2) \|\| \
Kojto	122:f9eeca106725	1175	((MODE) == TIM_ENCODERMODE_TI12))
Kojto	122:f9eeca106725	1176
Kojto	122:f9eeca106725	1177	#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & 0xFFFF80FFU) == 0x00000000) && ((SOURCE) != 0x00000000))
Kojto	122:f9eeca106725	1178
Kojto	122:f9eeca106725	1179
Kojto	122:f9eeca106725	1180	#define IS_TIM_CLOCKSOURCE(CLOCK) (((CLOCK) == TIM_CLOCKSOURCE_INTERNAL) \|\| \
Kojto	122:f9eeca106725	1181	((CLOCK) == TIM_CLOCKSOURCE_ETRMODE2) \|\| \
Kojto	122:f9eeca106725	1182	((CLOCK) == TIM_CLOCKSOURCE_ITR0) \|\| \
Kojto	122:f9eeca106725	1183	((CLOCK) == TIM_CLOCKSOURCE_ITR1) \|\| \
Kojto	122:f9eeca106725	1184	((CLOCK) == TIM_CLOCKSOURCE_ITR2) \|\| \
Kojto	122:f9eeca106725	1185	((CLOCK) == TIM_CLOCKSOURCE_ITR3) \|\| \
Kojto	122:f9eeca106725	1186	((CLOCK) == TIM_CLOCKSOURCE_TI1ED) \|\| \
Kojto	122:f9eeca106725	1187	((CLOCK) == TIM_CLOCKSOURCE_TI1) \|\| \
Kojto	122:f9eeca106725	1188	((CLOCK) == TIM_CLOCKSOURCE_TI2) \|\| \
Kojto	122:f9eeca106725	1189	((CLOCK) == TIM_CLOCKSOURCE_ETRMODE1))
Kojto	122:f9eeca106725	1190
Kojto	122:f9eeca106725	1191	#define IS_TIM_CLOCKPOLARITY(POLARITY) (((POLARITY) == TIM_CLOCKPOLARITY_INVERTED) \|\| \
Kojto	122:f9eeca106725	1192	((POLARITY) == TIM_CLOCKPOLARITY_NONINVERTED) \|\| \
Kojto	122:f9eeca106725	1193	((POLARITY) == TIM_CLOCKPOLARITY_RISING) \|\| \
Kojto	122:f9eeca106725	1194	((POLARITY) == TIM_CLOCKPOLARITY_FALLING) \|\| \
Kojto	122:f9eeca106725	1195	((POLARITY) == TIM_CLOCKPOLARITY_BOTHEDGE))
Kojto	122:f9eeca106725	1196
Kojto	122:f9eeca106725	1197	#define IS_TIM_CLOCKPRESCALER(PRESCALER) (((PRESCALER) == TIM_CLOCKPRESCALER_DIV1) \|\| \
Kojto	122:f9eeca106725	1198	((PRESCALER) == TIM_CLOCKPRESCALER_DIV2) \|\| \
Kojto	122:f9eeca106725	1199	((PRESCALER) == TIM_CLOCKPRESCALER_DIV4) \|\| \
Kojto	122:f9eeca106725	1200	((PRESCALER) == TIM_CLOCKPRESCALER_DIV8))
Kojto	122:f9eeca106725	1201
Kojto	122:f9eeca106725	1202	#define IS_TIM_CLOCKFILTER(ICFILTER) ((ICFILTER) <= 0xF)
Kojto	122:f9eeca106725	1203
Kojto	122:f9eeca106725	1204	#define IS_TIM_CLEARINPUT_POLARITY(POLARITY) (((POLARITY) == TIM_CLEARINPUTPOLARITY_INVERTED) \|\| \
Kojto	122:f9eeca106725	1205	((POLARITY) == TIM_CLEARINPUTPOLARITY_NONINVERTED))
Kojto	122:f9eeca106725	1206
Kojto	122:f9eeca106725	1207	#define IS_TIM_CLEARINPUT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV1) \|\| \
Kojto	122:f9eeca106725	1208	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV2) \|\| \
Kojto	122:f9eeca106725	1209	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV4) \|\| \
Kojto	122:f9eeca106725	1210	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV8))
Kojto	122:f9eeca106725	1211
Kojto	122:f9eeca106725	1212	#define IS_TIM_CLEARINPUT_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
Kojto	122:f9eeca106725	1213
Kojto	122:f9eeca106725	1214	#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSR_ENABLE) \|\| \
Kojto	122:f9eeca106725	1215	((STATE) == TIM_OSSR_DISABLE))
Kojto	122:f9eeca106725	1216
Kojto	122:f9eeca106725	1217	#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSI_ENABLE) \|\| \
Kojto	122:f9eeca106725	1218	((STATE) == TIM_OSSI_DISABLE))
Kojto	122:f9eeca106725	1219
Kojto	122:f9eeca106725	1220	#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLEVEL_OFF) \|\| \
Kojto	122:f9eeca106725	1221	((LEVEL) == TIM_LOCKLEVEL_1) \|\| \
Kojto	122:f9eeca106725	1222	((LEVEL) == TIM_LOCKLEVEL_2) \|\| \
Kojto	122:f9eeca106725	1223	((LEVEL) == TIM_LOCKLEVEL_3))
Kojto	122:f9eeca106725	1224
Kojto	122:f9eeca106725	1225	#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_BREAK_ENABLE) \|\| \
Kojto	122:f9eeca106725	1226	((STATE) == TIM_BREAK_DISABLE))
Kojto	122:f9eeca106725	1227
Kojto	122:f9eeca106725	1228	#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BREAKPOLARITY_LOW) \|\| \
Kojto	122:f9eeca106725	1229	((POLARITY) == TIM_BREAKPOLARITY_HIGH))
Kojto	122:f9eeca106725	1230
Kojto	122:f9eeca106725	1231	#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AUTOMATICOUTPUT_ENABLE) \|\| \
Kojto	122:f9eeca106725	1232	((STATE) == TIM_AUTOMATICOUTPUT_DISABLE))
Kojto	122:f9eeca106725	1233
Kojto	122:f9eeca106725	1234	#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO_RESET) \|\| \
Kojto	122:f9eeca106725	1235	((SOURCE) == TIM_TRGO_ENABLE) \|\| \
Kojto	122:f9eeca106725	1236	((SOURCE) == TIM_TRGO_UPDATE) \|\| \
Kojto	122:f9eeca106725	1237	((SOURCE) == TIM_TRGO_OC1) \|\| \
Kojto	122:f9eeca106725	1238	((SOURCE) == TIM_TRGO_OC1REF) \|\| \
Kojto	122:f9eeca106725	1239	((SOURCE) == TIM_TRGO_OC2REF) \|\| \
Kojto	122:f9eeca106725	1240	((SOURCE) == TIM_TRGO_OC3REF) \|\| \
Kojto	122:f9eeca106725	1241	((SOURCE) == TIM_TRGO_OC4REF))
Kojto	122:f9eeca106725	1242
Kojto	122:f9eeca106725	1243	#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MASTERSLAVEMODE_ENABLE) \|\| \
Kojto	122:f9eeca106725	1244	((STATE) == TIM_MASTERSLAVEMODE_DISABLE))
Kojto	122:f9eeca106725	1245
Kojto	122:f9eeca106725	1246	#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
Kojto	122:f9eeca106725	1247	((SELECTION) == TIM_TS_ITR1) \|\| \
Kojto	122:f9eeca106725	1248	((SELECTION) == TIM_TS_ITR2) \|\| \
Kojto	122:f9eeca106725	1249	((SELECTION) == TIM_TS_ITR3) \|\| \
Kojto	122:f9eeca106725	1250	((SELECTION) == TIM_TS_TI1F_ED) \|\| \
Kojto	122:f9eeca106725	1251	((SELECTION) == TIM_TS_TI1FP1) \|\| \
Kojto	122:f9eeca106725	1252	((SELECTION) == TIM_TS_TI2FP2) \|\| \
Kojto	122:f9eeca106725	1253	((SELECTION) == TIM_TS_ETRF))
Kojto	122:f9eeca106725	1254
Kojto	122:f9eeca106725	1255	#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
Kojto	122:f9eeca106725	1256	((SELECTION) == TIM_TS_ITR1) \|\| \
Kojto	122:f9eeca106725	1257	((SELECTION) == TIM_TS_ITR2) \|\| \
Kojto	122:f9eeca106725	1258	((SELECTION) == TIM_TS_ITR3) \|\| \
Kojto	122:f9eeca106725	1259	((SELECTION) == TIM_TS_NONE))
Kojto	122:f9eeca106725	1260
Kojto	122:f9eeca106725	1261	#define IS_TIM_TRIGGERPOLARITY(POLARITY) (((POLARITY) == TIM_TRIGGERPOLARITY_INVERTED ) \|\| \
Kojto	122:f9eeca106725	1262	((POLARITY) == TIM_TRIGGERPOLARITY_NONINVERTED) \|\| \
Kojto	122:f9eeca106725	1263	((POLARITY) == TIM_TRIGGERPOLARITY_RISING ) \|\| \
Kojto	122:f9eeca106725	1264	((POLARITY) == TIM_TRIGGERPOLARITY_FALLING ) \|\| \
Kojto	122:f9eeca106725	1265	((POLARITY) == TIM_TRIGGERPOLARITY_BOTHEDGE ))
Kojto	122:f9eeca106725	1266
Kojto	122:f9eeca106725	1267	#define IS_TIM_TRIGGERPRESCALER(PRESCALER) (((PRESCALER) == TIM_TRIGGERPRESCALER_DIV1) \|\| \
Kojto	122:f9eeca106725	1268	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV2) \|\| \
Kojto	122:f9eeca106725	1269	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV4) \|\| \
Kojto	122:f9eeca106725	1270	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV8))
Kojto	122:f9eeca106725	1271
Kojto	122:f9eeca106725	1272	#define IS_TIM_TRIGGERFILTER(ICFILTER) ((ICFILTER) <= 0xF)
Kojto	122:f9eeca106725	1273
Kojto	122:f9eeca106725	1274	#define IS_TIM_TI1SELECTION(TI1SELECTION) (((TI1SELECTION) == TIM_TI1SELECTION_CH1) \|\| \
Kojto	122:f9eeca106725	1275	((TI1SELECTION) == TIM_TI1SELECTION_XORCOMBINATION))
Kojto	122:f9eeca106725	1276
Kojto	122:f9eeca106725	1277	#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABURSTLENGTH_1TRANSFER) \|\| \
Kojto	122:f9eeca106725	1278	((LENGTH) == TIM_DMABURSTLENGTH_2TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1279	((LENGTH) == TIM_DMABURSTLENGTH_3TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1280	((LENGTH) == TIM_DMABURSTLENGTH_4TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1281	((LENGTH) == TIM_DMABURSTLENGTH_5TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1282	((LENGTH) == TIM_DMABURSTLENGTH_6TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1283	((LENGTH) == TIM_DMABURSTLENGTH_7TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1284	((LENGTH) == TIM_DMABURSTLENGTH_8TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1285	((LENGTH) == TIM_DMABURSTLENGTH_9TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1286	((LENGTH) == TIM_DMABURSTLENGTH_10TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1287	((LENGTH) == TIM_DMABURSTLENGTH_11TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1288	((LENGTH) == TIM_DMABURSTLENGTH_12TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1289	((LENGTH) == TIM_DMABURSTLENGTH_13TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1290	((LENGTH) == TIM_DMABURSTLENGTH_14TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1291	((LENGTH) == TIM_DMABURSTLENGTH_15TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1292	((LENGTH) == TIM_DMABURSTLENGTH_16TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1293	((LENGTH) == TIM_DMABURSTLENGTH_17TRANSFERS) \|\| \
Kojto	122:f9eeca106725	1294	((LENGTH) == TIM_DMABURSTLENGTH_18TRANSFERS))
Kojto	122:f9eeca106725	1295
Kojto	122:f9eeca106725	1296	#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
Kojto	122:f9eeca106725	1297
Kojto	122:f9eeca106725	1298	/** @brief Set TIM IC prescaler
Kojto	122:f9eeca106725	1299	* @param __HANDLE__: TIM handle
Kojto	122:f9eeca106725	1300	* @param __CHANNEL__: specifies TIM Channel
Kojto	122:f9eeca106725	1301	* @param __ICPSC__: specifies the prescaler value.
Kojto	122:f9eeca106725	1302	* @retval None
Kojto	122:f9eeca106725	1303	*/
Kojto	122:f9eeca106725	1304	#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \
Kojto	122:f9eeca106725	1305	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 \|= (__ICPSC__)) :\
Kojto	122:f9eeca106725	1306	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 \|= ((__ICPSC__) << 8)) :\
Kojto	122:f9eeca106725	1307	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 \|= (__ICPSC__)) :\
Kojto	122:f9eeca106725	1308	((__HANDLE__)->Instance->CCMR2 \|= ((__ICPSC__) << 8)))
Kojto	122:f9eeca106725	1309
Kojto	122:f9eeca106725	1310	/** @brief Reset TIM IC prescaler
Kojto	122:f9eeca106725	1311	* @param __HANDLE__: TIM handle
Kojto	122:f9eeca106725	1312	* @param __CHANNEL__: specifies TIM Channel
Kojto	122:f9eeca106725	1313	* @retval None
Kojto	122:f9eeca106725	1314	*/
Kojto	122:f9eeca106725	1315	#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \
Kojto	122:f9eeca106725	1316	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC1PSC) :\
Kojto	122:f9eeca106725	1317	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC2PSC) :\
Kojto	122:f9eeca106725	1318	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC3PSC) :\
Kojto	122:f9eeca106725	1319	((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC4PSC))
Kojto	122:f9eeca106725	1320
Kojto	122:f9eeca106725	1321	/** @brief Set TIM IC polarity
Kojto	122:f9eeca106725	1322	* @param __HANDLE__: TIM handle
Kojto	122:f9eeca106725	1323	* @param __CHANNEL__: specifies TIM Channel
Kojto	122:f9eeca106725	1324	* @param __POLARITY__: specifies TIM Channel Polarity
Kojto	122:f9eeca106725	1325	* @retval None
Kojto	122:f9eeca106725	1326	*/
Kojto	122:f9eeca106725	1327	#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \
Kojto	122:f9eeca106725	1328	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER \|= (__POLARITY__)) :\
Kojto	122:f9eeca106725	1329	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER \|= ((__POLARITY__) << 4)) :\
Kojto	122:f9eeca106725	1330	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER \|= ((__POLARITY__) << 8)) :\
Kojto	122:f9eeca106725	1331	((__HANDLE__)->Instance->CCER \|= (((__POLARITY__) << 12))))
Kojto	122:f9eeca106725	1332
Kojto	122:f9eeca106725	1333	/** @brief Reset TIM IC polarity
Kojto	122:f9eeca106725	1334	* @param __HANDLE__: TIM handle
Kojto	122:f9eeca106725	1335	* @param __CHANNEL__: specifies TIM Channel
Kojto	122:f9eeca106725	1336	* @retval None
Kojto	122:f9eeca106725	1337	*/
Kojto	122:f9eeca106725	1338	#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \
Kojto	122:f9eeca106725	1339	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC1P \| TIM_CCER_CC1NP)) :\
Kojto	122:f9eeca106725	1340	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC2P \| TIM_CCER_CC2NP)) :\
Kojto	122:f9eeca106725	1341	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC3P \| TIM_CCER_CC3NP)) :\
Kojto	122:f9eeca106725	1342	((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC4P \| TIM_CCER_CC4NP)))
Kojto	122:f9eeca106725	1343	/**
Kojto	122:f9eeca106725	1344	* @}
Kojto	122:f9eeca106725	1345	*/
Kojto	122:f9eeca106725	1346	/* End of private macros -----------------------------------------------------*/
bogdanm	86:04dd9b1680ae	1347
bogdanm	92:4fc01daae5a5	1348	/* Include TIM HAL Extended module */
bogdanm	86:04dd9b1680ae	1349	#include "stm32f3xx_hal_tim_ex.h"
bogdanm	86:04dd9b1680ae	1350
bogdanm	86:04dd9b1680ae	1351	/* Exported functions --------------------------------------------------------*/
Kojto	122:f9eeca106725	1352	/** @addtogroup TIM_Exported_Functions
bogdanm	92:4fc01daae5a5	1353	* @{
bogdanm	92:4fc01daae5a5	1354	*/
bogdanm	86:04dd9b1680ae	1355
Kojto	122:f9eeca106725	1356	/** @addtogroup TIM_Exported_Functions_Group1
bogdanm	92:4fc01daae5a5	1357	* @{
bogdanm	92:4fc01daae5a5	1358	*/
bogdanm	86:04dd9b1680ae	1359	/* Time Base functions ********************************************************/
bogdanm	86:04dd9b1680ae	1360	HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1361	HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1362	void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1363	void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1364	/* Blocking mode: Polling */
bogdanm	86:04dd9b1680ae	1365	HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1366	HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1367	/* Non-Blocking mode: Interrupt */
bogdanm	86:04dd9b1680ae	1368	HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1369	HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1370	/* Non-Blocking mode: DMA */
bogdanm	86:04dd9b1680ae	1371	HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length);
bogdanm	86:04dd9b1680ae	1372	HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim);
bogdanm	92:4fc01daae5a5	1373	/**
bogdanm	92:4fc01daae5a5	1374	* @}
bogdanm	92:4fc01daae5a5	1375	*/
bogdanm	86:04dd9b1680ae	1376
Kojto	122:f9eeca106725	1377	/** @addtogroup TIM_Exported_Functions_Group2
bogdanm	92:4fc01daae5a5	1378	* @{
bogdanm	92:4fc01daae5a5	1379	*/
bogdanm	86:04dd9b1680ae	1380	/* Timer Output Compare functions **********************************************/
bogdanm	86:04dd9b1680ae	1381	HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1382	HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1383	void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1384	void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1385	/* Blocking mode: Polling */
bogdanm	86:04dd9b1680ae	1386	HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1387	HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1388	/* Non-Blocking mode: Interrupt */
bogdanm	86:04dd9b1680ae	1389	HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1390	HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1391	/* Non-Blocking mode: DMA */
bogdanm	86:04dd9b1680ae	1392	HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
bogdanm	86:04dd9b1680ae	1393	HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	122:f9eeca106725	1394
bogdanm	92:4fc01daae5a5	1395	/**
bogdanm	92:4fc01daae5a5	1396	* @}
bogdanm	92:4fc01daae5a5	1397	*/
bogdanm	92:4fc01daae5a5	1398
Kojto	122:f9eeca106725	1399	/** @addtogroup TIM_Exported_Functions_Group3
bogdanm	92:4fc01daae5a5	1400	* @{
bogdanm	92:4fc01daae5a5	1401	*/
bogdanm	86:04dd9b1680ae	1402	/* Timer PWM functions *********************************************************/
bogdanm	86:04dd9b1680ae	1403	HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1404	HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1405	void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1406	void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1407	/* Blocking mode: Polling */
bogdanm	86:04dd9b1680ae	1408	HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1409	HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1410	/* Non-Blocking mode: Interrupt */
bogdanm	86:04dd9b1680ae	1411	HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1412	HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1413	/* Non-Blocking mode: DMA */
bogdanm	86:04dd9b1680ae	1414	HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
bogdanm	86:04dd9b1680ae	1415	HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	92:4fc01daae5a5	1416	/**
bogdanm	92:4fc01daae5a5	1417	* @}
bogdanm	92:4fc01daae5a5	1418	*/
bogdanm	92:4fc01daae5a5	1419
Kojto	122:f9eeca106725	1420	/** @addtogroup TIM_Exported_Functions_Group4
bogdanm	92:4fc01daae5a5	1421	* @{
bogdanm	92:4fc01daae5a5	1422	*/
bogdanm	86:04dd9b1680ae	1423	/* Timer Input Capture functions ***********************************************/
bogdanm	86:04dd9b1680ae	1424	HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1425	HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1426	void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1427	void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1428	/* Blocking mode: Polling */
bogdanm	86:04dd9b1680ae	1429	HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1430	HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1431	/* Non-Blocking mode: Interrupt */
bogdanm	86:04dd9b1680ae	1432	HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1433	HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1434	/* Non-Blocking mode: DMA */
bogdanm	86:04dd9b1680ae	1435	HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
bogdanm	86:04dd9b1680ae	1436	HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	92:4fc01daae5a5	1437	/**
bogdanm	92:4fc01daae5a5	1438	* @}
bogdanm	92:4fc01daae5a5	1439	*/
bogdanm	92:4fc01daae5a5	1440
Kojto	122:f9eeca106725	1441	/** @addtogroup TIM_Exported_Functions_Group5
bogdanm	92:4fc01daae5a5	1442	* @{
bogdanm	92:4fc01daae5a5	1443	*/
bogdanm	86:04dd9b1680ae	1444	/* Timer One Pulse functions ***************************************************/
bogdanm	86:04dd9b1680ae	1445	HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode);
bogdanm	86:04dd9b1680ae	1446	HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1447	void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1448	void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1449	/* Blocking mode: Polling */
bogdanm	86:04dd9b1680ae	1450	HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
bogdanm	86:04dd9b1680ae	1451	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
bogdanm	86:04dd9b1680ae	1452	/* Non-Blocking mode: Interrupt */
bogdanm	86:04dd9b1680ae	1453	HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
bogdanm	86:04dd9b1680ae	1454	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
bogdanm	92:4fc01daae5a5	1455	/**
bogdanm	92:4fc01daae5a5	1456	* @}
bogdanm	92:4fc01daae5a5	1457	*/
bogdanm	86:04dd9b1680ae	1458
Kojto	122:f9eeca106725	1459	/** @addtogroup TIM_Exported_Functions_Group6
bogdanm	92:4fc01daae5a5	1460	* @{
bogdanm	92:4fc01daae5a5	1461	*/
bogdanm	86:04dd9b1680ae	1462	/* Timer Encoder functions *****************************************************/
bogdanm	86:04dd9b1680ae	1463	HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef htim, TIM_Encoder_InitTypeDef sConfig);
bogdanm	86:04dd9b1680ae	1464	HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1465	void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1466	void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1467	/* Blocking mode: Polling */
bogdanm	86:04dd9b1680ae	1468	HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1469	HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1470	/* Non-Blocking mode: Interrupt */
bogdanm	86:04dd9b1680ae	1471	HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1472	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1473	/* Non-Blocking mode: DMA */
bogdanm	86:04dd9b1680ae	1474	HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData1, uint32_t *pData2, uint16_t Length);
bogdanm	86:04dd9b1680ae	1475	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	122:f9eeca106725	1476
bogdanm	92:4fc01daae5a5	1477	/**
bogdanm	92:4fc01daae5a5	1478	* @}
bogdanm	92:4fc01daae5a5	1479	*/
bogdanm	86:04dd9b1680ae	1480
Kojto	122:f9eeca106725	1481	/** @addtogroup TIM_Exported_Functions_Group7
bogdanm	92:4fc01daae5a5	1482	* @{
bogdanm	92:4fc01daae5a5	1483	*/
bogdanm	86:04dd9b1680ae	1484	/* Interrupt Handler functions **********************************************/
bogdanm	86:04dd9b1680ae	1485	void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim);
bogdanm	92:4fc01daae5a5	1486	/**
bogdanm	92:4fc01daae5a5	1487	* @}
bogdanm	92:4fc01daae5a5	1488	*/
bogdanm	86:04dd9b1680ae	1489
Kojto	122:f9eeca106725	1490	/** @addtogroup TIM_Exported_Functions_Group8
bogdanm	92:4fc01daae5a5	1491	* @{
bogdanm	92:4fc01daae5a5	1492	*/
bogdanm	86:04dd9b1680ae	1493	/* Control functions *********************************************************/
bogdanm	86:04dd9b1680ae	1494	HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1495	HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1496	HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef htim, TIM_IC_InitTypeDef sConfig, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1497	HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef htim, TIM_OnePulse_InitTypeDef sConfig, uint32_t OutputChannel, uint32_t InputChannel);
bogdanm	86:04dd9b1680ae	1498	HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef htim, TIM_ClearInputConfigTypeDef sClearInputConfig, uint32_t Channel);
bogdanm	86:04dd9b1680ae	1499	HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef htim, TIM_ClockConfigTypeDef sClockSourceConfig);
bogdanm	86:04dd9b1680ae	1500	HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection);
bogdanm	86:04dd9b1680ae	1501	HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef htim, TIM_SlaveConfigTypeDef sSlaveConfig);
Kojto	122:f9eeca106725	1502	HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef htim, TIM_SlaveConfigTypeDef sSlaveConfig);
bogdanm	86:04dd9b1680ae	1503	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
bogdanm	86:04dd9b1680ae	1504	uint32_t *BurstBuffer, uint32_t BurstLength);
bogdanm	86:04dd9b1680ae	1505	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
bogdanm	86:04dd9b1680ae	1506	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
bogdanm	86:04dd9b1680ae	1507	uint32_t *BurstBuffer, uint32_t BurstLength);
bogdanm	86:04dd9b1680ae	1508	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
bogdanm	86:04dd9b1680ae	1509	HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
bogdanm	86:04dd9b1680ae	1510	uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	122:f9eeca106725	1511
bogdanm	92:4fc01daae5a5	1512	/**
bogdanm	92:4fc01daae5a5	1513	* @}
bogdanm	92:4fc01daae5a5	1514	*/
bogdanm	86:04dd9b1680ae	1515
Kojto	122:f9eeca106725	1516	/** @addtogroup TIM_Exported_Functions_Group9
bogdanm	92:4fc01daae5a5	1517	* @{
bogdanm	92:4fc01daae5a5	1518	*/
bogdanm	86:04dd9b1680ae	1519	/* Callback in non blocking modes (Interrupt and DMA) *************************/
bogdanm	86:04dd9b1680ae	1520	void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1521	void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1522	void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1523	void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1524	void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1525	void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim);
bogdanm	92:4fc01daae5a5	1526	/**
bogdanm	92:4fc01daae5a5	1527	* @}
bogdanm	92:4fc01daae5a5	1528	*/
bogdanm	86:04dd9b1680ae	1529
Kojto	122:f9eeca106725	1530	/** @addtogroup TIM_Exported_Functions_Group10
bogdanm	92:4fc01daae5a5	1531	* @{
bogdanm	92:4fc01daae5a5	1532	*/
bogdanm	86:04dd9b1680ae	1533	/* Peripheral State functions **************************************************/
bogdanm	86:04dd9b1680ae	1534	HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1535	HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1536	HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1537	HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1538	HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim);
bogdanm	86:04dd9b1680ae	1539	HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim);
Kojto	122:f9eeca106725	1540
bogdanm	92:4fc01daae5a5	1541	/**
bogdanm	92:4fc01daae5a5	1542	* @}
bogdanm	92:4fc01daae5a5	1543	*/
bogdanm	92:4fc01daae5a5	1544
bogdanm	92:4fc01daae5a5	1545	/**
bogdanm	92:4fc01daae5a5	1546	* @}
bogdanm	92:4fc01daae5a5	1547	*/
Kojto	122:f9eeca106725	1548	/* End of exported functions -------------------------------------------------*/
bogdanm	86:04dd9b1680ae	1549
Kojto	122:f9eeca106725	1550	/* Private Functions --------------------------------------------------------*/
Kojto	122:f9eeca106725	1551	/** @addtogroup TIM_Private_Functions
Kojto	122:f9eeca106725	1552	* @{
Kojto	122:f9eeca106725	1553	*/
bogdanm	86:04dd9b1680ae	1554	void TIM_Base_SetConfig(TIM_TypeDef TIMx, TIM_Base_InitTypeDef Structure);
bogdanm	86:04dd9b1680ae	1555	void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
bogdanm	86:04dd9b1680ae	1556	void TIM_OC1_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
bogdanm	86:04dd9b1680ae	1557	void TIM_OC2_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
bogdanm	86:04dd9b1680ae	1558	void TIM_OC3_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
bogdanm	86:04dd9b1680ae	1559	void TIM_OC4_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
bogdanm	86:04dd9b1680ae	1560	void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
bogdanm	86:04dd9b1680ae	1561	uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter);
Kojto	122:f9eeca106725	1562	void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma);
Kojto	122:f9eeca106725	1563	void TIM_DMAError(DMA_HandleTypeDef *hdma);
Kojto	122:f9eeca106725	1564	void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma);
bogdanm	86:04dd9b1680ae	1565	void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState);
Kojto	122:f9eeca106725	1566	/**
Kojto	122:f9eeca106725	1567	* @}
Kojto	122:f9eeca106725	1568	*/
Kojto	122:f9eeca106725	1569	/* End of private functions --------------------------------------------------*/
bogdanm	86:04dd9b1680ae	1570
bogdanm	86:04dd9b1680ae	1571	/**
bogdanm	86:04dd9b1680ae	1572	* @}
bogdanm	92:4fc01daae5a5	1573	*/
bogdanm	86:04dd9b1680ae	1574
bogdanm	86:04dd9b1680ae	1575	/**
bogdanm	86:04dd9b1680ae	1576	* @}
bogdanm	86:04dd9b1680ae	1577	*/
bogdanm	86:04dd9b1680ae	1578
bogdanm	86:04dd9b1680ae	1579	#ifdef __cplusplus
bogdanm	86:04dd9b1680ae	1580	}
bogdanm	86:04dd9b1680ae	1581	#endif
bogdanm	86:04dd9b1680ae	1582
bogdanm	86:04dd9b1680ae	1583	#endif /* __STM32F3xx_HAL_TIM_H */
bogdanm	86:04dd9b1680ae	1584
bogdanm	86:04dd9b1680ae	1585	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/