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mbed 2

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TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_vref.h@104:b9ad9a133dc7, 2015-08-05 (annotated)

Committer:
Kojto
Date:
Wed Aug 05 13:16:35 2015 +0100
Revision:
104:b9ad9a133dc7
Parent:
90:cb3d968589d8 
Release 104 of the mbed library:



Changes:

- new platforms: nrf51 microbit

- MAXxxx - fix pwm array search

- LPC8xx - usart enable fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 90:cb3d968589d8 1 /*
Kojto 90:cb3d968589d8 2 ** ###################################################################
Kojto 90:cb3d968589d8 3 ** Compilers: Keil ARM C/C++ Compiler
Kojto 90:cb3d968589d8 4 ** Freescale C/C++ for Embedded ARM
Kojto 90:cb3d968589d8 5 ** GNU C Compiler
Kojto 90:cb3d968589d8 6 ** IAR ANSI C/C++ Compiler for ARM
Kojto 90:cb3d968589d8 7 **
Kojto 90:cb3d968589d8 8 ** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
Kojto 90:cb3d968589d8 9 ** Version: rev. 2.5, 2014-02-10
Kojto 90:cb3d968589d8 10 ** Build: b140604
Kojto 90:cb3d968589d8 11 **
Kojto 90:cb3d968589d8 12 ** Abstract:
Kojto 90:cb3d968589d8 13 ** Extension to the CMSIS register access layer header.
Kojto 90:cb3d968589d8 14 **
Kojto 90:cb3d968589d8 15 ** Copyright (c) 2014 Freescale Semiconductor, Inc.
Kojto 90:cb3d968589d8 16 ** All rights reserved.
Kojto 90:cb3d968589d8 17 **
Kojto 90:cb3d968589d8 18 ** Redistribution and use in source and binary forms, with or without modification,
Kojto 90:cb3d968589d8 19 ** are permitted provided that the following conditions are met:
Kojto 90:cb3d968589d8 20 **
Kojto 90:cb3d968589d8 21 ** o Redistributions of source code must retain the above copyright notice, this list
Kojto 90:cb3d968589d8 22 ** of conditions and the following disclaimer.
Kojto 90:cb3d968589d8 23 **
Kojto 90:cb3d968589d8 24 ** o Redistributions in binary form must reproduce the above copyright notice, this
Kojto 90:cb3d968589d8 25 ** list of conditions and the following disclaimer in the documentation and/or
Kojto 90:cb3d968589d8 26 ** other materials provided with the distribution.
Kojto 90:cb3d968589d8 27 **
Kojto 90:cb3d968589d8 28 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
Kojto 90:cb3d968589d8 29 ** contributors may be used to endorse or promote products derived from this
Kojto 90:cb3d968589d8 30 ** software without specific prior written permission.
Kojto 90:cb3d968589d8 31 **
Kojto 90:cb3d968589d8 32 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
Kojto 90:cb3d968589d8 33 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
Kojto 90:cb3d968589d8 34 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 90:cb3d968589d8 35 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
Kojto 90:cb3d968589d8 36 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
Kojto 90:cb3d968589d8 37 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Kojto 90:cb3d968589d8 38 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
Kojto 90:cb3d968589d8 39 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
Kojto 90:cb3d968589d8 40 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Kojto 90:cb3d968589d8 41 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 90:cb3d968589d8 42 **
Kojto 90:cb3d968589d8 43 ** http: www.freescale.com
Kojto 90:cb3d968589d8 44 ** mail: support@freescale.com
Kojto 90:cb3d968589d8 45 **
Kojto 90:cb3d968589d8 46 ** Revisions:
Kojto 90:cb3d968589d8 47 ** - rev. 1.0 (2013-08-12)
Kojto 90:cb3d968589d8 48 ** Initial version.
Kojto 90:cb3d968589d8 49 ** - rev. 2.0 (2013-10-29)
Kojto 90:cb3d968589d8 50 ** Register accessor macros added to the memory map.
Kojto 90:cb3d968589d8 51 ** Symbols for Processor Expert memory map compatibility added to the memory map.
Kojto 90:cb3d968589d8 52 ** Startup file for gcc has been updated according to CMSIS 3.2.
Kojto 90:cb3d968589d8 53 ** System initialization updated.
Kojto 90:cb3d968589d8 54 ** MCG - registers updated.
Kojto 90:cb3d968589d8 55 ** PORTA, PORTB, PORTC, PORTE - registers for digital filter removed.
Kojto 90:cb3d968589d8 56 ** - rev. 2.1 (2013-10-30)
Kojto 90:cb3d968589d8 57 ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
Kojto 90:cb3d968589d8 58 ** - rev. 2.2 (2013-12-09)
Kojto 90:cb3d968589d8 59 ** DMA - EARS register removed.
Kojto 90:cb3d968589d8 60 ** AIPS0, AIPS1 - MPRA register updated.
Kojto 90:cb3d968589d8 61 ** - rev. 2.3 (2014-01-24)
Kojto 90:cb3d968589d8 62 ** Update according to reference manual rev. 2
Kojto 90:cb3d968589d8 63 ** ENET, MCG, MCM, SIM, USB - registers updated
Kojto 90:cb3d968589d8 64 ** - rev. 2.4 (2014-02-10)
Kojto 90:cb3d968589d8 65 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Kojto 90:cb3d968589d8 66 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
Kojto 90:cb3d968589d8 67 ** - rev. 2.5 (2014-02-10)
Kojto 90:cb3d968589d8 68 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Kojto 90:cb3d968589d8 69 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
Kojto 90:cb3d968589d8 70 ** Module access macro module_BASES replaced by module_BASE_PTRS.
Kojto 90:cb3d968589d8 71 **
Kojto 90:cb3d968589d8 72 ** ###################################################################
Kojto 90:cb3d968589d8 73 */
Kojto 90:cb3d968589d8 74
Kojto 90:cb3d968589d8 75 /*
Kojto 90:cb3d968589d8 76 * WARNING! DO NOT EDIT THIS FILE DIRECTLY!
Kojto 90:cb3d968589d8 77 *
Kojto 90:cb3d968589d8 78 * This file was generated automatically and any changes may be lost.
Kojto 90:cb3d968589d8 79 */
Kojto 90:cb3d968589d8 80 #ifndef __HW_VREF_REGISTERS_H__
Kojto 90:cb3d968589d8 81 #define __HW_VREF_REGISTERS_H__
Kojto 90:cb3d968589d8 82
Kojto 90:cb3d968589d8 83 #include "MK64F12.h"
Kojto 90:cb3d968589d8 84 #include "fsl_bitaccess.h"
Kojto 90:cb3d968589d8 85
Kojto 90:cb3d968589d8 86 /*
Kojto 90:cb3d968589d8 87 * MK64F12 VREF
Kojto 90:cb3d968589d8 88 *
Kojto 90:cb3d968589d8 89 * Voltage Reference
Kojto 90:cb3d968589d8 90 *
Kojto 90:cb3d968589d8 91 * Registers defined in this header file:
Kojto 90:cb3d968589d8 92 * - HW_VREF_TRM - VREF Trim Register
Kojto 90:cb3d968589d8 93 * - HW_VREF_SC - VREF Status and Control Register
Kojto 90:cb3d968589d8 94 *
Kojto 90:cb3d968589d8 95 * - hw_vref_t - Struct containing all module registers.
Kojto 90:cb3d968589d8 96 */
Kojto 90:cb3d968589d8 97
Kojto 90:cb3d968589d8 98 #define HW_VREF_INSTANCE_COUNT (1U) /*!< Number of instances of the VREF module. */
Kojto 90:cb3d968589d8 99
Kojto 90:cb3d968589d8 100 /*******************************************************************************
Kojto 90:cb3d968589d8 101 * HW_VREF_TRM - VREF Trim Register
Kojto 90:cb3d968589d8 102 ******************************************************************************/
Kojto 90:cb3d968589d8 103
Kojto 90:cb3d968589d8 104 /*!
Kojto 90:cb3d968589d8 105 * @brief HW_VREF_TRM - VREF Trim Register (RW)
Kojto 90:cb3d968589d8 106 *
Kojto 90:cb3d968589d8 107 * Reset value: 0x00U
Kojto 90:cb3d968589d8 108 *
Kojto 90:cb3d968589d8 109 * This register contains bits that contain the trim data for the Voltage
Kojto 90:cb3d968589d8 110 * Reference.
Kojto 90:cb3d968589d8 111 */
Kojto 90:cb3d968589d8 112 typedef union _hw_vref_trm
Kojto 90:cb3d968589d8 113 {
Kojto 90:cb3d968589d8 114 uint8_t U;
Kojto 90:cb3d968589d8 115 struct _hw_vref_trm_bitfields
Kojto 90:cb3d968589d8 116 {
Kojto 90:cb3d968589d8 117 uint8_t TRIM : 6; /*!< [5:0] Trim bits */
Kojto 90:cb3d968589d8 118 uint8_t CHOPEN : 1; /*!< [6] Chop oscillator enable. When set,
Kojto 90:cb3d968589d8 119 * internal chopping operation is enabled and the internal analog offset will be
Kojto 90:cb3d968589d8 120 * minimized. */
Kojto 90:cb3d968589d8 121 uint8_t RESERVED0 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 122 } B;
Kojto 90:cb3d968589d8 123 } hw_vref_trm_t;
Kojto 90:cb3d968589d8 124
Kojto 90:cb3d968589d8 125 /*!
Kojto 90:cb3d968589d8 126 * @name Constants and macros for entire VREF_TRM register
Kojto 90:cb3d968589d8 127 */
Kojto 90:cb3d968589d8 128 /*@{*/
Kojto 90:cb3d968589d8 129 #define HW_VREF_TRM_ADDR(x) ((x) + 0x0U)
Kojto 90:cb3d968589d8 130
Kojto 90:cb3d968589d8 131 #define HW_VREF_TRM(x) (*(__IO hw_vref_trm_t *) HW_VREF_TRM_ADDR(x))
Kojto 90:cb3d968589d8 132 #define HW_VREF_TRM_RD(x) (HW_VREF_TRM(x).U)
Kojto 90:cb3d968589d8 133 #define HW_VREF_TRM_WR(x, v) (HW_VREF_TRM(x).U = (v))
Kojto 90:cb3d968589d8 134 #define HW_VREF_TRM_SET(x, v) (HW_VREF_TRM_WR(x, HW_VREF_TRM_RD(x) | (v)))
Kojto 90:cb3d968589d8 135 #define HW_VREF_TRM_CLR(x, v) (HW_VREF_TRM_WR(x, HW_VREF_TRM_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 136 #define HW_VREF_TRM_TOG(x, v) (HW_VREF_TRM_WR(x, HW_VREF_TRM_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 137 /*@}*/
Kojto 90:cb3d968589d8 138
Kojto 90:cb3d968589d8 139 /*
Kojto 90:cb3d968589d8 140 * Constants & macros for individual VREF_TRM bitfields
Kojto 90:cb3d968589d8 141 */
Kojto 90:cb3d968589d8 142
Kojto 90:cb3d968589d8 143 /*!
Kojto 90:cb3d968589d8 144 * @name Register VREF_TRM, field TRIM[5:0] (RW)
Kojto 90:cb3d968589d8 145 *
Kojto 90:cb3d968589d8 146 * These bits change the resulting VREF by approximately +/- 0.5 mV for each
Kojto 90:cb3d968589d8 147 * step. Min = minimum and max = maximum voltage reference output. For minimum and
Kojto 90:cb3d968589d8 148 * maximum voltage reference output values, refer to the Data Sheet for this chip.
Kojto 90:cb3d968589d8 149 *
Kojto 90:cb3d968589d8 150 * Values:
Kojto 90:cb3d968589d8 151 * - 000000 - Min
Kojto 90:cb3d968589d8 152 * - 111111 - Max
Kojto 90:cb3d968589d8 153 */
Kojto 90:cb3d968589d8 154 /*@{*/
Kojto 90:cb3d968589d8 155 #define BP_VREF_TRM_TRIM (0U) /*!< Bit position for VREF_TRM_TRIM. */
Kojto 90:cb3d968589d8 156 #define BM_VREF_TRM_TRIM (0x3FU) /*!< Bit mask for VREF_TRM_TRIM. */
Kojto 90:cb3d968589d8 157 #define BS_VREF_TRM_TRIM (6U) /*!< Bit field size in bits for VREF_TRM_TRIM. */
Kojto 90:cb3d968589d8 158
Kojto 90:cb3d968589d8 159 /*! @brief Read current value of the VREF_TRM_TRIM field. */
Kojto 90:cb3d968589d8 160 #define BR_VREF_TRM_TRIM(x) (HW_VREF_TRM(x).B.TRIM)
Kojto 90:cb3d968589d8 161
Kojto 90:cb3d968589d8 162 /*! @brief Format value for bitfield VREF_TRM_TRIM. */
Kojto 90:cb3d968589d8 163 #define BF_VREF_TRM_TRIM(v) ((uint8_t)((uint8_t)(v) << BP_VREF_TRM_TRIM) & BM_VREF_TRM_TRIM)
Kojto 90:cb3d968589d8 164
Kojto 90:cb3d968589d8 165 /*! @brief Set the TRIM field to a new value. */
Kojto 90:cb3d968589d8 166 #define BW_VREF_TRM_TRIM(x, v) (HW_VREF_TRM_WR(x, (HW_VREF_TRM_RD(x) & ~BM_VREF_TRM_TRIM) | BF_VREF_TRM_TRIM(v)))
Kojto 90:cb3d968589d8 167 /*@}*/
Kojto 90:cb3d968589d8 168
Kojto 90:cb3d968589d8 169 /*!
Kojto 90:cb3d968589d8 170 * @name Register VREF_TRM, field CHOPEN[6] (RW)
Kojto 90:cb3d968589d8 171 *
Kojto 90:cb3d968589d8 172 * This bit is set during factory trimming of the VREF voltage. This bit should
Kojto 90:cb3d968589d8 173 * be written to 1 to achieve the performance stated in the data sheet.
Kojto 90:cb3d968589d8 174 *
Kojto 90:cb3d968589d8 175 * Values:
Kojto 90:cb3d968589d8 176 * - 0 - Chop oscillator is disabled.
Kojto 90:cb3d968589d8 177 * - 1 - Chop oscillator is enabled.
Kojto 90:cb3d968589d8 178 */
Kojto 90:cb3d968589d8 179 /*@{*/
Kojto 90:cb3d968589d8 180 #define BP_VREF_TRM_CHOPEN (6U) /*!< Bit position for VREF_TRM_CHOPEN. */
Kojto 90:cb3d968589d8 181 #define BM_VREF_TRM_CHOPEN (0x40U) /*!< Bit mask for VREF_TRM_CHOPEN. */
Kojto 90:cb3d968589d8 182 #define BS_VREF_TRM_CHOPEN (1U) /*!< Bit field size in bits for VREF_TRM_CHOPEN. */
Kojto 90:cb3d968589d8 183
Kojto 90:cb3d968589d8 184 /*! @brief Read current value of the VREF_TRM_CHOPEN field. */
Kojto 90:cb3d968589d8 185 #define BR_VREF_TRM_CHOPEN(x) (BITBAND_ACCESS8(HW_VREF_TRM_ADDR(x), BP_VREF_TRM_CHOPEN))
Kojto 90:cb3d968589d8 186
Kojto 90:cb3d968589d8 187 /*! @brief Format value for bitfield VREF_TRM_CHOPEN. */
Kojto 90:cb3d968589d8 188 #define BF_VREF_TRM_CHOPEN(v) ((uint8_t)((uint8_t)(v) << BP_VREF_TRM_CHOPEN) & BM_VREF_TRM_CHOPEN)
Kojto 90:cb3d968589d8 189
Kojto 90:cb3d968589d8 190 /*! @brief Set the CHOPEN field to a new value. */
Kojto 90:cb3d968589d8 191 #define BW_VREF_TRM_CHOPEN(x, v) (BITBAND_ACCESS8(HW_VREF_TRM_ADDR(x), BP_VREF_TRM_CHOPEN) = (v))
Kojto 90:cb3d968589d8 192 /*@}*/
Kojto 90:cb3d968589d8 193
Kojto 90:cb3d968589d8 194 /*******************************************************************************
Kojto 90:cb3d968589d8 195 * HW_VREF_SC - VREF Status and Control Register
Kojto 90:cb3d968589d8 196 ******************************************************************************/
Kojto 90:cb3d968589d8 197
Kojto 90:cb3d968589d8 198 /*!
Kojto 90:cb3d968589d8 199 * @brief HW_VREF_SC - VREF Status and Control Register (RW)
Kojto 90:cb3d968589d8 200 *
Kojto 90:cb3d968589d8 201 * Reset value: 0x00U
Kojto 90:cb3d968589d8 202 *
Kojto 90:cb3d968589d8 203 * This register contains the control bits used to enable the internal voltage
Kojto 90:cb3d968589d8 204 * reference and to select the buffer mode to be used.
Kojto 90:cb3d968589d8 205 */
Kojto 90:cb3d968589d8 206 typedef union _hw_vref_sc
Kojto 90:cb3d968589d8 207 {
Kojto 90:cb3d968589d8 208 uint8_t U;
Kojto 90:cb3d968589d8 209 struct _hw_vref_sc_bitfields
Kojto 90:cb3d968589d8 210 {
Kojto 90:cb3d968589d8 211 uint8_t MODE_LV : 2; /*!< [1:0] Buffer Mode selection */
Kojto 90:cb3d968589d8 212 uint8_t VREFST : 1; /*!< [2] Internal Voltage Reference stable */
Kojto 90:cb3d968589d8 213 uint8_t RESERVED0 : 2; /*!< [4:3] */
Kojto 90:cb3d968589d8 214 uint8_t ICOMPEN : 1; /*!< [5] Second order curvature compensation
Kojto 90:cb3d968589d8 215 * enable */
Kojto 90:cb3d968589d8 216 uint8_t REGEN : 1; /*!< [6] Regulator enable */
Kojto 90:cb3d968589d8 217 uint8_t VREFEN : 1; /*!< [7] Internal Voltage Reference enable */
Kojto 90:cb3d968589d8 218 } B;
Kojto 90:cb3d968589d8 219 } hw_vref_sc_t;
Kojto 90:cb3d968589d8 220
Kojto 90:cb3d968589d8 221 /*!
Kojto 90:cb3d968589d8 222 * @name Constants and macros for entire VREF_SC register
Kojto 90:cb3d968589d8 223 */
Kojto 90:cb3d968589d8 224 /*@{*/
Kojto 90:cb3d968589d8 225 #define HW_VREF_SC_ADDR(x) ((x) + 0x1U)
Kojto 90:cb3d968589d8 226
Kojto 90:cb3d968589d8 227 #define HW_VREF_SC(x) (*(__IO hw_vref_sc_t *) HW_VREF_SC_ADDR(x))
Kojto 90:cb3d968589d8 228 #define HW_VREF_SC_RD(x) (HW_VREF_SC(x).U)
Kojto 90:cb3d968589d8 229 #define HW_VREF_SC_WR(x, v) (HW_VREF_SC(x).U = (v))
Kojto 90:cb3d968589d8 230 #define HW_VREF_SC_SET(x, v) (HW_VREF_SC_WR(x, HW_VREF_SC_RD(x) | (v)))
Kojto 90:cb3d968589d8 231 #define HW_VREF_SC_CLR(x, v) (HW_VREF_SC_WR(x, HW_VREF_SC_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 232 #define HW_VREF_SC_TOG(x, v) (HW_VREF_SC_WR(x, HW_VREF_SC_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 233 /*@}*/
Kojto 90:cb3d968589d8 234
Kojto 90:cb3d968589d8 235 /*
Kojto 90:cb3d968589d8 236 * Constants & macros for individual VREF_SC bitfields
Kojto 90:cb3d968589d8 237 */
Kojto 90:cb3d968589d8 238
Kojto 90:cb3d968589d8 239 /*!
Kojto 90:cb3d968589d8 240 * @name Register VREF_SC, field MODE_LV[1:0] (RW)
Kojto 90:cb3d968589d8 241 *
Kojto 90:cb3d968589d8 242 * These bits select the buffer modes for the Voltage Reference module.
Kojto 90:cb3d968589d8 243 *
Kojto 90:cb3d968589d8 244 * Values:
Kojto 90:cb3d968589d8 245 * - 00 - Bandgap on only, for stabilization and startup
Kojto 90:cb3d968589d8 246 * - 01 - High power buffer mode enabled
Kojto 90:cb3d968589d8 247 * - 10 - Low-power buffer mode enabled
Kojto 90:cb3d968589d8 248 * - 11 - Reserved
Kojto 90:cb3d968589d8 249 */
Kojto 90:cb3d968589d8 250 /*@{*/
Kojto 90:cb3d968589d8 251 #define BP_VREF_SC_MODE_LV (0U) /*!< Bit position for VREF_SC_MODE_LV. */
Kojto 90:cb3d968589d8 252 #define BM_VREF_SC_MODE_LV (0x03U) /*!< Bit mask for VREF_SC_MODE_LV. */
Kojto 90:cb3d968589d8 253 #define BS_VREF_SC_MODE_LV (2U) /*!< Bit field size in bits for VREF_SC_MODE_LV. */
Kojto 90:cb3d968589d8 254
Kojto 90:cb3d968589d8 255 /*! @brief Read current value of the VREF_SC_MODE_LV field. */
Kojto 90:cb3d968589d8 256 #define BR_VREF_SC_MODE_LV(x) (HW_VREF_SC(x).B.MODE_LV)
Kojto 90:cb3d968589d8 257
Kojto 90:cb3d968589d8 258 /*! @brief Format value for bitfield VREF_SC_MODE_LV. */
Kojto 90:cb3d968589d8 259 #define BF_VREF_SC_MODE_LV(v) ((uint8_t)((uint8_t)(v) << BP_VREF_SC_MODE_LV) & BM_VREF_SC_MODE_LV)
Kojto 90:cb3d968589d8 260
Kojto 90:cb3d968589d8 261 /*! @brief Set the MODE_LV field to a new value. */
Kojto 90:cb3d968589d8 262 #define BW_VREF_SC_MODE_LV(x, v) (HW_VREF_SC_WR(x, (HW_VREF_SC_RD(x) & ~BM_VREF_SC_MODE_LV) | BF_VREF_SC_MODE_LV(v)))
Kojto 90:cb3d968589d8 263 /*@}*/
Kojto 90:cb3d968589d8 264
Kojto 90:cb3d968589d8 265 /*!
Kojto 90:cb3d968589d8 266 * @name Register VREF_SC, field VREFST[2] (RO)
Kojto 90:cb3d968589d8 267 *
Kojto 90:cb3d968589d8 268 * This bit indicates that the bandgap reference within the Voltage Reference
Kojto 90:cb3d968589d8 269 * module has completed its startup and stabilization.
Kojto 90:cb3d968589d8 270 *
Kojto 90:cb3d968589d8 271 * Values:
Kojto 90:cb3d968589d8 272 * - 0 - The module is disabled or not stable.
Kojto 90:cb3d968589d8 273 * - 1 - The module is stable.
Kojto 90:cb3d968589d8 274 */
Kojto 90:cb3d968589d8 275 /*@{*/
Kojto 90:cb3d968589d8 276 #define BP_VREF_SC_VREFST (2U) /*!< Bit position for VREF_SC_VREFST. */
Kojto 90:cb3d968589d8 277 #define BM_VREF_SC_VREFST (0x04U) /*!< Bit mask for VREF_SC_VREFST. */
Kojto 90:cb3d968589d8 278 #define BS_VREF_SC_VREFST (1U) /*!< Bit field size in bits for VREF_SC_VREFST. */
Kojto 90:cb3d968589d8 279
Kojto 90:cb3d968589d8 280 /*! @brief Read current value of the VREF_SC_VREFST field. */
Kojto 90:cb3d968589d8 281 #define BR_VREF_SC_VREFST(x) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFST))
Kojto 90:cb3d968589d8 282 /*@}*/
Kojto 90:cb3d968589d8 283
Kojto 90:cb3d968589d8 284 /*!
Kojto 90:cb3d968589d8 285 * @name Register VREF_SC, field ICOMPEN[5] (RW)
Kojto 90:cb3d968589d8 286 *
Kojto 90:cb3d968589d8 287 * This bit is set during factory trimming of the VREF voltage. This bit should
Kojto 90:cb3d968589d8 288 * be written to 1 to achieve the performance stated in the data sheet.
Kojto 90:cb3d968589d8 289 *
Kojto 90:cb3d968589d8 290 * Values:
Kojto 90:cb3d968589d8 291 * - 0 - Disabled
Kojto 90:cb3d968589d8 292 * - 1 - Enabled
Kojto 90:cb3d968589d8 293 */
Kojto 90:cb3d968589d8 294 /*@{*/
Kojto 90:cb3d968589d8 295 #define BP_VREF_SC_ICOMPEN (5U) /*!< Bit position for VREF_SC_ICOMPEN. */
Kojto 90:cb3d968589d8 296 #define BM_VREF_SC_ICOMPEN (0x20U) /*!< Bit mask for VREF_SC_ICOMPEN. */
Kojto 90:cb3d968589d8 297 #define BS_VREF_SC_ICOMPEN (1U) /*!< Bit field size in bits for VREF_SC_ICOMPEN. */
Kojto 90:cb3d968589d8 298
Kojto 90:cb3d968589d8 299 /*! @brief Read current value of the VREF_SC_ICOMPEN field. */
Kojto 90:cb3d968589d8 300 #define BR_VREF_SC_ICOMPEN(x) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_ICOMPEN))
Kojto 90:cb3d968589d8 301
Kojto 90:cb3d968589d8 302 /*! @brief Format value for bitfield VREF_SC_ICOMPEN. */
Kojto 90:cb3d968589d8 303 #define BF_VREF_SC_ICOMPEN(v) ((uint8_t)((uint8_t)(v) << BP_VREF_SC_ICOMPEN) & BM_VREF_SC_ICOMPEN)
Kojto 90:cb3d968589d8 304
Kojto 90:cb3d968589d8 305 /*! @brief Set the ICOMPEN field to a new value. */
Kojto 90:cb3d968589d8 306 #define BW_VREF_SC_ICOMPEN(x, v) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_ICOMPEN) = (v))
Kojto 90:cb3d968589d8 307 /*@}*/
Kojto 90:cb3d968589d8 308
Kojto 90:cb3d968589d8 309 /*!
Kojto 90:cb3d968589d8 310 * @name Register VREF_SC, field REGEN[6] (RW)
Kojto 90:cb3d968589d8 311 *
Kojto 90:cb3d968589d8 312 * This bit is used to enable the internal 1.75 V regulator to produce a
Kojto 90:cb3d968589d8 313 * constant internal voltage supply in order to reduce the sensitivity to external
Kojto 90:cb3d968589d8 314 * supply noise and variation. If it is desired to keep the regulator enabled in very
Kojto 90:cb3d968589d8 315 * low power modes, refer to the Chip Configuration details for a description on
Kojto 90:cb3d968589d8 316 * how this can be achieved. This bit is set during factory trimming of the VREF
Kojto 90:cb3d968589d8 317 * voltage. This bit should be written to 1 to achieve the performance stated in
Kojto 90:cb3d968589d8 318 * the data sheet.
Kojto 90:cb3d968589d8 319 *
Kojto 90:cb3d968589d8 320 * Values:
Kojto 90:cb3d968589d8 321 * - 0 - Internal 1.75 V regulator is disabled.
Kojto 90:cb3d968589d8 322 * - 1 - Internal 1.75 V regulator is enabled.
Kojto 90:cb3d968589d8 323 */
Kojto 90:cb3d968589d8 324 /*@{*/
Kojto 90:cb3d968589d8 325 #define BP_VREF_SC_REGEN (6U) /*!< Bit position for VREF_SC_REGEN. */
Kojto 90:cb3d968589d8 326 #define BM_VREF_SC_REGEN (0x40U) /*!< Bit mask for VREF_SC_REGEN. */
Kojto 90:cb3d968589d8 327 #define BS_VREF_SC_REGEN (1U) /*!< Bit field size in bits for VREF_SC_REGEN. */
Kojto 90:cb3d968589d8 328
Kojto 90:cb3d968589d8 329 /*! @brief Read current value of the VREF_SC_REGEN field. */
Kojto 90:cb3d968589d8 330 #define BR_VREF_SC_REGEN(x) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_REGEN))
Kojto 90:cb3d968589d8 331
Kojto 90:cb3d968589d8 332 /*! @brief Format value for bitfield VREF_SC_REGEN. */
Kojto 90:cb3d968589d8 333 #define BF_VREF_SC_REGEN(v) ((uint8_t)((uint8_t)(v) << BP_VREF_SC_REGEN) & BM_VREF_SC_REGEN)
Kojto 90:cb3d968589d8 334
Kojto 90:cb3d968589d8 335 /*! @brief Set the REGEN field to a new value. */
Kojto 90:cb3d968589d8 336 #define BW_VREF_SC_REGEN(x, v) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_REGEN) = (v))
Kojto 90:cb3d968589d8 337 /*@}*/
Kojto 90:cb3d968589d8 338
Kojto 90:cb3d968589d8 339 /*!
Kojto 90:cb3d968589d8 340 * @name Register VREF_SC, field VREFEN[7] (RW)
Kojto 90:cb3d968589d8 341 *
Kojto 90:cb3d968589d8 342 * This bit is used to enable the bandgap reference within the Voltage Reference
Kojto 90:cb3d968589d8 343 * module. After the VREF is enabled, turning off the clock to the VREF module
Kojto 90:cb3d968589d8 344 * via the corresponding clock gate register will not disable the VREF. VREF must
Kojto 90:cb3d968589d8 345 * be disabled via this VREFEN bit.
Kojto 90:cb3d968589d8 346 *
Kojto 90:cb3d968589d8 347 * Values:
Kojto 90:cb3d968589d8 348 * - 0 - The module is disabled.
Kojto 90:cb3d968589d8 349 * - 1 - The module is enabled.
Kojto 90:cb3d968589d8 350 */
Kojto 90:cb3d968589d8 351 /*@{*/
Kojto 90:cb3d968589d8 352 #define BP_VREF_SC_VREFEN (7U) /*!< Bit position for VREF_SC_VREFEN. */
Kojto 90:cb3d968589d8 353 #define BM_VREF_SC_VREFEN (0x80U) /*!< Bit mask for VREF_SC_VREFEN. */
Kojto 90:cb3d968589d8 354 #define BS_VREF_SC_VREFEN (1U) /*!< Bit field size in bits for VREF_SC_VREFEN. */
Kojto 90:cb3d968589d8 355
Kojto 90:cb3d968589d8 356 /*! @brief Read current value of the VREF_SC_VREFEN field. */
Kojto 90:cb3d968589d8 357 #define BR_VREF_SC_VREFEN(x) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFEN))
Kojto 90:cb3d968589d8 358
Kojto 90:cb3d968589d8 359 /*! @brief Format value for bitfield VREF_SC_VREFEN. */
Kojto 90:cb3d968589d8 360 #define BF_VREF_SC_VREFEN(v) ((uint8_t)((uint8_t)(v) << BP_VREF_SC_VREFEN) & BM_VREF_SC_VREFEN)
Kojto 90:cb3d968589d8 361
Kojto 90:cb3d968589d8 362 /*! @brief Set the VREFEN field to a new value. */
Kojto 90:cb3d968589d8 363 #define BW_VREF_SC_VREFEN(x, v) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFEN) = (v))
Kojto 90:cb3d968589d8 364 /*@}*/
Kojto 90:cb3d968589d8 365
Kojto 90:cb3d968589d8 366 /*******************************************************************************
Kojto 90:cb3d968589d8 367 * hw_vref_t - module struct
Kojto 90:cb3d968589d8 368 ******************************************************************************/
Kojto 90:cb3d968589d8 369 /*!
Kojto 90:cb3d968589d8 370 * @brief All VREF module registers.
Kojto 90:cb3d968589d8 371 */
Kojto 90:cb3d968589d8 372 #pragma pack(1)
Kojto 90:cb3d968589d8 373 typedef struct _hw_vref
Kojto 90:cb3d968589d8 374 {
Kojto 90:cb3d968589d8 375 __IO hw_vref_trm_t TRM; /*!< [0x0] VREF Trim Register */
Kojto 90:cb3d968589d8 376 __IO hw_vref_sc_t SC; /*!< [0x1] VREF Status and Control Register */
Kojto 90:cb3d968589d8 377 } hw_vref_t;
Kojto 90:cb3d968589d8 378 #pragma pack()
Kojto 90:cb3d968589d8 379
Kojto 90:cb3d968589d8 380 /*! @brief Macro to access all VREF registers. */
Kojto 90:cb3d968589d8 381 /*! @param x VREF module instance base address. */
Kojto 90:cb3d968589d8 382 /*! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
Kojto 90:cb3d968589d8 383 * use the '&' operator, like <code>&HW_VREF(VREF_BASE)</code>. */
Kojto 90:cb3d968589d8 384 #define HW_VREF(x) (*(hw_vref_t *)(x))
Kojto 90:cb3d968589d8 385
Kojto 90:cb3d968589d8 386 #endif /* __HW_VREF_REGISTERS_H__ */
Kojto 90:cb3d968589d8 387 /* EOF */