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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
Kojto
Date:
Wed Aug 05 13:16:35 2015 +0100
Revision:
104:b9ad9a133dc7
Parent:
90:cb3d968589d8
Release 104 of the mbed library:

Changes:
- new platforms: nrf51 microbit
- MAXxxx - fix pwm array search
- LPC8xx - usart enable fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 90:cb3d968589d8 1 /*
Kojto 90:cb3d968589d8 2 ** ###################################################################
Kojto 90:cb3d968589d8 3 ** Compilers: Keil ARM C/C++ Compiler
Kojto 90:cb3d968589d8 4 ** Freescale C/C++ for Embedded ARM
Kojto 90:cb3d968589d8 5 ** GNU C Compiler
Kojto 90:cb3d968589d8 6 ** IAR ANSI C/C++ Compiler for ARM
Kojto 90:cb3d968589d8 7 **
Kojto 90:cb3d968589d8 8 ** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
Kojto 90:cb3d968589d8 9 ** Version: rev. 2.5, 2014-02-10
Kojto 90:cb3d968589d8 10 ** Build: b140604
Kojto 90:cb3d968589d8 11 **
Kojto 90:cb3d968589d8 12 ** Abstract:
Kojto 90:cb3d968589d8 13 ** Extension to the CMSIS register access layer header.
Kojto 90:cb3d968589d8 14 **
Kojto 90:cb3d968589d8 15 ** Copyright (c) 2014 Freescale Semiconductor, Inc.
Kojto 90:cb3d968589d8 16 ** All rights reserved.
Kojto 90:cb3d968589d8 17 **
Kojto 90:cb3d968589d8 18 ** Redistribution and use in source and binary forms, with or without modification,
Kojto 90:cb3d968589d8 19 ** are permitted provided that the following conditions are met:
Kojto 90:cb3d968589d8 20 **
Kojto 90:cb3d968589d8 21 ** o Redistributions of source code must retain the above copyright notice, this list
Kojto 90:cb3d968589d8 22 ** of conditions and the following disclaimer.
Kojto 90:cb3d968589d8 23 **
Kojto 90:cb3d968589d8 24 ** o Redistributions in binary form must reproduce the above copyright notice, this
Kojto 90:cb3d968589d8 25 ** list of conditions and the following disclaimer in the documentation and/or
Kojto 90:cb3d968589d8 26 ** other materials provided with the distribution.
Kojto 90:cb3d968589d8 27 **
Kojto 90:cb3d968589d8 28 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
Kojto 90:cb3d968589d8 29 ** contributors may be used to endorse or promote products derived from this
Kojto 90:cb3d968589d8 30 ** software without specific prior written permission.
Kojto 90:cb3d968589d8 31 **
Kojto 90:cb3d968589d8 32 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
Kojto 90:cb3d968589d8 33 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
Kojto 90:cb3d968589d8 34 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 90:cb3d968589d8 35 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
Kojto 90:cb3d968589d8 36 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
Kojto 90:cb3d968589d8 37 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Kojto 90:cb3d968589d8 38 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
Kojto 90:cb3d968589d8 39 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
Kojto 90:cb3d968589d8 40 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Kojto 90:cb3d968589d8 41 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 90:cb3d968589d8 42 **
Kojto 90:cb3d968589d8 43 ** http: www.freescale.com
Kojto 90:cb3d968589d8 44 ** mail: support@freescale.com
Kojto 90:cb3d968589d8 45 **
Kojto 90:cb3d968589d8 46 ** Revisions:
Kojto 90:cb3d968589d8 47 ** - rev. 1.0 (2013-08-12)
Kojto 90:cb3d968589d8 48 ** Initial version.
Kojto 90:cb3d968589d8 49 ** - rev. 2.0 (2013-10-29)
Kojto 90:cb3d968589d8 50 ** Register accessor macros added to the memory map.
Kojto 90:cb3d968589d8 51 ** Symbols for Processor Expert memory map compatibility added to the memory map.
Kojto 90:cb3d968589d8 52 ** Startup file for gcc has been updated according to CMSIS 3.2.
Kojto 90:cb3d968589d8 53 ** System initialization updated.
Kojto 90:cb3d968589d8 54 ** MCG - registers updated.
Kojto 90:cb3d968589d8 55 ** PORTA, PORTB, PORTC, PORTE - registers for digital filter removed.
Kojto 90:cb3d968589d8 56 ** - rev. 2.1 (2013-10-30)
Kojto 90:cb3d968589d8 57 ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
Kojto 90:cb3d968589d8 58 ** - rev. 2.2 (2013-12-09)
Kojto 90:cb3d968589d8 59 ** DMA - EARS register removed.
Kojto 90:cb3d968589d8 60 ** AIPS0, AIPS1 - MPRA register updated.
Kojto 90:cb3d968589d8 61 ** - rev. 2.3 (2014-01-24)
Kojto 90:cb3d968589d8 62 ** Update according to reference manual rev. 2
Kojto 90:cb3d968589d8 63 ** ENET, MCG, MCM, SIM, USB - registers updated
Kojto 90:cb3d968589d8 64 ** - rev. 2.4 (2014-02-10)
Kojto 90:cb3d968589d8 65 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Kojto 90:cb3d968589d8 66 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
Kojto 90:cb3d968589d8 67 ** - rev. 2.5 (2014-02-10)
Kojto 90:cb3d968589d8 68 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Kojto 90:cb3d968589d8 69 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
Kojto 90:cb3d968589d8 70 ** Module access macro module_BASES replaced by module_BASE_PTRS.
Kojto 90:cb3d968589d8 71 **
Kojto 90:cb3d968589d8 72 ** ###################################################################
Kojto 90:cb3d968589d8 73 */
Kojto 90:cb3d968589d8 74
Kojto 90:cb3d968589d8 75 /*
Kojto 90:cb3d968589d8 76 * WARNING! DO NOT EDIT THIS FILE DIRECTLY!
Kojto 90:cb3d968589d8 77 *
Kojto 90:cb3d968589d8 78 * This file was generated automatically and any changes may be lost.
Kojto 90:cb3d968589d8 79 */
Kojto 90:cb3d968589d8 80 #ifndef __HW_OSC_REGISTERS_H__
Kojto 90:cb3d968589d8 81 #define __HW_OSC_REGISTERS_H__
Kojto 90:cb3d968589d8 82
Kojto 90:cb3d968589d8 83 #include "MK64F12.h"
Kojto 90:cb3d968589d8 84 #include "fsl_bitaccess.h"
Kojto 90:cb3d968589d8 85
Kojto 90:cb3d968589d8 86 /*
Kojto 90:cb3d968589d8 87 * MK64F12 OSC
Kojto 90:cb3d968589d8 88 *
Kojto 90:cb3d968589d8 89 * Oscillator
Kojto 90:cb3d968589d8 90 *
Kojto 90:cb3d968589d8 91 * Registers defined in this header file:
Kojto 90:cb3d968589d8 92 * - HW_OSC_CR - OSC Control Register
Kojto 90:cb3d968589d8 93 *
Kojto 90:cb3d968589d8 94 * - hw_osc_t - Struct containing all module registers.
Kojto 90:cb3d968589d8 95 */
Kojto 90:cb3d968589d8 96
Kojto 90:cb3d968589d8 97 #define HW_OSC_INSTANCE_COUNT (1U) /*!< Number of instances of the OSC module. */
Kojto 90:cb3d968589d8 98
Kojto 90:cb3d968589d8 99 /*******************************************************************************
Kojto 90:cb3d968589d8 100 * HW_OSC_CR - OSC Control Register
Kojto 90:cb3d968589d8 101 ******************************************************************************/
Kojto 90:cb3d968589d8 102
Kojto 90:cb3d968589d8 103 /*!
Kojto 90:cb3d968589d8 104 * @brief HW_OSC_CR - OSC Control Register (RW)
Kojto 90:cb3d968589d8 105 *
Kojto 90:cb3d968589d8 106 * Reset value: 0x00U
Kojto 90:cb3d968589d8 107 *
Kojto 90:cb3d968589d8 108 * After OSC is enabled and starts generating the clocks, the configurations
Kojto 90:cb3d968589d8 109 * such as low power and frequency range, must not be changed.
Kojto 90:cb3d968589d8 110 */
Kojto 90:cb3d968589d8 111 typedef union _hw_osc_cr
Kojto 90:cb3d968589d8 112 {
Kojto 90:cb3d968589d8 113 uint8_t U;
Kojto 90:cb3d968589d8 114 struct _hw_osc_cr_bitfields
Kojto 90:cb3d968589d8 115 {
Kojto 90:cb3d968589d8 116 uint8_t SC16P : 1; /*!< [0] Oscillator 16 pF Capacitor Load Configure
Kojto 90:cb3d968589d8 117 * */
Kojto 90:cb3d968589d8 118 uint8_t SC8P : 1; /*!< [1] Oscillator 8 pF Capacitor Load Configure */
Kojto 90:cb3d968589d8 119 uint8_t SC4P : 1; /*!< [2] Oscillator 4 pF Capacitor Load Configure */
Kojto 90:cb3d968589d8 120 uint8_t SC2P : 1; /*!< [3] Oscillator 2 pF Capacitor Load Configure */
Kojto 90:cb3d968589d8 121 uint8_t RESERVED0 : 1; /*!< [4] */
Kojto 90:cb3d968589d8 122 uint8_t EREFSTEN : 1; /*!< [5] External Reference Stop Enable */
Kojto 90:cb3d968589d8 123 uint8_t RESERVED1 : 1; /*!< [6] */
Kojto 90:cb3d968589d8 124 uint8_t ERCLKEN : 1; /*!< [7] External Reference Enable */
Kojto 90:cb3d968589d8 125 } B;
Kojto 90:cb3d968589d8 126 } hw_osc_cr_t;
Kojto 90:cb3d968589d8 127
Kojto 90:cb3d968589d8 128 /*!
Kojto 90:cb3d968589d8 129 * @name Constants and macros for entire OSC_CR register
Kojto 90:cb3d968589d8 130 */
Kojto 90:cb3d968589d8 131 /*@{*/
Kojto 90:cb3d968589d8 132 #define HW_OSC_CR_ADDR(x) ((x) + 0x0U)
Kojto 90:cb3d968589d8 133
Kojto 90:cb3d968589d8 134 #define HW_OSC_CR(x) (*(__IO hw_osc_cr_t *) HW_OSC_CR_ADDR(x))
Kojto 90:cb3d968589d8 135 #define HW_OSC_CR_RD(x) (HW_OSC_CR(x).U)
Kojto 90:cb3d968589d8 136 #define HW_OSC_CR_WR(x, v) (HW_OSC_CR(x).U = (v))
Kojto 90:cb3d968589d8 137 #define HW_OSC_CR_SET(x, v) (HW_OSC_CR_WR(x, HW_OSC_CR_RD(x) | (v)))
Kojto 90:cb3d968589d8 138 #define HW_OSC_CR_CLR(x, v) (HW_OSC_CR_WR(x, HW_OSC_CR_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 139 #define HW_OSC_CR_TOG(x, v) (HW_OSC_CR_WR(x, HW_OSC_CR_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 140 /*@}*/
Kojto 90:cb3d968589d8 141
Kojto 90:cb3d968589d8 142 /*
Kojto 90:cb3d968589d8 143 * Constants & macros for individual OSC_CR bitfields
Kojto 90:cb3d968589d8 144 */
Kojto 90:cb3d968589d8 145
Kojto 90:cb3d968589d8 146 /*!
Kojto 90:cb3d968589d8 147 * @name Register OSC_CR, field SC16P[0] (RW)
Kojto 90:cb3d968589d8 148 *
Kojto 90:cb3d968589d8 149 * Configures the oscillator load.
Kojto 90:cb3d968589d8 150 *
Kojto 90:cb3d968589d8 151 * Values:
Kojto 90:cb3d968589d8 152 * - 0 - Disable the selection.
Kojto 90:cb3d968589d8 153 * - 1 - Add 16 pF capacitor to the oscillator load.
Kojto 90:cb3d968589d8 154 */
Kojto 90:cb3d968589d8 155 /*@{*/
Kojto 90:cb3d968589d8 156 #define BP_OSC_CR_SC16P (0U) /*!< Bit position for OSC_CR_SC16P. */
Kojto 90:cb3d968589d8 157 #define BM_OSC_CR_SC16P (0x01U) /*!< Bit mask for OSC_CR_SC16P. */
Kojto 90:cb3d968589d8 158 #define BS_OSC_CR_SC16P (1U) /*!< Bit field size in bits for OSC_CR_SC16P. */
Kojto 90:cb3d968589d8 159
Kojto 90:cb3d968589d8 160 /*! @brief Read current value of the OSC_CR_SC16P field. */
Kojto 90:cb3d968589d8 161 #define BR_OSC_CR_SC16P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC16P))
Kojto 90:cb3d968589d8 162
Kojto 90:cb3d968589d8 163 /*! @brief Format value for bitfield OSC_CR_SC16P. */
Kojto 90:cb3d968589d8 164 #define BF_OSC_CR_SC16P(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_SC16P) & BM_OSC_CR_SC16P)
Kojto 90:cb3d968589d8 165
Kojto 90:cb3d968589d8 166 /*! @brief Set the SC16P field to a new value. */
Kojto 90:cb3d968589d8 167 #define BW_OSC_CR_SC16P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC16P) = (v))
Kojto 90:cb3d968589d8 168 /*@}*/
Kojto 90:cb3d968589d8 169
Kojto 90:cb3d968589d8 170 /*!
Kojto 90:cb3d968589d8 171 * @name Register OSC_CR, field SC8P[1] (RW)
Kojto 90:cb3d968589d8 172 *
Kojto 90:cb3d968589d8 173 * Configures the oscillator load.
Kojto 90:cb3d968589d8 174 *
Kojto 90:cb3d968589d8 175 * Values:
Kojto 90:cb3d968589d8 176 * - 0 - Disable the selection.
Kojto 90:cb3d968589d8 177 * - 1 - Add 8 pF capacitor to the oscillator load.
Kojto 90:cb3d968589d8 178 */
Kojto 90:cb3d968589d8 179 /*@{*/
Kojto 90:cb3d968589d8 180 #define BP_OSC_CR_SC8P (1U) /*!< Bit position for OSC_CR_SC8P. */
Kojto 90:cb3d968589d8 181 #define BM_OSC_CR_SC8P (0x02U) /*!< Bit mask for OSC_CR_SC8P. */
Kojto 90:cb3d968589d8 182 #define BS_OSC_CR_SC8P (1U) /*!< Bit field size in bits for OSC_CR_SC8P. */
Kojto 90:cb3d968589d8 183
Kojto 90:cb3d968589d8 184 /*! @brief Read current value of the OSC_CR_SC8P field. */
Kojto 90:cb3d968589d8 185 #define BR_OSC_CR_SC8P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC8P))
Kojto 90:cb3d968589d8 186
Kojto 90:cb3d968589d8 187 /*! @brief Format value for bitfield OSC_CR_SC8P. */
Kojto 90:cb3d968589d8 188 #define BF_OSC_CR_SC8P(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_SC8P) & BM_OSC_CR_SC8P)
Kojto 90:cb3d968589d8 189
Kojto 90:cb3d968589d8 190 /*! @brief Set the SC8P field to a new value. */
Kojto 90:cb3d968589d8 191 #define BW_OSC_CR_SC8P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC8P) = (v))
Kojto 90:cb3d968589d8 192 /*@}*/
Kojto 90:cb3d968589d8 193
Kojto 90:cb3d968589d8 194 /*!
Kojto 90:cb3d968589d8 195 * @name Register OSC_CR, field SC4P[2] (RW)
Kojto 90:cb3d968589d8 196 *
Kojto 90:cb3d968589d8 197 * Configures the oscillator load.
Kojto 90:cb3d968589d8 198 *
Kojto 90:cb3d968589d8 199 * Values:
Kojto 90:cb3d968589d8 200 * - 0 - Disable the selection.
Kojto 90:cb3d968589d8 201 * - 1 - Add 4 pF capacitor to the oscillator load.
Kojto 90:cb3d968589d8 202 */
Kojto 90:cb3d968589d8 203 /*@{*/
Kojto 90:cb3d968589d8 204 #define BP_OSC_CR_SC4P (2U) /*!< Bit position for OSC_CR_SC4P. */
Kojto 90:cb3d968589d8 205 #define BM_OSC_CR_SC4P (0x04U) /*!< Bit mask for OSC_CR_SC4P. */
Kojto 90:cb3d968589d8 206 #define BS_OSC_CR_SC4P (1U) /*!< Bit field size in bits for OSC_CR_SC4P. */
Kojto 90:cb3d968589d8 207
Kojto 90:cb3d968589d8 208 /*! @brief Read current value of the OSC_CR_SC4P field. */
Kojto 90:cb3d968589d8 209 #define BR_OSC_CR_SC4P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC4P))
Kojto 90:cb3d968589d8 210
Kojto 90:cb3d968589d8 211 /*! @brief Format value for bitfield OSC_CR_SC4P. */
Kojto 90:cb3d968589d8 212 #define BF_OSC_CR_SC4P(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_SC4P) & BM_OSC_CR_SC4P)
Kojto 90:cb3d968589d8 213
Kojto 90:cb3d968589d8 214 /*! @brief Set the SC4P field to a new value. */
Kojto 90:cb3d968589d8 215 #define BW_OSC_CR_SC4P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC4P) = (v))
Kojto 90:cb3d968589d8 216 /*@}*/
Kojto 90:cb3d968589d8 217
Kojto 90:cb3d968589d8 218 /*!
Kojto 90:cb3d968589d8 219 * @name Register OSC_CR, field SC2P[3] (RW)
Kojto 90:cb3d968589d8 220 *
Kojto 90:cb3d968589d8 221 * Configures the oscillator load.
Kojto 90:cb3d968589d8 222 *
Kojto 90:cb3d968589d8 223 * Values:
Kojto 90:cb3d968589d8 224 * - 0 - Disable the selection.
Kojto 90:cb3d968589d8 225 * - 1 - Add 2 pF capacitor to the oscillator load.
Kojto 90:cb3d968589d8 226 */
Kojto 90:cb3d968589d8 227 /*@{*/
Kojto 90:cb3d968589d8 228 #define BP_OSC_CR_SC2P (3U) /*!< Bit position for OSC_CR_SC2P. */
Kojto 90:cb3d968589d8 229 #define BM_OSC_CR_SC2P (0x08U) /*!< Bit mask for OSC_CR_SC2P. */
Kojto 90:cb3d968589d8 230 #define BS_OSC_CR_SC2P (1U) /*!< Bit field size in bits for OSC_CR_SC2P. */
Kojto 90:cb3d968589d8 231
Kojto 90:cb3d968589d8 232 /*! @brief Read current value of the OSC_CR_SC2P field. */
Kojto 90:cb3d968589d8 233 #define BR_OSC_CR_SC2P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC2P))
Kojto 90:cb3d968589d8 234
Kojto 90:cb3d968589d8 235 /*! @brief Format value for bitfield OSC_CR_SC2P. */
Kojto 90:cb3d968589d8 236 #define BF_OSC_CR_SC2P(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_SC2P) & BM_OSC_CR_SC2P)
Kojto 90:cb3d968589d8 237
Kojto 90:cb3d968589d8 238 /*! @brief Set the SC2P field to a new value. */
Kojto 90:cb3d968589d8 239 #define BW_OSC_CR_SC2P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC2P) = (v))
Kojto 90:cb3d968589d8 240 /*@}*/
Kojto 90:cb3d968589d8 241
Kojto 90:cb3d968589d8 242 /*!
Kojto 90:cb3d968589d8 243 * @name Register OSC_CR, field EREFSTEN[5] (RW)
Kojto 90:cb3d968589d8 244 *
Kojto 90:cb3d968589d8 245 * Controls whether or not the external reference clock (OSCERCLK) remains
Kojto 90:cb3d968589d8 246 * enabled when MCU enters Stop mode.
Kojto 90:cb3d968589d8 247 *
Kojto 90:cb3d968589d8 248 * Values:
Kojto 90:cb3d968589d8 249 * - 0 - External reference clock is disabled in Stop mode.
Kojto 90:cb3d968589d8 250 * - 1 - External reference clock stays enabled in Stop mode if ERCLKEN is set
Kojto 90:cb3d968589d8 251 * before entering Stop mode.
Kojto 90:cb3d968589d8 252 */
Kojto 90:cb3d968589d8 253 /*@{*/
Kojto 90:cb3d968589d8 254 #define BP_OSC_CR_EREFSTEN (5U) /*!< Bit position for OSC_CR_EREFSTEN. */
Kojto 90:cb3d968589d8 255 #define BM_OSC_CR_EREFSTEN (0x20U) /*!< Bit mask for OSC_CR_EREFSTEN. */
Kojto 90:cb3d968589d8 256 #define BS_OSC_CR_EREFSTEN (1U) /*!< Bit field size in bits for OSC_CR_EREFSTEN. */
Kojto 90:cb3d968589d8 257
Kojto 90:cb3d968589d8 258 /*! @brief Read current value of the OSC_CR_EREFSTEN field. */
Kojto 90:cb3d968589d8 259 #define BR_OSC_CR_EREFSTEN(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_EREFSTEN))
Kojto 90:cb3d968589d8 260
Kojto 90:cb3d968589d8 261 /*! @brief Format value for bitfield OSC_CR_EREFSTEN. */
Kojto 90:cb3d968589d8 262 #define BF_OSC_CR_EREFSTEN(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_EREFSTEN) & BM_OSC_CR_EREFSTEN)
Kojto 90:cb3d968589d8 263
Kojto 90:cb3d968589d8 264 /*! @brief Set the EREFSTEN field to a new value. */
Kojto 90:cb3d968589d8 265 #define BW_OSC_CR_EREFSTEN(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_EREFSTEN) = (v))
Kojto 90:cb3d968589d8 266 /*@}*/
Kojto 90:cb3d968589d8 267
Kojto 90:cb3d968589d8 268 /*!
Kojto 90:cb3d968589d8 269 * @name Register OSC_CR, field ERCLKEN[7] (RW)
Kojto 90:cb3d968589d8 270 *
Kojto 90:cb3d968589d8 271 * Enables external reference clock (OSCERCLK).
Kojto 90:cb3d968589d8 272 *
Kojto 90:cb3d968589d8 273 * Values:
Kojto 90:cb3d968589d8 274 * - 0 - External reference clock is inactive.
Kojto 90:cb3d968589d8 275 * - 1 - External reference clock is enabled.
Kojto 90:cb3d968589d8 276 */
Kojto 90:cb3d968589d8 277 /*@{*/
Kojto 90:cb3d968589d8 278 #define BP_OSC_CR_ERCLKEN (7U) /*!< Bit position for OSC_CR_ERCLKEN. */
Kojto 90:cb3d968589d8 279 #define BM_OSC_CR_ERCLKEN (0x80U) /*!< Bit mask for OSC_CR_ERCLKEN. */
Kojto 90:cb3d968589d8 280 #define BS_OSC_CR_ERCLKEN (1U) /*!< Bit field size in bits for OSC_CR_ERCLKEN. */
Kojto 90:cb3d968589d8 281
Kojto 90:cb3d968589d8 282 /*! @brief Read current value of the OSC_CR_ERCLKEN field. */
Kojto 90:cb3d968589d8 283 #define BR_OSC_CR_ERCLKEN(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_ERCLKEN))
Kojto 90:cb3d968589d8 284
Kojto 90:cb3d968589d8 285 /*! @brief Format value for bitfield OSC_CR_ERCLKEN. */
Kojto 90:cb3d968589d8 286 #define BF_OSC_CR_ERCLKEN(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_ERCLKEN) & BM_OSC_CR_ERCLKEN)
Kojto 90:cb3d968589d8 287
Kojto 90:cb3d968589d8 288 /*! @brief Set the ERCLKEN field to a new value. */
Kojto 90:cb3d968589d8 289 #define BW_OSC_CR_ERCLKEN(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_ERCLKEN) = (v))
Kojto 90:cb3d968589d8 290 /*@}*/
Kojto 90:cb3d968589d8 291
Kojto 90:cb3d968589d8 292 /*******************************************************************************
Kojto 90:cb3d968589d8 293 * hw_osc_t - module struct
Kojto 90:cb3d968589d8 294 ******************************************************************************/
Kojto 90:cb3d968589d8 295 /*!
Kojto 90:cb3d968589d8 296 * @brief All OSC module registers.
Kojto 90:cb3d968589d8 297 */
Kojto 90:cb3d968589d8 298 #pragma pack(1)
Kojto 90:cb3d968589d8 299 typedef struct _hw_osc
Kojto 90:cb3d968589d8 300 {
Kojto 90:cb3d968589d8 301 __IO hw_osc_cr_t CR; /*!< [0x0] OSC Control Register */
Kojto 90:cb3d968589d8 302 } hw_osc_t;
Kojto 90:cb3d968589d8 303 #pragma pack()
Kojto 90:cb3d968589d8 304
Kojto 90:cb3d968589d8 305 /*! @brief Macro to access all OSC registers. */
Kojto 90:cb3d968589d8 306 /*! @param x OSC module instance base address. */
Kojto 90:cb3d968589d8 307 /*! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
Kojto 90:cb3d968589d8 308 * use the '&' operator, like <code>&HW_OSC(OSC_BASE)</code>. */
Kojto 90:cb3d968589d8 309 #define HW_OSC(x) (*(hw_osc_t *)(x))
Kojto 90:cb3d968589d8 310
Kojto 90:cb3d968589d8 311 #endif /* __HW_OSC_REGISTERS_H__ */
Kojto 90:cb3d968589d8 312 /* EOF */