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TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_i2c.h@104:b9ad9a133dc7, 2015-08-05 (annotated)

Committer:: Kojto
Date:: Wed Aug 05 13:16:35 2015 +0100
Revision:: 104:b9ad9a133dc7
Parent:: 90:cb3d968589d8

Release 104 of the mbed library:



Changes:

- new platforms: nrf51 microbit

- MAXxxx - fix pwm array search

- LPC8xx - usart enable fix

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	90:cb3d968589d8	1	/*
Kojto	90:cb3d968589d8	2	** ###################################################################
Kojto	90:cb3d968589d8	3	** Compilers: Keil ARM C/C++ Compiler
Kojto	90:cb3d968589d8	4	** Freescale C/C++ for Embedded ARM
Kojto	90:cb3d968589d8	5	** GNU C Compiler
Kojto	90:cb3d968589d8	6	** IAR ANSI C/C++ Compiler for ARM
Kojto	90:cb3d968589d8	7	**
Kojto	90:cb3d968589d8	8	** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
Kojto	90:cb3d968589d8	9	** Version: rev. 2.5, 2014-02-10
Kojto	90:cb3d968589d8	10	** Build: b140604
Kojto	90:cb3d968589d8	11	**
Kojto	90:cb3d968589d8	12	** Abstract:
Kojto	90:cb3d968589d8	13	** Extension to the CMSIS register access layer header.
Kojto	90:cb3d968589d8	14	**
Kojto	90:cb3d968589d8	15	** Copyright (c) 2014 Freescale Semiconductor, Inc.
Kojto	90:cb3d968589d8	16	** All rights reserved.
Kojto	90:cb3d968589d8	17	**
Kojto	90:cb3d968589d8	18	** Redistribution and use in source and binary forms, with or without modification,
Kojto	90:cb3d968589d8	19	** are permitted provided that the following conditions are met:
Kojto	90:cb3d968589d8	20	**
Kojto	90:cb3d968589d8	21	** o Redistributions of source code must retain the above copyright notice, this list
Kojto	90:cb3d968589d8	22	** of conditions and the following disclaimer.
Kojto	90:cb3d968589d8	23	**
Kojto	90:cb3d968589d8	24	** o Redistributions in binary form must reproduce the above copyright notice, this
Kojto	90:cb3d968589d8	25	** list of conditions and the following disclaimer in the documentation and/or
Kojto	90:cb3d968589d8	26	** other materials provided with the distribution.
Kojto	90:cb3d968589d8	27	**
Kojto	90:cb3d968589d8	28	** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
Kojto	90:cb3d968589d8	29	** contributors may be used to endorse or promote products derived from this
Kojto	90:cb3d968589d8	30	** software without specific prior written permission.
Kojto	90:cb3d968589d8	31	**
Kojto	90:cb3d968589d8	32	** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
Kojto	90:cb3d968589d8	33	** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
Kojto	90:cb3d968589d8	34	** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	90:cb3d968589d8	35	** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
Kojto	90:cb3d968589d8	36	** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
Kojto	90:cb3d968589d8	37	** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Kojto	90:cb3d968589d8	38	** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
Kojto	90:cb3d968589d8	39	** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
Kojto	90:cb3d968589d8	40	** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Kojto	90:cb3d968589d8	41	** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	90:cb3d968589d8	42	**
Kojto	90:cb3d968589d8	43	** http: www.freescale.com
Kojto	90:cb3d968589d8	44	** mail: support@freescale.com
Kojto	90:cb3d968589d8	45	**
Kojto	90:cb3d968589d8	46	** Revisions:
Kojto	90:cb3d968589d8	47	** - rev. 1.0 (2013-08-12)
Kojto	90:cb3d968589d8	48	** Initial version.
Kojto	90:cb3d968589d8	49	** - rev. 2.0 (2013-10-29)
Kojto	90:cb3d968589d8	50	** Register accessor macros added to the memory map.
Kojto	90:cb3d968589d8	51	** Symbols for Processor Expert memory map compatibility added to the memory map.
Kojto	90:cb3d968589d8	52	** Startup file for gcc has been updated according to CMSIS 3.2.
Kojto	90:cb3d968589d8	53	** System initialization updated.
Kojto	90:cb3d968589d8	54	** MCG - registers updated.
Kojto	90:cb3d968589d8	55	** PORTA, PORTB, PORTC, PORTE - registers for digital filter removed.
Kojto	90:cb3d968589d8	56	** - rev. 2.1 (2013-10-30)
Kojto	90:cb3d968589d8	57	** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
Kojto	90:cb3d968589d8	58	** - rev. 2.2 (2013-12-09)
Kojto	90:cb3d968589d8	59	** DMA - EARS register removed.
Kojto	90:cb3d968589d8	60	** AIPS0, AIPS1 - MPRA register updated.
Kojto	90:cb3d968589d8	61	** - rev. 2.3 (2014-01-24)
Kojto	90:cb3d968589d8	62	** Update according to reference manual rev. 2
Kojto	90:cb3d968589d8	63	** ENET, MCG, MCM, SIM, USB - registers updated
Kojto	90:cb3d968589d8	64	** - rev. 2.4 (2014-02-10)
Kojto	90:cb3d968589d8	65	** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Kojto	90:cb3d968589d8	66	** Update of SystemInit() and SystemCoreClockUpdate() functions.
Kojto	90:cb3d968589d8	67	** - rev. 2.5 (2014-02-10)
Kojto	90:cb3d968589d8	68	** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Kojto	90:cb3d968589d8	69	** Update of SystemInit() and SystemCoreClockUpdate() functions.
Kojto	90:cb3d968589d8	70	** Module access macro module_BASES replaced by module_BASE_PTRS.
Kojto	90:cb3d968589d8	71	**
Kojto	90:cb3d968589d8	72	** ###################################################################
Kojto	90:cb3d968589d8	73	*/
Kojto	90:cb3d968589d8	74
Kojto	90:cb3d968589d8	75	/*
Kojto	90:cb3d968589d8	76	* WARNING! DO NOT EDIT THIS FILE DIRECTLY!
Kojto	90:cb3d968589d8	77	*
Kojto	90:cb3d968589d8	78	* This file was generated automatically and any changes may be lost.
Kojto	90:cb3d968589d8	79	*/
Kojto	90:cb3d968589d8	80	#ifndef __HW_I2C_REGISTERS_H__
Kojto	90:cb3d968589d8	81	#define __HW_I2C_REGISTERS_H__
Kojto	90:cb3d968589d8	82
Kojto	90:cb3d968589d8	83	#include "MK64F12.h"
Kojto	90:cb3d968589d8	84	#include "fsl_bitaccess.h"
Kojto	90:cb3d968589d8	85
Kojto	90:cb3d968589d8	86	/*
Kojto	90:cb3d968589d8	87	* MK64F12 I2C
Kojto	90:cb3d968589d8	88	*
Kojto	90:cb3d968589d8	89	* Inter-Integrated Circuit
Kojto	90:cb3d968589d8	90	*
Kojto	90:cb3d968589d8	91	* Registers defined in this header file:
Kojto	90:cb3d968589d8	92	* - HW_I2C_A1 - I2C Address Register 1
Kojto	90:cb3d968589d8	93	* - HW_I2C_F - I2C Frequency Divider register
Kojto	90:cb3d968589d8	94	* - HW_I2C_C1 - I2C Control Register 1
Kojto	90:cb3d968589d8	95	* - HW_I2C_S - I2C Status register
Kojto	90:cb3d968589d8	96	* - HW_I2C_D - I2C Data I/O register
Kojto	90:cb3d968589d8	97	* - HW_I2C_C2 - I2C Control Register 2
Kojto	90:cb3d968589d8	98	* - HW_I2C_FLT - I2C Programmable Input Glitch Filter register
Kojto	90:cb3d968589d8	99	* - HW_I2C_RA - I2C Range Address register
Kojto	90:cb3d968589d8	100	* - HW_I2C_SMB - I2C SMBus Control and Status register
Kojto	90:cb3d968589d8	101	* - HW_I2C_A2 - I2C Address Register 2
Kojto	90:cb3d968589d8	102	* - HW_I2C_SLTH - I2C SCL Low Timeout Register High
Kojto	90:cb3d968589d8	103	* - HW_I2C_SLTL - I2C SCL Low Timeout Register Low
Kojto	90:cb3d968589d8	104	*
Kojto	90:cb3d968589d8	105	* - hw_i2c_t - Struct containing all module registers.
Kojto	90:cb3d968589d8	106	*/
Kojto	90:cb3d968589d8	107
Kojto	90:cb3d968589d8	108	#define HW_I2C_INSTANCE_COUNT (3U) /!< Number of instances of the I2C module. /
Kojto	90:cb3d968589d8	109	#define HW_I2C0 (0U) /!< Instance number for I2C0. /
Kojto	90:cb3d968589d8	110	#define HW_I2C1 (1U) /!< Instance number for I2C1. /
Kojto	90:cb3d968589d8	111	#define HW_I2C2 (2U) /!< Instance number for I2C2. /
Kojto	90:cb3d968589d8	112
Kojto	90:cb3d968589d8	113	/*******************************************************************************
Kojto	90:cb3d968589d8	114	* HW_I2C_A1 - I2C Address Register 1
Kojto	90:cb3d968589d8	115	******************************************************************************/
Kojto	90:cb3d968589d8	116
Kojto	90:cb3d968589d8	117	/*!
Kojto	90:cb3d968589d8	118	* @brief HW_I2C_A1 - I2C Address Register 1 (RW)
Kojto	90:cb3d968589d8	119	*
Kojto	90:cb3d968589d8	120	* Reset value: 0x00U
Kojto	90:cb3d968589d8	121	*
Kojto	90:cb3d968589d8	122	* This register contains the slave address to be used by the I2C module.
Kojto	90:cb3d968589d8	123	*/
Kojto	90:cb3d968589d8	124	typedef union _hw_i2c_a1
Kojto	90:cb3d968589d8	125	{
Kojto	90:cb3d968589d8	126	uint8_t U;
Kojto	90:cb3d968589d8	127	struct _hw_i2c_a1_bitfields
Kojto	90:cb3d968589d8	128	{
Kojto	90:cb3d968589d8	129	uint8_t RESERVED0 : 1; /!< [0] /
Kojto	90:cb3d968589d8	130	uint8_t AD : 7; /!< [7:1] Address /
Kojto	90:cb3d968589d8	131	} B;
Kojto	90:cb3d968589d8	132	} hw_i2c_a1_t;
Kojto	90:cb3d968589d8	133
Kojto	90:cb3d968589d8	134	/*!
Kojto	90:cb3d968589d8	135	* @name Constants and macros for entire I2C_A1 register
Kojto	90:cb3d968589d8	136	*/
Kojto	90:cb3d968589d8	137	/@{/
Kojto	90:cb3d968589d8	138	#define HW_I2C_A1_ADDR(x) ((x) + 0x0U)
Kojto	90:cb3d968589d8	139
Kojto	90:cb3d968589d8	140	#define HW_I2C_A1(x) ((__IO hw_i2c_a1_t ) HW_I2C_A1_ADDR(x))
Kojto	90:cb3d968589d8	141	#define HW_I2C_A1_RD(x) (HW_I2C_A1(x).U)
Kojto	90:cb3d968589d8	142	#define HW_I2C_A1_WR(x, v) (HW_I2C_A1(x).U = (v))
Kojto	90:cb3d968589d8	143	#define HW_I2C_A1_SET(x, v) (HW_I2C_A1_WR(x, HW_I2C_A1_RD(x) \| (v)))
Kojto	90:cb3d968589d8	144	#define HW_I2C_A1_CLR(x, v) (HW_I2C_A1_WR(x, HW_I2C_A1_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	145	#define HW_I2C_A1_TOG(x, v) (HW_I2C_A1_WR(x, HW_I2C_A1_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	146	/@}/
Kojto	90:cb3d968589d8	147
Kojto	90:cb3d968589d8	148	/*
Kojto	90:cb3d968589d8	149	* Constants & macros for individual I2C_A1 bitfields
Kojto	90:cb3d968589d8	150	*/
Kojto	90:cb3d968589d8	151
Kojto	90:cb3d968589d8	152	/*!
Kojto	90:cb3d968589d8	153	* @name Register I2C_A1, field AD[7:1] (RW)
Kojto	90:cb3d968589d8	154	*
Kojto	90:cb3d968589d8	155	* Contains the primary slave address used by the I2C module when it is
Kojto	90:cb3d968589d8	156	* addressed as a slave. This field is used in the 7-bit address scheme and the lower
Kojto	90:cb3d968589d8	157	* seven bits in the 10-bit address scheme.
Kojto	90:cb3d968589d8	158	*/
Kojto	90:cb3d968589d8	159	/@{/
Kojto	90:cb3d968589d8	160	#define BP_I2C_A1_AD (1U) /!< Bit position for I2C_A1_AD. /
Kojto	90:cb3d968589d8	161	#define BM_I2C_A1_AD (0xFEU) /!< Bit mask for I2C_A1_AD. /
Kojto	90:cb3d968589d8	162	#define BS_I2C_A1_AD (7U) /!< Bit field size in bits for I2C_A1_AD. /
Kojto	90:cb3d968589d8	163
Kojto	90:cb3d968589d8	164	/! @brief Read current value of the I2C_A1_AD field. /
Kojto	90:cb3d968589d8	165	#define BR_I2C_A1_AD(x) (HW_I2C_A1(x).B.AD)
Kojto	90:cb3d968589d8	166
Kojto	90:cb3d968589d8	167	/! @brief Format value for bitfield I2C_A1_AD. /
Kojto	90:cb3d968589d8	168	#define BF_I2C_A1_AD(v) ((uint8_t)((uint8_t)(v) << BP_I2C_A1_AD) & BM_I2C_A1_AD)
Kojto	90:cb3d968589d8	169
Kojto	90:cb3d968589d8	170	/! @brief Set the AD field to a new value. /
Kojto	90:cb3d968589d8	171	#define BW_I2C_A1_AD(x, v) (HW_I2C_A1_WR(x, (HW_I2C_A1_RD(x) & ~BM_I2C_A1_AD) \| BF_I2C_A1_AD(v)))
Kojto	90:cb3d968589d8	172	/@}/
Kojto	90:cb3d968589d8	173
Kojto	90:cb3d968589d8	174	/*******************************************************************************
Kojto	90:cb3d968589d8	175	* HW_I2C_F - I2C Frequency Divider register
Kojto	90:cb3d968589d8	176	******************************************************************************/
Kojto	90:cb3d968589d8	177
Kojto	90:cb3d968589d8	178	/*!
Kojto	90:cb3d968589d8	179	* @brief HW_I2C_F - I2C Frequency Divider register (RW)
Kojto	90:cb3d968589d8	180	*
Kojto	90:cb3d968589d8	181	* Reset value: 0x00U
Kojto	90:cb3d968589d8	182	*/
Kojto	90:cb3d968589d8	183	typedef union _hw_i2c_f
Kojto	90:cb3d968589d8	184	{
Kojto	90:cb3d968589d8	185	uint8_t U;
Kojto	90:cb3d968589d8	186	struct _hw_i2c_f_bitfields
Kojto	90:cb3d968589d8	187	{
Kojto	90:cb3d968589d8	188	uint8_t ICR : 6; /!< [5:0] ClockRate /
Kojto	90:cb3d968589d8	189	uint8_t MULT : 2; /!< [7:6] Multiplier Factor /
Kojto	90:cb3d968589d8	190	} B;
Kojto	90:cb3d968589d8	191	} hw_i2c_f_t;
Kojto	90:cb3d968589d8	192
Kojto	90:cb3d968589d8	193	/*!
Kojto	90:cb3d968589d8	194	* @name Constants and macros for entire I2C_F register
Kojto	90:cb3d968589d8	195	*/
Kojto	90:cb3d968589d8	196	/@{/
Kojto	90:cb3d968589d8	197	#define HW_I2C_F_ADDR(x) ((x) + 0x1U)
Kojto	90:cb3d968589d8	198
Kojto	90:cb3d968589d8	199	#define HW_I2C_F(x) ((__IO hw_i2c_f_t ) HW_I2C_F_ADDR(x))
Kojto	90:cb3d968589d8	200	#define HW_I2C_F_RD(x) (HW_I2C_F(x).U)
Kojto	90:cb3d968589d8	201	#define HW_I2C_F_WR(x, v) (HW_I2C_F(x).U = (v))
Kojto	90:cb3d968589d8	202	#define HW_I2C_F_SET(x, v) (HW_I2C_F_WR(x, HW_I2C_F_RD(x) \| (v)))
Kojto	90:cb3d968589d8	203	#define HW_I2C_F_CLR(x, v) (HW_I2C_F_WR(x, HW_I2C_F_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	204	#define HW_I2C_F_TOG(x, v) (HW_I2C_F_WR(x, HW_I2C_F_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	205	/@}/
Kojto	90:cb3d968589d8	206
Kojto	90:cb3d968589d8	207	/*
Kojto	90:cb3d968589d8	208	* Constants & macros for individual I2C_F bitfields
Kojto	90:cb3d968589d8	209	*/
Kojto	90:cb3d968589d8	210
Kojto	90:cb3d968589d8	211	/*!
Kojto	90:cb3d968589d8	212	* @name Register I2C_F, field ICR[5:0] (RW)
Kojto	90:cb3d968589d8	213	*
Kojto	90:cb3d968589d8	214	* Prescales the I2C module clock for bit rate selection. This field and the
Kojto	90:cb3d968589d8	215	* MULT field determine the I2C baud rate, the SDA hold time, the SCL start hold
Kojto	90:cb3d968589d8	216	* time, and the SCL stop hold time. For a list of values corresponding to each ICR
Kojto	90:cb3d968589d8	217	* setting, see I2C divider and hold values. The SCL divider multiplied by
Kojto	90:cb3d968589d8	218	* multiplier factor (mul) determines the I2C baud rate. I2C baud rate = I2C module
Kojto	90:cb3d968589d8	219	* clock speed (Hz)/(mul * SCL divider) The SDA hold time is the delay from the
Kojto	90:cb3d968589d8	220	* falling edge of SCL (I2C clock) to the changing of SDA (I2C data). SDA hold time =
Kojto	90:cb3d968589d8	221	* I2C module clock period (s) * mul * SDA hold value The SCL start hold time is
Kojto	90:cb3d968589d8	222	* the delay from the falling edge of SDA (I2C data) while SCL is high (start
Kojto	90:cb3d968589d8	223	* condition) to the falling edge of SCL (I2C clock). SCL start hold time = I2C
Kojto	90:cb3d968589d8	224	* module clock period (s) * mul * SCL start hold value The SCL stop hold time is
Kojto	90:cb3d968589d8	225	* the delay from the rising edge of SCL (I2C clock) to the rising edge of SDA (I2C
Kojto	90:cb3d968589d8	226	* data) while SCL is high (stop condition). SCL stop hold time = I2C module
Kojto	90:cb3d968589d8	227	* clock period (s) * mul * SCL stop hold value For example, if the I2C module clock
Kojto	90:cb3d968589d8	228	* speed is 8 MHz, the following table shows the possible hold time values with
Kojto	90:cb3d968589d8	229	* different ICR and MULT selections to achieve an I2C baud rate of 100 kbit/s.
Kojto	90:cb3d968589d8	230	* MULT ICR Hold times (us) SDA SCL Start SCL Stop 2h 00h 3.500 3.000 5.500 1h 07h
Kojto	90:cb3d968589d8	231	* 2.500 4.000 5.250 1h 0Bh 2.250 4.000 5.250 0h 14h 2.125 4.250 5.125 0h 18h
Kojto	90:cb3d968589d8	232	* 1.125 4.750 5.125
Kojto	90:cb3d968589d8	233	*/
Kojto	90:cb3d968589d8	234	/@{/
Kojto	90:cb3d968589d8	235	#define BP_I2C_F_ICR (0U) /!< Bit position for I2C_F_ICR. /
Kojto	90:cb3d968589d8	236	#define BM_I2C_F_ICR (0x3FU) /!< Bit mask for I2C_F_ICR. /
Kojto	90:cb3d968589d8	237	#define BS_I2C_F_ICR (6U) /!< Bit field size in bits for I2C_F_ICR. /
Kojto	90:cb3d968589d8	238
Kojto	90:cb3d968589d8	239	/! @brief Read current value of the I2C_F_ICR field. /
Kojto	90:cb3d968589d8	240	#define BR_I2C_F_ICR(x) (HW_I2C_F(x).B.ICR)
Kojto	90:cb3d968589d8	241
Kojto	90:cb3d968589d8	242	/! @brief Format value for bitfield I2C_F_ICR. /
Kojto	90:cb3d968589d8	243	#define BF_I2C_F_ICR(v) ((uint8_t)((uint8_t)(v) << BP_I2C_F_ICR) & BM_I2C_F_ICR)
Kojto	90:cb3d968589d8	244
Kojto	90:cb3d968589d8	245	/! @brief Set the ICR field to a new value. /
Kojto	90:cb3d968589d8	246	#define BW_I2C_F_ICR(x, v) (HW_I2C_F_WR(x, (HW_I2C_F_RD(x) & ~BM_I2C_F_ICR) \| BF_I2C_F_ICR(v)))
Kojto	90:cb3d968589d8	247	/@}/
Kojto	90:cb3d968589d8	248
Kojto	90:cb3d968589d8	249	/*!
Kojto	90:cb3d968589d8	250	* @name Register I2C_F, field MULT[7:6] (RW)
Kojto	90:cb3d968589d8	251	*
Kojto	90:cb3d968589d8	252	* Defines the multiplier factor (mul). This factor is used along with the SCL
Kojto	90:cb3d968589d8	253	* divider to generate the I2C baud rate.
Kojto	90:cb3d968589d8	254	*
Kojto	90:cb3d968589d8	255	* Values:
Kojto	90:cb3d968589d8	256	* - 00 - mul = 1
Kojto	90:cb3d968589d8	257	* - 01 - mul = 2
Kojto	90:cb3d968589d8	258	* - 10 - mul = 4
Kojto	90:cb3d968589d8	259	* - 11 - Reserved
Kojto	90:cb3d968589d8	260	*/
Kojto	90:cb3d968589d8	261	/@{/
Kojto	90:cb3d968589d8	262	#define BP_I2C_F_MULT (6U) /!< Bit position for I2C_F_MULT. /
Kojto	90:cb3d968589d8	263	#define BM_I2C_F_MULT (0xC0U) /!< Bit mask for I2C_F_MULT. /
Kojto	90:cb3d968589d8	264	#define BS_I2C_F_MULT (2U) /!< Bit field size in bits for I2C_F_MULT. /
Kojto	90:cb3d968589d8	265
Kojto	90:cb3d968589d8	266	/! @brief Read current value of the I2C_F_MULT field. /
Kojto	90:cb3d968589d8	267	#define BR_I2C_F_MULT(x) (HW_I2C_F(x).B.MULT)
Kojto	90:cb3d968589d8	268
Kojto	90:cb3d968589d8	269	/! @brief Format value for bitfield I2C_F_MULT. /
Kojto	90:cb3d968589d8	270	#define BF_I2C_F_MULT(v) ((uint8_t)((uint8_t)(v) << BP_I2C_F_MULT) & BM_I2C_F_MULT)
Kojto	90:cb3d968589d8	271
Kojto	90:cb3d968589d8	272	/! @brief Set the MULT field to a new value. /
Kojto	90:cb3d968589d8	273	#define BW_I2C_F_MULT(x, v) (HW_I2C_F_WR(x, (HW_I2C_F_RD(x) & ~BM_I2C_F_MULT) \| BF_I2C_F_MULT(v)))
Kojto	90:cb3d968589d8	274	/@}/
Kojto	90:cb3d968589d8	275
Kojto	90:cb3d968589d8	276	/*******************************************************************************
Kojto	90:cb3d968589d8	277	* HW_I2C_C1 - I2C Control Register 1
Kojto	90:cb3d968589d8	278	******************************************************************************/
Kojto	90:cb3d968589d8	279
Kojto	90:cb3d968589d8	280	/*!
Kojto	90:cb3d968589d8	281	* @brief HW_I2C_C1 - I2C Control Register 1 (RW)
Kojto	90:cb3d968589d8	282	*
Kojto	90:cb3d968589d8	283	* Reset value: 0x00U
Kojto	90:cb3d968589d8	284	*/
Kojto	90:cb3d968589d8	285	typedef union _hw_i2c_c1
Kojto	90:cb3d968589d8	286	{
Kojto	90:cb3d968589d8	287	uint8_t U;
Kojto	90:cb3d968589d8	288	struct _hw_i2c_c1_bitfields
Kojto	90:cb3d968589d8	289	{
Kojto	90:cb3d968589d8	290	uint8_t DMAEN : 1; /!< [0] DMA Enable /
Kojto	90:cb3d968589d8	291	uint8_t WUEN : 1; /!< [1] Wakeup Enable /
Kojto	90:cb3d968589d8	292	uint8_t RSTA : 1; /!< [2] Repeat START /
Kojto	90:cb3d968589d8	293	uint8_t TXAK : 1; /!< [3] Transmit Acknowledge Enable /
Kojto	90:cb3d968589d8	294	uint8_t TX : 1; /!< [4] Transmit Mode Select /
Kojto	90:cb3d968589d8	295	uint8_t MST : 1; /!< [5] Master Mode Select /
Kojto	90:cb3d968589d8	296	uint8_t IICIE : 1; /!< [6] I2C Interrupt Enable /
Kojto	90:cb3d968589d8	297	uint8_t IICEN : 1; /!< [7] I2C Enable /
Kojto	90:cb3d968589d8	298	} B;
Kojto	90:cb3d968589d8	299	} hw_i2c_c1_t;
Kojto	90:cb3d968589d8	300
Kojto	90:cb3d968589d8	301	/*!
Kojto	90:cb3d968589d8	302	* @name Constants and macros for entire I2C_C1 register
Kojto	90:cb3d968589d8	303	*/
Kojto	90:cb3d968589d8	304	/@{/
Kojto	90:cb3d968589d8	305	#define HW_I2C_C1_ADDR(x) ((x) + 0x2U)
Kojto	90:cb3d968589d8	306
Kojto	90:cb3d968589d8	307	#define HW_I2C_C1(x) ((__IO hw_i2c_c1_t ) HW_I2C_C1_ADDR(x))
Kojto	90:cb3d968589d8	308	#define HW_I2C_C1_RD(x) (HW_I2C_C1(x).U)
Kojto	90:cb3d968589d8	309	#define HW_I2C_C1_WR(x, v) (HW_I2C_C1(x).U = (v))
Kojto	90:cb3d968589d8	310	#define HW_I2C_C1_SET(x, v) (HW_I2C_C1_WR(x, HW_I2C_C1_RD(x) \| (v)))
Kojto	90:cb3d968589d8	311	#define HW_I2C_C1_CLR(x, v) (HW_I2C_C1_WR(x, HW_I2C_C1_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	312	#define HW_I2C_C1_TOG(x, v) (HW_I2C_C1_WR(x, HW_I2C_C1_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	313	/@}/
Kojto	90:cb3d968589d8	314
Kojto	90:cb3d968589d8	315	/*
Kojto	90:cb3d968589d8	316	* Constants & macros for individual I2C_C1 bitfields
Kojto	90:cb3d968589d8	317	*/
Kojto	90:cb3d968589d8	318
Kojto	90:cb3d968589d8	319	/*!
Kojto	90:cb3d968589d8	320	* @name Register I2C_C1, field DMAEN[0] (RW)
Kojto	90:cb3d968589d8	321	*
Kojto	90:cb3d968589d8	322	* Enables or disables the DMA function.
Kojto	90:cb3d968589d8	323	*
Kojto	90:cb3d968589d8	324	* Values:
Kojto	90:cb3d968589d8	325	* - 0 - All DMA signalling disabled.
Kojto	90:cb3d968589d8	326	* - 1 - DMA transfer is enabled. While SMB[FACK] = 0, the following conditions
Kojto	90:cb3d968589d8	327	* trigger the DMA request: a data byte is received, and either address or
Kojto	90:cb3d968589d8	328	* data is transmitted. (ACK/NACK is automatic) the first byte received matches
Kojto	90:cb3d968589d8	329	* the A1 register or is a general call address. If any address matching
Kojto	90:cb3d968589d8	330	* occurs, S[IAAS] and S[TCF] are set. If the direction of transfer is known
Kojto	90:cb3d968589d8	331	* from master to slave, then it is not required to check S[SRW]. With this
Kojto	90:cb3d968589d8	332	* assumption, DMA can also be used in this case. In other cases, if the master
Kojto	90:cb3d968589d8	333	* reads data from the slave, then it is required to rewrite the C1 register
Kojto	90:cb3d968589d8	334	* operation. With this assumption, DMA cannot be used. When FACK = 1, an
Kojto	90:cb3d968589d8	335	* address or a data byte is transmitted.
Kojto	90:cb3d968589d8	336	*/
Kojto	90:cb3d968589d8	337	/@{/
Kojto	90:cb3d968589d8	338	#define BP_I2C_C1_DMAEN (0U) /!< Bit position for I2C_C1_DMAEN. /
Kojto	90:cb3d968589d8	339	#define BM_I2C_C1_DMAEN (0x01U) /!< Bit mask for I2C_C1_DMAEN. /
Kojto	90:cb3d968589d8	340	#define BS_I2C_C1_DMAEN (1U) /!< Bit field size in bits for I2C_C1_DMAEN. /
Kojto	90:cb3d968589d8	341
Kojto	90:cb3d968589d8	342	/! @brief Read current value of the I2C_C1_DMAEN field. /
Kojto	90:cb3d968589d8	343	#define BR_I2C_C1_DMAEN(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_DMAEN))
Kojto	90:cb3d968589d8	344
Kojto	90:cb3d968589d8	345	/! @brief Format value for bitfield I2C_C1_DMAEN. /
Kojto	90:cb3d968589d8	346	#define BF_I2C_C1_DMAEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_DMAEN) & BM_I2C_C1_DMAEN)
Kojto	90:cb3d968589d8	347
Kojto	90:cb3d968589d8	348	/! @brief Set the DMAEN field to a new value. /
Kojto	90:cb3d968589d8	349	#define BW_I2C_C1_DMAEN(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_DMAEN) = (v))
Kojto	90:cb3d968589d8	350	/@}/
Kojto	90:cb3d968589d8	351
Kojto	90:cb3d968589d8	352	/*!
Kojto	90:cb3d968589d8	353	* @name Register I2C_C1, field WUEN[1] (RW)
Kojto	90:cb3d968589d8	354	*
Kojto	90:cb3d968589d8	355	* The I2C module can wake the MCU from low power mode with no peripheral bus
Kojto	90:cb3d968589d8	356	* running when slave address matching occurs.
Kojto	90:cb3d968589d8	357	*
Kojto	90:cb3d968589d8	358	* Values:
Kojto	90:cb3d968589d8	359	* - 0 - Normal operation. No interrupt generated when address matching in low
Kojto	90:cb3d968589d8	360	* power mode.
Kojto	90:cb3d968589d8	361	* - 1 - Enables the wakeup function in low power mode.
Kojto	90:cb3d968589d8	362	*/
Kojto	90:cb3d968589d8	363	/@{/
Kojto	90:cb3d968589d8	364	#define BP_I2C_C1_WUEN (1U) /!< Bit position for I2C_C1_WUEN. /
Kojto	90:cb3d968589d8	365	#define BM_I2C_C1_WUEN (0x02U) /!< Bit mask for I2C_C1_WUEN. /
Kojto	90:cb3d968589d8	366	#define BS_I2C_C1_WUEN (1U) /!< Bit field size in bits for I2C_C1_WUEN. /
Kojto	90:cb3d968589d8	367
Kojto	90:cb3d968589d8	368	/! @brief Read current value of the I2C_C1_WUEN field. /
Kojto	90:cb3d968589d8	369	#define BR_I2C_C1_WUEN(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_WUEN))
Kojto	90:cb3d968589d8	370
Kojto	90:cb3d968589d8	371	/! @brief Format value for bitfield I2C_C1_WUEN. /
Kojto	90:cb3d968589d8	372	#define BF_I2C_C1_WUEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_WUEN) & BM_I2C_C1_WUEN)
Kojto	90:cb3d968589d8	373
Kojto	90:cb3d968589d8	374	/! @brief Set the WUEN field to a new value. /
Kojto	90:cb3d968589d8	375	#define BW_I2C_C1_WUEN(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_WUEN) = (v))
Kojto	90:cb3d968589d8	376	/@}/
Kojto	90:cb3d968589d8	377
Kojto	90:cb3d968589d8	378	/*!
Kojto	90:cb3d968589d8	379	* @name Register I2C_C1, field RSTA[2] (WORZ)
Kojto	90:cb3d968589d8	380	*
Kojto	90:cb3d968589d8	381	* Writing 1 to this bit generates a repeated START condition provided it is the
Kojto	90:cb3d968589d8	382	* current master. This bit will always be read as 0. Attempting a repeat at the
Kojto	90:cb3d968589d8	383	* wrong time results in loss of arbitration.
Kojto	90:cb3d968589d8	384	*/
Kojto	90:cb3d968589d8	385	/@{/
Kojto	90:cb3d968589d8	386	#define BP_I2C_C1_RSTA (2U) /!< Bit position for I2C_C1_RSTA. /
Kojto	90:cb3d968589d8	387	#define BM_I2C_C1_RSTA (0x04U) /!< Bit mask for I2C_C1_RSTA. /
Kojto	90:cb3d968589d8	388	#define BS_I2C_C1_RSTA (1U) /!< Bit field size in bits for I2C_C1_RSTA. /
Kojto	90:cb3d968589d8	389
Kojto	90:cb3d968589d8	390	/! @brief Format value for bitfield I2C_C1_RSTA. /
Kojto	90:cb3d968589d8	391	#define BF_I2C_C1_RSTA(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_RSTA) & BM_I2C_C1_RSTA)
Kojto	90:cb3d968589d8	392
Kojto	90:cb3d968589d8	393	/! @brief Set the RSTA field to a new value. /
Kojto	90:cb3d968589d8	394	#define BW_I2C_C1_RSTA(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_RSTA) = (v))
Kojto	90:cb3d968589d8	395	/@}/
Kojto	90:cb3d968589d8	396
Kojto	90:cb3d968589d8	397	/*!
Kojto	90:cb3d968589d8	398	* @name Register I2C_C1, field TXAK[3] (RW)
Kojto	90:cb3d968589d8	399	*
Kojto	90:cb3d968589d8	400	* Specifies the value driven onto the SDA during data acknowledge cycles for
Kojto	90:cb3d968589d8	401	* both master and slave receivers. The value of SMB[FACK] affects NACK/ACK
Kojto	90:cb3d968589d8	402	* generation. SCL is held low until TXAK is written.
Kojto	90:cb3d968589d8	403	*
Kojto	90:cb3d968589d8	404	* Values:
Kojto	90:cb3d968589d8	405	* - 0 - An acknowledge signal is sent to the bus on the following receiving
Kojto	90:cb3d968589d8	406	* byte (if FACK is cleared) or the current receiving byte (if FACK is set).
Kojto	90:cb3d968589d8	407	* - 1 - No acknowledge signal is sent to the bus on the following receiving
Kojto	90:cb3d968589d8	408	* data byte (if FACK is cleared) or the current receiving data byte (if FACK is
Kojto	90:cb3d968589d8	409	* set).
Kojto	90:cb3d968589d8	410	*/
Kojto	90:cb3d968589d8	411	/@{/
Kojto	90:cb3d968589d8	412	#define BP_I2C_C1_TXAK (3U) /!< Bit position for I2C_C1_TXAK. /
Kojto	90:cb3d968589d8	413	#define BM_I2C_C1_TXAK (0x08U) /!< Bit mask for I2C_C1_TXAK. /
Kojto	90:cb3d968589d8	414	#define BS_I2C_C1_TXAK (1U) /!< Bit field size in bits for I2C_C1_TXAK. /
Kojto	90:cb3d968589d8	415
Kojto	90:cb3d968589d8	416	/! @brief Read current value of the I2C_C1_TXAK field. /
Kojto	90:cb3d968589d8	417	#define BR_I2C_C1_TXAK(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TXAK))
Kojto	90:cb3d968589d8	418
Kojto	90:cb3d968589d8	419	/! @brief Format value for bitfield I2C_C1_TXAK. /
Kojto	90:cb3d968589d8	420	#define BF_I2C_C1_TXAK(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_TXAK) & BM_I2C_C1_TXAK)
Kojto	90:cb3d968589d8	421
Kojto	90:cb3d968589d8	422	/! @brief Set the TXAK field to a new value. /
Kojto	90:cb3d968589d8	423	#define BW_I2C_C1_TXAK(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TXAK) = (v))
Kojto	90:cb3d968589d8	424	/@}/
Kojto	90:cb3d968589d8	425
Kojto	90:cb3d968589d8	426	/*!
Kojto	90:cb3d968589d8	427	* @name Register I2C_C1, field TX[4] (RW)
Kojto	90:cb3d968589d8	428	*
Kojto	90:cb3d968589d8	429	* Selects the direction of master and slave transfers. In master mode this bit
Kojto	90:cb3d968589d8	430	* must be set according to the type of transfer required. Therefore, for address
Kojto	90:cb3d968589d8	431	* cycles, this bit is always set. When addressed as a slave this bit must be
Kojto	90:cb3d968589d8	432	* set by software according to the SRW bit in the status register.
Kojto	90:cb3d968589d8	433	*
Kojto	90:cb3d968589d8	434	* Values:
Kojto	90:cb3d968589d8	435	* - 0 - Receive
Kojto	90:cb3d968589d8	436	* - 1 - Transmit
Kojto	90:cb3d968589d8	437	*/
Kojto	90:cb3d968589d8	438	/@{/
Kojto	90:cb3d968589d8	439	#define BP_I2C_C1_TX (4U) /!< Bit position for I2C_C1_TX. /
Kojto	90:cb3d968589d8	440	#define BM_I2C_C1_TX (0x10U) /!< Bit mask for I2C_C1_TX. /
Kojto	90:cb3d968589d8	441	#define BS_I2C_C1_TX (1U) /!< Bit field size in bits for I2C_C1_TX. /
Kojto	90:cb3d968589d8	442
Kojto	90:cb3d968589d8	443	/! @brief Read current value of the I2C_C1_TX field. /
Kojto	90:cb3d968589d8	444	#define BR_I2C_C1_TX(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TX))
Kojto	90:cb3d968589d8	445
Kojto	90:cb3d968589d8	446	/! @brief Format value for bitfield I2C_C1_TX. /
Kojto	90:cb3d968589d8	447	#define BF_I2C_C1_TX(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_TX) & BM_I2C_C1_TX)
Kojto	90:cb3d968589d8	448
Kojto	90:cb3d968589d8	449	/! @brief Set the TX field to a new value. /
Kojto	90:cb3d968589d8	450	#define BW_I2C_C1_TX(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TX) = (v))
Kojto	90:cb3d968589d8	451	/@}/
Kojto	90:cb3d968589d8	452
Kojto	90:cb3d968589d8	453	/*!
Kojto	90:cb3d968589d8	454	* @name Register I2C_C1, field MST[5] (RW)
Kojto	90:cb3d968589d8	455	*
Kojto	90:cb3d968589d8	456	* When MST is changed from 0 to 1, a START signal is generated on the bus and
Kojto	90:cb3d968589d8	457	* master mode is selected. When this bit changes from 1 to 0, a STOP signal is
Kojto	90:cb3d968589d8	458	* generated and the mode of operation changes from master to slave.
Kojto	90:cb3d968589d8	459	*
Kojto	90:cb3d968589d8	460	* Values:
Kojto	90:cb3d968589d8	461	* - 0 - Slave mode
Kojto	90:cb3d968589d8	462	* - 1 - Master mode
Kojto	90:cb3d968589d8	463	*/
Kojto	90:cb3d968589d8	464	/@{/
Kojto	90:cb3d968589d8	465	#define BP_I2C_C1_MST (5U) /!< Bit position for I2C_C1_MST. /
Kojto	90:cb3d968589d8	466	#define BM_I2C_C1_MST (0x20U) /!< Bit mask for I2C_C1_MST. /
Kojto	90:cb3d968589d8	467	#define BS_I2C_C1_MST (1U) /!< Bit field size in bits for I2C_C1_MST. /
Kojto	90:cb3d968589d8	468
Kojto	90:cb3d968589d8	469	/! @brief Read current value of the I2C_C1_MST field. /
Kojto	90:cb3d968589d8	470	#define BR_I2C_C1_MST(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_MST))
Kojto	90:cb3d968589d8	471
Kojto	90:cb3d968589d8	472	/! @brief Format value for bitfield I2C_C1_MST. /
Kojto	90:cb3d968589d8	473	#define BF_I2C_C1_MST(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_MST) & BM_I2C_C1_MST)
Kojto	90:cb3d968589d8	474
Kojto	90:cb3d968589d8	475	/! @brief Set the MST field to a new value. /
Kojto	90:cb3d968589d8	476	#define BW_I2C_C1_MST(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_MST) = (v))
Kojto	90:cb3d968589d8	477	/@}/
Kojto	90:cb3d968589d8	478
Kojto	90:cb3d968589d8	479	/*!
Kojto	90:cb3d968589d8	480	* @name Register I2C_C1, field IICIE[6] (RW)
Kojto	90:cb3d968589d8	481	*
Kojto	90:cb3d968589d8	482	* Enables I2C interrupt requests.
Kojto	90:cb3d968589d8	483	*
Kojto	90:cb3d968589d8	484	* Values:
Kojto	90:cb3d968589d8	485	* - 0 - Disabled
Kojto	90:cb3d968589d8	486	* - 1 - Enabled
Kojto	90:cb3d968589d8	487	*/
Kojto	90:cb3d968589d8	488	/@{/
Kojto	90:cb3d968589d8	489	#define BP_I2C_C1_IICIE (6U) /!< Bit position for I2C_C1_IICIE. /
Kojto	90:cb3d968589d8	490	#define BM_I2C_C1_IICIE (0x40U) /!< Bit mask for I2C_C1_IICIE. /
Kojto	90:cb3d968589d8	491	#define BS_I2C_C1_IICIE (1U) /!< Bit field size in bits for I2C_C1_IICIE. /
Kojto	90:cb3d968589d8	492
Kojto	90:cb3d968589d8	493	/! @brief Read current value of the I2C_C1_IICIE field. /
Kojto	90:cb3d968589d8	494	#define BR_I2C_C1_IICIE(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICIE))
Kojto	90:cb3d968589d8	495
Kojto	90:cb3d968589d8	496	/! @brief Format value for bitfield I2C_C1_IICIE. /
Kojto	90:cb3d968589d8	497	#define BF_I2C_C1_IICIE(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_IICIE) & BM_I2C_C1_IICIE)
Kojto	90:cb3d968589d8	498
Kojto	90:cb3d968589d8	499	/! @brief Set the IICIE field to a new value. /
Kojto	90:cb3d968589d8	500	#define BW_I2C_C1_IICIE(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICIE) = (v))
Kojto	90:cb3d968589d8	501	/@}/
Kojto	90:cb3d968589d8	502
Kojto	90:cb3d968589d8	503	/*!
Kojto	90:cb3d968589d8	504	* @name Register I2C_C1, field IICEN[7] (RW)
Kojto	90:cb3d968589d8	505	*
Kojto	90:cb3d968589d8	506	* Enables I2C module operation.
Kojto	90:cb3d968589d8	507	*
Kojto	90:cb3d968589d8	508	* Values:
Kojto	90:cb3d968589d8	509	* - 0 - Disabled
Kojto	90:cb3d968589d8	510	* - 1 - Enabled
Kojto	90:cb3d968589d8	511	*/
Kojto	90:cb3d968589d8	512	/@{/
Kojto	90:cb3d968589d8	513	#define BP_I2C_C1_IICEN (7U) /!< Bit position for I2C_C1_IICEN. /
Kojto	90:cb3d968589d8	514	#define BM_I2C_C1_IICEN (0x80U) /!< Bit mask for I2C_C1_IICEN. /
Kojto	90:cb3d968589d8	515	#define BS_I2C_C1_IICEN (1U) /!< Bit field size in bits for I2C_C1_IICEN. /
Kojto	90:cb3d968589d8	516
Kojto	90:cb3d968589d8	517	/! @brief Read current value of the I2C_C1_IICEN field. /
Kojto	90:cb3d968589d8	518	#define BR_I2C_C1_IICEN(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICEN))
Kojto	90:cb3d968589d8	519
Kojto	90:cb3d968589d8	520	/! @brief Format value for bitfield I2C_C1_IICEN. /
Kojto	90:cb3d968589d8	521	#define BF_I2C_C1_IICEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_IICEN) & BM_I2C_C1_IICEN)
Kojto	90:cb3d968589d8	522
Kojto	90:cb3d968589d8	523	/! @brief Set the IICEN field to a new value. /
Kojto	90:cb3d968589d8	524	#define BW_I2C_C1_IICEN(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICEN) = (v))
Kojto	90:cb3d968589d8	525	/@}/
Kojto	90:cb3d968589d8	526
Kojto	90:cb3d968589d8	527	/*******************************************************************************
Kojto	90:cb3d968589d8	528	* HW_I2C_S - I2C Status register
Kojto	90:cb3d968589d8	529	******************************************************************************/
Kojto	90:cb3d968589d8	530
Kojto	90:cb3d968589d8	531	/*!
Kojto	90:cb3d968589d8	532	* @brief HW_I2C_S - I2C Status register (RW)
Kojto	90:cb3d968589d8	533	*
Kojto	90:cb3d968589d8	534	* Reset value: 0x80U
Kojto	90:cb3d968589d8	535	*/
Kojto	90:cb3d968589d8	536	typedef union _hw_i2c_s
Kojto	90:cb3d968589d8	537	{
Kojto	90:cb3d968589d8	538	uint8_t U;
Kojto	90:cb3d968589d8	539	struct _hw_i2c_s_bitfields
Kojto	90:cb3d968589d8	540	{
Kojto	90:cb3d968589d8	541	uint8_t RXAK : 1; /!< [0] Receive Acknowledge /
Kojto	90:cb3d968589d8	542	uint8_t IICIF : 1; /!< [1] Interrupt Flag /
Kojto	90:cb3d968589d8	543	uint8_t SRW : 1; /!< [2] Slave Read/Write /
Kojto	90:cb3d968589d8	544	uint8_t RAM : 1; /!< [3] Range Address Match /
Kojto	90:cb3d968589d8	545	uint8_t ARBL : 1; /!< [4] Arbitration Lost /
Kojto	90:cb3d968589d8	546	uint8_t BUSY : 1; /!< [5] Bus Busy /
Kojto	90:cb3d968589d8	547	uint8_t IAAS : 1; /!< [6] Addressed As A Slave /
Kojto	90:cb3d968589d8	548	uint8_t TCF : 1; /!< [7] Transfer Complete Flag /
Kojto	90:cb3d968589d8	549	} B;
Kojto	90:cb3d968589d8	550	} hw_i2c_s_t;
Kojto	90:cb3d968589d8	551
Kojto	90:cb3d968589d8	552	/*!
Kojto	90:cb3d968589d8	553	* @name Constants and macros for entire I2C_S register
Kojto	90:cb3d968589d8	554	*/
Kojto	90:cb3d968589d8	555	/@{/
Kojto	90:cb3d968589d8	556	#define HW_I2C_S_ADDR(x) ((x) + 0x3U)
Kojto	90:cb3d968589d8	557
Kojto	90:cb3d968589d8	558	#define HW_I2C_S(x) ((__IO hw_i2c_s_t ) HW_I2C_S_ADDR(x))
Kojto	90:cb3d968589d8	559	#define HW_I2C_S_RD(x) (HW_I2C_S(x).U)
Kojto	90:cb3d968589d8	560	#define HW_I2C_S_WR(x, v) (HW_I2C_S(x).U = (v))
Kojto	90:cb3d968589d8	561	#define HW_I2C_S_SET(x, v) (HW_I2C_S_WR(x, HW_I2C_S_RD(x) \| (v)))
Kojto	90:cb3d968589d8	562	#define HW_I2C_S_CLR(x, v) (HW_I2C_S_WR(x, HW_I2C_S_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	563	#define HW_I2C_S_TOG(x, v) (HW_I2C_S_WR(x, HW_I2C_S_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	564	/@}/
Kojto	90:cb3d968589d8	565
Kojto	90:cb3d968589d8	566	/*
Kojto	90:cb3d968589d8	567	* Constants & macros for individual I2C_S bitfields
Kojto	90:cb3d968589d8	568	*/
Kojto	90:cb3d968589d8	569
Kojto	90:cb3d968589d8	570	/*!
Kojto	90:cb3d968589d8	571	* @name Register I2C_S, field RXAK[0] (RO)
Kojto	90:cb3d968589d8	572	*
Kojto	90:cb3d968589d8	573	* Values:
Kojto	90:cb3d968589d8	574	* - 0 - Acknowledge signal was received after the completion of one byte of
Kojto	90:cb3d968589d8	575	* data transmission on the bus
Kojto	90:cb3d968589d8	576	* - 1 - No acknowledge signal detected
Kojto	90:cb3d968589d8	577	*/
Kojto	90:cb3d968589d8	578	/@{/
Kojto	90:cb3d968589d8	579	#define BP_I2C_S_RXAK (0U) /!< Bit position for I2C_S_RXAK. /
Kojto	90:cb3d968589d8	580	#define BM_I2C_S_RXAK (0x01U) /!< Bit mask for I2C_S_RXAK. /
Kojto	90:cb3d968589d8	581	#define BS_I2C_S_RXAK (1U) /!< Bit field size in bits for I2C_S_RXAK. /
Kojto	90:cb3d968589d8	582
Kojto	90:cb3d968589d8	583	/! @brief Read current value of the I2C_S_RXAK field. /
Kojto	90:cb3d968589d8	584	#define BR_I2C_S_RXAK(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RXAK))
Kojto	90:cb3d968589d8	585	/@}/
Kojto	90:cb3d968589d8	586
Kojto	90:cb3d968589d8	587	/*!
Kojto	90:cb3d968589d8	588	* @name Register I2C_S, field IICIF[1] (W1C)
Kojto	90:cb3d968589d8	589	*
Kojto	90:cb3d968589d8	590	* This bit sets when an interrupt is pending. This bit must be cleared by
Kojto	90:cb3d968589d8	591	* software by writing 1 to it, such as in the interrupt routine. One of the following
Kojto	90:cb3d968589d8	592	* events can set this bit: One byte transfer, including ACK/NACK bit, completes
Kojto	90:cb3d968589d8	593	* if FACK is 0. An ACK or NACK is sent on the bus by writing 0 or 1 to TXAK
Kojto	90:cb3d968589d8	594	* after this bit is set in receive mode. One byte transfer, excluding ACK/NACK bit,
Kojto	90:cb3d968589d8	595	* completes if FACK is 1. Match of slave address to calling address including
Kojto	90:cb3d968589d8	596	* primary slave address, range slave address , alert response address, second
Kojto	90:cb3d968589d8	597	* slave address, or general call address. Arbitration lost In SMBus mode, any
Kojto	90:cb3d968589d8	598	* timeouts except SCL and SDA high timeouts I2C bus stop or start detection if the
Kojto	90:cb3d968589d8	599	* SSIE bit in the Input Glitch Filter register is 1 To clear the I2C bus stop or
Kojto	90:cb3d968589d8	600	* start detection interrupt: In the interrupt service routine, first clear the
Kojto	90:cb3d968589d8	601	* STOPF or STARTF bit in the Input Glitch Filter register by writing 1 to it, and
Kojto	90:cb3d968589d8	602	* then clear the IICIF bit. If this sequence is reversed, the IICIF bit is
Kojto	90:cb3d968589d8	603	* asserted again.
Kojto	90:cb3d968589d8	604	*
Kojto	90:cb3d968589d8	605	* Values:
Kojto	90:cb3d968589d8	606	* - 0 - No interrupt pending
Kojto	90:cb3d968589d8	607	* - 1 - Interrupt pending
Kojto	90:cb3d968589d8	608	*/
Kojto	90:cb3d968589d8	609	/@{/
Kojto	90:cb3d968589d8	610	#define BP_I2C_S_IICIF (1U) /!< Bit position for I2C_S_IICIF. /
Kojto	90:cb3d968589d8	611	#define BM_I2C_S_IICIF (0x02U) /!< Bit mask for I2C_S_IICIF. /
Kojto	90:cb3d968589d8	612	#define BS_I2C_S_IICIF (1U) /!< Bit field size in bits for I2C_S_IICIF. /
Kojto	90:cb3d968589d8	613
Kojto	90:cb3d968589d8	614	/! @brief Read current value of the I2C_S_IICIF field. /
Kojto	90:cb3d968589d8	615	#define BR_I2C_S_IICIF(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IICIF))
Kojto	90:cb3d968589d8	616
Kojto	90:cb3d968589d8	617	/! @brief Format value for bitfield I2C_S_IICIF. /
Kojto	90:cb3d968589d8	618	#define BF_I2C_S_IICIF(v) ((uint8_t)((uint8_t)(v) << BP_I2C_S_IICIF) & BM_I2C_S_IICIF)
Kojto	90:cb3d968589d8	619
Kojto	90:cb3d968589d8	620	/! @brief Set the IICIF field to a new value. /
Kojto	90:cb3d968589d8	621	#define BW_I2C_S_IICIF(x, v) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IICIF) = (v))
Kojto	90:cb3d968589d8	622	/@}/
Kojto	90:cb3d968589d8	623
Kojto	90:cb3d968589d8	624	/*!
Kojto	90:cb3d968589d8	625	* @name Register I2C_S, field SRW[2] (RO)
Kojto	90:cb3d968589d8	626	*
Kojto	90:cb3d968589d8	627	* When addressed as a slave, SRW indicates the value of the R/W command bit of
Kojto	90:cb3d968589d8	628	* the calling address sent to the master.
Kojto	90:cb3d968589d8	629	*
Kojto	90:cb3d968589d8	630	* Values:
Kojto	90:cb3d968589d8	631	* - 0 - Slave receive, master writing to slave
Kojto	90:cb3d968589d8	632	* - 1 - Slave transmit, master reading from slave
Kojto	90:cb3d968589d8	633	*/
Kojto	90:cb3d968589d8	634	/@{/
Kojto	90:cb3d968589d8	635	#define BP_I2C_S_SRW (2U) /!< Bit position for I2C_S_SRW. /
Kojto	90:cb3d968589d8	636	#define BM_I2C_S_SRW (0x04U) /!< Bit mask for I2C_S_SRW. /
Kojto	90:cb3d968589d8	637	#define BS_I2C_S_SRW (1U) /!< Bit field size in bits for I2C_S_SRW. /
Kojto	90:cb3d968589d8	638
Kojto	90:cb3d968589d8	639	/! @brief Read current value of the I2C_S_SRW field. /
Kojto	90:cb3d968589d8	640	#define BR_I2C_S_SRW(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_SRW))
Kojto	90:cb3d968589d8	641	/@}/
Kojto	90:cb3d968589d8	642
Kojto	90:cb3d968589d8	643	/*!
Kojto	90:cb3d968589d8	644	* @name Register I2C_S, field RAM[3] (RW)
Kojto	90:cb3d968589d8	645	*
Kojto	90:cb3d968589d8	646	* This bit is set to 1 by any of the following conditions, if I2C_C2[RMEN] = 1:
Kojto	90:cb3d968589d8	647	* Any nonzero calling address is received that matches the address in the RA
Kojto	90:cb3d968589d8	648	* register. The calling address is within the range of values of the A1 and RA
Kojto	90:cb3d968589d8	649	* registers. For the RAM bit to be set to 1 correctly, C1[IICIE] must be set to 1.
Kojto	90:cb3d968589d8	650	* Writing the C1 register with any value clears this bit to 0.
Kojto	90:cb3d968589d8	651	*
Kojto	90:cb3d968589d8	652	* Values:
Kojto	90:cb3d968589d8	653	* - 0 - Not addressed
Kojto	90:cb3d968589d8	654	* - 1 - Addressed as a slave
Kojto	90:cb3d968589d8	655	*/
Kojto	90:cb3d968589d8	656	/@{/
Kojto	90:cb3d968589d8	657	#define BP_I2C_S_RAM (3U) /!< Bit position for I2C_S_RAM. /
Kojto	90:cb3d968589d8	658	#define BM_I2C_S_RAM (0x08U) /!< Bit mask for I2C_S_RAM. /
Kojto	90:cb3d968589d8	659	#define BS_I2C_S_RAM (1U) /!< Bit field size in bits for I2C_S_RAM. /
Kojto	90:cb3d968589d8	660
Kojto	90:cb3d968589d8	661	/! @brief Read current value of the I2C_S_RAM field. /
Kojto	90:cb3d968589d8	662	#define BR_I2C_S_RAM(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RAM))
Kojto	90:cb3d968589d8	663
Kojto	90:cb3d968589d8	664	/! @brief Format value for bitfield I2C_S_RAM. /
Kojto	90:cb3d968589d8	665	#define BF_I2C_S_RAM(v) ((uint8_t)((uint8_t)(v) << BP_I2C_S_RAM) & BM_I2C_S_RAM)
Kojto	90:cb3d968589d8	666
Kojto	90:cb3d968589d8	667	/! @brief Set the RAM field to a new value. /
Kojto	90:cb3d968589d8	668	#define BW_I2C_S_RAM(x, v) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RAM) = (v))
Kojto	90:cb3d968589d8	669	/@}/
Kojto	90:cb3d968589d8	670
Kojto	90:cb3d968589d8	671	/*!
Kojto	90:cb3d968589d8	672	* @name Register I2C_S, field ARBL[4] (W1C)
Kojto	90:cb3d968589d8	673	*
Kojto	90:cb3d968589d8	674	* This bit is set by hardware when the arbitration procedure is lost. The ARBL
Kojto	90:cb3d968589d8	675	* bit must be cleared by software, by writing 1 to it.
Kojto	90:cb3d968589d8	676	*
Kojto	90:cb3d968589d8	677	* Values:
Kojto	90:cb3d968589d8	678	* - 0 - Standard bus operation.
Kojto	90:cb3d968589d8	679	* - 1 - Loss of arbitration.
Kojto	90:cb3d968589d8	680	*/
Kojto	90:cb3d968589d8	681	/@{/
Kojto	90:cb3d968589d8	682	#define BP_I2C_S_ARBL (4U) /!< Bit position for I2C_S_ARBL. /
Kojto	90:cb3d968589d8	683	#define BM_I2C_S_ARBL (0x10U) /!< Bit mask for I2C_S_ARBL. /
Kojto	90:cb3d968589d8	684	#define BS_I2C_S_ARBL (1U) /!< Bit field size in bits for I2C_S_ARBL. /
Kojto	90:cb3d968589d8	685
Kojto	90:cb3d968589d8	686	/! @brief Read current value of the I2C_S_ARBL field. /
Kojto	90:cb3d968589d8	687	#define BR_I2C_S_ARBL(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_ARBL))
Kojto	90:cb3d968589d8	688
Kojto	90:cb3d968589d8	689	/! @brief Format value for bitfield I2C_S_ARBL. /
Kojto	90:cb3d968589d8	690	#define BF_I2C_S_ARBL(v) ((uint8_t)((uint8_t)(v) << BP_I2C_S_ARBL) & BM_I2C_S_ARBL)
Kojto	90:cb3d968589d8	691
Kojto	90:cb3d968589d8	692	/! @brief Set the ARBL field to a new value. /
Kojto	90:cb3d968589d8	693	#define BW_I2C_S_ARBL(x, v) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_ARBL) = (v))
Kojto	90:cb3d968589d8	694	/@}/
Kojto	90:cb3d968589d8	695
Kojto	90:cb3d968589d8	696	/*!
Kojto	90:cb3d968589d8	697	* @name Register I2C_S, field BUSY[5] (RO)
Kojto	90:cb3d968589d8	698	*
Kojto	90:cb3d968589d8	699	* Indicates the status of the bus regardless of slave or master mode. This bit
Kojto	90:cb3d968589d8	700	* is set when a START signal is detected and cleared when a STOP signal is
Kojto	90:cb3d968589d8	701	* detected.
Kojto	90:cb3d968589d8	702	*
Kojto	90:cb3d968589d8	703	* Values:
Kojto	90:cb3d968589d8	704	* - 0 - Bus is idle
Kojto	90:cb3d968589d8	705	* - 1 - Bus is busy
Kojto	90:cb3d968589d8	706	*/
Kojto	90:cb3d968589d8	707	/@{/
Kojto	90:cb3d968589d8	708	#define BP_I2C_S_BUSY (5U) /!< Bit position for I2C_S_BUSY. /
Kojto	90:cb3d968589d8	709	#define BM_I2C_S_BUSY (0x20U) /!< Bit mask for I2C_S_BUSY. /
Kojto	90:cb3d968589d8	710	#define BS_I2C_S_BUSY (1U) /!< Bit field size in bits for I2C_S_BUSY. /
Kojto	90:cb3d968589d8	711
Kojto	90:cb3d968589d8	712	/! @brief Read current value of the I2C_S_BUSY field. /
Kojto	90:cb3d968589d8	713	#define BR_I2C_S_BUSY(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_BUSY))
Kojto	90:cb3d968589d8	714	/@}/
Kojto	90:cb3d968589d8	715
Kojto	90:cb3d968589d8	716	/*!
Kojto	90:cb3d968589d8	717	* @name Register I2C_S, field IAAS[6] (RW)
Kojto	90:cb3d968589d8	718	*
Kojto	90:cb3d968589d8	719	* This bit is set by one of the following conditions: The calling address
Kojto	90:cb3d968589d8	720	* matches the programmed primary slave address in the A1 register, or matches the
Kojto	90:cb3d968589d8	721	* range address in the RA register (which must be set to a nonzero value and under
Kojto	90:cb3d968589d8	722	* the condition I2C_C2[RMEN] = 1). C2[GCAEN] is set and a general call is
Kojto	90:cb3d968589d8	723	* received. SMB[SIICAEN] is set and the calling address matches the second programmed
Kojto	90:cb3d968589d8	724	* slave address. ALERTEN is set and an SMBus alert response address is received
Kojto	90:cb3d968589d8	725	* RMEN is set and an address is received that is within the range between the
Kojto	90:cb3d968589d8	726	* values of the A1 and RA registers. IAAS sets before the ACK bit. The CPU must
Kojto	90:cb3d968589d8	727	* check the SRW bit and set TX/RX accordingly. Writing the C1 register with any
Kojto	90:cb3d968589d8	728	* value clears this bit.
Kojto	90:cb3d968589d8	729	*
Kojto	90:cb3d968589d8	730	* Values:
Kojto	90:cb3d968589d8	731	* - 0 - Not addressed
Kojto	90:cb3d968589d8	732	* - 1 - Addressed as a slave
Kojto	90:cb3d968589d8	733	*/
Kojto	90:cb3d968589d8	734	/@{/
Kojto	90:cb3d968589d8	735	#define BP_I2C_S_IAAS (6U) /!< Bit position for I2C_S_IAAS. /
Kojto	90:cb3d968589d8	736	#define BM_I2C_S_IAAS (0x40U) /!< Bit mask for I2C_S_IAAS. /
Kojto	90:cb3d968589d8	737	#define BS_I2C_S_IAAS (1U) /!< Bit field size in bits for I2C_S_IAAS. /
Kojto	90:cb3d968589d8	738
Kojto	90:cb3d968589d8	739	/! @brief Read current value of the I2C_S_IAAS field. /
Kojto	90:cb3d968589d8	740	#define BR_I2C_S_IAAS(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IAAS))
Kojto	90:cb3d968589d8	741
Kojto	90:cb3d968589d8	742	/! @brief Format value for bitfield I2C_S_IAAS. /
Kojto	90:cb3d968589d8	743	#define BF_I2C_S_IAAS(v) ((uint8_t)((uint8_t)(v) << BP_I2C_S_IAAS) & BM_I2C_S_IAAS)
Kojto	90:cb3d968589d8	744
Kojto	90:cb3d968589d8	745	/! @brief Set the IAAS field to a new value. /
Kojto	90:cb3d968589d8	746	#define BW_I2C_S_IAAS(x, v) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IAAS) = (v))
Kojto	90:cb3d968589d8	747	/@}/
Kojto	90:cb3d968589d8	748
Kojto	90:cb3d968589d8	749	/*!
Kojto	90:cb3d968589d8	750	* @name Register I2C_S, field TCF[7] (RO)
Kojto	90:cb3d968589d8	751	*
Kojto	90:cb3d968589d8	752	* Acknowledges a byte transfer; TCF sets on the completion of a byte transfer.
Kojto	90:cb3d968589d8	753	* This bit is valid only during or immediately following a transfer to or from
Kojto	90:cb3d968589d8	754	* the I2C module. TCF is cleared by reading the I2C data register in receive mode
Kojto	90:cb3d968589d8	755	* or by writing to the I2C data register in transmit mode.
Kojto	90:cb3d968589d8	756	*
Kojto	90:cb3d968589d8	757	* Values:
Kojto	90:cb3d968589d8	758	* - 0 - Transfer in progress
Kojto	90:cb3d968589d8	759	* - 1 - Transfer complete
Kojto	90:cb3d968589d8	760	*/
Kojto	90:cb3d968589d8	761	/@{/
Kojto	90:cb3d968589d8	762	#define BP_I2C_S_TCF (7U) /!< Bit position for I2C_S_TCF. /
Kojto	90:cb3d968589d8	763	#define BM_I2C_S_TCF (0x80U) /!< Bit mask for I2C_S_TCF. /
Kojto	90:cb3d968589d8	764	#define BS_I2C_S_TCF (1U) /!< Bit field size in bits for I2C_S_TCF. /
Kojto	90:cb3d968589d8	765
Kojto	90:cb3d968589d8	766	/! @brief Read current value of the I2C_S_TCF field. /
Kojto	90:cb3d968589d8	767	#define BR_I2C_S_TCF(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_TCF))
Kojto	90:cb3d968589d8	768	/@}/
Kojto	90:cb3d968589d8	769
Kojto	90:cb3d968589d8	770	/*******************************************************************************
Kojto	90:cb3d968589d8	771	* HW_I2C_D - I2C Data I/O register
Kojto	90:cb3d968589d8	772	******************************************************************************/
Kojto	90:cb3d968589d8	773
Kojto	90:cb3d968589d8	774	/*!
Kojto	90:cb3d968589d8	775	* @brief HW_I2C_D - I2C Data I/O register (RW)
Kojto	90:cb3d968589d8	776	*
Kojto	90:cb3d968589d8	777	* Reset value: 0x00U
Kojto	90:cb3d968589d8	778	*/
Kojto	90:cb3d968589d8	779	typedef union _hw_i2c_d
Kojto	90:cb3d968589d8	780	{
Kojto	90:cb3d968589d8	781	uint8_t U;
Kojto	90:cb3d968589d8	782	struct _hw_i2c_d_bitfields
Kojto	90:cb3d968589d8	783	{
Kojto	90:cb3d968589d8	784	uint8_t DATA : 8; /!< [7:0] Data /
Kojto	90:cb3d968589d8	785	} B;
Kojto	90:cb3d968589d8	786	} hw_i2c_d_t;
Kojto	90:cb3d968589d8	787
Kojto	90:cb3d968589d8	788	/*!
Kojto	90:cb3d968589d8	789	* @name Constants and macros for entire I2C_D register
Kojto	90:cb3d968589d8	790	*/
Kojto	90:cb3d968589d8	791	/@{/
Kojto	90:cb3d968589d8	792	#define HW_I2C_D_ADDR(x) ((x) + 0x4U)
Kojto	90:cb3d968589d8	793
Kojto	90:cb3d968589d8	794	#define HW_I2C_D(x) ((__IO hw_i2c_d_t ) HW_I2C_D_ADDR(x))
Kojto	90:cb3d968589d8	795	#define HW_I2C_D_RD(x) (HW_I2C_D(x).U)
Kojto	90:cb3d968589d8	796	#define HW_I2C_D_WR(x, v) (HW_I2C_D(x).U = (v))
Kojto	90:cb3d968589d8	797	#define HW_I2C_D_SET(x, v) (HW_I2C_D_WR(x, HW_I2C_D_RD(x) \| (v)))
Kojto	90:cb3d968589d8	798	#define HW_I2C_D_CLR(x, v) (HW_I2C_D_WR(x, HW_I2C_D_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	799	#define HW_I2C_D_TOG(x, v) (HW_I2C_D_WR(x, HW_I2C_D_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	800	/@}/
Kojto	90:cb3d968589d8	801
Kojto	90:cb3d968589d8	802	/*
Kojto	90:cb3d968589d8	803	* Constants & macros for individual I2C_D bitfields
Kojto	90:cb3d968589d8	804	*/
Kojto	90:cb3d968589d8	805
Kojto	90:cb3d968589d8	806	/*!
Kojto	90:cb3d968589d8	807	* @name Register I2C_D, field DATA[7:0] (RW)
Kojto	90:cb3d968589d8	808	*
Kojto	90:cb3d968589d8	809	* In master transmit mode, when data is written to this register, a data
Kojto	90:cb3d968589d8	810	* transfer is initiated. The most significant bit is sent first. In master receive
Kojto	90:cb3d968589d8	811	* mode, reading this register initiates receiving of the next byte of data. When
Kojto	90:cb3d968589d8	812	* making the transition out of master receive mode, switch the I2C mode before
Kojto	90:cb3d968589d8	813	* reading the Data register to prevent an inadvertent initiation of a master
Kojto	90:cb3d968589d8	814	* receive data transfer. In slave mode, the same functions are available after an
Kojto	90:cb3d968589d8	815	* address match occurs. The C1[TX] bit must correctly reflect the desired direction
Kojto	90:cb3d968589d8	816	* of transfer in master and slave modes for the transmission to begin. For
Kojto	90:cb3d968589d8	817	* example, if the I2C module is configured for master transmit but a master receive
Kojto	90:cb3d968589d8	818	* is desired, reading the Data register does not initiate the receive. Reading
Kojto	90:cb3d968589d8	819	* the Data register returns the last byte received while the I2C module is
Kojto	90:cb3d968589d8	820	* configured in master receive or slave receive mode. The Data register does not
Kojto	90:cb3d968589d8	821	* reflect every byte that is transmitted on the I2C bus, and neither can software
Kojto	90:cb3d968589d8	822	* verify that a byte has been written to the Data register correctly by reading it
Kojto	90:cb3d968589d8	823	* back. In master transmit mode, the first byte of data written to the Data
Kojto	90:cb3d968589d8	824	* register following assertion of MST (start bit) or assertion of RSTA (repeated
Kojto	90:cb3d968589d8	825	* start bit) is used for the address transfer and must consist of the calling
Kojto	90:cb3d968589d8	826	* address (in bits 7-1) concatenated with the required R/W bit (in position bit 0).
Kojto	90:cb3d968589d8	827	*/
Kojto	90:cb3d968589d8	828	/@{/
Kojto	90:cb3d968589d8	829	#define BP_I2C_D_DATA (0U) /!< Bit position for I2C_D_DATA. /
Kojto	90:cb3d968589d8	830	#define BM_I2C_D_DATA (0xFFU) /!< Bit mask for I2C_D_DATA. /
Kojto	90:cb3d968589d8	831	#define BS_I2C_D_DATA (8U) /!< Bit field size in bits for I2C_D_DATA. /
Kojto	90:cb3d968589d8	832
Kojto	90:cb3d968589d8	833	/! @brief Read current value of the I2C_D_DATA field. /
Kojto	90:cb3d968589d8	834	#define BR_I2C_D_DATA(x) (HW_I2C_D(x).U)
Kojto	90:cb3d968589d8	835
Kojto	90:cb3d968589d8	836	/! @brief Format value for bitfield I2C_D_DATA. /
Kojto	90:cb3d968589d8	837	#define BF_I2C_D_DATA(v) ((uint8_t)((uint8_t)(v) << BP_I2C_D_DATA) & BM_I2C_D_DATA)
Kojto	90:cb3d968589d8	838
Kojto	90:cb3d968589d8	839	/! @brief Set the DATA field to a new value. /
Kojto	90:cb3d968589d8	840	#define BW_I2C_D_DATA(x, v) (HW_I2C_D_WR(x, v))
Kojto	90:cb3d968589d8	841	/@}/
Kojto	90:cb3d968589d8	842
Kojto	90:cb3d968589d8	843	/*******************************************************************************
Kojto	90:cb3d968589d8	844	* HW_I2C_C2 - I2C Control Register 2
Kojto	90:cb3d968589d8	845	******************************************************************************/
Kojto	90:cb3d968589d8	846
Kojto	90:cb3d968589d8	847	/*!
Kojto	90:cb3d968589d8	848	* @brief HW_I2C_C2 - I2C Control Register 2 (RW)
Kojto	90:cb3d968589d8	849	*
Kojto	90:cb3d968589d8	850	* Reset value: 0x00U
Kojto	90:cb3d968589d8	851	*/
Kojto	90:cb3d968589d8	852	typedef union _hw_i2c_c2
Kojto	90:cb3d968589d8	853	{
Kojto	90:cb3d968589d8	854	uint8_t U;
Kojto	90:cb3d968589d8	855	struct _hw_i2c_c2_bitfields
Kojto	90:cb3d968589d8	856	{
Kojto	90:cb3d968589d8	857	uint8_t AD : 3; /!< [2:0] Slave Address /
Kojto	90:cb3d968589d8	858	uint8_t RMEN : 1; /!< [3] Range Address Matching Enable /
Kojto	90:cb3d968589d8	859	uint8_t SBRC : 1; /!< [4] Slave Baud Rate Control /
Kojto	90:cb3d968589d8	860	uint8_t HDRS : 1; /!< [5] High Drive Select /
Kojto	90:cb3d968589d8	861	uint8_t ADEXT : 1; /!< [6] Address Extension /
Kojto	90:cb3d968589d8	862	uint8_t GCAEN : 1; /!< [7] General Call Address Enable /
Kojto	90:cb3d968589d8	863	} B;
Kojto	90:cb3d968589d8	864	} hw_i2c_c2_t;
Kojto	90:cb3d968589d8	865
Kojto	90:cb3d968589d8	866	/*!
Kojto	90:cb3d968589d8	867	* @name Constants and macros for entire I2C_C2 register
Kojto	90:cb3d968589d8	868	*/
Kojto	90:cb3d968589d8	869	/@{/
Kojto	90:cb3d968589d8	870	#define HW_I2C_C2_ADDR(x) ((x) + 0x5U)
Kojto	90:cb3d968589d8	871
Kojto	90:cb3d968589d8	872	#define HW_I2C_C2(x) ((__IO hw_i2c_c2_t ) HW_I2C_C2_ADDR(x))
Kojto	90:cb3d968589d8	873	#define HW_I2C_C2_RD(x) (HW_I2C_C2(x).U)
Kojto	90:cb3d968589d8	874	#define HW_I2C_C2_WR(x, v) (HW_I2C_C2(x).U = (v))
Kojto	90:cb3d968589d8	875	#define HW_I2C_C2_SET(x, v) (HW_I2C_C2_WR(x, HW_I2C_C2_RD(x) \| (v)))
Kojto	90:cb3d968589d8	876	#define HW_I2C_C2_CLR(x, v) (HW_I2C_C2_WR(x, HW_I2C_C2_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	877	#define HW_I2C_C2_TOG(x, v) (HW_I2C_C2_WR(x, HW_I2C_C2_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	878	/@}/
Kojto	90:cb3d968589d8	879
Kojto	90:cb3d968589d8	880	/*
Kojto	90:cb3d968589d8	881	* Constants & macros for individual I2C_C2 bitfields
Kojto	90:cb3d968589d8	882	*/
Kojto	90:cb3d968589d8	883
Kojto	90:cb3d968589d8	884	/*!
Kojto	90:cb3d968589d8	885	* @name Register I2C_C2, field AD[2:0] (RW)
Kojto	90:cb3d968589d8	886	*
Kojto	90:cb3d968589d8	887	* Contains the upper three bits of the slave address in the 10-bit address
Kojto	90:cb3d968589d8	888	* scheme. This field is valid only while the ADEXT bit is set.
Kojto	90:cb3d968589d8	889	*/
Kojto	90:cb3d968589d8	890	/@{/
Kojto	90:cb3d968589d8	891	#define BP_I2C_C2_AD (0U) /!< Bit position for I2C_C2_AD. /
Kojto	90:cb3d968589d8	892	#define BM_I2C_C2_AD (0x07U) /!< Bit mask for I2C_C2_AD. /
Kojto	90:cb3d968589d8	893	#define BS_I2C_C2_AD (3U) /!< Bit field size in bits for I2C_C2_AD. /
Kojto	90:cb3d968589d8	894
Kojto	90:cb3d968589d8	895	/! @brief Read current value of the I2C_C2_AD field. /
Kojto	90:cb3d968589d8	896	#define BR_I2C_C2_AD(x) (HW_I2C_C2(x).B.AD)
Kojto	90:cb3d968589d8	897
Kojto	90:cb3d968589d8	898	/! @brief Format value for bitfield I2C_C2_AD. /
Kojto	90:cb3d968589d8	899	#define BF_I2C_C2_AD(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_AD) & BM_I2C_C2_AD)
Kojto	90:cb3d968589d8	900
Kojto	90:cb3d968589d8	901	/! @brief Set the AD field to a new value. /
Kojto	90:cb3d968589d8	902	#define BW_I2C_C2_AD(x, v) (HW_I2C_C2_WR(x, (HW_I2C_C2_RD(x) & ~BM_I2C_C2_AD) \| BF_I2C_C2_AD(v)))
Kojto	90:cb3d968589d8	903	/@}/
Kojto	90:cb3d968589d8	904
Kojto	90:cb3d968589d8	905	/*!
Kojto	90:cb3d968589d8	906	* @name Register I2C_C2, field RMEN[3] (RW)
Kojto	90:cb3d968589d8	907	*
Kojto	90:cb3d968589d8	908	* This bit controls the slave address matching for addresses between the values
Kojto	90:cb3d968589d8	909	* of the A1 and RA registers. When this bit is set, a slave address matching
Kojto	90:cb3d968589d8	910	* occurs for any address greater than the value of the A1 register and less than
Kojto	90:cb3d968589d8	911	* or equal to the value of the RA register.
Kojto	90:cb3d968589d8	912	*
Kojto	90:cb3d968589d8	913	* Values:
Kojto	90:cb3d968589d8	914	* - 0 - Range mode disabled. No address matching occurs for an address within
Kojto	90:cb3d968589d8	915	* the range of values of the A1 and RA registers.
Kojto	90:cb3d968589d8	916	* - 1 - Range mode enabled. Address matching occurs when a slave receives an
Kojto	90:cb3d968589d8	917	* address within the range of values of the A1 and RA registers.
Kojto	90:cb3d968589d8	918	*/
Kojto	90:cb3d968589d8	919	/@{/
Kojto	90:cb3d968589d8	920	#define BP_I2C_C2_RMEN (3U) /!< Bit position for I2C_C2_RMEN. /
Kojto	90:cb3d968589d8	921	#define BM_I2C_C2_RMEN (0x08U) /!< Bit mask for I2C_C2_RMEN. /
Kojto	90:cb3d968589d8	922	#define BS_I2C_C2_RMEN (1U) /!< Bit field size in bits for I2C_C2_RMEN. /
Kojto	90:cb3d968589d8	923
Kojto	90:cb3d968589d8	924	/! @brief Read current value of the I2C_C2_RMEN field. /
Kojto	90:cb3d968589d8	925	#define BR_I2C_C2_RMEN(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_RMEN))
Kojto	90:cb3d968589d8	926
Kojto	90:cb3d968589d8	927	/! @brief Format value for bitfield I2C_C2_RMEN. /
Kojto	90:cb3d968589d8	928	#define BF_I2C_C2_RMEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_RMEN) & BM_I2C_C2_RMEN)
Kojto	90:cb3d968589d8	929
Kojto	90:cb3d968589d8	930	/! @brief Set the RMEN field to a new value. /
Kojto	90:cb3d968589d8	931	#define BW_I2C_C2_RMEN(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_RMEN) = (v))
Kojto	90:cb3d968589d8	932	/@}/
Kojto	90:cb3d968589d8	933
Kojto	90:cb3d968589d8	934	/*!
Kojto	90:cb3d968589d8	935	* @name Register I2C_C2, field SBRC[4] (RW)
Kojto	90:cb3d968589d8	936	*
Kojto	90:cb3d968589d8	937	* Enables independent slave mode baud rate at maximum frequency, which forces
Kojto	90:cb3d968589d8	938	* clock stretching on SCL in very fast I2C modes. To a slave, an example of a
Kojto	90:cb3d968589d8	939	* "very fast" mode is when the master transfers at 40 kbit/s but the slave can
Kojto	90:cb3d968589d8	940	* capture the master's data at only 10 kbit/s.
Kojto	90:cb3d968589d8	941	*
Kojto	90:cb3d968589d8	942	* Values:
Kojto	90:cb3d968589d8	943	* - 0 - The slave baud rate follows the master baud rate and clock stretching
Kojto	90:cb3d968589d8	944	* may occur
Kojto	90:cb3d968589d8	945	* - 1 - Slave baud rate is independent of the master baud rate
Kojto	90:cb3d968589d8	946	*/
Kojto	90:cb3d968589d8	947	/@{/
Kojto	90:cb3d968589d8	948	#define BP_I2C_C2_SBRC (4U) /!< Bit position for I2C_C2_SBRC. /
Kojto	90:cb3d968589d8	949	#define BM_I2C_C2_SBRC (0x10U) /!< Bit mask for I2C_C2_SBRC. /
Kojto	90:cb3d968589d8	950	#define BS_I2C_C2_SBRC (1U) /!< Bit field size in bits for I2C_C2_SBRC. /
Kojto	90:cb3d968589d8	951
Kojto	90:cb3d968589d8	952	/! @brief Read current value of the I2C_C2_SBRC field. /
Kojto	90:cb3d968589d8	953	#define BR_I2C_C2_SBRC(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_SBRC))
Kojto	90:cb3d968589d8	954
Kojto	90:cb3d968589d8	955	/! @brief Format value for bitfield I2C_C2_SBRC. /
Kojto	90:cb3d968589d8	956	#define BF_I2C_C2_SBRC(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_SBRC) & BM_I2C_C2_SBRC)
Kojto	90:cb3d968589d8	957
Kojto	90:cb3d968589d8	958	/! @brief Set the SBRC field to a new value. /
Kojto	90:cb3d968589d8	959	#define BW_I2C_C2_SBRC(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_SBRC) = (v))
Kojto	90:cb3d968589d8	960	/@}/
Kojto	90:cb3d968589d8	961
Kojto	90:cb3d968589d8	962	/*!
Kojto	90:cb3d968589d8	963	* @name Register I2C_C2, field HDRS[5] (RW)
Kojto	90:cb3d968589d8	964	*
Kojto	90:cb3d968589d8	965	* Controls the drive capability of the I2C pads.
Kojto	90:cb3d968589d8	966	*
Kojto	90:cb3d968589d8	967	* Values:
Kojto	90:cb3d968589d8	968	* - 0 - Normal drive mode
Kojto	90:cb3d968589d8	969	* - 1 - High drive mode
Kojto	90:cb3d968589d8	970	*/
Kojto	90:cb3d968589d8	971	/@{/
Kojto	90:cb3d968589d8	972	#define BP_I2C_C2_HDRS (5U) /!< Bit position for I2C_C2_HDRS. /
Kojto	90:cb3d968589d8	973	#define BM_I2C_C2_HDRS (0x20U) /!< Bit mask for I2C_C2_HDRS. /
Kojto	90:cb3d968589d8	974	#define BS_I2C_C2_HDRS (1U) /!< Bit field size in bits for I2C_C2_HDRS. /
Kojto	90:cb3d968589d8	975
Kojto	90:cb3d968589d8	976	/! @brief Read current value of the I2C_C2_HDRS field. /
Kojto	90:cb3d968589d8	977	#define BR_I2C_C2_HDRS(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_HDRS))
Kojto	90:cb3d968589d8	978
Kojto	90:cb3d968589d8	979	/! @brief Format value for bitfield I2C_C2_HDRS. /
Kojto	90:cb3d968589d8	980	#define BF_I2C_C2_HDRS(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_HDRS) & BM_I2C_C2_HDRS)
Kojto	90:cb3d968589d8	981
Kojto	90:cb3d968589d8	982	/! @brief Set the HDRS field to a new value. /
Kojto	90:cb3d968589d8	983	#define BW_I2C_C2_HDRS(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_HDRS) = (v))
Kojto	90:cb3d968589d8	984	/@}/
Kojto	90:cb3d968589d8	985
Kojto	90:cb3d968589d8	986	/*!
Kojto	90:cb3d968589d8	987	* @name Register I2C_C2, field ADEXT[6] (RW)
Kojto	90:cb3d968589d8	988	*
Kojto	90:cb3d968589d8	989	* Controls the number of bits used for the slave address.
Kojto	90:cb3d968589d8	990	*
Kojto	90:cb3d968589d8	991	* Values:
Kojto	90:cb3d968589d8	992	* - 0 - 7-bit address scheme
Kojto	90:cb3d968589d8	993	* - 1 - 10-bit address scheme
Kojto	90:cb3d968589d8	994	*/
Kojto	90:cb3d968589d8	995	/@{/
Kojto	90:cb3d968589d8	996	#define BP_I2C_C2_ADEXT (6U) /!< Bit position for I2C_C2_ADEXT. /
Kojto	90:cb3d968589d8	997	#define BM_I2C_C2_ADEXT (0x40U) /!< Bit mask for I2C_C2_ADEXT. /
Kojto	90:cb3d968589d8	998	#define BS_I2C_C2_ADEXT (1U) /!< Bit field size in bits for I2C_C2_ADEXT. /
Kojto	90:cb3d968589d8	999
Kojto	90:cb3d968589d8	1000	/! @brief Read current value of the I2C_C2_ADEXT field. /
Kojto	90:cb3d968589d8	1001	#define BR_I2C_C2_ADEXT(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_ADEXT))
Kojto	90:cb3d968589d8	1002
Kojto	90:cb3d968589d8	1003	/! @brief Format value for bitfield I2C_C2_ADEXT. /
Kojto	90:cb3d968589d8	1004	#define BF_I2C_C2_ADEXT(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_ADEXT) & BM_I2C_C2_ADEXT)
Kojto	90:cb3d968589d8	1005
Kojto	90:cb3d968589d8	1006	/! @brief Set the ADEXT field to a new value. /
Kojto	90:cb3d968589d8	1007	#define BW_I2C_C2_ADEXT(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_ADEXT) = (v))
Kojto	90:cb3d968589d8	1008	/@}/
Kojto	90:cb3d968589d8	1009
Kojto	90:cb3d968589d8	1010	/*!
Kojto	90:cb3d968589d8	1011	* @name Register I2C_C2, field GCAEN[7] (RW)
Kojto	90:cb3d968589d8	1012	*
Kojto	90:cb3d968589d8	1013	* Enables general call address.
Kojto	90:cb3d968589d8	1014	*
Kojto	90:cb3d968589d8	1015	* Values:
Kojto	90:cb3d968589d8	1016	* - 0 - Disabled
Kojto	90:cb3d968589d8	1017	* - 1 - Enabled
Kojto	90:cb3d968589d8	1018	*/
Kojto	90:cb3d968589d8	1019	/@{/
Kojto	90:cb3d968589d8	1020	#define BP_I2C_C2_GCAEN (7U) /!< Bit position for I2C_C2_GCAEN. /
Kojto	90:cb3d968589d8	1021	#define BM_I2C_C2_GCAEN (0x80U) /!< Bit mask for I2C_C2_GCAEN. /
Kojto	90:cb3d968589d8	1022	#define BS_I2C_C2_GCAEN (1U) /!< Bit field size in bits for I2C_C2_GCAEN. /
Kojto	90:cb3d968589d8	1023
Kojto	90:cb3d968589d8	1024	/! @brief Read current value of the I2C_C2_GCAEN field. /
Kojto	90:cb3d968589d8	1025	#define BR_I2C_C2_GCAEN(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_GCAEN))
Kojto	90:cb3d968589d8	1026
Kojto	90:cb3d968589d8	1027	/! @brief Format value for bitfield I2C_C2_GCAEN. /
Kojto	90:cb3d968589d8	1028	#define BF_I2C_C2_GCAEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_GCAEN) & BM_I2C_C2_GCAEN)
Kojto	90:cb3d968589d8	1029
Kojto	90:cb3d968589d8	1030	/! @brief Set the GCAEN field to a new value. /
Kojto	90:cb3d968589d8	1031	#define BW_I2C_C2_GCAEN(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_GCAEN) = (v))
Kojto	90:cb3d968589d8	1032	/@}/
Kojto	90:cb3d968589d8	1033
Kojto	90:cb3d968589d8	1034	/*******************************************************************************
Kojto	90:cb3d968589d8	1035	* HW_I2C_FLT - I2C Programmable Input Glitch Filter register
Kojto	90:cb3d968589d8	1036	******************************************************************************/
Kojto	90:cb3d968589d8	1037
Kojto	90:cb3d968589d8	1038	/*!
Kojto	90:cb3d968589d8	1039	* @brief HW_I2C_FLT - I2C Programmable Input Glitch Filter register (RW)
Kojto	90:cb3d968589d8	1040	*
Kojto	90:cb3d968589d8	1041	* Reset value: 0x00U
Kojto	90:cb3d968589d8	1042	*/
Kojto	90:cb3d968589d8	1043	typedef union _hw_i2c_flt
Kojto	90:cb3d968589d8	1044	{
Kojto	90:cb3d968589d8	1045	uint8_t U;
Kojto	90:cb3d968589d8	1046	struct _hw_i2c_flt_bitfields
Kojto	90:cb3d968589d8	1047	{
Kojto	90:cb3d968589d8	1048	uint8_t FLT : 4; /!< [3:0] I2C Programmable Filter Factor /
Kojto	90:cb3d968589d8	1049	uint8_t STARTF : 1; /!< [4] I2C Bus Start Detect Flag /
Kojto	90:cb3d968589d8	1050	uint8_t SSIE : 1; /!< [5] I2C Bus Stop or Start Interrupt Enable /
Kojto	90:cb3d968589d8	1051	uint8_t STOPF : 1; /!< [6] I2C Bus Stop Detect Flag /
Kojto	90:cb3d968589d8	1052	uint8_t SHEN : 1; /!< [7] Stop Hold Enable /
Kojto	90:cb3d968589d8	1053	} B;
Kojto	90:cb3d968589d8	1054	} hw_i2c_flt_t;
Kojto	90:cb3d968589d8	1055
Kojto	90:cb3d968589d8	1056	/*!
Kojto	90:cb3d968589d8	1057	* @name Constants and macros for entire I2C_FLT register
Kojto	90:cb3d968589d8	1058	*/
Kojto	90:cb3d968589d8	1059	/@{/
Kojto	90:cb3d968589d8	1060	#define HW_I2C_FLT_ADDR(x) ((x) + 0x6U)
Kojto	90:cb3d968589d8	1061
Kojto	90:cb3d968589d8	1062	#define HW_I2C_FLT(x) ((__IO hw_i2c_flt_t ) HW_I2C_FLT_ADDR(x))
Kojto	90:cb3d968589d8	1063	#define HW_I2C_FLT_RD(x) (HW_I2C_FLT(x).U)
Kojto	90:cb3d968589d8	1064	#define HW_I2C_FLT_WR(x, v) (HW_I2C_FLT(x).U = (v))
Kojto	90:cb3d968589d8	1065	#define HW_I2C_FLT_SET(x, v) (HW_I2C_FLT_WR(x, HW_I2C_FLT_RD(x) \| (v)))
Kojto	90:cb3d968589d8	1066	#define HW_I2C_FLT_CLR(x, v) (HW_I2C_FLT_WR(x, HW_I2C_FLT_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	1067	#define HW_I2C_FLT_TOG(x, v) (HW_I2C_FLT_WR(x, HW_I2C_FLT_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	1068	/@}/
Kojto	90:cb3d968589d8	1069
Kojto	90:cb3d968589d8	1070	/*
Kojto	90:cb3d968589d8	1071	* Constants & macros for individual I2C_FLT bitfields
Kojto	90:cb3d968589d8	1072	*/
Kojto	90:cb3d968589d8	1073
Kojto	90:cb3d968589d8	1074	/*!
Kojto	90:cb3d968589d8	1075	* @name Register I2C_FLT, field FLT[3:0] (RW)
Kojto	90:cb3d968589d8	1076	*
Kojto	90:cb3d968589d8	1077	* Controls the width of the glitch, in terms of I2C module clock cycles, that
Kojto	90:cb3d968589d8	1078	* the filter must absorb. For any glitch whose size is less than or equal to this
Kojto	90:cb3d968589d8	1079	* width setting, the filter does not allow the glitch to pass.
Kojto	90:cb3d968589d8	1080	*
Kojto	90:cb3d968589d8	1081	* Values:
Kojto	90:cb3d968589d8	1082	* - 0 - No filter/bypass
Kojto	90:cb3d968589d8	1083	*/
Kojto	90:cb3d968589d8	1084	/@{/
Kojto	90:cb3d968589d8	1085	#define BP_I2C_FLT_FLT (0U) /!< Bit position for I2C_FLT_FLT. /
Kojto	90:cb3d968589d8	1086	#define BM_I2C_FLT_FLT (0x0FU) /!< Bit mask for I2C_FLT_FLT. /
Kojto	90:cb3d968589d8	1087	#define BS_I2C_FLT_FLT (4U) /!< Bit field size in bits for I2C_FLT_FLT. /
Kojto	90:cb3d968589d8	1088
Kojto	90:cb3d968589d8	1089	/! @brief Read current value of the I2C_FLT_FLT field. /
Kojto	90:cb3d968589d8	1090	#define BR_I2C_FLT_FLT(x) (HW_I2C_FLT(x).B.FLT)
Kojto	90:cb3d968589d8	1091
Kojto	90:cb3d968589d8	1092	/! @brief Format value for bitfield I2C_FLT_FLT. /
Kojto	90:cb3d968589d8	1093	#define BF_I2C_FLT_FLT(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_FLT) & BM_I2C_FLT_FLT)
Kojto	90:cb3d968589d8	1094
Kojto	90:cb3d968589d8	1095	/! @brief Set the FLT field to a new value. /
Kojto	90:cb3d968589d8	1096	#define BW_I2C_FLT_FLT(x, v) (HW_I2C_FLT_WR(x, (HW_I2C_FLT_RD(x) & ~BM_I2C_FLT_FLT) \| BF_I2C_FLT_FLT(v)))
Kojto	90:cb3d968589d8	1097	/@}/
Kojto	90:cb3d968589d8	1098
Kojto	90:cb3d968589d8	1099	/*!
Kojto	90:cb3d968589d8	1100	* @name Register I2C_FLT, field STARTF[4] (W1C)
Kojto	90:cb3d968589d8	1101	*
Kojto	90:cb3d968589d8	1102	* Hardware sets this bit when the I2C bus's start status is detected. The
Kojto	90:cb3d968589d8	1103	* STARTF bit must be cleared by writing 1 to it.
Kojto	90:cb3d968589d8	1104	*
Kojto	90:cb3d968589d8	1105	* Values:
Kojto	90:cb3d968589d8	1106	* - 0 - No start happens on I2C bus
Kojto	90:cb3d968589d8	1107	* - 1 - Start detected on I2C bus
Kojto	90:cb3d968589d8	1108	*/
Kojto	90:cb3d968589d8	1109	/@{/
Kojto	90:cb3d968589d8	1110	#define BP_I2C_FLT_STARTF (4U) /!< Bit position for I2C_FLT_STARTF. /
Kojto	90:cb3d968589d8	1111	#define BM_I2C_FLT_STARTF (0x10U) /!< Bit mask for I2C_FLT_STARTF. /
Kojto	90:cb3d968589d8	1112	#define BS_I2C_FLT_STARTF (1U) /!< Bit field size in bits for I2C_FLT_STARTF. /
Kojto	90:cb3d968589d8	1113
Kojto	90:cb3d968589d8	1114	/! @brief Read current value of the I2C_FLT_STARTF field. /
Kojto	90:cb3d968589d8	1115	#define BR_I2C_FLT_STARTF(x) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STARTF))
Kojto	90:cb3d968589d8	1116
Kojto	90:cb3d968589d8	1117	/! @brief Format value for bitfield I2C_FLT_STARTF. /
Kojto	90:cb3d968589d8	1118	#define BF_I2C_FLT_STARTF(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_STARTF) & BM_I2C_FLT_STARTF)
Kojto	90:cb3d968589d8	1119
Kojto	90:cb3d968589d8	1120	/! @brief Set the STARTF field to a new value. /
Kojto	90:cb3d968589d8	1121	#define BW_I2C_FLT_STARTF(x, v) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STARTF) = (v))
Kojto	90:cb3d968589d8	1122	/@}/
Kojto	90:cb3d968589d8	1123
Kojto	90:cb3d968589d8	1124	/*!
Kojto	90:cb3d968589d8	1125	* @name Register I2C_FLT, field SSIE[5] (RW)
Kojto	90:cb3d968589d8	1126	*
Kojto	90:cb3d968589d8	1127	* This bit enables the interrupt for I2C bus stop or start detection. To clear
Kojto	90:cb3d968589d8	1128	* the I2C bus stop or start detection interrupt: In the interrupt service
Kojto	90:cb3d968589d8	1129	* routine, first clear the STOPF or STARTF bit by writing 1 to it, and then clear the
Kojto	90:cb3d968589d8	1130	* IICIF bit in the status register. If this sequence is reversed, the IICIF bit
Kojto	90:cb3d968589d8	1131	* is asserted again.
Kojto	90:cb3d968589d8	1132	*
Kojto	90:cb3d968589d8	1133	* Values:
Kojto	90:cb3d968589d8	1134	* - 0 - Stop or start detection interrupt is disabled
Kojto	90:cb3d968589d8	1135	* - 1 - Stop or start detection interrupt is enabled
Kojto	90:cb3d968589d8	1136	*/
Kojto	90:cb3d968589d8	1137	/@{/
Kojto	90:cb3d968589d8	1138	#define BP_I2C_FLT_SSIE (5U) /!< Bit position for I2C_FLT_SSIE. /
Kojto	90:cb3d968589d8	1139	#define BM_I2C_FLT_SSIE (0x20U) /!< Bit mask for I2C_FLT_SSIE. /
Kojto	90:cb3d968589d8	1140	#define BS_I2C_FLT_SSIE (1U) /!< Bit field size in bits for I2C_FLT_SSIE. /
Kojto	90:cb3d968589d8	1141
Kojto	90:cb3d968589d8	1142	/! @brief Read current value of the I2C_FLT_SSIE field. /
Kojto	90:cb3d968589d8	1143	#define BR_I2C_FLT_SSIE(x) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SSIE))
Kojto	90:cb3d968589d8	1144
Kojto	90:cb3d968589d8	1145	/! @brief Format value for bitfield I2C_FLT_SSIE. /
Kojto	90:cb3d968589d8	1146	#define BF_I2C_FLT_SSIE(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_SSIE) & BM_I2C_FLT_SSIE)
Kojto	90:cb3d968589d8	1147
Kojto	90:cb3d968589d8	1148	/! @brief Set the SSIE field to a new value. /
Kojto	90:cb3d968589d8	1149	#define BW_I2C_FLT_SSIE(x, v) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SSIE) = (v))
Kojto	90:cb3d968589d8	1150	/@}/
Kojto	90:cb3d968589d8	1151
Kojto	90:cb3d968589d8	1152	/*!
Kojto	90:cb3d968589d8	1153	* @name Register I2C_FLT, field STOPF[6] (W1C)
Kojto	90:cb3d968589d8	1154	*
Kojto	90:cb3d968589d8	1155	* Hardware sets this bit when the I2C bus's stop status is detected. The STOPF
Kojto	90:cb3d968589d8	1156	* bit must be cleared by writing 1 to it.
Kojto	90:cb3d968589d8	1157	*
Kojto	90:cb3d968589d8	1158	* Values:
Kojto	90:cb3d968589d8	1159	* - 0 - No stop happens on I2C bus
Kojto	90:cb3d968589d8	1160	* - 1 - Stop detected on I2C bus
Kojto	90:cb3d968589d8	1161	*/
Kojto	90:cb3d968589d8	1162	/@{/
Kojto	90:cb3d968589d8	1163	#define BP_I2C_FLT_STOPF (6U) /!< Bit position for I2C_FLT_STOPF. /
Kojto	90:cb3d968589d8	1164	#define BM_I2C_FLT_STOPF (0x40U) /!< Bit mask for I2C_FLT_STOPF. /
Kojto	90:cb3d968589d8	1165	#define BS_I2C_FLT_STOPF (1U) /!< Bit field size in bits for I2C_FLT_STOPF. /
Kojto	90:cb3d968589d8	1166
Kojto	90:cb3d968589d8	1167	/! @brief Read current value of the I2C_FLT_STOPF field. /
Kojto	90:cb3d968589d8	1168	#define BR_I2C_FLT_STOPF(x) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STOPF))
Kojto	90:cb3d968589d8	1169
Kojto	90:cb3d968589d8	1170	/! @brief Format value for bitfield I2C_FLT_STOPF. /
Kojto	90:cb3d968589d8	1171	#define BF_I2C_FLT_STOPF(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_STOPF) & BM_I2C_FLT_STOPF)
Kojto	90:cb3d968589d8	1172
Kojto	90:cb3d968589d8	1173	/! @brief Set the STOPF field to a new value. /
Kojto	90:cb3d968589d8	1174	#define BW_I2C_FLT_STOPF(x, v) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STOPF) = (v))
Kojto	90:cb3d968589d8	1175	/@}/
Kojto	90:cb3d968589d8	1176
Kojto	90:cb3d968589d8	1177	/*!
Kojto	90:cb3d968589d8	1178	* @name Register I2C_FLT, field SHEN[7] (RW)
Kojto	90:cb3d968589d8	1179	*
Kojto	90:cb3d968589d8	1180	* Set this bit to hold off entry to stop mode when any data transmission or
Kojto	90:cb3d968589d8	1181	* reception is occurring. The following scenario explains the holdoff
Kojto	90:cb3d968589d8	1182	* functionality: The I2C module is configured for a basic transfer, and the SHEN bit is set
Kojto	90:cb3d968589d8	1183	* to 1. A transfer begins. The MCU signals the I2C module to enter stop mode. The
Kojto	90:cb3d968589d8	1184	* byte currently being transferred, including both address and data, completes
Kojto	90:cb3d968589d8	1185	* its transfer. The I2C slave or master acknowledges that the in-transfer byte
Kojto	90:cb3d968589d8	1186	* completed its transfer and acknowledges the request to enter stop mode. After
Kojto	90:cb3d968589d8	1187	* receiving the I2C module's acknowledgment of the request to enter stop mode,
Kojto	90:cb3d968589d8	1188	* the MCU determines whether to shut off the I2C module's clock. If the SHEN bit
Kojto	90:cb3d968589d8	1189	* is set to 1 and the I2C module is in an idle or disabled state when the MCU
Kojto	90:cb3d968589d8	1190	* signals to enter stop mode, the module immediately acknowledges the request to
Kojto	90:cb3d968589d8	1191	* enter stop mode. If SHEN is cleared to 0 and the overall data transmission or
Kojto	90:cb3d968589d8	1192	* reception that was suspended by stop mode entry was incomplete: To resume the
Kojto	90:cb3d968589d8	1193	* overall transmission or reception after the MCU exits stop mode, software must
Kojto	90:cb3d968589d8	1194	* reinitialize the transfer by resending the address of the slave. If the I2C
Kojto	90:cb3d968589d8	1195	* Control Register 1's IICIE bit was set to 1 before the MCU entered stop mode,
Kojto	90:cb3d968589d8	1196	* system software will receive the interrupt triggered by the I2C Status Register's
Kojto	90:cb3d968589d8	1197	* TCF bit after the MCU wakes from the stop mode.
Kojto	90:cb3d968589d8	1198	*
Kojto	90:cb3d968589d8	1199	* Values:
Kojto	90:cb3d968589d8	1200	* - 0 - Stop holdoff is disabled. The MCU's entry to stop mode is not gated.
Kojto	90:cb3d968589d8	1201	* - 1 - Stop holdoff is enabled.
Kojto	90:cb3d968589d8	1202	*/
Kojto	90:cb3d968589d8	1203	/@{/
Kojto	90:cb3d968589d8	1204	#define BP_I2C_FLT_SHEN (7U) /!< Bit position for I2C_FLT_SHEN. /
Kojto	90:cb3d968589d8	1205	#define BM_I2C_FLT_SHEN (0x80U) /!< Bit mask for I2C_FLT_SHEN. /
Kojto	90:cb3d968589d8	1206	#define BS_I2C_FLT_SHEN (1U) /!< Bit field size in bits for I2C_FLT_SHEN. /
Kojto	90:cb3d968589d8	1207
Kojto	90:cb3d968589d8	1208	/! @brief Read current value of the I2C_FLT_SHEN field. /
Kojto	90:cb3d968589d8	1209	#define BR_I2C_FLT_SHEN(x) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SHEN))
Kojto	90:cb3d968589d8	1210
Kojto	90:cb3d968589d8	1211	/! @brief Format value for bitfield I2C_FLT_SHEN. /
Kojto	90:cb3d968589d8	1212	#define BF_I2C_FLT_SHEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_SHEN) & BM_I2C_FLT_SHEN)
Kojto	90:cb3d968589d8	1213
Kojto	90:cb3d968589d8	1214	/! @brief Set the SHEN field to a new value. /
Kojto	90:cb3d968589d8	1215	#define BW_I2C_FLT_SHEN(x, v) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SHEN) = (v))
Kojto	90:cb3d968589d8	1216	/@}/
Kojto	90:cb3d968589d8	1217
Kojto	90:cb3d968589d8	1218	/*******************************************************************************
Kojto	90:cb3d968589d8	1219	* HW_I2C_RA - I2C Range Address register
Kojto	90:cb3d968589d8	1220	******************************************************************************/
Kojto	90:cb3d968589d8	1221
Kojto	90:cb3d968589d8	1222	/*!
Kojto	90:cb3d968589d8	1223	* @brief HW_I2C_RA - I2C Range Address register (RW)
Kojto	90:cb3d968589d8	1224	*
Kojto	90:cb3d968589d8	1225	* Reset value: 0x00U
Kojto	90:cb3d968589d8	1226	*/
Kojto	90:cb3d968589d8	1227	typedef union _hw_i2c_ra
Kojto	90:cb3d968589d8	1228	{
Kojto	90:cb3d968589d8	1229	uint8_t U;
Kojto	90:cb3d968589d8	1230	struct _hw_i2c_ra_bitfields
Kojto	90:cb3d968589d8	1231	{
Kojto	90:cb3d968589d8	1232	uint8_t RESERVED0 : 1; /!< [0] /
Kojto	90:cb3d968589d8	1233	uint8_t RAD : 7; /!< [7:1] Range Slave Address /
Kojto	90:cb3d968589d8	1234	} B;
Kojto	90:cb3d968589d8	1235	} hw_i2c_ra_t;
Kojto	90:cb3d968589d8	1236
Kojto	90:cb3d968589d8	1237	/*!
Kojto	90:cb3d968589d8	1238	* @name Constants and macros for entire I2C_RA register
Kojto	90:cb3d968589d8	1239	*/
Kojto	90:cb3d968589d8	1240	/@{/
Kojto	90:cb3d968589d8	1241	#define HW_I2C_RA_ADDR(x) ((x) + 0x7U)
Kojto	90:cb3d968589d8	1242
Kojto	90:cb3d968589d8	1243	#define HW_I2C_RA(x) ((__IO hw_i2c_ra_t ) HW_I2C_RA_ADDR(x))
Kojto	90:cb3d968589d8	1244	#define HW_I2C_RA_RD(x) (HW_I2C_RA(x).U)
Kojto	90:cb3d968589d8	1245	#define HW_I2C_RA_WR(x, v) (HW_I2C_RA(x).U = (v))
Kojto	90:cb3d968589d8	1246	#define HW_I2C_RA_SET(x, v) (HW_I2C_RA_WR(x, HW_I2C_RA_RD(x) \| (v)))
Kojto	90:cb3d968589d8	1247	#define HW_I2C_RA_CLR(x, v) (HW_I2C_RA_WR(x, HW_I2C_RA_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	1248	#define HW_I2C_RA_TOG(x, v) (HW_I2C_RA_WR(x, HW_I2C_RA_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	1249	/@}/
Kojto	90:cb3d968589d8	1250
Kojto	90:cb3d968589d8	1251	/*
Kojto	90:cb3d968589d8	1252	* Constants & macros for individual I2C_RA bitfields
Kojto	90:cb3d968589d8	1253	*/
Kojto	90:cb3d968589d8	1254
Kojto	90:cb3d968589d8	1255	/*!
Kojto	90:cb3d968589d8	1256	* @name Register I2C_RA, field RAD[7:1] (RW)
Kojto	90:cb3d968589d8	1257	*
Kojto	90:cb3d968589d8	1258	* This field contains the slave address to be used by the I2C module. The field
Kojto	90:cb3d968589d8	1259	* is used in the 7-bit address scheme. If I2C_C2[RMEN] is set to 1, any nonzero
Kojto	90:cb3d968589d8	1260	* value write enables this register. This register value can be considered as a
Kojto	90:cb3d968589d8	1261	* maximum boundary in the range matching mode.
Kojto	90:cb3d968589d8	1262	*/
Kojto	90:cb3d968589d8	1263	/@{/
Kojto	90:cb3d968589d8	1264	#define BP_I2C_RA_RAD (1U) /!< Bit position for I2C_RA_RAD. /
Kojto	90:cb3d968589d8	1265	#define BM_I2C_RA_RAD (0xFEU) /!< Bit mask for I2C_RA_RAD. /
Kojto	90:cb3d968589d8	1266	#define BS_I2C_RA_RAD (7U) /!< Bit field size in bits for I2C_RA_RAD. /
Kojto	90:cb3d968589d8	1267
Kojto	90:cb3d968589d8	1268	/! @brief Read current value of the I2C_RA_RAD field. /
Kojto	90:cb3d968589d8	1269	#define BR_I2C_RA_RAD(x) (HW_I2C_RA(x).B.RAD)
Kojto	90:cb3d968589d8	1270
Kojto	90:cb3d968589d8	1271	/! @brief Format value for bitfield I2C_RA_RAD. /
Kojto	90:cb3d968589d8	1272	#define BF_I2C_RA_RAD(v) ((uint8_t)((uint8_t)(v) << BP_I2C_RA_RAD) & BM_I2C_RA_RAD)
Kojto	90:cb3d968589d8	1273
Kojto	90:cb3d968589d8	1274	/! @brief Set the RAD field to a new value. /
Kojto	90:cb3d968589d8	1275	#define BW_I2C_RA_RAD(x, v) (HW_I2C_RA_WR(x, (HW_I2C_RA_RD(x) & ~BM_I2C_RA_RAD) \| BF_I2C_RA_RAD(v)))
Kojto	90:cb3d968589d8	1276	/@}/
Kojto	90:cb3d968589d8	1277
Kojto	90:cb3d968589d8	1278	/*******************************************************************************
Kojto	90:cb3d968589d8	1279	* HW_I2C_SMB - I2C SMBus Control and Status register
Kojto	90:cb3d968589d8	1280	******************************************************************************/
Kojto	90:cb3d968589d8	1281
Kojto	90:cb3d968589d8	1282	/*!
Kojto	90:cb3d968589d8	1283	* @brief HW_I2C_SMB - I2C SMBus Control and Status register (RW)
Kojto	90:cb3d968589d8	1284	*
Kojto	90:cb3d968589d8	1285	* Reset value: 0x00U
Kojto	90:cb3d968589d8	1286	*
Kojto	90:cb3d968589d8	1287	* When the SCL and SDA signals are held high for a length of time greater than
Kojto	90:cb3d968589d8	1288	* the high timeout period, the SHTF1 flag sets. Before reaching this threshold,
Kojto	90:cb3d968589d8	1289	* while the system is detecting how long these signals are being held high, a
Kojto	90:cb3d968589d8	1290	* master assumes that the bus is free. However, the SHTF1 bit is set to 1 in the
Kojto	90:cb3d968589d8	1291	* bus transmission process with the idle bus state. When the TCKSEL bit is set,
Kojto	90:cb3d968589d8	1292	* there is no need to monitor the SHTF1 bit because the bus speed is too high to
Kojto	90:cb3d968589d8	1293	* match the protocol of SMBus.
Kojto	90:cb3d968589d8	1294	*/
Kojto	90:cb3d968589d8	1295	typedef union _hw_i2c_smb
Kojto	90:cb3d968589d8	1296	{
Kojto	90:cb3d968589d8	1297	uint8_t U;
Kojto	90:cb3d968589d8	1298	struct _hw_i2c_smb_bitfields
Kojto	90:cb3d968589d8	1299	{
Kojto	90:cb3d968589d8	1300	uint8_t SHTF2IE : 1; /!< [0] SHTF2 Interrupt Enable /
Kojto	90:cb3d968589d8	1301	uint8_t SHTF2 : 1; /!< [1] SCL High Timeout Flag 2 /
Kojto	90:cb3d968589d8	1302	uint8_t SHTF1 : 1; /!< [2] SCL High Timeout Flag 1 /
Kojto	90:cb3d968589d8	1303	uint8_t SLTF : 1; /!< [3] SCL Low Timeout Flag /
Kojto	90:cb3d968589d8	1304	uint8_t TCKSEL : 1; /!< [4] Timeout Counter Clock Select /
Kojto	90:cb3d968589d8	1305	uint8_t SIICAEN : 1; /!< [5] Second I2C Address Enable /
Kojto	90:cb3d968589d8	1306	uint8_t ALERTEN : 1; /!< [6] SMBus Alert Response Address Enable /
Kojto	90:cb3d968589d8	1307	uint8_t FACK : 1; /!< [7] Fast NACK/ACK Enable /
Kojto	90:cb3d968589d8	1308	} B;
Kojto	90:cb3d968589d8	1309	} hw_i2c_smb_t;
Kojto	90:cb3d968589d8	1310
Kojto	90:cb3d968589d8	1311	/*!
Kojto	90:cb3d968589d8	1312	* @name Constants and macros for entire I2C_SMB register
Kojto	90:cb3d968589d8	1313	*/
Kojto	90:cb3d968589d8	1314	/@{/
Kojto	90:cb3d968589d8	1315	#define HW_I2C_SMB_ADDR(x) ((x) + 0x8U)
Kojto	90:cb3d968589d8	1316
Kojto	90:cb3d968589d8	1317	#define HW_I2C_SMB(x) ((__IO hw_i2c_smb_t ) HW_I2C_SMB_ADDR(x))
Kojto	90:cb3d968589d8	1318	#define HW_I2C_SMB_RD(x) (HW_I2C_SMB(x).U)
Kojto	90:cb3d968589d8	1319	#define HW_I2C_SMB_WR(x, v) (HW_I2C_SMB(x).U = (v))
Kojto	90:cb3d968589d8	1320	#define HW_I2C_SMB_SET(x, v) (HW_I2C_SMB_WR(x, HW_I2C_SMB_RD(x) \| (v)))
Kojto	90:cb3d968589d8	1321	#define HW_I2C_SMB_CLR(x, v) (HW_I2C_SMB_WR(x, HW_I2C_SMB_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	1322	#define HW_I2C_SMB_TOG(x, v) (HW_I2C_SMB_WR(x, HW_I2C_SMB_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	1323	/@}/
Kojto	90:cb3d968589d8	1324
Kojto	90:cb3d968589d8	1325	/*
Kojto	90:cb3d968589d8	1326	* Constants & macros for individual I2C_SMB bitfields
Kojto	90:cb3d968589d8	1327	*/
Kojto	90:cb3d968589d8	1328
Kojto	90:cb3d968589d8	1329	/*!
Kojto	90:cb3d968589d8	1330	* @name Register I2C_SMB, field SHTF2IE[0] (RW)
Kojto	90:cb3d968589d8	1331	*
Kojto	90:cb3d968589d8	1332	* Enables SCL high and SDA low timeout interrupt.
Kojto	90:cb3d968589d8	1333	*
Kojto	90:cb3d968589d8	1334	* Values:
Kojto	90:cb3d968589d8	1335	* - 0 - SHTF2 interrupt is disabled
Kojto	90:cb3d968589d8	1336	* - 1 - SHTF2 interrupt is enabled
Kojto	90:cb3d968589d8	1337	*/
Kojto	90:cb3d968589d8	1338	/@{/
Kojto	90:cb3d968589d8	1339	#define BP_I2C_SMB_SHTF2IE (0U) /!< Bit position for I2C_SMB_SHTF2IE. /
Kojto	90:cb3d968589d8	1340	#define BM_I2C_SMB_SHTF2IE (0x01U) /!< Bit mask for I2C_SMB_SHTF2IE. /
Kojto	90:cb3d968589d8	1341	#define BS_I2C_SMB_SHTF2IE (1U) /!< Bit field size in bits for I2C_SMB_SHTF2IE. /
Kojto	90:cb3d968589d8	1342
Kojto	90:cb3d968589d8	1343	/! @brief Read current value of the I2C_SMB_SHTF2IE field. /
Kojto	90:cb3d968589d8	1344	#define BR_I2C_SMB_SHTF2IE(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2IE))
Kojto	90:cb3d968589d8	1345
Kojto	90:cb3d968589d8	1346	/! @brief Format value for bitfield I2C_SMB_SHTF2IE. /
Kojto	90:cb3d968589d8	1347	#define BF_I2C_SMB_SHTF2IE(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_SHTF2IE) & BM_I2C_SMB_SHTF2IE)
Kojto	90:cb3d968589d8	1348
Kojto	90:cb3d968589d8	1349	/! @brief Set the SHTF2IE field to a new value. /
Kojto	90:cb3d968589d8	1350	#define BW_I2C_SMB_SHTF2IE(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2IE) = (v))
Kojto	90:cb3d968589d8	1351	/@}/
Kojto	90:cb3d968589d8	1352
Kojto	90:cb3d968589d8	1353	/*!
Kojto	90:cb3d968589d8	1354	* @name Register I2C_SMB, field SHTF2[1] (W1C)
Kojto	90:cb3d968589d8	1355	*
Kojto	90:cb3d968589d8	1356	* This bit sets when SCL is held high and SDA is held low more than clock *
Kojto	90:cb3d968589d8	1357	* LoValue / 512. Software clears this bit by writing 1 to it.
Kojto	90:cb3d968589d8	1358	*
Kojto	90:cb3d968589d8	1359	* Values:
Kojto	90:cb3d968589d8	1360	* - 0 - No SCL high and SDA low timeout occurs
Kojto	90:cb3d968589d8	1361	* - 1 - SCL high and SDA low timeout occurs
Kojto	90:cb3d968589d8	1362	*/
Kojto	90:cb3d968589d8	1363	/@{/
Kojto	90:cb3d968589d8	1364	#define BP_I2C_SMB_SHTF2 (1U) /!< Bit position for I2C_SMB_SHTF2. /
Kojto	90:cb3d968589d8	1365	#define BM_I2C_SMB_SHTF2 (0x02U) /!< Bit mask for I2C_SMB_SHTF2. /
Kojto	90:cb3d968589d8	1366	#define BS_I2C_SMB_SHTF2 (1U) /!< Bit field size in bits for I2C_SMB_SHTF2. /
Kojto	90:cb3d968589d8	1367
Kojto	90:cb3d968589d8	1368	/! @brief Read current value of the I2C_SMB_SHTF2 field. /
Kojto	90:cb3d968589d8	1369	#define BR_I2C_SMB_SHTF2(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2))
Kojto	90:cb3d968589d8	1370
Kojto	90:cb3d968589d8	1371	/! @brief Format value for bitfield I2C_SMB_SHTF2. /
Kojto	90:cb3d968589d8	1372	#define BF_I2C_SMB_SHTF2(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_SHTF2) & BM_I2C_SMB_SHTF2)
Kojto	90:cb3d968589d8	1373
Kojto	90:cb3d968589d8	1374	/! @brief Set the SHTF2 field to a new value. /
Kojto	90:cb3d968589d8	1375	#define BW_I2C_SMB_SHTF2(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2) = (v))
Kojto	90:cb3d968589d8	1376	/@}/
Kojto	90:cb3d968589d8	1377
Kojto	90:cb3d968589d8	1378	/*!
Kojto	90:cb3d968589d8	1379	* @name Register I2C_SMB, field SHTF1[2] (RO)
Kojto	90:cb3d968589d8	1380	*
Kojto	90:cb3d968589d8	1381	* This read-only bit sets when SCL and SDA are held high more than clock *
Kojto	90:cb3d968589d8	1382	* LoValue / 512, which indicates the bus is free. This bit is cleared automatically.
Kojto	90:cb3d968589d8	1383	*
Kojto	90:cb3d968589d8	1384	* Values:
Kojto	90:cb3d968589d8	1385	* - 0 - No SCL high and SDA high timeout occurs
Kojto	90:cb3d968589d8	1386	* - 1 - SCL high and SDA high timeout occurs
Kojto	90:cb3d968589d8	1387	*/
Kojto	90:cb3d968589d8	1388	/@{/
Kojto	90:cb3d968589d8	1389	#define BP_I2C_SMB_SHTF1 (2U) /!< Bit position for I2C_SMB_SHTF1. /
Kojto	90:cb3d968589d8	1390	#define BM_I2C_SMB_SHTF1 (0x04U) /!< Bit mask for I2C_SMB_SHTF1. /
Kojto	90:cb3d968589d8	1391	#define BS_I2C_SMB_SHTF1 (1U) /!< Bit field size in bits for I2C_SMB_SHTF1. /
Kojto	90:cb3d968589d8	1392
Kojto	90:cb3d968589d8	1393	/! @brief Read current value of the I2C_SMB_SHTF1 field. /
Kojto	90:cb3d968589d8	1394	#define BR_I2C_SMB_SHTF1(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF1))
Kojto	90:cb3d968589d8	1395	/@}/
Kojto	90:cb3d968589d8	1396
Kojto	90:cb3d968589d8	1397	/*!
Kojto	90:cb3d968589d8	1398	* @name Register I2C_SMB, field SLTF[3] (W1C)
Kojto	90:cb3d968589d8	1399	*
Kojto	90:cb3d968589d8	1400	* This bit is set when the SLT register (consisting of the SLTH and SLTL
Kojto	90:cb3d968589d8	1401	* registers) is loaded with a non-zero value (LoValue) and an SCL low timeout occurs.
Kojto	90:cb3d968589d8	1402	* Software clears this bit by writing a logic 1 to it. The low timeout function
Kojto	90:cb3d968589d8	1403	* is disabled when the SLT register's value is 0.
Kojto	90:cb3d968589d8	1404	*
Kojto	90:cb3d968589d8	1405	* Values:
Kojto	90:cb3d968589d8	1406	* - 0 - No low timeout occurs
Kojto	90:cb3d968589d8	1407	* - 1 - Low timeout occurs
Kojto	90:cb3d968589d8	1408	*/
Kojto	90:cb3d968589d8	1409	/@{/
Kojto	90:cb3d968589d8	1410	#define BP_I2C_SMB_SLTF (3U) /!< Bit position for I2C_SMB_SLTF. /
Kojto	90:cb3d968589d8	1411	#define BM_I2C_SMB_SLTF (0x08U) /!< Bit mask for I2C_SMB_SLTF. /
Kojto	90:cb3d968589d8	1412	#define BS_I2C_SMB_SLTF (1U) /!< Bit field size in bits for I2C_SMB_SLTF. /
Kojto	90:cb3d968589d8	1413
Kojto	90:cb3d968589d8	1414	/! @brief Read current value of the I2C_SMB_SLTF field. /
Kojto	90:cb3d968589d8	1415	#define BR_I2C_SMB_SLTF(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SLTF))
Kojto	90:cb3d968589d8	1416
Kojto	90:cb3d968589d8	1417	/! @brief Format value for bitfield I2C_SMB_SLTF. /
Kojto	90:cb3d968589d8	1418	#define BF_I2C_SMB_SLTF(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_SLTF) & BM_I2C_SMB_SLTF)
Kojto	90:cb3d968589d8	1419
Kojto	90:cb3d968589d8	1420	/! @brief Set the SLTF field to a new value. /
Kojto	90:cb3d968589d8	1421	#define BW_I2C_SMB_SLTF(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SLTF) = (v))
Kojto	90:cb3d968589d8	1422	/@}/
Kojto	90:cb3d968589d8	1423
Kojto	90:cb3d968589d8	1424	/*!
Kojto	90:cb3d968589d8	1425	* @name Register I2C_SMB, field TCKSEL[4] (RW)
Kojto	90:cb3d968589d8	1426	*
Kojto	90:cb3d968589d8	1427	* Selects the clock source of the timeout counter.
Kojto	90:cb3d968589d8	1428	*
Kojto	90:cb3d968589d8	1429	* Values:
Kojto	90:cb3d968589d8	1430	* - 0 - Timeout counter counts at the frequency of the I2C module clock / 64
Kojto	90:cb3d968589d8	1431	* - 1 - Timeout counter counts at the frequency of the I2C module clock
Kojto	90:cb3d968589d8	1432	*/
Kojto	90:cb3d968589d8	1433	/@{/
Kojto	90:cb3d968589d8	1434	#define BP_I2C_SMB_TCKSEL (4U) /!< Bit position for I2C_SMB_TCKSEL. /
Kojto	90:cb3d968589d8	1435	#define BM_I2C_SMB_TCKSEL (0x10U) /!< Bit mask for I2C_SMB_TCKSEL. /
Kojto	90:cb3d968589d8	1436	#define BS_I2C_SMB_TCKSEL (1U) /!< Bit field size in bits for I2C_SMB_TCKSEL. /
Kojto	90:cb3d968589d8	1437
Kojto	90:cb3d968589d8	1438	/! @brief Read current value of the I2C_SMB_TCKSEL field. /
Kojto	90:cb3d968589d8	1439	#define BR_I2C_SMB_TCKSEL(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_TCKSEL))
Kojto	90:cb3d968589d8	1440
Kojto	90:cb3d968589d8	1441	/! @brief Format value for bitfield I2C_SMB_TCKSEL. /
Kojto	90:cb3d968589d8	1442	#define BF_I2C_SMB_TCKSEL(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_TCKSEL) & BM_I2C_SMB_TCKSEL)
Kojto	90:cb3d968589d8	1443
Kojto	90:cb3d968589d8	1444	/! @brief Set the TCKSEL field to a new value. /
Kojto	90:cb3d968589d8	1445	#define BW_I2C_SMB_TCKSEL(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_TCKSEL) = (v))
Kojto	90:cb3d968589d8	1446	/@}/
Kojto	90:cb3d968589d8	1447
Kojto	90:cb3d968589d8	1448	/*!
Kojto	90:cb3d968589d8	1449	* @name Register I2C_SMB, field SIICAEN[5] (RW)
Kojto	90:cb3d968589d8	1450	*
Kojto	90:cb3d968589d8	1451	* Enables or disables SMBus device default address.
Kojto	90:cb3d968589d8	1452	*
Kojto	90:cb3d968589d8	1453	* Values:
Kojto	90:cb3d968589d8	1454	* - 0 - I2C address register 2 matching is disabled
Kojto	90:cb3d968589d8	1455	* - 1 - I2C address register 2 matching is enabled
Kojto	90:cb3d968589d8	1456	*/
Kojto	90:cb3d968589d8	1457	/@{/
Kojto	90:cb3d968589d8	1458	#define BP_I2C_SMB_SIICAEN (5U) /!< Bit position for I2C_SMB_SIICAEN. /
Kojto	90:cb3d968589d8	1459	#define BM_I2C_SMB_SIICAEN (0x20U) /!< Bit mask for I2C_SMB_SIICAEN. /
Kojto	90:cb3d968589d8	1460	#define BS_I2C_SMB_SIICAEN (1U) /!< Bit field size in bits for I2C_SMB_SIICAEN. /
Kojto	90:cb3d968589d8	1461
Kojto	90:cb3d968589d8	1462	/! @brief Read current value of the I2C_SMB_SIICAEN field. /
Kojto	90:cb3d968589d8	1463	#define BR_I2C_SMB_SIICAEN(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SIICAEN))
Kojto	90:cb3d968589d8	1464
Kojto	90:cb3d968589d8	1465	/! @brief Format value for bitfield I2C_SMB_SIICAEN. /
Kojto	90:cb3d968589d8	1466	#define BF_I2C_SMB_SIICAEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_SIICAEN) & BM_I2C_SMB_SIICAEN)
Kojto	90:cb3d968589d8	1467
Kojto	90:cb3d968589d8	1468	/! @brief Set the SIICAEN field to a new value. /
Kojto	90:cb3d968589d8	1469	#define BW_I2C_SMB_SIICAEN(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SIICAEN) = (v))
Kojto	90:cb3d968589d8	1470	/@}/
Kojto	90:cb3d968589d8	1471
Kojto	90:cb3d968589d8	1472	/*!
Kojto	90:cb3d968589d8	1473	* @name Register I2C_SMB, field ALERTEN[6] (RW)
Kojto	90:cb3d968589d8	1474	*
Kojto	90:cb3d968589d8	1475	* Enables or disables SMBus alert response address matching. After the host
Kojto	90:cb3d968589d8	1476	* responds to a device that used the alert response address, you must use software
Kojto	90:cb3d968589d8	1477	* to put the device's address on the bus. The alert protocol is described in the
Kojto	90:cb3d968589d8	1478	* SMBus specification.
Kojto	90:cb3d968589d8	1479	*
Kojto	90:cb3d968589d8	1480	* Values:
Kojto	90:cb3d968589d8	1481	* - 0 - SMBus alert response address matching is disabled
Kojto	90:cb3d968589d8	1482	* - 1 - SMBus alert response address matching is enabled
Kojto	90:cb3d968589d8	1483	*/
Kojto	90:cb3d968589d8	1484	/@{/
Kojto	90:cb3d968589d8	1485	#define BP_I2C_SMB_ALERTEN (6U) /!< Bit position for I2C_SMB_ALERTEN. /
Kojto	90:cb3d968589d8	1486	#define BM_I2C_SMB_ALERTEN (0x40U) /!< Bit mask for I2C_SMB_ALERTEN. /
Kojto	90:cb3d968589d8	1487	#define BS_I2C_SMB_ALERTEN (1U) /!< Bit field size in bits for I2C_SMB_ALERTEN. /
Kojto	90:cb3d968589d8	1488
Kojto	90:cb3d968589d8	1489	/! @brief Read current value of the I2C_SMB_ALERTEN field. /
Kojto	90:cb3d968589d8	1490	#define BR_I2C_SMB_ALERTEN(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_ALERTEN))
Kojto	90:cb3d968589d8	1491
Kojto	90:cb3d968589d8	1492	/! @brief Format value for bitfield I2C_SMB_ALERTEN. /
Kojto	90:cb3d968589d8	1493	#define BF_I2C_SMB_ALERTEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_ALERTEN) & BM_I2C_SMB_ALERTEN)
Kojto	90:cb3d968589d8	1494
Kojto	90:cb3d968589d8	1495	/! @brief Set the ALERTEN field to a new value. /
Kojto	90:cb3d968589d8	1496	#define BW_I2C_SMB_ALERTEN(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_ALERTEN) = (v))
Kojto	90:cb3d968589d8	1497	/@}/
Kojto	90:cb3d968589d8	1498
Kojto	90:cb3d968589d8	1499	/*!
Kojto	90:cb3d968589d8	1500	* @name Register I2C_SMB, field FACK[7] (RW)
Kojto	90:cb3d968589d8	1501	*
Kojto	90:cb3d968589d8	1502	* For SMBus packet error checking, the CPU must be able to issue an ACK or NACK
Kojto	90:cb3d968589d8	1503	* according to the result of receiving data byte.
Kojto	90:cb3d968589d8	1504	*
Kojto	90:cb3d968589d8	1505	* Values:
Kojto	90:cb3d968589d8	1506	* - 0 - An ACK or NACK is sent on the following receiving data byte
Kojto	90:cb3d968589d8	1507	* - 1 - Writing 0 to TXAK after receiving a data byte generates an ACK. Writing
Kojto	90:cb3d968589d8	1508	* 1 to TXAK after receiving a data byte generates a NACK.
Kojto	90:cb3d968589d8	1509	*/
Kojto	90:cb3d968589d8	1510	/@{/
Kojto	90:cb3d968589d8	1511	#define BP_I2C_SMB_FACK (7U) /!< Bit position for I2C_SMB_FACK. /
Kojto	90:cb3d968589d8	1512	#define BM_I2C_SMB_FACK (0x80U) /!< Bit mask for I2C_SMB_FACK. /
Kojto	90:cb3d968589d8	1513	#define BS_I2C_SMB_FACK (1U) /!< Bit field size in bits for I2C_SMB_FACK. /
Kojto	90:cb3d968589d8	1514
Kojto	90:cb3d968589d8	1515	/! @brief Read current value of the I2C_SMB_FACK field. /
Kojto	90:cb3d968589d8	1516	#define BR_I2C_SMB_FACK(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_FACK))
Kojto	90:cb3d968589d8	1517
Kojto	90:cb3d968589d8	1518	/! @brief Format value for bitfield I2C_SMB_FACK. /
Kojto	90:cb3d968589d8	1519	#define BF_I2C_SMB_FACK(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_FACK) & BM_I2C_SMB_FACK)
Kojto	90:cb3d968589d8	1520
Kojto	90:cb3d968589d8	1521	/! @brief Set the FACK field to a new value. /
Kojto	90:cb3d968589d8	1522	#define BW_I2C_SMB_FACK(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_FACK) = (v))
Kojto	90:cb3d968589d8	1523	/@}/
Kojto	90:cb3d968589d8	1524
Kojto	90:cb3d968589d8	1525	/*******************************************************************************
Kojto	90:cb3d968589d8	1526	* HW_I2C_A2 - I2C Address Register 2
Kojto	90:cb3d968589d8	1527	******************************************************************************/
Kojto	90:cb3d968589d8	1528
Kojto	90:cb3d968589d8	1529	/*!
Kojto	90:cb3d968589d8	1530	* @brief HW_I2C_A2 - I2C Address Register 2 (RW)
Kojto	90:cb3d968589d8	1531	*
Kojto	90:cb3d968589d8	1532	* Reset value: 0xC2U
Kojto	90:cb3d968589d8	1533	*/
Kojto	90:cb3d968589d8	1534	typedef union _hw_i2c_a2
Kojto	90:cb3d968589d8	1535	{
Kojto	90:cb3d968589d8	1536	uint8_t U;
Kojto	90:cb3d968589d8	1537	struct _hw_i2c_a2_bitfields
Kojto	90:cb3d968589d8	1538	{
Kojto	90:cb3d968589d8	1539	uint8_t RESERVED0 : 1; /!< [0] /
Kojto	90:cb3d968589d8	1540	uint8_t SAD : 7; /!< [7:1] SMBus Address /
Kojto	90:cb3d968589d8	1541	} B;
Kojto	90:cb3d968589d8	1542	} hw_i2c_a2_t;
Kojto	90:cb3d968589d8	1543
Kojto	90:cb3d968589d8	1544	/*!
Kojto	90:cb3d968589d8	1545	* @name Constants and macros for entire I2C_A2 register
Kojto	90:cb3d968589d8	1546	*/
Kojto	90:cb3d968589d8	1547	/@{/
Kojto	90:cb3d968589d8	1548	#define HW_I2C_A2_ADDR(x) ((x) + 0x9U)
Kojto	90:cb3d968589d8	1549
Kojto	90:cb3d968589d8	1550	#define HW_I2C_A2(x) ((__IO hw_i2c_a2_t ) HW_I2C_A2_ADDR(x))
Kojto	90:cb3d968589d8	1551	#define HW_I2C_A2_RD(x) (HW_I2C_A2(x).U)
Kojto	90:cb3d968589d8	1552	#define HW_I2C_A2_WR(x, v) (HW_I2C_A2(x).U = (v))
Kojto	90:cb3d968589d8	1553	#define HW_I2C_A2_SET(x, v) (HW_I2C_A2_WR(x, HW_I2C_A2_RD(x) \| (v)))
Kojto	90:cb3d968589d8	1554	#define HW_I2C_A2_CLR(x, v) (HW_I2C_A2_WR(x, HW_I2C_A2_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	1555	#define HW_I2C_A2_TOG(x, v) (HW_I2C_A2_WR(x, HW_I2C_A2_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	1556	/@}/
Kojto	90:cb3d968589d8	1557
Kojto	90:cb3d968589d8	1558	/*
Kojto	90:cb3d968589d8	1559	* Constants & macros for individual I2C_A2 bitfields
Kojto	90:cb3d968589d8	1560	*/
Kojto	90:cb3d968589d8	1561
Kojto	90:cb3d968589d8	1562	/*!
Kojto	90:cb3d968589d8	1563	* @name Register I2C_A2, field SAD[7:1] (RW)
Kojto	90:cb3d968589d8	1564	*
Kojto	90:cb3d968589d8	1565	* Contains the slave address used by the SMBus. This field is used on the
Kojto	90:cb3d968589d8	1566	* device default address or other related addresses.
Kojto	90:cb3d968589d8	1567	*/
Kojto	90:cb3d968589d8	1568	/@{/
Kojto	90:cb3d968589d8	1569	#define BP_I2C_A2_SAD (1U) /!< Bit position for I2C_A2_SAD. /
Kojto	90:cb3d968589d8	1570	#define BM_I2C_A2_SAD (0xFEU) /!< Bit mask for I2C_A2_SAD. /
Kojto	90:cb3d968589d8	1571	#define BS_I2C_A2_SAD (7U) /!< Bit field size in bits for I2C_A2_SAD. /
Kojto	90:cb3d968589d8	1572
Kojto	90:cb3d968589d8	1573	/! @brief Read current value of the I2C_A2_SAD field. /
Kojto	90:cb3d968589d8	1574	#define BR_I2C_A2_SAD(x) (HW_I2C_A2(x).B.SAD)
Kojto	90:cb3d968589d8	1575
Kojto	90:cb3d968589d8	1576	/! @brief Format value for bitfield I2C_A2_SAD. /
Kojto	90:cb3d968589d8	1577	#define BF_I2C_A2_SAD(v) ((uint8_t)((uint8_t)(v) << BP_I2C_A2_SAD) & BM_I2C_A2_SAD)
Kojto	90:cb3d968589d8	1578
Kojto	90:cb3d968589d8	1579	/! @brief Set the SAD field to a new value. /
Kojto	90:cb3d968589d8	1580	#define BW_I2C_A2_SAD(x, v) (HW_I2C_A2_WR(x, (HW_I2C_A2_RD(x) & ~BM_I2C_A2_SAD) \| BF_I2C_A2_SAD(v)))
Kojto	90:cb3d968589d8	1581	/@}/
Kojto	90:cb3d968589d8	1582
Kojto	90:cb3d968589d8	1583	/*******************************************************************************
Kojto	90:cb3d968589d8	1584	* HW_I2C_SLTH - I2C SCL Low Timeout Register High
Kojto	90:cb3d968589d8	1585	******************************************************************************/
Kojto	90:cb3d968589d8	1586
Kojto	90:cb3d968589d8	1587	/*!
Kojto	90:cb3d968589d8	1588	* @brief HW_I2C_SLTH - I2C SCL Low Timeout Register High (RW)
Kojto	90:cb3d968589d8	1589	*
Kojto	90:cb3d968589d8	1590	* Reset value: 0x00U
Kojto	90:cb3d968589d8	1591	*/
Kojto	90:cb3d968589d8	1592	typedef union _hw_i2c_slth
Kojto	90:cb3d968589d8	1593	{
Kojto	90:cb3d968589d8	1594	uint8_t U;
Kojto	90:cb3d968589d8	1595	struct _hw_i2c_slth_bitfields
Kojto	90:cb3d968589d8	1596	{
Kojto	90:cb3d968589d8	1597	uint8_t SSLT : 8; /!< [7:0] /
Kojto	90:cb3d968589d8	1598	} B;
Kojto	90:cb3d968589d8	1599	} hw_i2c_slth_t;
Kojto	90:cb3d968589d8	1600
Kojto	90:cb3d968589d8	1601	/*!
Kojto	90:cb3d968589d8	1602	* @name Constants and macros for entire I2C_SLTH register
Kojto	90:cb3d968589d8	1603	*/
Kojto	90:cb3d968589d8	1604	/@{/
Kojto	90:cb3d968589d8	1605	#define HW_I2C_SLTH_ADDR(x) ((x) + 0xAU)
Kojto	90:cb3d968589d8	1606
Kojto	90:cb3d968589d8	1607	#define HW_I2C_SLTH(x) ((__IO hw_i2c_slth_t ) HW_I2C_SLTH_ADDR(x))
Kojto	90:cb3d968589d8	1608	#define HW_I2C_SLTH_RD(x) (HW_I2C_SLTH(x).U)
Kojto	90:cb3d968589d8	1609	#define HW_I2C_SLTH_WR(x, v) (HW_I2C_SLTH(x).U = (v))
Kojto	90:cb3d968589d8	1610	#define HW_I2C_SLTH_SET(x, v) (HW_I2C_SLTH_WR(x, HW_I2C_SLTH_RD(x) \| (v)))
Kojto	90:cb3d968589d8	1611	#define HW_I2C_SLTH_CLR(x, v) (HW_I2C_SLTH_WR(x, HW_I2C_SLTH_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	1612	#define HW_I2C_SLTH_TOG(x, v) (HW_I2C_SLTH_WR(x, HW_I2C_SLTH_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	1613	/@}/
Kojto	90:cb3d968589d8	1614
Kojto	90:cb3d968589d8	1615	/*
Kojto	90:cb3d968589d8	1616	* Constants & macros for individual I2C_SLTH bitfields
Kojto	90:cb3d968589d8	1617	*/
Kojto	90:cb3d968589d8	1618
Kojto	90:cb3d968589d8	1619	/*!
Kojto	90:cb3d968589d8	1620	* @name Register I2C_SLTH, field SSLT[7:0] (RW)
Kojto	90:cb3d968589d8	1621	*
Kojto	90:cb3d968589d8	1622	* Most significant byte of SCL low timeout value that determines the timeout
Kojto	90:cb3d968589d8	1623	* period of SCL low.
Kojto	90:cb3d968589d8	1624	*/
Kojto	90:cb3d968589d8	1625	/@{/
Kojto	90:cb3d968589d8	1626	#define BP_I2C_SLTH_SSLT (0U) /!< Bit position for I2C_SLTH_SSLT. /
Kojto	90:cb3d968589d8	1627	#define BM_I2C_SLTH_SSLT (0xFFU) /!< Bit mask for I2C_SLTH_SSLT. /
Kojto	90:cb3d968589d8	1628	#define BS_I2C_SLTH_SSLT (8U) /!< Bit field size in bits for I2C_SLTH_SSLT. /
Kojto	90:cb3d968589d8	1629
Kojto	90:cb3d968589d8	1630	/! @brief Read current value of the I2C_SLTH_SSLT field. /
Kojto	90:cb3d968589d8	1631	#define BR_I2C_SLTH_SSLT(x) (HW_I2C_SLTH(x).U)
Kojto	90:cb3d968589d8	1632
Kojto	90:cb3d968589d8	1633	/! @brief Format value for bitfield I2C_SLTH_SSLT. /
Kojto	90:cb3d968589d8	1634	#define BF_I2C_SLTH_SSLT(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SLTH_SSLT) & BM_I2C_SLTH_SSLT)
Kojto	90:cb3d968589d8	1635
Kojto	90:cb3d968589d8	1636	/! @brief Set the SSLT field to a new value. /
Kojto	90:cb3d968589d8	1637	#define BW_I2C_SLTH_SSLT(x, v) (HW_I2C_SLTH_WR(x, v))
Kojto	90:cb3d968589d8	1638	/@}/
Kojto	90:cb3d968589d8	1639
Kojto	90:cb3d968589d8	1640	/*******************************************************************************
Kojto	90:cb3d968589d8	1641	* HW_I2C_SLTL - I2C SCL Low Timeout Register Low
Kojto	90:cb3d968589d8	1642	******************************************************************************/
Kojto	90:cb3d968589d8	1643
Kojto	90:cb3d968589d8	1644	/*!
Kojto	90:cb3d968589d8	1645	* @brief HW_I2C_SLTL - I2C SCL Low Timeout Register Low (RW)
Kojto	90:cb3d968589d8	1646	*
Kojto	90:cb3d968589d8	1647	* Reset value: 0x00U
Kojto	90:cb3d968589d8	1648	*/
Kojto	90:cb3d968589d8	1649	typedef union _hw_i2c_sltl
Kojto	90:cb3d968589d8	1650	{
Kojto	90:cb3d968589d8	1651	uint8_t U;
Kojto	90:cb3d968589d8	1652	struct _hw_i2c_sltl_bitfields
Kojto	90:cb3d968589d8	1653	{
Kojto	90:cb3d968589d8	1654	uint8_t SSLT : 8; /!< [7:0] /
Kojto	90:cb3d968589d8	1655	} B;
Kojto	90:cb3d968589d8	1656	} hw_i2c_sltl_t;
Kojto	90:cb3d968589d8	1657
Kojto	90:cb3d968589d8	1658	/*!
Kojto	90:cb3d968589d8	1659	* @name Constants and macros for entire I2C_SLTL register
Kojto	90:cb3d968589d8	1660	*/
Kojto	90:cb3d968589d8	1661	/@{/
Kojto	90:cb3d968589d8	1662	#define HW_I2C_SLTL_ADDR(x) ((x) + 0xBU)
Kojto	90:cb3d968589d8	1663
Kojto	90:cb3d968589d8	1664	#define HW_I2C_SLTL(x) ((__IO hw_i2c_sltl_t ) HW_I2C_SLTL_ADDR(x))
Kojto	90:cb3d968589d8	1665	#define HW_I2C_SLTL_RD(x) (HW_I2C_SLTL(x).U)
Kojto	90:cb3d968589d8	1666	#define HW_I2C_SLTL_WR(x, v) (HW_I2C_SLTL(x).U = (v))
Kojto	90:cb3d968589d8	1667	#define HW_I2C_SLTL_SET(x, v) (HW_I2C_SLTL_WR(x, HW_I2C_SLTL_RD(x) \| (v)))
Kojto	90:cb3d968589d8	1668	#define HW_I2C_SLTL_CLR(x, v) (HW_I2C_SLTL_WR(x, HW_I2C_SLTL_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	1669	#define HW_I2C_SLTL_TOG(x, v) (HW_I2C_SLTL_WR(x, HW_I2C_SLTL_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	1670	/@}/
Kojto	90:cb3d968589d8	1671
Kojto	90:cb3d968589d8	1672	/*
Kojto	90:cb3d968589d8	1673	* Constants & macros for individual I2C_SLTL bitfields
Kojto	90:cb3d968589d8	1674	*/
Kojto	90:cb3d968589d8	1675
Kojto	90:cb3d968589d8	1676	/*!
Kojto	90:cb3d968589d8	1677	* @name Register I2C_SLTL, field SSLT[7:0] (RW)
Kojto	90:cb3d968589d8	1678	*
Kojto	90:cb3d968589d8	1679	* Least significant byte of SCL low timeout value that determines the timeout
Kojto	90:cb3d968589d8	1680	* period of SCL low.
Kojto	90:cb3d968589d8	1681	*/
Kojto	90:cb3d968589d8	1682	/@{/
Kojto	90:cb3d968589d8	1683	#define BP_I2C_SLTL_SSLT (0U) /!< Bit position for I2C_SLTL_SSLT. /
Kojto	90:cb3d968589d8	1684	#define BM_I2C_SLTL_SSLT (0xFFU) /!< Bit mask for I2C_SLTL_SSLT. /
Kojto	90:cb3d968589d8	1685	#define BS_I2C_SLTL_SSLT (8U) /!< Bit field size in bits for I2C_SLTL_SSLT. /
Kojto	90:cb3d968589d8	1686
Kojto	90:cb3d968589d8	1687	/! @brief Read current value of the I2C_SLTL_SSLT field. /
Kojto	90:cb3d968589d8	1688	#define BR_I2C_SLTL_SSLT(x) (HW_I2C_SLTL(x).U)
Kojto	90:cb3d968589d8	1689
Kojto	90:cb3d968589d8	1690	/! @brief Format value for bitfield I2C_SLTL_SSLT. /
Kojto	90:cb3d968589d8	1691	#define BF_I2C_SLTL_SSLT(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SLTL_SSLT) & BM_I2C_SLTL_SSLT)
Kojto	90:cb3d968589d8	1692
Kojto	90:cb3d968589d8	1693	/! @brief Set the SSLT field to a new value. /
Kojto	90:cb3d968589d8	1694	#define BW_I2C_SLTL_SSLT(x, v) (HW_I2C_SLTL_WR(x, v))
Kojto	90:cb3d968589d8	1695	/@}/
Kojto	90:cb3d968589d8	1696
Kojto	90:cb3d968589d8	1697	/*******************************************************************************
Kojto	90:cb3d968589d8	1698	* hw_i2c_t - module struct
Kojto	90:cb3d968589d8	1699	******************************************************************************/
Kojto	90:cb3d968589d8	1700	/*!
Kojto	90:cb3d968589d8	1701	* @brief All I2C module registers.
Kojto	90:cb3d968589d8	1702	*/
Kojto	90:cb3d968589d8	1703	#pragma pack(1)
Kojto	90:cb3d968589d8	1704	typedef struct _hw_i2c
Kojto	90:cb3d968589d8	1705	{
Kojto	90:cb3d968589d8	1706	__IO hw_i2c_a1_t A1; /!< [0x0] I2C Address Register 1 /
Kojto	90:cb3d968589d8	1707	__IO hw_i2c_f_t F; /!< [0x1] I2C Frequency Divider register /
Kojto	90:cb3d968589d8	1708	__IO hw_i2c_c1_t C1; /!< [0x2] I2C Control Register 1 /
Kojto	90:cb3d968589d8	1709	__IO hw_i2c_s_t S; /!< [0x3] I2C Status register /
Kojto	90:cb3d968589d8	1710	__IO hw_i2c_d_t D; /!< [0x4] I2C Data I/O register /
Kojto	90:cb3d968589d8	1711	__IO hw_i2c_c2_t C2; /!< [0x5] I2C Control Register 2 /
Kojto	90:cb3d968589d8	1712	__IO hw_i2c_flt_t FLT; /!< [0x6] I2C Programmable Input Glitch Filter register /
Kojto	90:cb3d968589d8	1713	__IO hw_i2c_ra_t RA; /!< [0x7] I2C Range Address register /
Kojto	90:cb3d968589d8	1714	__IO hw_i2c_smb_t SMB; /!< [0x8] I2C SMBus Control and Status register /
Kojto	90:cb3d968589d8	1715	__IO hw_i2c_a2_t A2; /!< [0x9] I2C Address Register 2 /
Kojto	90:cb3d968589d8	1716	__IO hw_i2c_slth_t SLTH; /!< [0xA] I2C SCL Low Timeout Register High /
Kojto	90:cb3d968589d8	1717	__IO hw_i2c_sltl_t SLTL; /!< [0xB] I2C SCL Low Timeout Register Low /
Kojto	90:cb3d968589d8	1718	} hw_i2c_t;
Kojto	90:cb3d968589d8	1719	#pragma pack()
Kojto	90:cb3d968589d8	1720
Kojto	90:cb3d968589d8	1721	/! @brief Macro to access all I2C registers. /
Kojto	90:cb3d968589d8	1722	/! @param x I2C module instance base address. /
Kojto	90:cb3d968589d8	1723	/*! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
Kojto	90:cb3d968589d8	1724	* use the '&' operator, like <code>&HW_I2C(I2C0_BASE)</code>. */
Kojto	90:cb3d968589d8	1725	#define HW_I2C(x) ((hw_i2c_t )(x))
Kojto	90:cb3d968589d8	1726
Kojto	90:cb3d968589d8	1727	#endif /* __HW_I2C_REGISTERS_H__ */
Kojto	90:cb3d968589d8	1728	/* EOF */