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TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_ftfe.h@104:b9ad9a133dc7, 2015-08-05 (annotated)
- Committer:
- Kojto
- Date:
- Wed Aug 05 13:16:35 2015 +0100
- Revision:
- 104:b9ad9a133dc7
- Parent:
- 90:cb3d968589d8
Release 104 of the mbed library:
Changes:
- new platforms: nrf51 microbit
- MAXxxx - fix pwm array search
- LPC8xx - usart enable fix
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Kojto | 90:cb3d968589d8 | 1 | /* |
Kojto | 90:cb3d968589d8 | 2 | ** ################################################################### |
Kojto | 90:cb3d968589d8 | 3 | ** Compilers: Keil ARM C/C++ Compiler |
Kojto | 90:cb3d968589d8 | 4 | ** Freescale C/C++ for Embedded ARM |
Kojto | 90:cb3d968589d8 | 5 | ** GNU C Compiler |
Kojto | 90:cb3d968589d8 | 6 | ** IAR ANSI C/C++ Compiler for ARM |
Kojto | 90:cb3d968589d8 | 7 | ** |
Kojto | 90:cb3d968589d8 | 8 | ** Reference manual: K64P144M120SF5RM, Rev.2, January 2014 |
Kojto | 90:cb3d968589d8 | 9 | ** Version: rev. 2.5, 2014-02-10 |
Kojto | 90:cb3d968589d8 | 10 | ** Build: b140604 |
Kojto | 90:cb3d968589d8 | 11 | ** |
Kojto | 90:cb3d968589d8 | 12 | ** Abstract: |
Kojto | 90:cb3d968589d8 | 13 | ** Extension to the CMSIS register access layer header. |
Kojto | 90:cb3d968589d8 | 14 | ** |
Kojto | 90:cb3d968589d8 | 15 | ** Copyright (c) 2014 Freescale Semiconductor, Inc. |
Kojto | 90:cb3d968589d8 | 16 | ** All rights reserved. |
Kojto | 90:cb3d968589d8 | 17 | ** |
Kojto | 90:cb3d968589d8 | 18 | ** Redistribution and use in source and binary forms, with or without modification, |
Kojto | 90:cb3d968589d8 | 19 | ** are permitted provided that the following conditions are met: |
Kojto | 90:cb3d968589d8 | 20 | ** |
Kojto | 90:cb3d968589d8 | 21 | ** o Redistributions of source code must retain the above copyright notice, this list |
Kojto | 90:cb3d968589d8 | 22 | ** of conditions and the following disclaimer. |
Kojto | 90:cb3d968589d8 | 23 | ** |
Kojto | 90:cb3d968589d8 | 24 | ** o Redistributions in binary form must reproduce the above copyright notice, this |
Kojto | 90:cb3d968589d8 | 25 | ** list of conditions and the following disclaimer in the documentation and/or |
Kojto | 90:cb3d968589d8 | 26 | ** other materials provided with the distribution. |
Kojto | 90:cb3d968589d8 | 27 | ** |
Kojto | 90:cb3d968589d8 | 28 | ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
Kojto | 90:cb3d968589d8 | 29 | ** contributors may be used to endorse or promote products derived from this |
Kojto | 90:cb3d968589d8 | 30 | ** software without specific prior written permission. |
Kojto | 90:cb3d968589d8 | 31 | ** |
Kojto | 90:cb3d968589d8 | 32 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
Kojto | 90:cb3d968589d8 | 33 | ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
Kojto | 90:cb3d968589d8 | 34 | ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Kojto | 90:cb3d968589d8 | 35 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
Kojto | 90:cb3d968589d8 | 36 | ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
Kojto | 90:cb3d968589d8 | 37 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
Kojto | 90:cb3d968589d8 | 38 | ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
Kojto | 90:cb3d968589d8 | 39 | ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
Kojto | 90:cb3d968589d8 | 40 | ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
Kojto | 90:cb3d968589d8 | 41 | ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Kojto | 90:cb3d968589d8 | 42 | ** |
Kojto | 90:cb3d968589d8 | 43 | ** http: www.freescale.com |
Kojto | 90:cb3d968589d8 | 44 | ** mail: support@freescale.com |
Kojto | 90:cb3d968589d8 | 45 | ** |
Kojto | 90:cb3d968589d8 | 46 | ** Revisions: |
Kojto | 90:cb3d968589d8 | 47 | ** - rev. 1.0 (2013-08-12) |
Kojto | 90:cb3d968589d8 | 48 | ** Initial version. |
Kojto | 90:cb3d968589d8 | 49 | ** - rev. 2.0 (2013-10-29) |
Kojto | 90:cb3d968589d8 | 50 | ** Register accessor macros added to the memory map. |
Kojto | 90:cb3d968589d8 | 51 | ** Symbols for Processor Expert memory map compatibility added to the memory map. |
Kojto | 90:cb3d968589d8 | 52 | ** Startup file for gcc has been updated according to CMSIS 3.2. |
Kojto | 90:cb3d968589d8 | 53 | ** System initialization updated. |
Kojto | 90:cb3d968589d8 | 54 | ** MCG - registers updated. |
Kojto | 90:cb3d968589d8 | 55 | ** PORTA, PORTB, PORTC, PORTE - registers for digital filter removed. |
Kojto | 90:cb3d968589d8 | 56 | ** - rev. 2.1 (2013-10-30) |
Kojto | 90:cb3d968589d8 | 57 | ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled. |
Kojto | 90:cb3d968589d8 | 58 | ** - rev. 2.2 (2013-12-09) |
Kojto | 90:cb3d968589d8 | 59 | ** DMA - EARS register removed. |
Kojto | 90:cb3d968589d8 | 60 | ** AIPS0, AIPS1 - MPRA register updated. |
Kojto | 90:cb3d968589d8 | 61 | ** - rev. 2.3 (2014-01-24) |
Kojto | 90:cb3d968589d8 | 62 | ** Update according to reference manual rev. 2 |
Kojto | 90:cb3d968589d8 | 63 | ** ENET, MCG, MCM, SIM, USB - registers updated |
Kojto | 90:cb3d968589d8 | 64 | ** - rev. 2.4 (2014-02-10) |
Kojto | 90:cb3d968589d8 | 65 | ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h |
Kojto | 90:cb3d968589d8 | 66 | ** Update of SystemInit() and SystemCoreClockUpdate() functions. |
Kojto | 90:cb3d968589d8 | 67 | ** - rev. 2.5 (2014-02-10) |
Kojto | 90:cb3d968589d8 | 68 | ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h |
Kojto | 90:cb3d968589d8 | 69 | ** Update of SystemInit() and SystemCoreClockUpdate() functions. |
Kojto | 90:cb3d968589d8 | 70 | ** Module access macro module_BASES replaced by module_BASE_PTRS. |
Kojto | 90:cb3d968589d8 | 71 | ** |
Kojto | 90:cb3d968589d8 | 72 | ** ################################################################### |
Kojto | 90:cb3d968589d8 | 73 | */ |
Kojto | 90:cb3d968589d8 | 74 | |
Kojto | 90:cb3d968589d8 | 75 | /* |
Kojto | 90:cb3d968589d8 | 76 | * WARNING! DO NOT EDIT THIS FILE DIRECTLY! |
Kojto | 90:cb3d968589d8 | 77 | * |
Kojto | 90:cb3d968589d8 | 78 | * This file was generated automatically and any changes may be lost. |
Kojto | 90:cb3d968589d8 | 79 | */ |
Kojto | 90:cb3d968589d8 | 80 | #ifndef __HW_FTFE_REGISTERS_H__ |
Kojto | 90:cb3d968589d8 | 81 | #define __HW_FTFE_REGISTERS_H__ |
Kojto | 90:cb3d968589d8 | 82 | |
Kojto | 90:cb3d968589d8 | 83 | #include "MK64F12.h" |
Kojto | 90:cb3d968589d8 | 84 | #include "fsl_bitaccess.h" |
Kojto | 90:cb3d968589d8 | 85 | |
Kojto | 90:cb3d968589d8 | 86 | /* |
Kojto | 90:cb3d968589d8 | 87 | * MK64F12 FTFE |
Kojto | 90:cb3d968589d8 | 88 | * |
Kojto | 90:cb3d968589d8 | 89 | * Flash Memory Interface |
Kojto | 90:cb3d968589d8 | 90 | * |
Kojto | 90:cb3d968589d8 | 91 | * Registers defined in this header file: |
Kojto | 90:cb3d968589d8 | 92 | * - HW_FTFE_FSTAT - Flash Status Register |
Kojto | 90:cb3d968589d8 | 93 | * - HW_FTFE_FCNFG - Flash Configuration Register |
Kojto | 90:cb3d968589d8 | 94 | * - HW_FTFE_FSEC - Flash Security Register |
Kojto | 90:cb3d968589d8 | 95 | * - HW_FTFE_FOPT - Flash Option Register |
Kojto | 90:cb3d968589d8 | 96 | * - HW_FTFE_FCCOB3 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 97 | * - HW_FTFE_FCCOB2 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 98 | * - HW_FTFE_FCCOB1 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 99 | * - HW_FTFE_FCCOB0 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 100 | * - HW_FTFE_FCCOB7 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 101 | * - HW_FTFE_FCCOB6 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 102 | * - HW_FTFE_FCCOB5 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 103 | * - HW_FTFE_FCCOB4 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 104 | * - HW_FTFE_FCCOBB - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 105 | * - HW_FTFE_FCCOBA - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 106 | * - HW_FTFE_FCCOB9 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 107 | * - HW_FTFE_FCCOB8 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 108 | * - HW_FTFE_FPROT3 - Program Flash Protection Registers |
Kojto | 90:cb3d968589d8 | 109 | * - HW_FTFE_FPROT2 - Program Flash Protection Registers |
Kojto | 90:cb3d968589d8 | 110 | * - HW_FTFE_FPROT1 - Program Flash Protection Registers |
Kojto | 90:cb3d968589d8 | 111 | * - HW_FTFE_FPROT0 - Program Flash Protection Registers |
Kojto | 90:cb3d968589d8 | 112 | * - HW_FTFE_FEPROT - EEPROM Protection Register |
Kojto | 90:cb3d968589d8 | 113 | * - HW_FTFE_FDPROT - Data Flash Protection Register |
Kojto | 90:cb3d968589d8 | 114 | * |
Kojto | 90:cb3d968589d8 | 115 | * - hw_ftfe_t - Struct containing all module registers. |
Kojto | 90:cb3d968589d8 | 116 | */ |
Kojto | 90:cb3d968589d8 | 117 | |
Kojto | 90:cb3d968589d8 | 118 | #define HW_FTFE_INSTANCE_COUNT (1U) /*!< Number of instances of the FTFE module. */ |
Kojto | 90:cb3d968589d8 | 119 | |
Kojto | 90:cb3d968589d8 | 120 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 121 | * HW_FTFE_FSTAT - Flash Status Register |
Kojto | 90:cb3d968589d8 | 122 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 123 | |
Kojto | 90:cb3d968589d8 | 124 | /*! |
Kojto | 90:cb3d968589d8 | 125 | * @brief HW_FTFE_FSTAT - Flash Status Register (RW) |
Kojto | 90:cb3d968589d8 | 126 | * |
Kojto | 90:cb3d968589d8 | 127 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 128 | * |
Kojto | 90:cb3d968589d8 | 129 | * The FSTAT register reports the operational status of the FTFE module. The |
Kojto | 90:cb3d968589d8 | 130 | * CCIF, RDCOLERR, ACCERR, and FPVIOL bits are readable and writable. The MGSTAT0 |
Kojto | 90:cb3d968589d8 | 131 | * bit is read only. The unassigned bits read 0 and are not writable. When set, the |
Kojto | 90:cb3d968589d8 | 132 | * Access Error (ACCERR) and Flash Protection Violation (FPVIOL) bits in this |
Kojto | 90:cb3d968589d8 | 133 | * register prevent the launch of any more commands or writes to the FlexRAM (when |
Kojto | 90:cb3d968589d8 | 134 | * EEERDY is set) until the flag is cleared (by writing a one to it). |
Kojto | 90:cb3d968589d8 | 135 | */ |
Kojto | 90:cb3d968589d8 | 136 | typedef union _hw_ftfe_fstat |
Kojto | 90:cb3d968589d8 | 137 | { |
Kojto | 90:cb3d968589d8 | 138 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 139 | struct _hw_ftfe_fstat_bitfields |
Kojto | 90:cb3d968589d8 | 140 | { |
Kojto | 90:cb3d968589d8 | 141 | uint8_t MGSTAT0 : 1; /*!< [0] Memory Controller Command Completion |
Kojto | 90:cb3d968589d8 | 142 | * Status Flag */ |
Kojto | 90:cb3d968589d8 | 143 | uint8_t RESERVED0 : 3; /*!< [3:1] */ |
Kojto | 90:cb3d968589d8 | 144 | uint8_t FPVIOL : 1; /*!< [4] Flash Protection Violation Flag */ |
Kojto | 90:cb3d968589d8 | 145 | uint8_t ACCERR : 1; /*!< [5] Flash Access Error Flag */ |
Kojto | 90:cb3d968589d8 | 146 | uint8_t RDCOLERR : 1; /*!< [6] FTFE Read Collision Error Flag */ |
Kojto | 90:cb3d968589d8 | 147 | uint8_t CCIF : 1; /*!< [7] Command Complete Interrupt Flag */ |
Kojto | 90:cb3d968589d8 | 148 | } B; |
Kojto | 90:cb3d968589d8 | 149 | } hw_ftfe_fstat_t; |
Kojto | 90:cb3d968589d8 | 150 | |
Kojto | 90:cb3d968589d8 | 151 | /*! |
Kojto | 90:cb3d968589d8 | 152 | * @name Constants and macros for entire FTFE_FSTAT register |
Kojto | 90:cb3d968589d8 | 153 | */ |
Kojto | 90:cb3d968589d8 | 154 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 155 | #define HW_FTFE_FSTAT_ADDR(x) ((x) + 0x0U) |
Kojto | 90:cb3d968589d8 | 156 | |
Kojto | 90:cb3d968589d8 | 157 | #define HW_FTFE_FSTAT(x) (*(__IO hw_ftfe_fstat_t *) HW_FTFE_FSTAT_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 158 | #define HW_FTFE_FSTAT_RD(x) (HW_FTFE_FSTAT(x).U) |
Kojto | 90:cb3d968589d8 | 159 | #define HW_FTFE_FSTAT_WR(x, v) (HW_FTFE_FSTAT(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 160 | #define HW_FTFE_FSTAT_SET(x, v) (HW_FTFE_FSTAT_WR(x, HW_FTFE_FSTAT_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 161 | #define HW_FTFE_FSTAT_CLR(x, v) (HW_FTFE_FSTAT_WR(x, HW_FTFE_FSTAT_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 162 | #define HW_FTFE_FSTAT_TOG(x, v) (HW_FTFE_FSTAT_WR(x, HW_FTFE_FSTAT_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 163 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 164 | |
Kojto | 90:cb3d968589d8 | 165 | /* |
Kojto | 90:cb3d968589d8 | 166 | * Constants & macros for individual FTFE_FSTAT bitfields |
Kojto | 90:cb3d968589d8 | 167 | */ |
Kojto | 90:cb3d968589d8 | 168 | |
Kojto | 90:cb3d968589d8 | 169 | /*! |
Kojto | 90:cb3d968589d8 | 170 | * @name Register FTFE_FSTAT, field MGSTAT0[0] (RO) |
Kojto | 90:cb3d968589d8 | 171 | * |
Kojto | 90:cb3d968589d8 | 172 | * The MGSTAT0 status flag is set if an error is detected during execution of an |
Kojto | 90:cb3d968589d8 | 173 | * FTFE command or during the flash reset sequence. As a status flag, this bit |
Kojto | 90:cb3d968589d8 | 174 | * cannot (and need not) be cleared by the user like the other error flags in this |
Kojto | 90:cb3d968589d8 | 175 | * register. The value of the MGSTAT0 bit for "command-N" is valid only at the |
Kojto | 90:cb3d968589d8 | 176 | * end of the "command-N" execution when CCIF=1 and before the next command has |
Kojto | 90:cb3d968589d8 | 177 | * been launched. At some point during the execution of "command-N+1," the previous |
Kojto | 90:cb3d968589d8 | 178 | * result is discarded and any previous error is cleared. |
Kojto | 90:cb3d968589d8 | 179 | */ |
Kojto | 90:cb3d968589d8 | 180 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 181 | #define BP_FTFE_FSTAT_MGSTAT0 (0U) /*!< Bit position for FTFE_FSTAT_MGSTAT0. */ |
Kojto | 90:cb3d968589d8 | 182 | #define BM_FTFE_FSTAT_MGSTAT0 (0x01U) /*!< Bit mask for FTFE_FSTAT_MGSTAT0. */ |
Kojto | 90:cb3d968589d8 | 183 | #define BS_FTFE_FSTAT_MGSTAT0 (1U) /*!< Bit field size in bits for FTFE_FSTAT_MGSTAT0. */ |
Kojto | 90:cb3d968589d8 | 184 | |
Kojto | 90:cb3d968589d8 | 185 | /*! @brief Read current value of the FTFE_FSTAT_MGSTAT0 field. */ |
Kojto | 90:cb3d968589d8 | 186 | #define BR_FTFE_FSTAT_MGSTAT0(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_MGSTAT0)) |
Kojto | 90:cb3d968589d8 | 187 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 188 | |
Kojto | 90:cb3d968589d8 | 189 | /*! |
Kojto | 90:cb3d968589d8 | 190 | * @name Register FTFE_FSTAT, field FPVIOL[4] (W1C) |
Kojto | 90:cb3d968589d8 | 191 | * |
Kojto | 90:cb3d968589d8 | 192 | * The FPVIOL error bit indicates an attempt was made to program or erase an |
Kojto | 90:cb3d968589d8 | 193 | * address in a protected area of program flash or data flash memory during a |
Kojto | 90:cb3d968589d8 | 194 | * command write sequence or a write was attempted to a protected area of the FlexRAM |
Kojto | 90:cb3d968589d8 | 195 | * while enabled for EEPROM. While FPVIOL is set, the CCIF flag cannot be cleared |
Kojto | 90:cb3d968589d8 | 196 | * to launch a command. The FPVIOL bit is cleared by writing a 1 to it. Writing a |
Kojto | 90:cb3d968589d8 | 197 | * 0 to the FPVIOL bit has no effect. |
Kojto | 90:cb3d968589d8 | 198 | * |
Kojto | 90:cb3d968589d8 | 199 | * Values: |
Kojto | 90:cb3d968589d8 | 200 | * - 0 - No protection violation detected |
Kojto | 90:cb3d968589d8 | 201 | * - 1 - Protection violation detected |
Kojto | 90:cb3d968589d8 | 202 | */ |
Kojto | 90:cb3d968589d8 | 203 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 204 | #define BP_FTFE_FSTAT_FPVIOL (4U) /*!< Bit position for FTFE_FSTAT_FPVIOL. */ |
Kojto | 90:cb3d968589d8 | 205 | #define BM_FTFE_FSTAT_FPVIOL (0x10U) /*!< Bit mask for FTFE_FSTAT_FPVIOL. */ |
Kojto | 90:cb3d968589d8 | 206 | #define BS_FTFE_FSTAT_FPVIOL (1U) /*!< Bit field size in bits for FTFE_FSTAT_FPVIOL. */ |
Kojto | 90:cb3d968589d8 | 207 | |
Kojto | 90:cb3d968589d8 | 208 | /*! @brief Read current value of the FTFE_FSTAT_FPVIOL field. */ |
Kojto | 90:cb3d968589d8 | 209 | #define BR_FTFE_FSTAT_FPVIOL(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_FPVIOL)) |
Kojto | 90:cb3d968589d8 | 210 | |
Kojto | 90:cb3d968589d8 | 211 | /*! @brief Format value for bitfield FTFE_FSTAT_FPVIOL. */ |
Kojto | 90:cb3d968589d8 | 212 | #define BF_FTFE_FSTAT_FPVIOL(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FSTAT_FPVIOL) & BM_FTFE_FSTAT_FPVIOL) |
Kojto | 90:cb3d968589d8 | 213 | |
Kojto | 90:cb3d968589d8 | 214 | /*! @brief Set the FPVIOL field to a new value. */ |
Kojto | 90:cb3d968589d8 | 215 | #define BW_FTFE_FSTAT_FPVIOL(x, v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_FPVIOL) = (v)) |
Kojto | 90:cb3d968589d8 | 216 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 217 | |
Kojto | 90:cb3d968589d8 | 218 | /*! |
Kojto | 90:cb3d968589d8 | 219 | * @name Register FTFE_FSTAT, field ACCERR[5] (W1C) |
Kojto | 90:cb3d968589d8 | 220 | * |
Kojto | 90:cb3d968589d8 | 221 | * The ACCERR error bit indicates an illegal access has occurred to an FTFE |
Kojto | 90:cb3d968589d8 | 222 | * resource caused by a violation of the command write sequence or issuing an illegal |
Kojto | 90:cb3d968589d8 | 223 | * FTFE command. While ACCERR is set, the CCIF flag cannot be cleared to launch |
Kojto | 90:cb3d968589d8 | 224 | * a command. The ACCERR bit is cleared by writing a 1 to it. Writing a 0 to the |
Kojto | 90:cb3d968589d8 | 225 | * ACCERR bit has no effect. |
Kojto | 90:cb3d968589d8 | 226 | * |
Kojto | 90:cb3d968589d8 | 227 | * Values: |
Kojto | 90:cb3d968589d8 | 228 | * - 0 - No access error detected |
Kojto | 90:cb3d968589d8 | 229 | * - 1 - Access error detected |
Kojto | 90:cb3d968589d8 | 230 | */ |
Kojto | 90:cb3d968589d8 | 231 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 232 | #define BP_FTFE_FSTAT_ACCERR (5U) /*!< Bit position for FTFE_FSTAT_ACCERR. */ |
Kojto | 90:cb3d968589d8 | 233 | #define BM_FTFE_FSTAT_ACCERR (0x20U) /*!< Bit mask for FTFE_FSTAT_ACCERR. */ |
Kojto | 90:cb3d968589d8 | 234 | #define BS_FTFE_FSTAT_ACCERR (1U) /*!< Bit field size in bits for FTFE_FSTAT_ACCERR. */ |
Kojto | 90:cb3d968589d8 | 235 | |
Kojto | 90:cb3d968589d8 | 236 | /*! @brief Read current value of the FTFE_FSTAT_ACCERR field. */ |
Kojto | 90:cb3d968589d8 | 237 | #define BR_FTFE_FSTAT_ACCERR(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_ACCERR)) |
Kojto | 90:cb3d968589d8 | 238 | |
Kojto | 90:cb3d968589d8 | 239 | /*! @brief Format value for bitfield FTFE_FSTAT_ACCERR. */ |
Kojto | 90:cb3d968589d8 | 240 | #define BF_FTFE_FSTAT_ACCERR(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FSTAT_ACCERR) & BM_FTFE_FSTAT_ACCERR) |
Kojto | 90:cb3d968589d8 | 241 | |
Kojto | 90:cb3d968589d8 | 242 | /*! @brief Set the ACCERR field to a new value. */ |
Kojto | 90:cb3d968589d8 | 243 | #define BW_FTFE_FSTAT_ACCERR(x, v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_ACCERR) = (v)) |
Kojto | 90:cb3d968589d8 | 244 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 245 | |
Kojto | 90:cb3d968589d8 | 246 | /*! |
Kojto | 90:cb3d968589d8 | 247 | * @name Register FTFE_FSTAT, field RDCOLERR[6] (W1C) |
Kojto | 90:cb3d968589d8 | 248 | * |
Kojto | 90:cb3d968589d8 | 249 | * The RDCOLERR error bit indicates that the MCU attempted a read from an FTFE |
Kojto | 90:cb3d968589d8 | 250 | * resource that was being manipulated by an FTFE command (CCIF=0). Any |
Kojto | 90:cb3d968589d8 | 251 | * simultaneous access is detected as a collision error by the block arbitration logic. The |
Kojto | 90:cb3d968589d8 | 252 | * read data in this case cannot be guaranteed. The RDCOLERR bit is cleared by |
Kojto | 90:cb3d968589d8 | 253 | * writing a 1 to it. Writing a 0 to RDCOLERR has no effect. |
Kojto | 90:cb3d968589d8 | 254 | * |
Kojto | 90:cb3d968589d8 | 255 | * Values: |
Kojto | 90:cb3d968589d8 | 256 | * - 0 - No collision error detected |
Kojto | 90:cb3d968589d8 | 257 | * - 1 - Collision error detected |
Kojto | 90:cb3d968589d8 | 258 | */ |
Kojto | 90:cb3d968589d8 | 259 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 260 | #define BP_FTFE_FSTAT_RDCOLERR (6U) /*!< Bit position for FTFE_FSTAT_RDCOLERR. */ |
Kojto | 90:cb3d968589d8 | 261 | #define BM_FTFE_FSTAT_RDCOLERR (0x40U) /*!< Bit mask for FTFE_FSTAT_RDCOLERR. */ |
Kojto | 90:cb3d968589d8 | 262 | #define BS_FTFE_FSTAT_RDCOLERR (1U) /*!< Bit field size in bits for FTFE_FSTAT_RDCOLERR. */ |
Kojto | 90:cb3d968589d8 | 263 | |
Kojto | 90:cb3d968589d8 | 264 | /*! @brief Read current value of the FTFE_FSTAT_RDCOLERR field. */ |
Kojto | 90:cb3d968589d8 | 265 | #define BR_FTFE_FSTAT_RDCOLERR(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_RDCOLERR)) |
Kojto | 90:cb3d968589d8 | 266 | |
Kojto | 90:cb3d968589d8 | 267 | /*! @brief Format value for bitfield FTFE_FSTAT_RDCOLERR. */ |
Kojto | 90:cb3d968589d8 | 268 | #define BF_FTFE_FSTAT_RDCOLERR(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FSTAT_RDCOLERR) & BM_FTFE_FSTAT_RDCOLERR) |
Kojto | 90:cb3d968589d8 | 269 | |
Kojto | 90:cb3d968589d8 | 270 | /*! @brief Set the RDCOLERR field to a new value. */ |
Kojto | 90:cb3d968589d8 | 271 | #define BW_FTFE_FSTAT_RDCOLERR(x, v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_RDCOLERR) = (v)) |
Kojto | 90:cb3d968589d8 | 272 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 273 | |
Kojto | 90:cb3d968589d8 | 274 | /*! |
Kojto | 90:cb3d968589d8 | 275 | * @name Register FTFE_FSTAT, field CCIF[7] (W1C) |
Kojto | 90:cb3d968589d8 | 276 | * |
Kojto | 90:cb3d968589d8 | 277 | * The CCIF flag indicates that a FTFE command or EEPROM file system operation |
Kojto | 90:cb3d968589d8 | 278 | * has completed. The CCIF flag is cleared by writing a 1 to CCIF to launch a |
Kojto | 90:cb3d968589d8 | 279 | * command, and CCIF stays low until command completion or command violation. The |
Kojto | 90:cb3d968589d8 | 280 | * CCIF flag is also cleared by a successful write to FlexRAM while enabled for EEE, |
Kojto | 90:cb3d968589d8 | 281 | * and CCIF stays low until the EEPROM file system has created the associated |
Kojto | 90:cb3d968589d8 | 282 | * EEPROM data record. The CCIF bit is reset to 0 but is set to 1 by the memory |
Kojto | 90:cb3d968589d8 | 283 | * controller at the end of the reset initialization sequence. Depending on how |
Kojto | 90:cb3d968589d8 | 284 | * quickly the read occurs after reset release, the user may or may not see the 0 |
Kojto | 90:cb3d968589d8 | 285 | * hardware reset value. |
Kojto | 90:cb3d968589d8 | 286 | * |
Kojto | 90:cb3d968589d8 | 287 | * Values: |
Kojto | 90:cb3d968589d8 | 288 | * - 0 - FTFE command or EEPROM file system operation in progress |
Kojto | 90:cb3d968589d8 | 289 | * - 1 - FTFE command or EEPROM file system operation has completed |
Kojto | 90:cb3d968589d8 | 290 | */ |
Kojto | 90:cb3d968589d8 | 291 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 292 | #define BP_FTFE_FSTAT_CCIF (7U) /*!< Bit position for FTFE_FSTAT_CCIF. */ |
Kojto | 90:cb3d968589d8 | 293 | #define BM_FTFE_FSTAT_CCIF (0x80U) /*!< Bit mask for FTFE_FSTAT_CCIF. */ |
Kojto | 90:cb3d968589d8 | 294 | #define BS_FTFE_FSTAT_CCIF (1U) /*!< Bit field size in bits for FTFE_FSTAT_CCIF. */ |
Kojto | 90:cb3d968589d8 | 295 | |
Kojto | 90:cb3d968589d8 | 296 | /*! @brief Read current value of the FTFE_FSTAT_CCIF field. */ |
Kojto | 90:cb3d968589d8 | 297 | #define BR_FTFE_FSTAT_CCIF(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_CCIF)) |
Kojto | 90:cb3d968589d8 | 298 | |
Kojto | 90:cb3d968589d8 | 299 | /*! @brief Format value for bitfield FTFE_FSTAT_CCIF. */ |
Kojto | 90:cb3d968589d8 | 300 | #define BF_FTFE_FSTAT_CCIF(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FSTAT_CCIF) & BM_FTFE_FSTAT_CCIF) |
Kojto | 90:cb3d968589d8 | 301 | |
Kojto | 90:cb3d968589d8 | 302 | /*! @brief Set the CCIF field to a new value. */ |
Kojto | 90:cb3d968589d8 | 303 | #define BW_FTFE_FSTAT_CCIF(x, v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_CCIF) = (v)) |
Kojto | 90:cb3d968589d8 | 304 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 305 | |
Kojto | 90:cb3d968589d8 | 306 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 307 | * HW_FTFE_FCNFG - Flash Configuration Register |
Kojto | 90:cb3d968589d8 | 308 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 309 | |
Kojto | 90:cb3d968589d8 | 310 | /*! |
Kojto | 90:cb3d968589d8 | 311 | * @brief HW_FTFE_FCNFG - Flash Configuration Register (RW) |
Kojto | 90:cb3d968589d8 | 312 | * |
Kojto | 90:cb3d968589d8 | 313 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 314 | * |
Kojto | 90:cb3d968589d8 | 315 | * This register provides information on the current functional state of the |
Kojto | 90:cb3d968589d8 | 316 | * FTFE module. The erase control bits (ERSAREQ and ERSSUSP) have write |
Kojto | 90:cb3d968589d8 | 317 | * restrictions. SWAP, PFLSH, RAMRDY, and EEERDY are read-only status bits. The unassigned |
Kojto | 90:cb3d968589d8 | 318 | * bits read as noted and are not writable. The reset values for the SWAP, PFLSH, |
Kojto | 90:cb3d968589d8 | 319 | * RAMRDY, and EEERDY bits are determined during the reset sequence. |
Kojto | 90:cb3d968589d8 | 320 | */ |
Kojto | 90:cb3d968589d8 | 321 | typedef union _hw_ftfe_fcnfg |
Kojto | 90:cb3d968589d8 | 322 | { |
Kojto | 90:cb3d968589d8 | 323 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 324 | struct _hw_ftfe_fcnfg_bitfields |
Kojto | 90:cb3d968589d8 | 325 | { |
Kojto | 90:cb3d968589d8 | 326 | uint8_t EEERDY : 1; /*!< [0] */ |
Kojto | 90:cb3d968589d8 | 327 | uint8_t RAMRDY : 1; /*!< [1] RAM Ready */ |
Kojto | 90:cb3d968589d8 | 328 | uint8_t PFLSH : 1; /*!< [2] FTFE configuration */ |
Kojto | 90:cb3d968589d8 | 329 | uint8_t SWAP : 1; /*!< [3] Swap */ |
Kojto | 90:cb3d968589d8 | 330 | uint8_t ERSSUSP : 1; /*!< [4] Erase Suspend */ |
Kojto | 90:cb3d968589d8 | 331 | uint8_t ERSAREQ : 1; /*!< [5] Erase All Request */ |
Kojto | 90:cb3d968589d8 | 332 | uint8_t RDCOLLIE : 1; /*!< [6] Read Collision Error Interrupt Enable |
Kojto | 90:cb3d968589d8 | 333 | * */ |
Kojto | 90:cb3d968589d8 | 334 | uint8_t CCIE : 1; /*!< [7] Command Complete Interrupt Enable */ |
Kojto | 90:cb3d968589d8 | 335 | } B; |
Kojto | 90:cb3d968589d8 | 336 | } hw_ftfe_fcnfg_t; |
Kojto | 90:cb3d968589d8 | 337 | |
Kojto | 90:cb3d968589d8 | 338 | /*! |
Kojto | 90:cb3d968589d8 | 339 | * @name Constants and macros for entire FTFE_FCNFG register |
Kojto | 90:cb3d968589d8 | 340 | */ |
Kojto | 90:cb3d968589d8 | 341 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 342 | #define HW_FTFE_FCNFG_ADDR(x) ((x) + 0x1U) |
Kojto | 90:cb3d968589d8 | 343 | |
Kojto | 90:cb3d968589d8 | 344 | #define HW_FTFE_FCNFG(x) (*(__IO hw_ftfe_fcnfg_t *) HW_FTFE_FCNFG_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 345 | #define HW_FTFE_FCNFG_RD(x) (HW_FTFE_FCNFG(x).U) |
Kojto | 90:cb3d968589d8 | 346 | #define HW_FTFE_FCNFG_WR(x, v) (HW_FTFE_FCNFG(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 347 | #define HW_FTFE_FCNFG_SET(x, v) (HW_FTFE_FCNFG_WR(x, HW_FTFE_FCNFG_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 348 | #define HW_FTFE_FCNFG_CLR(x, v) (HW_FTFE_FCNFG_WR(x, HW_FTFE_FCNFG_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 349 | #define HW_FTFE_FCNFG_TOG(x, v) (HW_FTFE_FCNFG_WR(x, HW_FTFE_FCNFG_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 350 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 351 | |
Kojto | 90:cb3d968589d8 | 352 | /* |
Kojto | 90:cb3d968589d8 | 353 | * Constants & macros for individual FTFE_FCNFG bitfields |
Kojto | 90:cb3d968589d8 | 354 | */ |
Kojto | 90:cb3d968589d8 | 355 | |
Kojto | 90:cb3d968589d8 | 356 | /*! |
Kojto | 90:cb3d968589d8 | 357 | * @name Register FTFE_FCNFG, field EEERDY[0] (RO) |
Kojto | 90:cb3d968589d8 | 358 | * |
Kojto | 90:cb3d968589d8 | 359 | * For devices with FlexNVM: This flag indicates if the EEPROM backup data has |
Kojto | 90:cb3d968589d8 | 360 | * been copied to the FlexRAM and is therefore available for read access. During |
Kojto | 90:cb3d968589d8 | 361 | * the reset sequence, the EEERDY flag remains clear while CCIF=0 and only sets if |
Kojto | 90:cb3d968589d8 | 362 | * the FlexNVM block is partitioned for EEPROM. For devices without FlexNVM: |
Kojto | 90:cb3d968589d8 | 363 | * This bit is reserved. |
Kojto | 90:cb3d968589d8 | 364 | * |
Kojto | 90:cb3d968589d8 | 365 | * Values: |
Kojto | 90:cb3d968589d8 | 366 | * - 0 - For devices with FlexNVM: FlexRAM is not available for EEPROM operation. |
Kojto | 90:cb3d968589d8 | 367 | * - 1 - For devices with FlexNVM: FlexRAM is available for EEPROM operations |
Kojto | 90:cb3d968589d8 | 368 | * where: reads from the FlexRAM return data previously written to the FlexRAM |
Kojto | 90:cb3d968589d8 | 369 | * in EEPROM mode and writes launch an EEPROM operation to store the written |
Kojto | 90:cb3d968589d8 | 370 | * data in the FlexRAM and EEPROM backup. |
Kojto | 90:cb3d968589d8 | 371 | */ |
Kojto | 90:cb3d968589d8 | 372 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 373 | #define BP_FTFE_FCNFG_EEERDY (0U) /*!< Bit position for FTFE_FCNFG_EEERDY. */ |
Kojto | 90:cb3d968589d8 | 374 | #define BM_FTFE_FCNFG_EEERDY (0x01U) /*!< Bit mask for FTFE_FCNFG_EEERDY. */ |
Kojto | 90:cb3d968589d8 | 375 | #define BS_FTFE_FCNFG_EEERDY (1U) /*!< Bit field size in bits for FTFE_FCNFG_EEERDY. */ |
Kojto | 90:cb3d968589d8 | 376 | |
Kojto | 90:cb3d968589d8 | 377 | /*! @brief Read current value of the FTFE_FCNFG_EEERDY field. */ |
Kojto | 90:cb3d968589d8 | 378 | #define BR_FTFE_FCNFG_EEERDY(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_EEERDY)) |
Kojto | 90:cb3d968589d8 | 379 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 380 | |
Kojto | 90:cb3d968589d8 | 381 | /*! |
Kojto | 90:cb3d968589d8 | 382 | * @name Register FTFE_FCNFG, field RAMRDY[1] (RO) |
Kojto | 90:cb3d968589d8 | 383 | * |
Kojto | 90:cb3d968589d8 | 384 | * This flag indicates the current status of the FlexRAM/ programming |
Kojto | 90:cb3d968589d8 | 385 | * acceleration RAM. For devices with FlexNVM: The state of the RAMRDY flag is normally |
Kojto | 90:cb3d968589d8 | 386 | * controlled by the Set FlexRAM Function command. During the reset sequence, the |
Kojto | 90:cb3d968589d8 | 387 | * RAMRDY flag is cleared if the FlexNVM block is partitioned for EEPROM and will |
Kojto | 90:cb3d968589d8 | 388 | * be set if the FlexNVM block is not partitioned for EEPROM . The RAMRDY flag is |
Kojto | 90:cb3d968589d8 | 389 | * cleared if the Program Partition command is run to partition the FlexNVM block |
Kojto | 90:cb3d968589d8 | 390 | * for EEPROM. The RAMRDY flag sets after completion of the Erase All Blocks |
Kojto | 90:cb3d968589d8 | 391 | * command or execution of the erase-all operation triggered external to the FTFE. |
Kojto | 90:cb3d968589d8 | 392 | * For devices without FlexNVM: This bit should always be set. |
Kojto | 90:cb3d968589d8 | 393 | * |
Kojto | 90:cb3d968589d8 | 394 | * Values: |
Kojto | 90:cb3d968589d8 | 395 | * - 0 - For devices with FlexNVM: FlexRAM is not available for traditional RAM |
Kojto | 90:cb3d968589d8 | 396 | * access. For devices without FlexNVM: Programming acceleration RAM is not |
Kojto | 90:cb3d968589d8 | 397 | * available. |
Kojto | 90:cb3d968589d8 | 398 | * - 1 - For devices with FlexNVM: FlexRAM is available as traditional RAM only; |
Kojto | 90:cb3d968589d8 | 399 | * writes to the FlexRAM do not trigger EEPROM operations. For devices |
Kojto | 90:cb3d968589d8 | 400 | * without FlexNVM: Programming acceleration RAM is available. |
Kojto | 90:cb3d968589d8 | 401 | */ |
Kojto | 90:cb3d968589d8 | 402 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 403 | #define BP_FTFE_FCNFG_RAMRDY (1U) /*!< Bit position for FTFE_FCNFG_RAMRDY. */ |
Kojto | 90:cb3d968589d8 | 404 | #define BM_FTFE_FCNFG_RAMRDY (0x02U) /*!< Bit mask for FTFE_FCNFG_RAMRDY. */ |
Kojto | 90:cb3d968589d8 | 405 | #define BS_FTFE_FCNFG_RAMRDY (1U) /*!< Bit field size in bits for FTFE_FCNFG_RAMRDY. */ |
Kojto | 90:cb3d968589d8 | 406 | |
Kojto | 90:cb3d968589d8 | 407 | /*! @brief Read current value of the FTFE_FCNFG_RAMRDY field. */ |
Kojto | 90:cb3d968589d8 | 408 | #define BR_FTFE_FCNFG_RAMRDY(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RAMRDY)) |
Kojto | 90:cb3d968589d8 | 409 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 410 | |
Kojto | 90:cb3d968589d8 | 411 | /*! |
Kojto | 90:cb3d968589d8 | 412 | * @name Register FTFE_FCNFG, field PFLSH[2] (RO) |
Kojto | 90:cb3d968589d8 | 413 | * |
Kojto | 90:cb3d968589d8 | 414 | * Values: |
Kojto | 90:cb3d968589d8 | 415 | * - 0 - For devices with FlexNVM: FTFE configuration supports two program flash |
Kojto | 90:cb3d968589d8 | 416 | * blocks and two FlexNVM blocks For devices with program flash only: |
Kojto | 90:cb3d968589d8 | 417 | * Reserved |
Kojto | 90:cb3d968589d8 | 418 | * - 1 - For devices with FlexNVM: Reserved For devices with program flash only: |
Kojto | 90:cb3d968589d8 | 419 | * FTFE configuration supports four program flash blocks |
Kojto | 90:cb3d968589d8 | 420 | */ |
Kojto | 90:cb3d968589d8 | 421 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 422 | #define BP_FTFE_FCNFG_PFLSH (2U) /*!< Bit position for FTFE_FCNFG_PFLSH. */ |
Kojto | 90:cb3d968589d8 | 423 | #define BM_FTFE_FCNFG_PFLSH (0x04U) /*!< Bit mask for FTFE_FCNFG_PFLSH. */ |
Kojto | 90:cb3d968589d8 | 424 | #define BS_FTFE_FCNFG_PFLSH (1U) /*!< Bit field size in bits for FTFE_FCNFG_PFLSH. */ |
Kojto | 90:cb3d968589d8 | 425 | |
Kojto | 90:cb3d968589d8 | 426 | /*! @brief Read current value of the FTFE_FCNFG_PFLSH field. */ |
Kojto | 90:cb3d968589d8 | 427 | #define BR_FTFE_FCNFG_PFLSH(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_PFLSH)) |
Kojto | 90:cb3d968589d8 | 428 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 429 | |
Kojto | 90:cb3d968589d8 | 430 | /*! |
Kojto | 90:cb3d968589d8 | 431 | * @name Register FTFE_FCNFG, field SWAP[3] (RO) |
Kojto | 90:cb3d968589d8 | 432 | * |
Kojto | 90:cb3d968589d8 | 433 | * The SWAP flag indicates which half of the program flash space is located at |
Kojto | 90:cb3d968589d8 | 434 | * relative address 0x0000. The state of the SWAP flag is set by the FTFE during |
Kojto | 90:cb3d968589d8 | 435 | * the reset sequence. See for information on swap management. |
Kojto | 90:cb3d968589d8 | 436 | * |
Kojto | 90:cb3d968589d8 | 437 | * Values: |
Kojto | 90:cb3d968589d8 | 438 | * - 0 - For devices with FlexNVM: Program flash 0 block is located at relative |
Kojto | 90:cb3d968589d8 | 439 | * address 0x0000 For devices with program flash only: Program flash 0 block |
Kojto | 90:cb3d968589d8 | 440 | * is located at relative address 0x0000 |
Kojto | 90:cb3d968589d8 | 441 | * - 1 - For devices with FlexNVM: Reserved For devices with program flash only: |
Kojto | 90:cb3d968589d8 | 442 | * Program flash 1 block is located at relative address 0x0000 |
Kojto | 90:cb3d968589d8 | 443 | */ |
Kojto | 90:cb3d968589d8 | 444 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 445 | #define BP_FTFE_FCNFG_SWAP (3U) /*!< Bit position for FTFE_FCNFG_SWAP. */ |
Kojto | 90:cb3d968589d8 | 446 | #define BM_FTFE_FCNFG_SWAP (0x08U) /*!< Bit mask for FTFE_FCNFG_SWAP. */ |
Kojto | 90:cb3d968589d8 | 447 | #define BS_FTFE_FCNFG_SWAP (1U) /*!< Bit field size in bits for FTFE_FCNFG_SWAP. */ |
Kojto | 90:cb3d968589d8 | 448 | |
Kojto | 90:cb3d968589d8 | 449 | /*! @brief Read current value of the FTFE_FCNFG_SWAP field. */ |
Kojto | 90:cb3d968589d8 | 450 | #define BR_FTFE_FCNFG_SWAP(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_SWAP)) |
Kojto | 90:cb3d968589d8 | 451 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 452 | |
Kojto | 90:cb3d968589d8 | 453 | /*! |
Kojto | 90:cb3d968589d8 | 454 | * @name Register FTFE_FCNFG, field ERSSUSP[4] (RW) |
Kojto | 90:cb3d968589d8 | 455 | * |
Kojto | 90:cb3d968589d8 | 456 | * The ERSSUSP bit allows the user to suspend (interrupt) the Erase Flash Sector |
Kojto | 90:cb3d968589d8 | 457 | * command while it is executing. |
Kojto | 90:cb3d968589d8 | 458 | * |
Kojto | 90:cb3d968589d8 | 459 | * Values: |
Kojto | 90:cb3d968589d8 | 460 | * - 0 - No suspend requested |
Kojto | 90:cb3d968589d8 | 461 | * - 1 - Suspend the current Erase Flash Sector command execution. |
Kojto | 90:cb3d968589d8 | 462 | */ |
Kojto | 90:cb3d968589d8 | 463 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 464 | #define BP_FTFE_FCNFG_ERSSUSP (4U) /*!< Bit position for FTFE_FCNFG_ERSSUSP. */ |
Kojto | 90:cb3d968589d8 | 465 | #define BM_FTFE_FCNFG_ERSSUSP (0x10U) /*!< Bit mask for FTFE_FCNFG_ERSSUSP. */ |
Kojto | 90:cb3d968589d8 | 466 | #define BS_FTFE_FCNFG_ERSSUSP (1U) /*!< Bit field size in bits for FTFE_FCNFG_ERSSUSP. */ |
Kojto | 90:cb3d968589d8 | 467 | |
Kojto | 90:cb3d968589d8 | 468 | /*! @brief Read current value of the FTFE_FCNFG_ERSSUSP field. */ |
Kojto | 90:cb3d968589d8 | 469 | #define BR_FTFE_FCNFG_ERSSUSP(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSSUSP)) |
Kojto | 90:cb3d968589d8 | 470 | |
Kojto | 90:cb3d968589d8 | 471 | /*! @brief Format value for bitfield FTFE_FCNFG_ERSSUSP. */ |
Kojto | 90:cb3d968589d8 | 472 | #define BF_FTFE_FCNFG_ERSSUSP(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCNFG_ERSSUSP) & BM_FTFE_FCNFG_ERSSUSP) |
Kojto | 90:cb3d968589d8 | 473 | |
Kojto | 90:cb3d968589d8 | 474 | /*! @brief Set the ERSSUSP field to a new value. */ |
Kojto | 90:cb3d968589d8 | 475 | #define BW_FTFE_FCNFG_ERSSUSP(x, v) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSSUSP) = (v)) |
Kojto | 90:cb3d968589d8 | 476 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 477 | |
Kojto | 90:cb3d968589d8 | 478 | /*! |
Kojto | 90:cb3d968589d8 | 479 | * @name Register FTFE_FCNFG, field ERSAREQ[5] (RO) |
Kojto | 90:cb3d968589d8 | 480 | * |
Kojto | 90:cb3d968589d8 | 481 | * This bit issues a request to the memory controller to execute the Erase All |
Kojto | 90:cb3d968589d8 | 482 | * Blocks command and release security. ERSAREQ is not directly writable but is |
Kojto | 90:cb3d968589d8 | 483 | * under indirect user control. Refer to the device's Chip Configuration details on |
Kojto | 90:cb3d968589d8 | 484 | * how to request this command. The ERSAREQ bit sets when an erase all request |
Kojto | 90:cb3d968589d8 | 485 | * is triggered external to the FTFE and CCIF is set (no command is currently |
Kojto | 90:cb3d968589d8 | 486 | * being executed). ERSAREQ is cleared by the FTFE when the operation completes. |
Kojto | 90:cb3d968589d8 | 487 | * |
Kojto | 90:cb3d968589d8 | 488 | * Values: |
Kojto | 90:cb3d968589d8 | 489 | * - 0 - No request or request complete |
Kojto | 90:cb3d968589d8 | 490 | * - 1 - Request to: run the Erase All Blocks command, verify the erased state, |
Kojto | 90:cb3d968589d8 | 491 | * program the security byte in the Flash Configuration Field to the unsecure |
Kojto | 90:cb3d968589d8 | 492 | * state, and release MCU security by setting the FSEC[SEC] field to the |
Kojto | 90:cb3d968589d8 | 493 | * unsecure state. |
Kojto | 90:cb3d968589d8 | 494 | */ |
Kojto | 90:cb3d968589d8 | 495 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 496 | #define BP_FTFE_FCNFG_ERSAREQ (5U) /*!< Bit position for FTFE_FCNFG_ERSAREQ. */ |
Kojto | 90:cb3d968589d8 | 497 | #define BM_FTFE_FCNFG_ERSAREQ (0x20U) /*!< Bit mask for FTFE_FCNFG_ERSAREQ. */ |
Kojto | 90:cb3d968589d8 | 498 | #define BS_FTFE_FCNFG_ERSAREQ (1U) /*!< Bit field size in bits for FTFE_FCNFG_ERSAREQ. */ |
Kojto | 90:cb3d968589d8 | 499 | |
Kojto | 90:cb3d968589d8 | 500 | /*! @brief Read current value of the FTFE_FCNFG_ERSAREQ field. */ |
Kojto | 90:cb3d968589d8 | 501 | #define BR_FTFE_FCNFG_ERSAREQ(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSAREQ)) |
Kojto | 90:cb3d968589d8 | 502 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 503 | |
Kojto | 90:cb3d968589d8 | 504 | /*! |
Kojto | 90:cb3d968589d8 | 505 | * @name Register FTFE_FCNFG, field RDCOLLIE[6] (RW) |
Kojto | 90:cb3d968589d8 | 506 | * |
Kojto | 90:cb3d968589d8 | 507 | * The RDCOLLIE bit controls interrupt generation when an FTFE read collision |
Kojto | 90:cb3d968589d8 | 508 | * error occurs. |
Kojto | 90:cb3d968589d8 | 509 | * |
Kojto | 90:cb3d968589d8 | 510 | * Values: |
Kojto | 90:cb3d968589d8 | 511 | * - 0 - Read collision error interrupt disabled |
Kojto | 90:cb3d968589d8 | 512 | * - 1 - Read collision error interrupt enabled. An interrupt request is |
Kojto | 90:cb3d968589d8 | 513 | * generated whenever an FTFE read collision error is detected (see the description |
Kojto | 90:cb3d968589d8 | 514 | * of FSTAT[RDCOLERR]). |
Kojto | 90:cb3d968589d8 | 515 | */ |
Kojto | 90:cb3d968589d8 | 516 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 517 | #define BP_FTFE_FCNFG_RDCOLLIE (6U) /*!< Bit position for FTFE_FCNFG_RDCOLLIE. */ |
Kojto | 90:cb3d968589d8 | 518 | #define BM_FTFE_FCNFG_RDCOLLIE (0x40U) /*!< Bit mask for FTFE_FCNFG_RDCOLLIE. */ |
Kojto | 90:cb3d968589d8 | 519 | #define BS_FTFE_FCNFG_RDCOLLIE (1U) /*!< Bit field size in bits for FTFE_FCNFG_RDCOLLIE. */ |
Kojto | 90:cb3d968589d8 | 520 | |
Kojto | 90:cb3d968589d8 | 521 | /*! @brief Read current value of the FTFE_FCNFG_RDCOLLIE field. */ |
Kojto | 90:cb3d968589d8 | 522 | #define BR_FTFE_FCNFG_RDCOLLIE(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RDCOLLIE)) |
Kojto | 90:cb3d968589d8 | 523 | |
Kojto | 90:cb3d968589d8 | 524 | /*! @brief Format value for bitfield FTFE_FCNFG_RDCOLLIE. */ |
Kojto | 90:cb3d968589d8 | 525 | #define BF_FTFE_FCNFG_RDCOLLIE(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCNFG_RDCOLLIE) & BM_FTFE_FCNFG_RDCOLLIE) |
Kojto | 90:cb3d968589d8 | 526 | |
Kojto | 90:cb3d968589d8 | 527 | /*! @brief Set the RDCOLLIE field to a new value. */ |
Kojto | 90:cb3d968589d8 | 528 | #define BW_FTFE_FCNFG_RDCOLLIE(x, v) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RDCOLLIE) = (v)) |
Kojto | 90:cb3d968589d8 | 529 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 530 | |
Kojto | 90:cb3d968589d8 | 531 | /*! |
Kojto | 90:cb3d968589d8 | 532 | * @name Register FTFE_FCNFG, field CCIE[7] (RW) |
Kojto | 90:cb3d968589d8 | 533 | * |
Kojto | 90:cb3d968589d8 | 534 | * The CCIE bit controls interrupt generation when an FTFE command completes. |
Kojto | 90:cb3d968589d8 | 535 | * |
Kojto | 90:cb3d968589d8 | 536 | * Values: |
Kojto | 90:cb3d968589d8 | 537 | * - 0 - Command complete interrupt disabled |
Kojto | 90:cb3d968589d8 | 538 | * - 1 - Command complete interrupt enabled. An interrupt request is generated |
Kojto | 90:cb3d968589d8 | 539 | * whenever the FSTAT[CCIF] flag is set. |
Kojto | 90:cb3d968589d8 | 540 | */ |
Kojto | 90:cb3d968589d8 | 541 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 542 | #define BP_FTFE_FCNFG_CCIE (7U) /*!< Bit position for FTFE_FCNFG_CCIE. */ |
Kojto | 90:cb3d968589d8 | 543 | #define BM_FTFE_FCNFG_CCIE (0x80U) /*!< Bit mask for FTFE_FCNFG_CCIE. */ |
Kojto | 90:cb3d968589d8 | 544 | #define BS_FTFE_FCNFG_CCIE (1U) /*!< Bit field size in bits for FTFE_FCNFG_CCIE. */ |
Kojto | 90:cb3d968589d8 | 545 | |
Kojto | 90:cb3d968589d8 | 546 | /*! @brief Read current value of the FTFE_FCNFG_CCIE field. */ |
Kojto | 90:cb3d968589d8 | 547 | #define BR_FTFE_FCNFG_CCIE(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_CCIE)) |
Kojto | 90:cb3d968589d8 | 548 | |
Kojto | 90:cb3d968589d8 | 549 | /*! @brief Format value for bitfield FTFE_FCNFG_CCIE. */ |
Kojto | 90:cb3d968589d8 | 550 | #define BF_FTFE_FCNFG_CCIE(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCNFG_CCIE) & BM_FTFE_FCNFG_CCIE) |
Kojto | 90:cb3d968589d8 | 551 | |
Kojto | 90:cb3d968589d8 | 552 | /*! @brief Set the CCIE field to a new value. */ |
Kojto | 90:cb3d968589d8 | 553 | #define BW_FTFE_FCNFG_CCIE(x, v) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_CCIE) = (v)) |
Kojto | 90:cb3d968589d8 | 554 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 555 | |
Kojto | 90:cb3d968589d8 | 556 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 557 | * HW_FTFE_FSEC - Flash Security Register |
Kojto | 90:cb3d968589d8 | 558 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 559 | |
Kojto | 90:cb3d968589d8 | 560 | /*! |
Kojto | 90:cb3d968589d8 | 561 | * @brief HW_FTFE_FSEC - Flash Security Register (RO) |
Kojto | 90:cb3d968589d8 | 562 | * |
Kojto | 90:cb3d968589d8 | 563 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 564 | * |
Kojto | 90:cb3d968589d8 | 565 | * This read-only register holds all bits associated with the security of the |
Kojto | 90:cb3d968589d8 | 566 | * MCU and FTFE module. During the reset sequence, the register is loaded with the |
Kojto | 90:cb3d968589d8 | 567 | * contents of the flash security byte in the Flash Configuration Field located |
Kojto | 90:cb3d968589d8 | 568 | * in program flash memory. The Flash basis for the values is signified by X in |
Kojto | 90:cb3d968589d8 | 569 | * the reset value. |
Kojto | 90:cb3d968589d8 | 570 | */ |
Kojto | 90:cb3d968589d8 | 571 | typedef union _hw_ftfe_fsec |
Kojto | 90:cb3d968589d8 | 572 | { |
Kojto | 90:cb3d968589d8 | 573 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 574 | struct _hw_ftfe_fsec_bitfields |
Kojto | 90:cb3d968589d8 | 575 | { |
Kojto | 90:cb3d968589d8 | 576 | uint8_t SEC : 2; /*!< [1:0] Flash Security */ |
Kojto | 90:cb3d968589d8 | 577 | uint8_t FSLACC : 2; /*!< [3:2] Freescale Failure Analysis Access Code |
Kojto | 90:cb3d968589d8 | 578 | * */ |
Kojto | 90:cb3d968589d8 | 579 | uint8_t MEEN : 2; /*!< [5:4] Mass Erase Enable Bits */ |
Kojto | 90:cb3d968589d8 | 580 | uint8_t KEYEN : 2; /*!< [7:6] Backdoor Key Security Enable */ |
Kojto | 90:cb3d968589d8 | 581 | } B; |
Kojto | 90:cb3d968589d8 | 582 | } hw_ftfe_fsec_t; |
Kojto | 90:cb3d968589d8 | 583 | |
Kojto | 90:cb3d968589d8 | 584 | /*! |
Kojto | 90:cb3d968589d8 | 585 | * @name Constants and macros for entire FTFE_FSEC register |
Kojto | 90:cb3d968589d8 | 586 | */ |
Kojto | 90:cb3d968589d8 | 587 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 588 | #define HW_FTFE_FSEC_ADDR(x) ((x) + 0x2U) |
Kojto | 90:cb3d968589d8 | 589 | |
Kojto | 90:cb3d968589d8 | 590 | #define HW_FTFE_FSEC(x) (*(__I hw_ftfe_fsec_t *) HW_FTFE_FSEC_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 591 | #define HW_FTFE_FSEC_RD(x) (HW_FTFE_FSEC(x).U) |
Kojto | 90:cb3d968589d8 | 592 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 593 | |
Kojto | 90:cb3d968589d8 | 594 | /* |
Kojto | 90:cb3d968589d8 | 595 | * Constants & macros for individual FTFE_FSEC bitfields |
Kojto | 90:cb3d968589d8 | 596 | */ |
Kojto | 90:cb3d968589d8 | 597 | |
Kojto | 90:cb3d968589d8 | 598 | /*! |
Kojto | 90:cb3d968589d8 | 599 | * @name Register FTFE_FSEC, field SEC[1:0] (RO) |
Kojto | 90:cb3d968589d8 | 600 | * |
Kojto | 90:cb3d968589d8 | 601 | * These bits define the security state of the MCU. In the secure state, the MCU |
Kojto | 90:cb3d968589d8 | 602 | * limits access to FTFE module resources. The limitations are defined per |
Kojto | 90:cb3d968589d8 | 603 | * device and are detailed in the Chip Configuration details. If the FTFE module is |
Kojto | 90:cb3d968589d8 | 604 | * unsecured using backdoor key access, the SEC bits are forced to 10b. |
Kojto | 90:cb3d968589d8 | 605 | * |
Kojto | 90:cb3d968589d8 | 606 | * Values: |
Kojto | 90:cb3d968589d8 | 607 | * - 00 - MCU security status is secure |
Kojto | 90:cb3d968589d8 | 608 | * - 01 - MCU security status is secure |
Kojto | 90:cb3d968589d8 | 609 | * - 10 - MCU security status is unsecure (The standard shipping condition of |
Kojto | 90:cb3d968589d8 | 610 | * the FTFE is unsecure.) |
Kojto | 90:cb3d968589d8 | 611 | * - 11 - MCU security status is secure |
Kojto | 90:cb3d968589d8 | 612 | */ |
Kojto | 90:cb3d968589d8 | 613 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 614 | #define BP_FTFE_FSEC_SEC (0U) /*!< Bit position for FTFE_FSEC_SEC. */ |
Kojto | 90:cb3d968589d8 | 615 | #define BM_FTFE_FSEC_SEC (0x03U) /*!< Bit mask for FTFE_FSEC_SEC. */ |
Kojto | 90:cb3d968589d8 | 616 | #define BS_FTFE_FSEC_SEC (2U) /*!< Bit field size in bits for FTFE_FSEC_SEC. */ |
Kojto | 90:cb3d968589d8 | 617 | |
Kojto | 90:cb3d968589d8 | 618 | /*! @brief Read current value of the FTFE_FSEC_SEC field. */ |
Kojto | 90:cb3d968589d8 | 619 | #define BR_FTFE_FSEC_SEC(x) (HW_FTFE_FSEC(x).B.SEC) |
Kojto | 90:cb3d968589d8 | 620 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 621 | |
Kojto | 90:cb3d968589d8 | 622 | /*! |
Kojto | 90:cb3d968589d8 | 623 | * @name Register FTFE_FSEC, field FSLACC[3:2] (RO) |
Kojto | 90:cb3d968589d8 | 624 | * |
Kojto | 90:cb3d968589d8 | 625 | * These bits enable or disable access to the flash memory contents during |
Kojto | 90:cb3d968589d8 | 626 | * returned part failure analysis at Freescale. When SEC is secure and FSLACC is |
Kojto | 90:cb3d968589d8 | 627 | * denied, access to the program flash contents is denied and any failure analysis |
Kojto | 90:cb3d968589d8 | 628 | * performed by Freescale factory test must begin with a full erase to unsecure the |
Kojto | 90:cb3d968589d8 | 629 | * part. When access is granted (SEC is unsecure, or SEC is secure and FSLACC is |
Kojto | 90:cb3d968589d8 | 630 | * granted), Freescale factory testing has visibility of the current flash |
Kojto | 90:cb3d968589d8 | 631 | * contents. The state of the FSLACC bits is only relevant when the SEC bits are set to |
Kojto | 90:cb3d968589d8 | 632 | * secure. When the SEC field is set to unsecure, the FSLACC setting does not |
Kojto | 90:cb3d968589d8 | 633 | * matter. |
Kojto | 90:cb3d968589d8 | 634 | * |
Kojto | 90:cb3d968589d8 | 635 | * Values: |
Kojto | 90:cb3d968589d8 | 636 | * - 00 - Freescale factory access granted |
Kojto | 90:cb3d968589d8 | 637 | * - 01 - Freescale factory access denied |
Kojto | 90:cb3d968589d8 | 638 | * - 10 - Freescale factory access denied |
Kojto | 90:cb3d968589d8 | 639 | * - 11 - Freescale factory access granted |
Kojto | 90:cb3d968589d8 | 640 | */ |
Kojto | 90:cb3d968589d8 | 641 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 642 | #define BP_FTFE_FSEC_FSLACC (2U) /*!< Bit position for FTFE_FSEC_FSLACC. */ |
Kojto | 90:cb3d968589d8 | 643 | #define BM_FTFE_FSEC_FSLACC (0x0CU) /*!< Bit mask for FTFE_FSEC_FSLACC. */ |
Kojto | 90:cb3d968589d8 | 644 | #define BS_FTFE_FSEC_FSLACC (2U) /*!< Bit field size in bits for FTFE_FSEC_FSLACC. */ |
Kojto | 90:cb3d968589d8 | 645 | |
Kojto | 90:cb3d968589d8 | 646 | /*! @brief Read current value of the FTFE_FSEC_FSLACC field. */ |
Kojto | 90:cb3d968589d8 | 647 | #define BR_FTFE_FSEC_FSLACC(x) (HW_FTFE_FSEC(x).B.FSLACC) |
Kojto | 90:cb3d968589d8 | 648 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 649 | |
Kojto | 90:cb3d968589d8 | 650 | /*! |
Kojto | 90:cb3d968589d8 | 651 | * @name Register FTFE_FSEC, field MEEN[5:4] (RO) |
Kojto | 90:cb3d968589d8 | 652 | * |
Kojto | 90:cb3d968589d8 | 653 | * Enables and disables mass erase capability of the FTFE module. The state of |
Kojto | 90:cb3d968589d8 | 654 | * the MEEN bits is only relevant when the SEC bits are set to secure outside of |
Kojto | 90:cb3d968589d8 | 655 | * NVM Normal Mode. When the SEC field is set to unsecure, the MEEN setting does |
Kojto | 90:cb3d968589d8 | 656 | * not matter. |
Kojto | 90:cb3d968589d8 | 657 | * |
Kojto | 90:cb3d968589d8 | 658 | * Values: |
Kojto | 90:cb3d968589d8 | 659 | * - 00 - Mass erase is enabled |
Kojto | 90:cb3d968589d8 | 660 | * - 01 - Mass erase is enabled |
Kojto | 90:cb3d968589d8 | 661 | * - 10 - Mass erase is disabled |
Kojto | 90:cb3d968589d8 | 662 | * - 11 - Mass erase is enabled |
Kojto | 90:cb3d968589d8 | 663 | */ |
Kojto | 90:cb3d968589d8 | 664 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 665 | #define BP_FTFE_FSEC_MEEN (4U) /*!< Bit position for FTFE_FSEC_MEEN. */ |
Kojto | 90:cb3d968589d8 | 666 | #define BM_FTFE_FSEC_MEEN (0x30U) /*!< Bit mask for FTFE_FSEC_MEEN. */ |
Kojto | 90:cb3d968589d8 | 667 | #define BS_FTFE_FSEC_MEEN (2U) /*!< Bit field size in bits for FTFE_FSEC_MEEN. */ |
Kojto | 90:cb3d968589d8 | 668 | |
Kojto | 90:cb3d968589d8 | 669 | /*! @brief Read current value of the FTFE_FSEC_MEEN field. */ |
Kojto | 90:cb3d968589d8 | 670 | #define BR_FTFE_FSEC_MEEN(x) (HW_FTFE_FSEC(x).B.MEEN) |
Kojto | 90:cb3d968589d8 | 671 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 672 | |
Kojto | 90:cb3d968589d8 | 673 | /*! |
Kojto | 90:cb3d968589d8 | 674 | * @name Register FTFE_FSEC, field KEYEN[7:6] (RO) |
Kojto | 90:cb3d968589d8 | 675 | * |
Kojto | 90:cb3d968589d8 | 676 | * These bits enable and disable backdoor key access to the FTFE module. |
Kojto | 90:cb3d968589d8 | 677 | * |
Kojto | 90:cb3d968589d8 | 678 | * Values: |
Kojto | 90:cb3d968589d8 | 679 | * - 00 - Backdoor key access disabled |
Kojto | 90:cb3d968589d8 | 680 | * - 01 - Backdoor key access disabled (preferred KEYEN state to disable |
Kojto | 90:cb3d968589d8 | 681 | * backdoor key access) |
Kojto | 90:cb3d968589d8 | 682 | * - 10 - Backdoor key access enabled |
Kojto | 90:cb3d968589d8 | 683 | * - 11 - Backdoor key access disabled |
Kojto | 90:cb3d968589d8 | 684 | */ |
Kojto | 90:cb3d968589d8 | 685 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 686 | #define BP_FTFE_FSEC_KEYEN (6U) /*!< Bit position for FTFE_FSEC_KEYEN. */ |
Kojto | 90:cb3d968589d8 | 687 | #define BM_FTFE_FSEC_KEYEN (0xC0U) /*!< Bit mask for FTFE_FSEC_KEYEN. */ |
Kojto | 90:cb3d968589d8 | 688 | #define BS_FTFE_FSEC_KEYEN (2U) /*!< Bit field size in bits for FTFE_FSEC_KEYEN. */ |
Kojto | 90:cb3d968589d8 | 689 | |
Kojto | 90:cb3d968589d8 | 690 | /*! @brief Read current value of the FTFE_FSEC_KEYEN field. */ |
Kojto | 90:cb3d968589d8 | 691 | #define BR_FTFE_FSEC_KEYEN(x) (HW_FTFE_FSEC(x).B.KEYEN) |
Kojto | 90:cb3d968589d8 | 692 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 693 | |
Kojto | 90:cb3d968589d8 | 694 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 695 | * HW_FTFE_FOPT - Flash Option Register |
Kojto | 90:cb3d968589d8 | 696 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 697 | |
Kojto | 90:cb3d968589d8 | 698 | /*! |
Kojto | 90:cb3d968589d8 | 699 | * @brief HW_FTFE_FOPT - Flash Option Register (RO) |
Kojto | 90:cb3d968589d8 | 700 | * |
Kojto | 90:cb3d968589d8 | 701 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 702 | * |
Kojto | 90:cb3d968589d8 | 703 | * The flash option register allows the MCU to customize its operations by |
Kojto | 90:cb3d968589d8 | 704 | * examining the state of these read-only bits, which are loaded from NVM at reset. |
Kojto | 90:cb3d968589d8 | 705 | * The function of the bits is defined in the device's Chip Configuration details. |
Kojto | 90:cb3d968589d8 | 706 | * All bits in the register are read-only. During the reset sequence, the |
Kojto | 90:cb3d968589d8 | 707 | * register is loaded from the flash nonvolatile option byte in the Flash Configuration |
Kojto | 90:cb3d968589d8 | 708 | * Field located in program flash memory. The flash basis for the values is |
Kojto | 90:cb3d968589d8 | 709 | * signified by X in the reset value. |
Kojto | 90:cb3d968589d8 | 710 | */ |
Kojto | 90:cb3d968589d8 | 711 | typedef union _hw_ftfe_fopt |
Kojto | 90:cb3d968589d8 | 712 | { |
Kojto | 90:cb3d968589d8 | 713 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 714 | struct _hw_ftfe_fopt_bitfields |
Kojto | 90:cb3d968589d8 | 715 | { |
Kojto | 90:cb3d968589d8 | 716 | uint8_t OPT : 8; /*!< [7:0] Nonvolatile Option */ |
Kojto | 90:cb3d968589d8 | 717 | } B; |
Kojto | 90:cb3d968589d8 | 718 | } hw_ftfe_fopt_t; |
Kojto | 90:cb3d968589d8 | 719 | |
Kojto | 90:cb3d968589d8 | 720 | /*! |
Kojto | 90:cb3d968589d8 | 721 | * @name Constants and macros for entire FTFE_FOPT register |
Kojto | 90:cb3d968589d8 | 722 | */ |
Kojto | 90:cb3d968589d8 | 723 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 724 | #define HW_FTFE_FOPT_ADDR(x) ((x) + 0x3U) |
Kojto | 90:cb3d968589d8 | 725 | |
Kojto | 90:cb3d968589d8 | 726 | #define HW_FTFE_FOPT(x) (*(__I hw_ftfe_fopt_t *) HW_FTFE_FOPT_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 727 | #define HW_FTFE_FOPT_RD(x) (HW_FTFE_FOPT(x).U) |
Kojto | 90:cb3d968589d8 | 728 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 729 | |
Kojto | 90:cb3d968589d8 | 730 | /* |
Kojto | 90:cb3d968589d8 | 731 | * Constants & macros for individual FTFE_FOPT bitfields |
Kojto | 90:cb3d968589d8 | 732 | */ |
Kojto | 90:cb3d968589d8 | 733 | |
Kojto | 90:cb3d968589d8 | 734 | /*! |
Kojto | 90:cb3d968589d8 | 735 | * @name Register FTFE_FOPT, field OPT[7:0] (RO) |
Kojto | 90:cb3d968589d8 | 736 | * |
Kojto | 90:cb3d968589d8 | 737 | * These bits are loaded from flash to this register at reset. Refer to the |
Kojto | 90:cb3d968589d8 | 738 | * device's Chip Configuration details for the definition and use of these bits. |
Kojto | 90:cb3d968589d8 | 739 | */ |
Kojto | 90:cb3d968589d8 | 740 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 741 | #define BP_FTFE_FOPT_OPT (0U) /*!< Bit position for FTFE_FOPT_OPT. */ |
Kojto | 90:cb3d968589d8 | 742 | #define BM_FTFE_FOPT_OPT (0xFFU) /*!< Bit mask for FTFE_FOPT_OPT. */ |
Kojto | 90:cb3d968589d8 | 743 | #define BS_FTFE_FOPT_OPT (8U) /*!< Bit field size in bits for FTFE_FOPT_OPT. */ |
Kojto | 90:cb3d968589d8 | 744 | |
Kojto | 90:cb3d968589d8 | 745 | /*! @brief Read current value of the FTFE_FOPT_OPT field. */ |
Kojto | 90:cb3d968589d8 | 746 | #define BR_FTFE_FOPT_OPT(x) (HW_FTFE_FOPT(x).U) |
Kojto | 90:cb3d968589d8 | 747 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 748 | |
Kojto | 90:cb3d968589d8 | 749 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 750 | * HW_FTFE_FCCOB3 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 751 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 752 | |
Kojto | 90:cb3d968589d8 | 753 | /*! |
Kojto | 90:cb3d968589d8 | 754 | * @brief HW_FTFE_FCCOB3 - Flash Common Command Object Registers (RW) |
Kojto | 90:cb3d968589d8 | 755 | * |
Kojto | 90:cb3d968589d8 | 756 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 757 | * |
Kojto | 90:cb3d968589d8 | 758 | * The FCCOB register group provides 12 bytes for command codes and parameters. |
Kojto | 90:cb3d968589d8 | 759 | * The individual bytes within the set append a 0-B hex identifier to the FCCOB |
Kojto | 90:cb3d968589d8 | 760 | * register name: FCCOB0, FCCOB1, ..., FCCOBB. |
Kojto | 90:cb3d968589d8 | 761 | */ |
Kojto | 90:cb3d968589d8 | 762 | typedef union _hw_ftfe_fccob3 |
Kojto | 90:cb3d968589d8 | 763 | { |
Kojto | 90:cb3d968589d8 | 764 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 765 | struct _hw_ftfe_fccob3_bitfields |
Kojto | 90:cb3d968589d8 | 766 | { |
Kojto | 90:cb3d968589d8 | 767 | uint8_t CCOBn : 8; /*!< [7:0] */ |
Kojto | 90:cb3d968589d8 | 768 | } B; |
Kojto | 90:cb3d968589d8 | 769 | } hw_ftfe_fccob3_t; |
Kojto | 90:cb3d968589d8 | 770 | |
Kojto | 90:cb3d968589d8 | 771 | /*! |
Kojto | 90:cb3d968589d8 | 772 | * @name Constants and macros for entire FTFE_FCCOB3 register |
Kojto | 90:cb3d968589d8 | 773 | */ |
Kojto | 90:cb3d968589d8 | 774 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 775 | #define HW_FTFE_FCCOB3_ADDR(x) ((x) + 0x4U) |
Kojto | 90:cb3d968589d8 | 776 | |
Kojto | 90:cb3d968589d8 | 777 | #define HW_FTFE_FCCOB3(x) (*(__IO hw_ftfe_fccob3_t *) HW_FTFE_FCCOB3_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 778 | #define HW_FTFE_FCCOB3_RD(x) (HW_FTFE_FCCOB3(x).U) |
Kojto | 90:cb3d968589d8 | 779 | #define HW_FTFE_FCCOB3_WR(x, v) (HW_FTFE_FCCOB3(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 780 | #define HW_FTFE_FCCOB3_SET(x, v) (HW_FTFE_FCCOB3_WR(x, HW_FTFE_FCCOB3_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 781 | #define HW_FTFE_FCCOB3_CLR(x, v) (HW_FTFE_FCCOB3_WR(x, HW_FTFE_FCCOB3_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 782 | #define HW_FTFE_FCCOB3_TOG(x, v) (HW_FTFE_FCCOB3_WR(x, HW_FTFE_FCCOB3_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 783 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 784 | |
Kojto | 90:cb3d968589d8 | 785 | /* |
Kojto | 90:cb3d968589d8 | 786 | * Constants & macros for individual FTFE_FCCOB3 bitfields |
Kojto | 90:cb3d968589d8 | 787 | */ |
Kojto | 90:cb3d968589d8 | 788 | |
Kojto | 90:cb3d968589d8 | 789 | /*! |
Kojto | 90:cb3d968589d8 | 790 | * @name Register FTFE_FCCOB3, field CCOBn[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 791 | * |
Kojto | 90:cb3d968589d8 | 792 | * The FCCOB register provides a command code and relevant parameters to the |
Kojto | 90:cb3d968589d8 | 793 | * memory controller. The individual registers that compose the FCCOB data set can |
Kojto | 90:cb3d968589d8 | 794 | * be written in any order, but you must provide all needed values, which vary |
Kojto | 90:cb3d968589d8 | 795 | * from command to command. First, set up all required FCCOB fields and then |
Kojto | 90:cb3d968589d8 | 796 | * initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears |
Kojto | 90:cb3d968589d8 | 797 | * the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed |
Kojto | 90:cb3d968589d8 | 798 | * by the user until the command completes (CCIF returns to 1). No command |
Kojto | 90:cb3d968589d8 | 799 | * buffering or queueing is provided; the next command can be loaded only after the |
Kojto | 90:cb3d968589d8 | 800 | * current command completes. Some commands return information to the FCCOB |
Kojto | 90:cb3d968589d8 | 801 | * registers. Any values returned to FCCOB are available for reading after the |
Kojto | 90:cb3d968589d8 | 802 | * FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a |
Kojto | 90:cb3d968589d8 | 803 | * generic FTFE command format. The first FCCOB register, FCCOB0, always contains |
Kojto | 90:cb3d968589d8 | 804 | * the command code. This 8-bit value defines the command to be executed. The |
Kojto | 90:cb3d968589d8 | 805 | * command code is followed by the parameters required for this specific FTFE command, |
Kojto | 90:cb3d968589d8 | 806 | * typically an address and/or data values. The command parameter table is |
Kojto | 90:cb3d968589d8 | 807 | * written in terms of FCCOB Number (which is equivalent to the byte number). This |
Kojto | 90:cb3d968589d8 | 808 | * number is a reference to the FCCOB register name and is not the register address. |
Kojto | 90:cb3d968589d8 | 809 | * FCCOB NumberRefers to FCCOB register name, not register address Typical |
Kojto | 90:cb3d968589d8 | 810 | * Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1 |
Kojto | 90:cb3d968589d8 | 811 | * Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0 |
Kojto | 90:cb3d968589d8 | 812 | * 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data |
Kojto | 90:cb3d968589d8 | 813 | * Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB |
Kojto | 90:cb3d968589d8 | 814 | * register group uses a big endian addressing convention. For all command parameter |
Kojto | 90:cb3d968589d8 | 815 | * fields larger than 1 byte, the most significant data resides in the lowest FCCOB |
Kojto | 90:cb3d968589d8 | 816 | * register number. The FCCOB register group may be read and written as |
Kojto | 90:cb3d968589d8 | 817 | * individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes). |
Kojto | 90:cb3d968589d8 | 818 | */ |
Kojto | 90:cb3d968589d8 | 819 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 820 | #define BP_FTFE_FCCOB3_CCOBn (0U) /*!< Bit position for FTFE_FCCOB3_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 821 | #define BM_FTFE_FCCOB3_CCOBn (0xFFU) /*!< Bit mask for FTFE_FCCOB3_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 822 | #define BS_FTFE_FCCOB3_CCOBn (8U) /*!< Bit field size in bits for FTFE_FCCOB3_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 823 | |
Kojto | 90:cb3d968589d8 | 824 | /*! @brief Read current value of the FTFE_FCCOB3_CCOBn field. */ |
Kojto | 90:cb3d968589d8 | 825 | #define BR_FTFE_FCCOB3_CCOBn(x) (HW_FTFE_FCCOB3(x).U) |
Kojto | 90:cb3d968589d8 | 826 | |
Kojto | 90:cb3d968589d8 | 827 | /*! @brief Format value for bitfield FTFE_FCCOB3_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 828 | #define BF_FTFE_FCCOB3_CCOBn(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCCOB3_CCOBn) & BM_FTFE_FCCOB3_CCOBn) |
Kojto | 90:cb3d968589d8 | 829 | |
Kojto | 90:cb3d968589d8 | 830 | /*! @brief Set the CCOBn field to a new value. */ |
Kojto | 90:cb3d968589d8 | 831 | #define BW_FTFE_FCCOB3_CCOBn(x, v) (HW_FTFE_FCCOB3_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 832 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 833 | |
Kojto | 90:cb3d968589d8 | 834 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 835 | * HW_FTFE_FCCOB2 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 836 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 837 | |
Kojto | 90:cb3d968589d8 | 838 | /*! |
Kojto | 90:cb3d968589d8 | 839 | * @brief HW_FTFE_FCCOB2 - Flash Common Command Object Registers (RW) |
Kojto | 90:cb3d968589d8 | 840 | * |
Kojto | 90:cb3d968589d8 | 841 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 842 | * |
Kojto | 90:cb3d968589d8 | 843 | * The FCCOB register group provides 12 bytes for command codes and parameters. |
Kojto | 90:cb3d968589d8 | 844 | * The individual bytes within the set append a 0-B hex identifier to the FCCOB |
Kojto | 90:cb3d968589d8 | 845 | * register name: FCCOB0, FCCOB1, ..., FCCOBB. |
Kojto | 90:cb3d968589d8 | 846 | */ |
Kojto | 90:cb3d968589d8 | 847 | typedef union _hw_ftfe_fccob2 |
Kojto | 90:cb3d968589d8 | 848 | { |
Kojto | 90:cb3d968589d8 | 849 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 850 | struct _hw_ftfe_fccob2_bitfields |
Kojto | 90:cb3d968589d8 | 851 | { |
Kojto | 90:cb3d968589d8 | 852 | uint8_t CCOBn : 8; /*!< [7:0] */ |
Kojto | 90:cb3d968589d8 | 853 | } B; |
Kojto | 90:cb3d968589d8 | 854 | } hw_ftfe_fccob2_t; |
Kojto | 90:cb3d968589d8 | 855 | |
Kojto | 90:cb3d968589d8 | 856 | /*! |
Kojto | 90:cb3d968589d8 | 857 | * @name Constants and macros for entire FTFE_FCCOB2 register |
Kojto | 90:cb3d968589d8 | 858 | */ |
Kojto | 90:cb3d968589d8 | 859 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 860 | #define HW_FTFE_FCCOB2_ADDR(x) ((x) + 0x5U) |
Kojto | 90:cb3d968589d8 | 861 | |
Kojto | 90:cb3d968589d8 | 862 | #define HW_FTFE_FCCOB2(x) (*(__IO hw_ftfe_fccob2_t *) HW_FTFE_FCCOB2_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 863 | #define HW_FTFE_FCCOB2_RD(x) (HW_FTFE_FCCOB2(x).U) |
Kojto | 90:cb3d968589d8 | 864 | #define HW_FTFE_FCCOB2_WR(x, v) (HW_FTFE_FCCOB2(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 865 | #define HW_FTFE_FCCOB2_SET(x, v) (HW_FTFE_FCCOB2_WR(x, HW_FTFE_FCCOB2_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 866 | #define HW_FTFE_FCCOB2_CLR(x, v) (HW_FTFE_FCCOB2_WR(x, HW_FTFE_FCCOB2_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 867 | #define HW_FTFE_FCCOB2_TOG(x, v) (HW_FTFE_FCCOB2_WR(x, HW_FTFE_FCCOB2_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 868 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 869 | |
Kojto | 90:cb3d968589d8 | 870 | /* |
Kojto | 90:cb3d968589d8 | 871 | * Constants & macros for individual FTFE_FCCOB2 bitfields |
Kojto | 90:cb3d968589d8 | 872 | */ |
Kojto | 90:cb3d968589d8 | 873 | |
Kojto | 90:cb3d968589d8 | 874 | /*! |
Kojto | 90:cb3d968589d8 | 875 | * @name Register FTFE_FCCOB2, field CCOBn[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 876 | * |
Kojto | 90:cb3d968589d8 | 877 | * The FCCOB register provides a command code and relevant parameters to the |
Kojto | 90:cb3d968589d8 | 878 | * memory controller. The individual registers that compose the FCCOB data set can |
Kojto | 90:cb3d968589d8 | 879 | * be written in any order, but you must provide all needed values, which vary |
Kojto | 90:cb3d968589d8 | 880 | * from command to command. First, set up all required FCCOB fields and then |
Kojto | 90:cb3d968589d8 | 881 | * initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears |
Kojto | 90:cb3d968589d8 | 882 | * the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed |
Kojto | 90:cb3d968589d8 | 883 | * by the user until the command completes (CCIF returns to 1). No command |
Kojto | 90:cb3d968589d8 | 884 | * buffering or queueing is provided; the next command can be loaded only after the |
Kojto | 90:cb3d968589d8 | 885 | * current command completes. Some commands return information to the FCCOB |
Kojto | 90:cb3d968589d8 | 886 | * registers. Any values returned to FCCOB are available for reading after the |
Kojto | 90:cb3d968589d8 | 887 | * FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a |
Kojto | 90:cb3d968589d8 | 888 | * generic FTFE command format. The first FCCOB register, FCCOB0, always contains |
Kojto | 90:cb3d968589d8 | 889 | * the command code. This 8-bit value defines the command to be executed. The |
Kojto | 90:cb3d968589d8 | 890 | * command code is followed by the parameters required for this specific FTFE command, |
Kojto | 90:cb3d968589d8 | 891 | * typically an address and/or data values. The command parameter table is |
Kojto | 90:cb3d968589d8 | 892 | * written in terms of FCCOB Number (which is equivalent to the byte number). This |
Kojto | 90:cb3d968589d8 | 893 | * number is a reference to the FCCOB register name and is not the register address. |
Kojto | 90:cb3d968589d8 | 894 | * FCCOB NumberRefers to FCCOB register name, not register address Typical |
Kojto | 90:cb3d968589d8 | 895 | * Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1 |
Kojto | 90:cb3d968589d8 | 896 | * Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0 |
Kojto | 90:cb3d968589d8 | 897 | * 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data |
Kojto | 90:cb3d968589d8 | 898 | * Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB |
Kojto | 90:cb3d968589d8 | 899 | * register group uses a big endian addressing convention. For all command parameter |
Kojto | 90:cb3d968589d8 | 900 | * fields larger than 1 byte, the most significant data resides in the lowest FCCOB |
Kojto | 90:cb3d968589d8 | 901 | * register number. The FCCOB register group may be read and written as |
Kojto | 90:cb3d968589d8 | 902 | * individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes). |
Kojto | 90:cb3d968589d8 | 903 | */ |
Kojto | 90:cb3d968589d8 | 904 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 905 | #define BP_FTFE_FCCOB2_CCOBn (0U) /*!< Bit position for FTFE_FCCOB2_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 906 | #define BM_FTFE_FCCOB2_CCOBn (0xFFU) /*!< Bit mask for FTFE_FCCOB2_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 907 | #define BS_FTFE_FCCOB2_CCOBn (8U) /*!< Bit field size in bits for FTFE_FCCOB2_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 908 | |
Kojto | 90:cb3d968589d8 | 909 | /*! @brief Read current value of the FTFE_FCCOB2_CCOBn field. */ |
Kojto | 90:cb3d968589d8 | 910 | #define BR_FTFE_FCCOB2_CCOBn(x) (HW_FTFE_FCCOB2(x).U) |
Kojto | 90:cb3d968589d8 | 911 | |
Kojto | 90:cb3d968589d8 | 912 | /*! @brief Format value for bitfield FTFE_FCCOB2_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 913 | #define BF_FTFE_FCCOB2_CCOBn(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCCOB2_CCOBn) & BM_FTFE_FCCOB2_CCOBn) |
Kojto | 90:cb3d968589d8 | 914 | |
Kojto | 90:cb3d968589d8 | 915 | /*! @brief Set the CCOBn field to a new value. */ |
Kojto | 90:cb3d968589d8 | 916 | #define BW_FTFE_FCCOB2_CCOBn(x, v) (HW_FTFE_FCCOB2_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 917 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 918 | |
Kojto | 90:cb3d968589d8 | 919 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 920 | * HW_FTFE_FCCOB1 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 921 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 922 | |
Kojto | 90:cb3d968589d8 | 923 | /*! |
Kojto | 90:cb3d968589d8 | 924 | * @brief HW_FTFE_FCCOB1 - Flash Common Command Object Registers (RW) |
Kojto | 90:cb3d968589d8 | 925 | * |
Kojto | 90:cb3d968589d8 | 926 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 927 | * |
Kojto | 90:cb3d968589d8 | 928 | * The FCCOB register group provides 12 bytes for command codes and parameters. |
Kojto | 90:cb3d968589d8 | 929 | * The individual bytes within the set append a 0-B hex identifier to the FCCOB |
Kojto | 90:cb3d968589d8 | 930 | * register name: FCCOB0, FCCOB1, ..., FCCOBB. |
Kojto | 90:cb3d968589d8 | 931 | */ |
Kojto | 90:cb3d968589d8 | 932 | typedef union _hw_ftfe_fccob1 |
Kojto | 90:cb3d968589d8 | 933 | { |
Kojto | 90:cb3d968589d8 | 934 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 935 | struct _hw_ftfe_fccob1_bitfields |
Kojto | 90:cb3d968589d8 | 936 | { |
Kojto | 90:cb3d968589d8 | 937 | uint8_t CCOBn : 8; /*!< [7:0] */ |
Kojto | 90:cb3d968589d8 | 938 | } B; |
Kojto | 90:cb3d968589d8 | 939 | } hw_ftfe_fccob1_t; |
Kojto | 90:cb3d968589d8 | 940 | |
Kojto | 90:cb3d968589d8 | 941 | /*! |
Kojto | 90:cb3d968589d8 | 942 | * @name Constants and macros for entire FTFE_FCCOB1 register |
Kojto | 90:cb3d968589d8 | 943 | */ |
Kojto | 90:cb3d968589d8 | 944 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 945 | #define HW_FTFE_FCCOB1_ADDR(x) ((x) + 0x6U) |
Kojto | 90:cb3d968589d8 | 946 | |
Kojto | 90:cb3d968589d8 | 947 | #define HW_FTFE_FCCOB1(x) (*(__IO hw_ftfe_fccob1_t *) HW_FTFE_FCCOB1_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 948 | #define HW_FTFE_FCCOB1_RD(x) (HW_FTFE_FCCOB1(x).U) |
Kojto | 90:cb3d968589d8 | 949 | #define HW_FTFE_FCCOB1_WR(x, v) (HW_FTFE_FCCOB1(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 950 | #define HW_FTFE_FCCOB1_SET(x, v) (HW_FTFE_FCCOB1_WR(x, HW_FTFE_FCCOB1_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 951 | #define HW_FTFE_FCCOB1_CLR(x, v) (HW_FTFE_FCCOB1_WR(x, HW_FTFE_FCCOB1_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 952 | #define HW_FTFE_FCCOB1_TOG(x, v) (HW_FTFE_FCCOB1_WR(x, HW_FTFE_FCCOB1_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 953 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 954 | |
Kojto | 90:cb3d968589d8 | 955 | /* |
Kojto | 90:cb3d968589d8 | 956 | * Constants & macros for individual FTFE_FCCOB1 bitfields |
Kojto | 90:cb3d968589d8 | 957 | */ |
Kojto | 90:cb3d968589d8 | 958 | |
Kojto | 90:cb3d968589d8 | 959 | /*! |
Kojto | 90:cb3d968589d8 | 960 | * @name Register FTFE_FCCOB1, field CCOBn[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 961 | * |
Kojto | 90:cb3d968589d8 | 962 | * The FCCOB register provides a command code and relevant parameters to the |
Kojto | 90:cb3d968589d8 | 963 | * memory controller. The individual registers that compose the FCCOB data set can |
Kojto | 90:cb3d968589d8 | 964 | * be written in any order, but you must provide all needed values, which vary |
Kojto | 90:cb3d968589d8 | 965 | * from command to command. First, set up all required FCCOB fields and then |
Kojto | 90:cb3d968589d8 | 966 | * initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears |
Kojto | 90:cb3d968589d8 | 967 | * the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed |
Kojto | 90:cb3d968589d8 | 968 | * by the user until the command completes (CCIF returns to 1). No command |
Kojto | 90:cb3d968589d8 | 969 | * buffering or queueing is provided; the next command can be loaded only after the |
Kojto | 90:cb3d968589d8 | 970 | * current command completes. Some commands return information to the FCCOB |
Kojto | 90:cb3d968589d8 | 971 | * registers. Any values returned to FCCOB are available for reading after the |
Kojto | 90:cb3d968589d8 | 972 | * FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a |
Kojto | 90:cb3d968589d8 | 973 | * generic FTFE command format. The first FCCOB register, FCCOB0, always contains |
Kojto | 90:cb3d968589d8 | 974 | * the command code. This 8-bit value defines the command to be executed. The |
Kojto | 90:cb3d968589d8 | 975 | * command code is followed by the parameters required for this specific FTFE command, |
Kojto | 90:cb3d968589d8 | 976 | * typically an address and/or data values. The command parameter table is |
Kojto | 90:cb3d968589d8 | 977 | * written in terms of FCCOB Number (which is equivalent to the byte number). This |
Kojto | 90:cb3d968589d8 | 978 | * number is a reference to the FCCOB register name and is not the register address. |
Kojto | 90:cb3d968589d8 | 979 | * FCCOB NumberRefers to FCCOB register name, not register address Typical |
Kojto | 90:cb3d968589d8 | 980 | * Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1 |
Kojto | 90:cb3d968589d8 | 981 | * Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0 |
Kojto | 90:cb3d968589d8 | 982 | * 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data |
Kojto | 90:cb3d968589d8 | 983 | * Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB |
Kojto | 90:cb3d968589d8 | 984 | * register group uses a big endian addressing convention. For all command parameter |
Kojto | 90:cb3d968589d8 | 985 | * fields larger than 1 byte, the most significant data resides in the lowest FCCOB |
Kojto | 90:cb3d968589d8 | 986 | * register number. The FCCOB register group may be read and written as |
Kojto | 90:cb3d968589d8 | 987 | * individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes). |
Kojto | 90:cb3d968589d8 | 988 | */ |
Kojto | 90:cb3d968589d8 | 989 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 990 | #define BP_FTFE_FCCOB1_CCOBn (0U) /*!< Bit position for FTFE_FCCOB1_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 991 | #define BM_FTFE_FCCOB1_CCOBn (0xFFU) /*!< Bit mask for FTFE_FCCOB1_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 992 | #define BS_FTFE_FCCOB1_CCOBn (8U) /*!< Bit field size in bits for FTFE_FCCOB1_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 993 | |
Kojto | 90:cb3d968589d8 | 994 | /*! @brief Read current value of the FTFE_FCCOB1_CCOBn field. */ |
Kojto | 90:cb3d968589d8 | 995 | #define BR_FTFE_FCCOB1_CCOBn(x) (HW_FTFE_FCCOB1(x).U) |
Kojto | 90:cb3d968589d8 | 996 | |
Kojto | 90:cb3d968589d8 | 997 | /*! @brief Format value for bitfield FTFE_FCCOB1_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 998 | #define BF_FTFE_FCCOB1_CCOBn(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCCOB1_CCOBn) & BM_FTFE_FCCOB1_CCOBn) |
Kojto | 90:cb3d968589d8 | 999 | |
Kojto | 90:cb3d968589d8 | 1000 | /*! @brief Set the CCOBn field to a new value. */ |
Kojto | 90:cb3d968589d8 | 1001 | #define BW_FTFE_FCCOB1_CCOBn(x, v) (HW_FTFE_FCCOB1_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 1002 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1003 | |
Kojto | 90:cb3d968589d8 | 1004 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 1005 | * HW_FTFE_FCCOB0 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 1006 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 1007 | |
Kojto | 90:cb3d968589d8 | 1008 | /*! |
Kojto | 90:cb3d968589d8 | 1009 | * @brief HW_FTFE_FCCOB0 - Flash Common Command Object Registers (RW) |
Kojto | 90:cb3d968589d8 | 1010 | * |
Kojto | 90:cb3d968589d8 | 1011 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 1012 | * |
Kojto | 90:cb3d968589d8 | 1013 | * The FCCOB register group provides 12 bytes for command codes and parameters. |
Kojto | 90:cb3d968589d8 | 1014 | * The individual bytes within the set append a 0-B hex identifier to the FCCOB |
Kojto | 90:cb3d968589d8 | 1015 | * register name: FCCOB0, FCCOB1, ..., FCCOBB. |
Kojto | 90:cb3d968589d8 | 1016 | */ |
Kojto | 90:cb3d968589d8 | 1017 | typedef union _hw_ftfe_fccob0 |
Kojto | 90:cb3d968589d8 | 1018 | { |
Kojto | 90:cb3d968589d8 | 1019 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 1020 | struct _hw_ftfe_fccob0_bitfields |
Kojto | 90:cb3d968589d8 | 1021 | { |
Kojto | 90:cb3d968589d8 | 1022 | uint8_t CCOBn : 8; /*!< [7:0] */ |
Kojto | 90:cb3d968589d8 | 1023 | } B; |
Kojto | 90:cb3d968589d8 | 1024 | } hw_ftfe_fccob0_t; |
Kojto | 90:cb3d968589d8 | 1025 | |
Kojto | 90:cb3d968589d8 | 1026 | /*! |
Kojto | 90:cb3d968589d8 | 1027 | * @name Constants and macros for entire FTFE_FCCOB0 register |
Kojto | 90:cb3d968589d8 | 1028 | */ |
Kojto | 90:cb3d968589d8 | 1029 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1030 | #define HW_FTFE_FCCOB0_ADDR(x) ((x) + 0x7U) |
Kojto | 90:cb3d968589d8 | 1031 | |
Kojto | 90:cb3d968589d8 | 1032 | #define HW_FTFE_FCCOB0(x) (*(__IO hw_ftfe_fccob0_t *) HW_FTFE_FCCOB0_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 1033 | #define HW_FTFE_FCCOB0_RD(x) (HW_FTFE_FCCOB0(x).U) |
Kojto | 90:cb3d968589d8 | 1034 | #define HW_FTFE_FCCOB0_WR(x, v) (HW_FTFE_FCCOB0(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 1035 | #define HW_FTFE_FCCOB0_SET(x, v) (HW_FTFE_FCCOB0_WR(x, HW_FTFE_FCCOB0_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 1036 | #define HW_FTFE_FCCOB0_CLR(x, v) (HW_FTFE_FCCOB0_WR(x, HW_FTFE_FCCOB0_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 1037 | #define HW_FTFE_FCCOB0_TOG(x, v) (HW_FTFE_FCCOB0_WR(x, HW_FTFE_FCCOB0_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 1038 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1039 | |
Kojto | 90:cb3d968589d8 | 1040 | /* |
Kojto | 90:cb3d968589d8 | 1041 | * Constants & macros for individual FTFE_FCCOB0 bitfields |
Kojto | 90:cb3d968589d8 | 1042 | */ |
Kojto | 90:cb3d968589d8 | 1043 | |
Kojto | 90:cb3d968589d8 | 1044 | /*! |
Kojto | 90:cb3d968589d8 | 1045 | * @name Register FTFE_FCCOB0, field CCOBn[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 1046 | * |
Kojto | 90:cb3d968589d8 | 1047 | * The FCCOB register provides a command code and relevant parameters to the |
Kojto | 90:cb3d968589d8 | 1048 | * memory controller. The individual registers that compose the FCCOB data set can |
Kojto | 90:cb3d968589d8 | 1049 | * be written in any order, but you must provide all needed values, which vary |
Kojto | 90:cb3d968589d8 | 1050 | * from command to command. First, set up all required FCCOB fields and then |
Kojto | 90:cb3d968589d8 | 1051 | * initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears |
Kojto | 90:cb3d968589d8 | 1052 | * the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed |
Kojto | 90:cb3d968589d8 | 1053 | * by the user until the command completes (CCIF returns to 1). No command |
Kojto | 90:cb3d968589d8 | 1054 | * buffering or queueing is provided; the next command can be loaded only after the |
Kojto | 90:cb3d968589d8 | 1055 | * current command completes. Some commands return information to the FCCOB |
Kojto | 90:cb3d968589d8 | 1056 | * registers. Any values returned to FCCOB are available for reading after the |
Kojto | 90:cb3d968589d8 | 1057 | * FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a |
Kojto | 90:cb3d968589d8 | 1058 | * generic FTFE command format. The first FCCOB register, FCCOB0, always contains |
Kojto | 90:cb3d968589d8 | 1059 | * the command code. This 8-bit value defines the command to be executed. The |
Kojto | 90:cb3d968589d8 | 1060 | * command code is followed by the parameters required for this specific FTFE command, |
Kojto | 90:cb3d968589d8 | 1061 | * typically an address and/or data values. The command parameter table is |
Kojto | 90:cb3d968589d8 | 1062 | * written in terms of FCCOB Number (which is equivalent to the byte number). This |
Kojto | 90:cb3d968589d8 | 1063 | * number is a reference to the FCCOB register name and is not the register address. |
Kojto | 90:cb3d968589d8 | 1064 | * FCCOB NumberRefers to FCCOB register name, not register address Typical |
Kojto | 90:cb3d968589d8 | 1065 | * Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1 |
Kojto | 90:cb3d968589d8 | 1066 | * Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0 |
Kojto | 90:cb3d968589d8 | 1067 | * 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data |
Kojto | 90:cb3d968589d8 | 1068 | * Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB |
Kojto | 90:cb3d968589d8 | 1069 | * register group uses a big endian addressing convention. For all command parameter |
Kojto | 90:cb3d968589d8 | 1070 | * fields larger than 1 byte, the most significant data resides in the lowest FCCOB |
Kojto | 90:cb3d968589d8 | 1071 | * register number. The FCCOB register group may be read and written as |
Kojto | 90:cb3d968589d8 | 1072 | * individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes). |
Kojto | 90:cb3d968589d8 | 1073 | */ |
Kojto | 90:cb3d968589d8 | 1074 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1075 | #define BP_FTFE_FCCOB0_CCOBn (0U) /*!< Bit position for FTFE_FCCOB0_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1076 | #define BM_FTFE_FCCOB0_CCOBn (0xFFU) /*!< Bit mask for FTFE_FCCOB0_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1077 | #define BS_FTFE_FCCOB0_CCOBn (8U) /*!< Bit field size in bits for FTFE_FCCOB0_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1078 | |
Kojto | 90:cb3d968589d8 | 1079 | /*! @brief Read current value of the FTFE_FCCOB0_CCOBn field. */ |
Kojto | 90:cb3d968589d8 | 1080 | #define BR_FTFE_FCCOB0_CCOBn(x) (HW_FTFE_FCCOB0(x).U) |
Kojto | 90:cb3d968589d8 | 1081 | |
Kojto | 90:cb3d968589d8 | 1082 | /*! @brief Format value for bitfield FTFE_FCCOB0_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1083 | #define BF_FTFE_FCCOB0_CCOBn(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCCOB0_CCOBn) & BM_FTFE_FCCOB0_CCOBn) |
Kojto | 90:cb3d968589d8 | 1084 | |
Kojto | 90:cb3d968589d8 | 1085 | /*! @brief Set the CCOBn field to a new value. */ |
Kojto | 90:cb3d968589d8 | 1086 | #define BW_FTFE_FCCOB0_CCOBn(x, v) (HW_FTFE_FCCOB0_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 1087 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1088 | |
Kojto | 90:cb3d968589d8 | 1089 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 1090 | * HW_FTFE_FCCOB7 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 1091 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 1092 | |
Kojto | 90:cb3d968589d8 | 1093 | /*! |
Kojto | 90:cb3d968589d8 | 1094 | * @brief HW_FTFE_FCCOB7 - Flash Common Command Object Registers (RW) |
Kojto | 90:cb3d968589d8 | 1095 | * |
Kojto | 90:cb3d968589d8 | 1096 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 1097 | * |
Kojto | 90:cb3d968589d8 | 1098 | * The FCCOB register group provides 12 bytes for command codes and parameters. |
Kojto | 90:cb3d968589d8 | 1099 | * The individual bytes within the set append a 0-B hex identifier to the FCCOB |
Kojto | 90:cb3d968589d8 | 1100 | * register name: FCCOB0, FCCOB1, ..., FCCOBB. |
Kojto | 90:cb3d968589d8 | 1101 | */ |
Kojto | 90:cb3d968589d8 | 1102 | typedef union _hw_ftfe_fccob7 |
Kojto | 90:cb3d968589d8 | 1103 | { |
Kojto | 90:cb3d968589d8 | 1104 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 1105 | struct _hw_ftfe_fccob7_bitfields |
Kojto | 90:cb3d968589d8 | 1106 | { |
Kojto | 90:cb3d968589d8 | 1107 | uint8_t CCOBn : 8; /*!< [7:0] */ |
Kojto | 90:cb3d968589d8 | 1108 | } B; |
Kojto | 90:cb3d968589d8 | 1109 | } hw_ftfe_fccob7_t; |
Kojto | 90:cb3d968589d8 | 1110 | |
Kojto | 90:cb3d968589d8 | 1111 | /*! |
Kojto | 90:cb3d968589d8 | 1112 | * @name Constants and macros for entire FTFE_FCCOB7 register |
Kojto | 90:cb3d968589d8 | 1113 | */ |
Kojto | 90:cb3d968589d8 | 1114 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1115 | #define HW_FTFE_FCCOB7_ADDR(x) ((x) + 0x8U) |
Kojto | 90:cb3d968589d8 | 1116 | |
Kojto | 90:cb3d968589d8 | 1117 | #define HW_FTFE_FCCOB7(x) (*(__IO hw_ftfe_fccob7_t *) HW_FTFE_FCCOB7_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 1118 | #define HW_FTFE_FCCOB7_RD(x) (HW_FTFE_FCCOB7(x).U) |
Kojto | 90:cb3d968589d8 | 1119 | #define HW_FTFE_FCCOB7_WR(x, v) (HW_FTFE_FCCOB7(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 1120 | #define HW_FTFE_FCCOB7_SET(x, v) (HW_FTFE_FCCOB7_WR(x, HW_FTFE_FCCOB7_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 1121 | #define HW_FTFE_FCCOB7_CLR(x, v) (HW_FTFE_FCCOB7_WR(x, HW_FTFE_FCCOB7_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 1122 | #define HW_FTFE_FCCOB7_TOG(x, v) (HW_FTFE_FCCOB7_WR(x, HW_FTFE_FCCOB7_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 1123 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1124 | |
Kojto | 90:cb3d968589d8 | 1125 | /* |
Kojto | 90:cb3d968589d8 | 1126 | * Constants & macros for individual FTFE_FCCOB7 bitfields |
Kojto | 90:cb3d968589d8 | 1127 | */ |
Kojto | 90:cb3d968589d8 | 1128 | |
Kojto | 90:cb3d968589d8 | 1129 | /*! |
Kojto | 90:cb3d968589d8 | 1130 | * @name Register FTFE_FCCOB7, field CCOBn[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 1131 | * |
Kojto | 90:cb3d968589d8 | 1132 | * The FCCOB register provides a command code and relevant parameters to the |
Kojto | 90:cb3d968589d8 | 1133 | * memory controller. The individual registers that compose the FCCOB data set can |
Kojto | 90:cb3d968589d8 | 1134 | * be written in any order, but you must provide all needed values, which vary |
Kojto | 90:cb3d968589d8 | 1135 | * from command to command. First, set up all required FCCOB fields and then |
Kojto | 90:cb3d968589d8 | 1136 | * initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears |
Kojto | 90:cb3d968589d8 | 1137 | * the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed |
Kojto | 90:cb3d968589d8 | 1138 | * by the user until the command completes (CCIF returns to 1). No command |
Kojto | 90:cb3d968589d8 | 1139 | * buffering or queueing is provided; the next command can be loaded only after the |
Kojto | 90:cb3d968589d8 | 1140 | * current command completes. Some commands return information to the FCCOB |
Kojto | 90:cb3d968589d8 | 1141 | * registers. Any values returned to FCCOB are available for reading after the |
Kojto | 90:cb3d968589d8 | 1142 | * FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a |
Kojto | 90:cb3d968589d8 | 1143 | * generic FTFE command format. The first FCCOB register, FCCOB0, always contains |
Kojto | 90:cb3d968589d8 | 1144 | * the command code. This 8-bit value defines the command to be executed. The |
Kojto | 90:cb3d968589d8 | 1145 | * command code is followed by the parameters required for this specific FTFE command, |
Kojto | 90:cb3d968589d8 | 1146 | * typically an address and/or data values. The command parameter table is |
Kojto | 90:cb3d968589d8 | 1147 | * written in terms of FCCOB Number (which is equivalent to the byte number). This |
Kojto | 90:cb3d968589d8 | 1148 | * number is a reference to the FCCOB register name and is not the register address. |
Kojto | 90:cb3d968589d8 | 1149 | * FCCOB NumberRefers to FCCOB register name, not register address Typical |
Kojto | 90:cb3d968589d8 | 1150 | * Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1 |
Kojto | 90:cb3d968589d8 | 1151 | * Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0 |
Kojto | 90:cb3d968589d8 | 1152 | * 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data |
Kojto | 90:cb3d968589d8 | 1153 | * Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB |
Kojto | 90:cb3d968589d8 | 1154 | * register group uses a big endian addressing convention. For all command parameter |
Kojto | 90:cb3d968589d8 | 1155 | * fields larger than 1 byte, the most significant data resides in the lowest FCCOB |
Kojto | 90:cb3d968589d8 | 1156 | * register number. The FCCOB register group may be read and written as |
Kojto | 90:cb3d968589d8 | 1157 | * individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes). |
Kojto | 90:cb3d968589d8 | 1158 | */ |
Kojto | 90:cb3d968589d8 | 1159 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1160 | #define BP_FTFE_FCCOB7_CCOBn (0U) /*!< Bit position for FTFE_FCCOB7_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1161 | #define BM_FTFE_FCCOB7_CCOBn (0xFFU) /*!< Bit mask for FTFE_FCCOB7_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1162 | #define BS_FTFE_FCCOB7_CCOBn (8U) /*!< Bit field size in bits for FTFE_FCCOB7_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1163 | |
Kojto | 90:cb3d968589d8 | 1164 | /*! @brief Read current value of the FTFE_FCCOB7_CCOBn field. */ |
Kojto | 90:cb3d968589d8 | 1165 | #define BR_FTFE_FCCOB7_CCOBn(x) (HW_FTFE_FCCOB7(x).U) |
Kojto | 90:cb3d968589d8 | 1166 | |
Kojto | 90:cb3d968589d8 | 1167 | /*! @brief Format value for bitfield FTFE_FCCOB7_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1168 | #define BF_FTFE_FCCOB7_CCOBn(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCCOB7_CCOBn) & BM_FTFE_FCCOB7_CCOBn) |
Kojto | 90:cb3d968589d8 | 1169 | |
Kojto | 90:cb3d968589d8 | 1170 | /*! @brief Set the CCOBn field to a new value. */ |
Kojto | 90:cb3d968589d8 | 1171 | #define BW_FTFE_FCCOB7_CCOBn(x, v) (HW_FTFE_FCCOB7_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 1172 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1173 | |
Kojto | 90:cb3d968589d8 | 1174 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 1175 | * HW_FTFE_FCCOB6 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 1176 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 1177 | |
Kojto | 90:cb3d968589d8 | 1178 | /*! |
Kojto | 90:cb3d968589d8 | 1179 | * @brief HW_FTFE_FCCOB6 - Flash Common Command Object Registers (RW) |
Kojto | 90:cb3d968589d8 | 1180 | * |
Kojto | 90:cb3d968589d8 | 1181 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 1182 | * |
Kojto | 90:cb3d968589d8 | 1183 | * The FCCOB register group provides 12 bytes for command codes and parameters. |
Kojto | 90:cb3d968589d8 | 1184 | * The individual bytes within the set append a 0-B hex identifier to the FCCOB |
Kojto | 90:cb3d968589d8 | 1185 | * register name: FCCOB0, FCCOB1, ..., FCCOBB. |
Kojto | 90:cb3d968589d8 | 1186 | */ |
Kojto | 90:cb3d968589d8 | 1187 | typedef union _hw_ftfe_fccob6 |
Kojto | 90:cb3d968589d8 | 1188 | { |
Kojto | 90:cb3d968589d8 | 1189 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 1190 | struct _hw_ftfe_fccob6_bitfields |
Kojto | 90:cb3d968589d8 | 1191 | { |
Kojto | 90:cb3d968589d8 | 1192 | uint8_t CCOBn : 8; /*!< [7:0] */ |
Kojto | 90:cb3d968589d8 | 1193 | } B; |
Kojto | 90:cb3d968589d8 | 1194 | } hw_ftfe_fccob6_t; |
Kojto | 90:cb3d968589d8 | 1195 | |
Kojto | 90:cb3d968589d8 | 1196 | /*! |
Kojto | 90:cb3d968589d8 | 1197 | * @name Constants and macros for entire FTFE_FCCOB6 register |
Kojto | 90:cb3d968589d8 | 1198 | */ |
Kojto | 90:cb3d968589d8 | 1199 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1200 | #define HW_FTFE_FCCOB6_ADDR(x) ((x) + 0x9U) |
Kojto | 90:cb3d968589d8 | 1201 | |
Kojto | 90:cb3d968589d8 | 1202 | #define HW_FTFE_FCCOB6(x) (*(__IO hw_ftfe_fccob6_t *) HW_FTFE_FCCOB6_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 1203 | #define HW_FTFE_FCCOB6_RD(x) (HW_FTFE_FCCOB6(x).U) |
Kojto | 90:cb3d968589d8 | 1204 | #define HW_FTFE_FCCOB6_WR(x, v) (HW_FTFE_FCCOB6(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 1205 | #define HW_FTFE_FCCOB6_SET(x, v) (HW_FTFE_FCCOB6_WR(x, HW_FTFE_FCCOB6_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 1206 | #define HW_FTFE_FCCOB6_CLR(x, v) (HW_FTFE_FCCOB6_WR(x, HW_FTFE_FCCOB6_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 1207 | #define HW_FTFE_FCCOB6_TOG(x, v) (HW_FTFE_FCCOB6_WR(x, HW_FTFE_FCCOB6_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 1208 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1209 | |
Kojto | 90:cb3d968589d8 | 1210 | /* |
Kojto | 90:cb3d968589d8 | 1211 | * Constants & macros for individual FTFE_FCCOB6 bitfields |
Kojto | 90:cb3d968589d8 | 1212 | */ |
Kojto | 90:cb3d968589d8 | 1213 | |
Kojto | 90:cb3d968589d8 | 1214 | /*! |
Kojto | 90:cb3d968589d8 | 1215 | * @name Register FTFE_FCCOB6, field CCOBn[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 1216 | * |
Kojto | 90:cb3d968589d8 | 1217 | * The FCCOB register provides a command code and relevant parameters to the |
Kojto | 90:cb3d968589d8 | 1218 | * memory controller. The individual registers that compose the FCCOB data set can |
Kojto | 90:cb3d968589d8 | 1219 | * be written in any order, but you must provide all needed values, which vary |
Kojto | 90:cb3d968589d8 | 1220 | * from command to command. First, set up all required FCCOB fields and then |
Kojto | 90:cb3d968589d8 | 1221 | * initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears |
Kojto | 90:cb3d968589d8 | 1222 | * the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed |
Kojto | 90:cb3d968589d8 | 1223 | * by the user until the command completes (CCIF returns to 1). No command |
Kojto | 90:cb3d968589d8 | 1224 | * buffering or queueing is provided; the next command can be loaded only after the |
Kojto | 90:cb3d968589d8 | 1225 | * current command completes. Some commands return information to the FCCOB |
Kojto | 90:cb3d968589d8 | 1226 | * registers. Any values returned to FCCOB are available for reading after the |
Kojto | 90:cb3d968589d8 | 1227 | * FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a |
Kojto | 90:cb3d968589d8 | 1228 | * generic FTFE command format. The first FCCOB register, FCCOB0, always contains |
Kojto | 90:cb3d968589d8 | 1229 | * the command code. This 8-bit value defines the command to be executed. The |
Kojto | 90:cb3d968589d8 | 1230 | * command code is followed by the parameters required for this specific FTFE command, |
Kojto | 90:cb3d968589d8 | 1231 | * typically an address and/or data values. The command parameter table is |
Kojto | 90:cb3d968589d8 | 1232 | * written in terms of FCCOB Number (which is equivalent to the byte number). This |
Kojto | 90:cb3d968589d8 | 1233 | * number is a reference to the FCCOB register name and is not the register address. |
Kojto | 90:cb3d968589d8 | 1234 | * FCCOB NumberRefers to FCCOB register name, not register address Typical |
Kojto | 90:cb3d968589d8 | 1235 | * Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1 |
Kojto | 90:cb3d968589d8 | 1236 | * Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0 |
Kojto | 90:cb3d968589d8 | 1237 | * 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data |
Kojto | 90:cb3d968589d8 | 1238 | * Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB |
Kojto | 90:cb3d968589d8 | 1239 | * register group uses a big endian addressing convention. For all command parameter |
Kojto | 90:cb3d968589d8 | 1240 | * fields larger than 1 byte, the most significant data resides in the lowest FCCOB |
Kojto | 90:cb3d968589d8 | 1241 | * register number. The FCCOB register group may be read and written as |
Kojto | 90:cb3d968589d8 | 1242 | * individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes). |
Kojto | 90:cb3d968589d8 | 1243 | */ |
Kojto | 90:cb3d968589d8 | 1244 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1245 | #define BP_FTFE_FCCOB6_CCOBn (0U) /*!< Bit position for FTFE_FCCOB6_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1246 | #define BM_FTFE_FCCOB6_CCOBn (0xFFU) /*!< Bit mask for FTFE_FCCOB6_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1247 | #define BS_FTFE_FCCOB6_CCOBn (8U) /*!< Bit field size in bits for FTFE_FCCOB6_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1248 | |
Kojto | 90:cb3d968589d8 | 1249 | /*! @brief Read current value of the FTFE_FCCOB6_CCOBn field. */ |
Kojto | 90:cb3d968589d8 | 1250 | #define BR_FTFE_FCCOB6_CCOBn(x) (HW_FTFE_FCCOB6(x).U) |
Kojto | 90:cb3d968589d8 | 1251 | |
Kojto | 90:cb3d968589d8 | 1252 | /*! @brief Format value for bitfield FTFE_FCCOB6_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1253 | #define BF_FTFE_FCCOB6_CCOBn(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCCOB6_CCOBn) & BM_FTFE_FCCOB6_CCOBn) |
Kojto | 90:cb3d968589d8 | 1254 | |
Kojto | 90:cb3d968589d8 | 1255 | /*! @brief Set the CCOBn field to a new value. */ |
Kojto | 90:cb3d968589d8 | 1256 | #define BW_FTFE_FCCOB6_CCOBn(x, v) (HW_FTFE_FCCOB6_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 1257 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1258 | |
Kojto | 90:cb3d968589d8 | 1259 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 1260 | * HW_FTFE_FCCOB5 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 1261 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 1262 | |
Kojto | 90:cb3d968589d8 | 1263 | /*! |
Kojto | 90:cb3d968589d8 | 1264 | * @brief HW_FTFE_FCCOB5 - Flash Common Command Object Registers (RW) |
Kojto | 90:cb3d968589d8 | 1265 | * |
Kojto | 90:cb3d968589d8 | 1266 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 1267 | * |
Kojto | 90:cb3d968589d8 | 1268 | * The FCCOB register group provides 12 bytes for command codes and parameters. |
Kojto | 90:cb3d968589d8 | 1269 | * The individual bytes within the set append a 0-B hex identifier to the FCCOB |
Kojto | 90:cb3d968589d8 | 1270 | * register name: FCCOB0, FCCOB1, ..., FCCOBB. |
Kojto | 90:cb3d968589d8 | 1271 | */ |
Kojto | 90:cb3d968589d8 | 1272 | typedef union _hw_ftfe_fccob5 |
Kojto | 90:cb3d968589d8 | 1273 | { |
Kojto | 90:cb3d968589d8 | 1274 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 1275 | struct _hw_ftfe_fccob5_bitfields |
Kojto | 90:cb3d968589d8 | 1276 | { |
Kojto | 90:cb3d968589d8 | 1277 | uint8_t CCOBn : 8; /*!< [7:0] */ |
Kojto | 90:cb3d968589d8 | 1278 | } B; |
Kojto | 90:cb3d968589d8 | 1279 | } hw_ftfe_fccob5_t; |
Kojto | 90:cb3d968589d8 | 1280 | |
Kojto | 90:cb3d968589d8 | 1281 | /*! |
Kojto | 90:cb3d968589d8 | 1282 | * @name Constants and macros for entire FTFE_FCCOB5 register |
Kojto | 90:cb3d968589d8 | 1283 | */ |
Kojto | 90:cb3d968589d8 | 1284 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1285 | #define HW_FTFE_FCCOB5_ADDR(x) ((x) + 0xAU) |
Kojto | 90:cb3d968589d8 | 1286 | |
Kojto | 90:cb3d968589d8 | 1287 | #define HW_FTFE_FCCOB5(x) (*(__IO hw_ftfe_fccob5_t *) HW_FTFE_FCCOB5_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 1288 | #define HW_FTFE_FCCOB5_RD(x) (HW_FTFE_FCCOB5(x).U) |
Kojto | 90:cb3d968589d8 | 1289 | #define HW_FTFE_FCCOB5_WR(x, v) (HW_FTFE_FCCOB5(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 1290 | #define HW_FTFE_FCCOB5_SET(x, v) (HW_FTFE_FCCOB5_WR(x, HW_FTFE_FCCOB5_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 1291 | #define HW_FTFE_FCCOB5_CLR(x, v) (HW_FTFE_FCCOB5_WR(x, HW_FTFE_FCCOB5_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 1292 | #define HW_FTFE_FCCOB5_TOG(x, v) (HW_FTFE_FCCOB5_WR(x, HW_FTFE_FCCOB5_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 1293 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1294 | |
Kojto | 90:cb3d968589d8 | 1295 | /* |
Kojto | 90:cb3d968589d8 | 1296 | * Constants & macros for individual FTFE_FCCOB5 bitfields |
Kojto | 90:cb3d968589d8 | 1297 | */ |
Kojto | 90:cb3d968589d8 | 1298 | |
Kojto | 90:cb3d968589d8 | 1299 | /*! |
Kojto | 90:cb3d968589d8 | 1300 | * @name Register FTFE_FCCOB5, field CCOBn[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 1301 | * |
Kojto | 90:cb3d968589d8 | 1302 | * The FCCOB register provides a command code and relevant parameters to the |
Kojto | 90:cb3d968589d8 | 1303 | * memory controller. The individual registers that compose the FCCOB data set can |
Kojto | 90:cb3d968589d8 | 1304 | * be written in any order, but you must provide all needed values, which vary |
Kojto | 90:cb3d968589d8 | 1305 | * from command to command. First, set up all required FCCOB fields and then |
Kojto | 90:cb3d968589d8 | 1306 | * initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears |
Kojto | 90:cb3d968589d8 | 1307 | * the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed |
Kojto | 90:cb3d968589d8 | 1308 | * by the user until the command completes (CCIF returns to 1). No command |
Kojto | 90:cb3d968589d8 | 1309 | * buffering or queueing is provided; the next command can be loaded only after the |
Kojto | 90:cb3d968589d8 | 1310 | * current command completes. Some commands return information to the FCCOB |
Kojto | 90:cb3d968589d8 | 1311 | * registers. Any values returned to FCCOB are available for reading after the |
Kojto | 90:cb3d968589d8 | 1312 | * FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a |
Kojto | 90:cb3d968589d8 | 1313 | * generic FTFE command format. The first FCCOB register, FCCOB0, always contains |
Kojto | 90:cb3d968589d8 | 1314 | * the command code. This 8-bit value defines the command to be executed. The |
Kojto | 90:cb3d968589d8 | 1315 | * command code is followed by the parameters required for this specific FTFE command, |
Kojto | 90:cb3d968589d8 | 1316 | * typically an address and/or data values. The command parameter table is |
Kojto | 90:cb3d968589d8 | 1317 | * written in terms of FCCOB Number (which is equivalent to the byte number). This |
Kojto | 90:cb3d968589d8 | 1318 | * number is a reference to the FCCOB register name and is not the register address. |
Kojto | 90:cb3d968589d8 | 1319 | * FCCOB NumberRefers to FCCOB register name, not register address Typical |
Kojto | 90:cb3d968589d8 | 1320 | * Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1 |
Kojto | 90:cb3d968589d8 | 1321 | * Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0 |
Kojto | 90:cb3d968589d8 | 1322 | * 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data |
Kojto | 90:cb3d968589d8 | 1323 | * Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB |
Kojto | 90:cb3d968589d8 | 1324 | * register group uses a big endian addressing convention. For all command parameter |
Kojto | 90:cb3d968589d8 | 1325 | * fields larger than 1 byte, the most significant data resides in the lowest FCCOB |
Kojto | 90:cb3d968589d8 | 1326 | * register number. The FCCOB register group may be read and written as |
Kojto | 90:cb3d968589d8 | 1327 | * individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes). |
Kojto | 90:cb3d968589d8 | 1328 | */ |
Kojto | 90:cb3d968589d8 | 1329 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1330 | #define BP_FTFE_FCCOB5_CCOBn (0U) /*!< Bit position for FTFE_FCCOB5_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1331 | #define BM_FTFE_FCCOB5_CCOBn (0xFFU) /*!< Bit mask for FTFE_FCCOB5_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1332 | #define BS_FTFE_FCCOB5_CCOBn (8U) /*!< Bit field size in bits for FTFE_FCCOB5_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1333 | |
Kojto | 90:cb3d968589d8 | 1334 | /*! @brief Read current value of the FTFE_FCCOB5_CCOBn field. */ |
Kojto | 90:cb3d968589d8 | 1335 | #define BR_FTFE_FCCOB5_CCOBn(x) (HW_FTFE_FCCOB5(x).U) |
Kojto | 90:cb3d968589d8 | 1336 | |
Kojto | 90:cb3d968589d8 | 1337 | /*! @brief Format value for bitfield FTFE_FCCOB5_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1338 | #define BF_FTFE_FCCOB5_CCOBn(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCCOB5_CCOBn) & BM_FTFE_FCCOB5_CCOBn) |
Kojto | 90:cb3d968589d8 | 1339 | |
Kojto | 90:cb3d968589d8 | 1340 | /*! @brief Set the CCOBn field to a new value. */ |
Kojto | 90:cb3d968589d8 | 1341 | #define BW_FTFE_FCCOB5_CCOBn(x, v) (HW_FTFE_FCCOB5_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 1342 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1343 | |
Kojto | 90:cb3d968589d8 | 1344 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 1345 | * HW_FTFE_FCCOB4 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 1346 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 1347 | |
Kojto | 90:cb3d968589d8 | 1348 | /*! |
Kojto | 90:cb3d968589d8 | 1349 | * @brief HW_FTFE_FCCOB4 - Flash Common Command Object Registers (RW) |
Kojto | 90:cb3d968589d8 | 1350 | * |
Kojto | 90:cb3d968589d8 | 1351 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 1352 | * |
Kojto | 90:cb3d968589d8 | 1353 | * The FCCOB register group provides 12 bytes for command codes and parameters. |
Kojto | 90:cb3d968589d8 | 1354 | * The individual bytes within the set append a 0-B hex identifier to the FCCOB |
Kojto | 90:cb3d968589d8 | 1355 | * register name: FCCOB0, FCCOB1, ..., FCCOBB. |
Kojto | 90:cb3d968589d8 | 1356 | */ |
Kojto | 90:cb3d968589d8 | 1357 | typedef union _hw_ftfe_fccob4 |
Kojto | 90:cb3d968589d8 | 1358 | { |
Kojto | 90:cb3d968589d8 | 1359 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 1360 | struct _hw_ftfe_fccob4_bitfields |
Kojto | 90:cb3d968589d8 | 1361 | { |
Kojto | 90:cb3d968589d8 | 1362 | uint8_t CCOBn : 8; /*!< [7:0] */ |
Kojto | 90:cb3d968589d8 | 1363 | } B; |
Kojto | 90:cb3d968589d8 | 1364 | } hw_ftfe_fccob4_t; |
Kojto | 90:cb3d968589d8 | 1365 | |
Kojto | 90:cb3d968589d8 | 1366 | /*! |
Kojto | 90:cb3d968589d8 | 1367 | * @name Constants and macros for entire FTFE_FCCOB4 register |
Kojto | 90:cb3d968589d8 | 1368 | */ |
Kojto | 90:cb3d968589d8 | 1369 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1370 | #define HW_FTFE_FCCOB4_ADDR(x) ((x) + 0xBU) |
Kojto | 90:cb3d968589d8 | 1371 | |
Kojto | 90:cb3d968589d8 | 1372 | #define HW_FTFE_FCCOB4(x) (*(__IO hw_ftfe_fccob4_t *) HW_FTFE_FCCOB4_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 1373 | #define HW_FTFE_FCCOB4_RD(x) (HW_FTFE_FCCOB4(x).U) |
Kojto | 90:cb3d968589d8 | 1374 | #define HW_FTFE_FCCOB4_WR(x, v) (HW_FTFE_FCCOB4(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 1375 | #define HW_FTFE_FCCOB4_SET(x, v) (HW_FTFE_FCCOB4_WR(x, HW_FTFE_FCCOB4_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 1376 | #define HW_FTFE_FCCOB4_CLR(x, v) (HW_FTFE_FCCOB4_WR(x, HW_FTFE_FCCOB4_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 1377 | #define HW_FTFE_FCCOB4_TOG(x, v) (HW_FTFE_FCCOB4_WR(x, HW_FTFE_FCCOB4_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 1378 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1379 | |
Kojto | 90:cb3d968589d8 | 1380 | /* |
Kojto | 90:cb3d968589d8 | 1381 | * Constants & macros for individual FTFE_FCCOB4 bitfields |
Kojto | 90:cb3d968589d8 | 1382 | */ |
Kojto | 90:cb3d968589d8 | 1383 | |
Kojto | 90:cb3d968589d8 | 1384 | /*! |
Kojto | 90:cb3d968589d8 | 1385 | * @name Register FTFE_FCCOB4, field CCOBn[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 1386 | * |
Kojto | 90:cb3d968589d8 | 1387 | * The FCCOB register provides a command code and relevant parameters to the |
Kojto | 90:cb3d968589d8 | 1388 | * memory controller. The individual registers that compose the FCCOB data set can |
Kojto | 90:cb3d968589d8 | 1389 | * be written in any order, but you must provide all needed values, which vary |
Kojto | 90:cb3d968589d8 | 1390 | * from command to command. First, set up all required FCCOB fields and then |
Kojto | 90:cb3d968589d8 | 1391 | * initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears |
Kojto | 90:cb3d968589d8 | 1392 | * the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed |
Kojto | 90:cb3d968589d8 | 1393 | * by the user until the command completes (CCIF returns to 1). No command |
Kojto | 90:cb3d968589d8 | 1394 | * buffering or queueing is provided; the next command can be loaded only after the |
Kojto | 90:cb3d968589d8 | 1395 | * current command completes. Some commands return information to the FCCOB |
Kojto | 90:cb3d968589d8 | 1396 | * registers. Any values returned to FCCOB are available for reading after the |
Kojto | 90:cb3d968589d8 | 1397 | * FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a |
Kojto | 90:cb3d968589d8 | 1398 | * generic FTFE command format. The first FCCOB register, FCCOB0, always contains |
Kojto | 90:cb3d968589d8 | 1399 | * the command code. This 8-bit value defines the command to be executed. The |
Kojto | 90:cb3d968589d8 | 1400 | * command code is followed by the parameters required for this specific FTFE command, |
Kojto | 90:cb3d968589d8 | 1401 | * typically an address and/or data values. The command parameter table is |
Kojto | 90:cb3d968589d8 | 1402 | * written in terms of FCCOB Number (which is equivalent to the byte number). This |
Kojto | 90:cb3d968589d8 | 1403 | * number is a reference to the FCCOB register name and is not the register address. |
Kojto | 90:cb3d968589d8 | 1404 | * FCCOB NumberRefers to FCCOB register name, not register address Typical |
Kojto | 90:cb3d968589d8 | 1405 | * Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1 |
Kojto | 90:cb3d968589d8 | 1406 | * Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0 |
Kojto | 90:cb3d968589d8 | 1407 | * 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data |
Kojto | 90:cb3d968589d8 | 1408 | * Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB |
Kojto | 90:cb3d968589d8 | 1409 | * register group uses a big endian addressing convention. For all command parameter |
Kojto | 90:cb3d968589d8 | 1410 | * fields larger than 1 byte, the most significant data resides in the lowest FCCOB |
Kojto | 90:cb3d968589d8 | 1411 | * register number. The FCCOB register group may be read and written as |
Kojto | 90:cb3d968589d8 | 1412 | * individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes). |
Kojto | 90:cb3d968589d8 | 1413 | */ |
Kojto | 90:cb3d968589d8 | 1414 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1415 | #define BP_FTFE_FCCOB4_CCOBn (0U) /*!< Bit position for FTFE_FCCOB4_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1416 | #define BM_FTFE_FCCOB4_CCOBn (0xFFU) /*!< Bit mask for FTFE_FCCOB4_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1417 | #define BS_FTFE_FCCOB4_CCOBn (8U) /*!< Bit field size in bits for FTFE_FCCOB4_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1418 | |
Kojto | 90:cb3d968589d8 | 1419 | /*! @brief Read current value of the FTFE_FCCOB4_CCOBn field. */ |
Kojto | 90:cb3d968589d8 | 1420 | #define BR_FTFE_FCCOB4_CCOBn(x) (HW_FTFE_FCCOB4(x).U) |
Kojto | 90:cb3d968589d8 | 1421 | |
Kojto | 90:cb3d968589d8 | 1422 | /*! @brief Format value for bitfield FTFE_FCCOB4_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1423 | #define BF_FTFE_FCCOB4_CCOBn(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCCOB4_CCOBn) & BM_FTFE_FCCOB4_CCOBn) |
Kojto | 90:cb3d968589d8 | 1424 | |
Kojto | 90:cb3d968589d8 | 1425 | /*! @brief Set the CCOBn field to a new value. */ |
Kojto | 90:cb3d968589d8 | 1426 | #define BW_FTFE_FCCOB4_CCOBn(x, v) (HW_FTFE_FCCOB4_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 1427 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1428 | |
Kojto | 90:cb3d968589d8 | 1429 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 1430 | * HW_FTFE_FCCOBB - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 1431 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 1432 | |
Kojto | 90:cb3d968589d8 | 1433 | /*! |
Kojto | 90:cb3d968589d8 | 1434 | * @brief HW_FTFE_FCCOBB - Flash Common Command Object Registers (RW) |
Kojto | 90:cb3d968589d8 | 1435 | * |
Kojto | 90:cb3d968589d8 | 1436 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 1437 | * |
Kojto | 90:cb3d968589d8 | 1438 | * The FCCOB register group provides 12 bytes for command codes and parameters. |
Kojto | 90:cb3d968589d8 | 1439 | * The individual bytes within the set append a 0-B hex identifier to the FCCOB |
Kojto | 90:cb3d968589d8 | 1440 | * register name: FCCOB0, FCCOB1, ..., FCCOBB. |
Kojto | 90:cb3d968589d8 | 1441 | */ |
Kojto | 90:cb3d968589d8 | 1442 | typedef union _hw_ftfe_fccobb |
Kojto | 90:cb3d968589d8 | 1443 | { |
Kojto | 90:cb3d968589d8 | 1444 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 1445 | struct _hw_ftfe_fccobb_bitfields |
Kojto | 90:cb3d968589d8 | 1446 | { |
Kojto | 90:cb3d968589d8 | 1447 | uint8_t CCOBn : 8; /*!< [7:0] */ |
Kojto | 90:cb3d968589d8 | 1448 | } B; |
Kojto | 90:cb3d968589d8 | 1449 | } hw_ftfe_fccobb_t; |
Kojto | 90:cb3d968589d8 | 1450 | |
Kojto | 90:cb3d968589d8 | 1451 | /*! |
Kojto | 90:cb3d968589d8 | 1452 | * @name Constants and macros for entire FTFE_FCCOBB register |
Kojto | 90:cb3d968589d8 | 1453 | */ |
Kojto | 90:cb3d968589d8 | 1454 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1455 | #define HW_FTFE_FCCOBB_ADDR(x) ((x) + 0xCU) |
Kojto | 90:cb3d968589d8 | 1456 | |
Kojto | 90:cb3d968589d8 | 1457 | #define HW_FTFE_FCCOBB(x) (*(__IO hw_ftfe_fccobb_t *) HW_FTFE_FCCOBB_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 1458 | #define HW_FTFE_FCCOBB_RD(x) (HW_FTFE_FCCOBB(x).U) |
Kojto | 90:cb3d968589d8 | 1459 | #define HW_FTFE_FCCOBB_WR(x, v) (HW_FTFE_FCCOBB(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 1460 | #define HW_FTFE_FCCOBB_SET(x, v) (HW_FTFE_FCCOBB_WR(x, HW_FTFE_FCCOBB_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 1461 | #define HW_FTFE_FCCOBB_CLR(x, v) (HW_FTFE_FCCOBB_WR(x, HW_FTFE_FCCOBB_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 1462 | #define HW_FTFE_FCCOBB_TOG(x, v) (HW_FTFE_FCCOBB_WR(x, HW_FTFE_FCCOBB_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 1463 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1464 | |
Kojto | 90:cb3d968589d8 | 1465 | /* |
Kojto | 90:cb3d968589d8 | 1466 | * Constants & macros for individual FTFE_FCCOBB bitfields |
Kojto | 90:cb3d968589d8 | 1467 | */ |
Kojto | 90:cb3d968589d8 | 1468 | |
Kojto | 90:cb3d968589d8 | 1469 | /*! |
Kojto | 90:cb3d968589d8 | 1470 | * @name Register FTFE_FCCOBB, field CCOBn[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 1471 | * |
Kojto | 90:cb3d968589d8 | 1472 | * The FCCOB register provides a command code and relevant parameters to the |
Kojto | 90:cb3d968589d8 | 1473 | * memory controller. The individual registers that compose the FCCOB data set can |
Kojto | 90:cb3d968589d8 | 1474 | * be written in any order, but you must provide all needed values, which vary |
Kojto | 90:cb3d968589d8 | 1475 | * from command to command. First, set up all required FCCOB fields and then |
Kojto | 90:cb3d968589d8 | 1476 | * initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears |
Kojto | 90:cb3d968589d8 | 1477 | * the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed |
Kojto | 90:cb3d968589d8 | 1478 | * by the user until the command completes (CCIF returns to 1). No command |
Kojto | 90:cb3d968589d8 | 1479 | * buffering or queueing is provided; the next command can be loaded only after the |
Kojto | 90:cb3d968589d8 | 1480 | * current command completes. Some commands return information to the FCCOB |
Kojto | 90:cb3d968589d8 | 1481 | * registers. Any values returned to FCCOB are available for reading after the |
Kojto | 90:cb3d968589d8 | 1482 | * FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a |
Kojto | 90:cb3d968589d8 | 1483 | * generic FTFE command format. The first FCCOB register, FCCOB0, always contains |
Kojto | 90:cb3d968589d8 | 1484 | * the command code. This 8-bit value defines the command to be executed. The |
Kojto | 90:cb3d968589d8 | 1485 | * command code is followed by the parameters required for this specific FTFE command, |
Kojto | 90:cb3d968589d8 | 1486 | * typically an address and/or data values. The command parameter table is |
Kojto | 90:cb3d968589d8 | 1487 | * written in terms of FCCOB Number (which is equivalent to the byte number). This |
Kojto | 90:cb3d968589d8 | 1488 | * number is a reference to the FCCOB register name and is not the register address. |
Kojto | 90:cb3d968589d8 | 1489 | * FCCOB NumberRefers to FCCOB register name, not register address Typical |
Kojto | 90:cb3d968589d8 | 1490 | * Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1 |
Kojto | 90:cb3d968589d8 | 1491 | * Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0 |
Kojto | 90:cb3d968589d8 | 1492 | * 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data |
Kojto | 90:cb3d968589d8 | 1493 | * Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB |
Kojto | 90:cb3d968589d8 | 1494 | * register group uses a big endian addressing convention. For all command parameter |
Kojto | 90:cb3d968589d8 | 1495 | * fields larger than 1 byte, the most significant data resides in the lowest FCCOB |
Kojto | 90:cb3d968589d8 | 1496 | * register number. The FCCOB register group may be read and written as |
Kojto | 90:cb3d968589d8 | 1497 | * individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes). |
Kojto | 90:cb3d968589d8 | 1498 | */ |
Kojto | 90:cb3d968589d8 | 1499 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1500 | #define BP_FTFE_FCCOBB_CCOBn (0U) /*!< Bit position for FTFE_FCCOBB_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1501 | #define BM_FTFE_FCCOBB_CCOBn (0xFFU) /*!< Bit mask for FTFE_FCCOBB_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1502 | #define BS_FTFE_FCCOBB_CCOBn (8U) /*!< Bit field size in bits for FTFE_FCCOBB_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1503 | |
Kojto | 90:cb3d968589d8 | 1504 | /*! @brief Read current value of the FTFE_FCCOBB_CCOBn field. */ |
Kojto | 90:cb3d968589d8 | 1505 | #define BR_FTFE_FCCOBB_CCOBn(x) (HW_FTFE_FCCOBB(x).U) |
Kojto | 90:cb3d968589d8 | 1506 | |
Kojto | 90:cb3d968589d8 | 1507 | /*! @brief Format value for bitfield FTFE_FCCOBB_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1508 | #define BF_FTFE_FCCOBB_CCOBn(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCCOBB_CCOBn) & BM_FTFE_FCCOBB_CCOBn) |
Kojto | 90:cb3d968589d8 | 1509 | |
Kojto | 90:cb3d968589d8 | 1510 | /*! @brief Set the CCOBn field to a new value. */ |
Kojto | 90:cb3d968589d8 | 1511 | #define BW_FTFE_FCCOBB_CCOBn(x, v) (HW_FTFE_FCCOBB_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 1512 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1513 | |
Kojto | 90:cb3d968589d8 | 1514 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 1515 | * HW_FTFE_FCCOBA - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 1516 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 1517 | |
Kojto | 90:cb3d968589d8 | 1518 | /*! |
Kojto | 90:cb3d968589d8 | 1519 | * @brief HW_FTFE_FCCOBA - Flash Common Command Object Registers (RW) |
Kojto | 90:cb3d968589d8 | 1520 | * |
Kojto | 90:cb3d968589d8 | 1521 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 1522 | * |
Kojto | 90:cb3d968589d8 | 1523 | * The FCCOB register group provides 12 bytes for command codes and parameters. |
Kojto | 90:cb3d968589d8 | 1524 | * The individual bytes within the set append a 0-B hex identifier to the FCCOB |
Kojto | 90:cb3d968589d8 | 1525 | * register name: FCCOB0, FCCOB1, ..., FCCOBB. |
Kojto | 90:cb3d968589d8 | 1526 | */ |
Kojto | 90:cb3d968589d8 | 1527 | typedef union _hw_ftfe_fccoba |
Kojto | 90:cb3d968589d8 | 1528 | { |
Kojto | 90:cb3d968589d8 | 1529 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 1530 | struct _hw_ftfe_fccoba_bitfields |
Kojto | 90:cb3d968589d8 | 1531 | { |
Kojto | 90:cb3d968589d8 | 1532 | uint8_t CCOBn : 8; /*!< [7:0] */ |
Kojto | 90:cb3d968589d8 | 1533 | } B; |
Kojto | 90:cb3d968589d8 | 1534 | } hw_ftfe_fccoba_t; |
Kojto | 90:cb3d968589d8 | 1535 | |
Kojto | 90:cb3d968589d8 | 1536 | /*! |
Kojto | 90:cb3d968589d8 | 1537 | * @name Constants and macros for entire FTFE_FCCOBA register |
Kojto | 90:cb3d968589d8 | 1538 | */ |
Kojto | 90:cb3d968589d8 | 1539 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1540 | #define HW_FTFE_FCCOBA_ADDR(x) ((x) + 0xDU) |
Kojto | 90:cb3d968589d8 | 1541 | |
Kojto | 90:cb3d968589d8 | 1542 | #define HW_FTFE_FCCOBA(x) (*(__IO hw_ftfe_fccoba_t *) HW_FTFE_FCCOBA_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 1543 | #define HW_FTFE_FCCOBA_RD(x) (HW_FTFE_FCCOBA(x).U) |
Kojto | 90:cb3d968589d8 | 1544 | #define HW_FTFE_FCCOBA_WR(x, v) (HW_FTFE_FCCOBA(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 1545 | #define HW_FTFE_FCCOBA_SET(x, v) (HW_FTFE_FCCOBA_WR(x, HW_FTFE_FCCOBA_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 1546 | #define HW_FTFE_FCCOBA_CLR(x, v) (HW_FTFE_FCCOBA_WR(x, HW_FTFE_FCCOBA_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 1547 | #define HW_FTFE_FCCOBA_TOG(x, v) (HW_FTFE_FCCOBA_WR(x, HW_FTFE_FCCOBA_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 1548 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1549 | |
Kojto | 90:cb3d968589d8 | 1550 | /* |
Kojto | 90:cb3d968589d8 | 1551 | * Constants & macros for individual FTFE_FCCOBA bitfields |
Kojto | 90:cb3d968589d8 | 1552 | */ |
Kojto | 90:cb3d968589d8 | 1553 | |
Kojto | 90:cb3d968589d8 | 1554 | /*! |
Kojto | 90:cb3d968589d8 | 1555 | * @name Register FTFE_FCCOBA, field CCOBn[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 1556 | * |
Kojto | 90:cb3d968589d8 | 1557 | * The FCCOB register provides a command code and relevant parameters to the |
Kojto | 90:cb3d968589d8 | 1558 | * memory controller. The individual registers that compose the FCCOB data set can |
Kojto | 90:cb3d968589d8 | 1559 | * be written in any order, but you must provide all needed values, which vary |
Kojto | 90:cb3d968589d8 | 1560 | * from command to command. First, set up all required FCCOB fields and then |
Kojto | 90:cb3d968589d8 | 1561 | * initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears |
Kojto | 90:cb3d968589d8 | 1562 | * the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed |
Kojto | 90:cb3d968589d8 | 1563 | * by the user until the command completes (CCIF returns to 1). No command |
Kojto | 90:cb3d968589d8 | 1564 | * buffering or queueing is provided; the next command can be loaded only after the |
Kojto | 90:cb3d968589d8 | 1565 | * current command completes. Some commands return information to the FCCOB |
Kojto | 90:cb3d968589d8 | 1566 | * registers. Any values returned to FCCOB are available for reading after the |
Kojto | 90:cb3d968589d8 | 1567 | * FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a |
Kojto | 90:cb3d968589d8 | 1568 | * generic FTFE command format. The first FCCOB register, FCCOB0, always contains |
Kojto | 90:cb3d968589d8 | 1569 | * the command code. This 8-bit value defines the command to be executed. The |
Kojto | 90:cb3d968589d8 | 1570 | * command code is followed by the parameters required for this specific FTFE command, |
Kojto | 90:cb3d968589d8 | 1571 | * typically an address and/or data values. The command parameter table is |
Kojto | 90:cb3d968589d8 | 1572 | * written in terms of FCCOB Number (which is equivalent to the byte number). This |
Kojto | 90:cb3d968589d8 | 1573 | * number is a reference to the FCCOB register name and is not the register address. |
Kojto | 90:cb3d968589d8 | 1574 | * FCCOB NumberRefers to FCCOB register name, not register address Typical |
Kojto | 90:cb3d968589d8 | 1575 | * Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1 |
Kojto | 90:cb3d968589d8 | 1576 | * Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0 |
Kojto | 90:cb3d968589d8 | 1577 | * 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data |
Kojto | 90:cb3d968589d8 | 1578 | * Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB |
Kojto | 90:cb3d968589d8 | 1579 | * register group uses a big endian addressing convention. For all command parameter |
Kojto | 90:cb3d968589d8 | 1580 | * fields larger than 1 byte, the most significant data resides in the lowest FCCOB |
Kojto | 90:cb3d968589d8 | 1581 | * register number. The FCCOB register group may be read and written as |
Kojto | 90:cb3d968589d8 | 1582 | * individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes). |
Kojto | 90:cb3d968589d8 | 1583 | */ |
Kojto | 90:cb3d968589d8 | 1584 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1585 | #define BP_FTFE_FCCOBA_CCOBn (0U) /*!< Bit position for FTFE_FCCOBA_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1586 | #define BM_FTFE_FCCOBA_CCOBn (0xFFU) /*!< Bit mask for FTFE_FCCOBA_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1587 | #define BS_FTFE_FCCOBA_CCOBn (8U) /*!< Bit field size in bits for FTFE_FCCOBA_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1588 | |
Kojto | 90:cb3d968589d8 | 1589 | /*! @brief Read current value of the FTFE_FCCOBA_CCOBn field. */ |
Kojto | 90:cb3d968589d8 | 1590 | #define BR_FTFE_FCCOBA_CCOBn(x) (HW_FTFE_FCCOBA(x).U) |
Kojto | 90:cb3d968589d8 | 1591 | |
Kojto | 90:cb3d968589d8 | 1592 | /*! @brief Format value for bitfield FTFE_FCCOBA_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1593 | #define BF_FTFE_FCCOBA_CCOBn(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCCOBA_CCOBn) & BM_FTFE_FCCOBA_CCOBn) |
Kojto | 90:cb3d968589d8 | 1594 | |
Kojto | 90:cb3d968589d8 | 1595 | /*! @brief Set the CCOBn field to a new value. */ |
Kojto | 90:cb3d968589d8 | 1596 | #define BW_FTFE_FCCOBA_CCOBn(x, v) (HW_FTFE_FCCOBA_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 1597 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1598 | |
Kojto | 90:cb3d968589d8 | 1599 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 1600 | * HW_FTFE_FCCOB9 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 1601 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 1602 | |
Kojto | 90:cb3d968589d8 | 1603 | /*! |
Kojto | 90:cb3d968589d8 | 1604 | * @brief HW_FTFE_FCCOB9 - Flash Common Command Object Registers (RW) |
Kojto | 90:cb3d968589d8 | 1605 | * |
Kojto | 90:cb3d968589d8 | 1606 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 1607 | * |
Kojto | 90:cb3d968589d8 | 1608 | * The FCCOB register group provides 12 bytes for command codes and parameters. |
Kojto | 90:cb3d968589d8 | 1609 | * The individual bytes within the set append a 0-B hex identifier to the FCCOB |
Kojto | 90:cb3d968589d8 | 1610 | * register name: FCCOB0, FCCOB1, ..., FCCOBB. |
Kojto | 90:cb3d968589d8 | 1611 | */ |
Kojto | 90:cb3d968589d8 | 1612 | typedef union _hw_ftfe_fccob9 |
Kojto | 90:cb3d968589d8 | 1613 | { |
Kojto | 90:cb3d968589d8 | 1614 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 1615 | struct _hw_ftfe_fccob9_bitfields |
Kojto | 90:cb3d968589d8 | 1616 | { |
Kojto | 90:cb3d968589d8 | 1617 | uint8_t CCOBn : 8; /*!< [7:0] */ |
Kojto | 90:cb3d968589d8 | 1618 | } B; |
Kojto | 90:cb3d968589d8 | 1619 | } hw_ftfe_fccob9_t; |
Kojto | 90:cb3d968589d8 | 1620 | |
Kojto | 90:cb3d968589d8 | 1621 | /*! |
Kojto | 90:cb3d968589d8 | 1622 | * @name Constants and macros for entire FTFE_FCCOB9 register |
Kojto | 90:cb3d968589d8 | 1623 | */ |
Kojto | 90:cb3d968589d8 | 1624 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1625 | #define HW_FTFE_FCCOB9_ADDR(x) ((x) + 0xEU) |
Kojto | 90:cb3d968589d8 | 1626 | |
Kojto | 90:cb3d968589d8 | 1627 | #define HW_FTFE_FCCOB9(x) (*(__IO hw_ftfe_fccob9_t *) HW_FTFE_FCCOB9_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 1628 | #define HW_FTFE_FCCOB9_RD(x) (HW_FTFE_FCCOB9(x).U) |
Kojto | 90:cb3d968589d8 | 1629 | #define HW_FTFE_FCCOB9_WR(x, v) (HW_FTFE_FCCOB9(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 1630 | #define HW_FTFE_FCCOB9_SET(x, v) (HW_FTFE_FCCOB9_WR(x, HW_FTFE_FCCOB9_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 1631 | #define HW_FTFE_FCCOB9_CLR(x, v) (HW_FTFE_FCCOB9_WR(x, HW_FTFE_FCCOB9_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 1632 | #define HW_FTFE_FCCOB9_TOG(x, v) (HW_FTFE_FCCOB9_WR(x, HW_FTFE_FCCOB9_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 1633 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1634 | |
Kojto | 90:cb3d968589d8 | 1635 | /* |
Kojto | 90:cb3d968589d8 | 1636 | * Constants & macros for individual FTFE_FCCOB9 bitfields |
Kojto | 90:cb3d968589d8 | 1637 | */ |
Kojto | 90:cb3d968589d8 | 1638 | |
Kojto | 90:cb3d968589d8 | 1639 | /*! |
Kojto | 90:cb3d968589d8 | 1640 | * @name Register FTFE_FCCOB9, field CCOBn[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 1641 | * |
Kojto | 90:cb3d968589d8 | 1642 | * The FCCOB register provides a command code and relevant parameters to the |
Kojto | 90:cb3d968589d8 | 1643 | * memory controller. The individual registers that compose the FCCOB data set can |
Kojto | 90:cb3d968589d8 | 1644 | * be written in any order, but you must provide all needed values, which vary |
Kojto | 90:cb3d968589d8 | 1645 | * from command to command. First, set up all required FCCOB fields and then |
Kojto | 90:cb3d968589d8 | 1646 | * initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears |
Kojto | 90:cb3d968589d8 | 1647 | * the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed |
Kojto | 90:cb3d968589d8 | 1648 | * by the user until the command completes (CCIF returns to 1). No command |
Kojto | 90:cb3d968589d8 | 1649 | * buffering or queueing is provided; the next command can be loaded only after the |
Kojto | 90:cb3d968589d8 | 1650 | * current command completes. Some commands return information to the FCCOB |
Kojto | 90:cb3d968589d8 | 1651 | * registers. Any values returned to FCCOB are available for reading after the |
Kojto | 90:cb3d968589d8 | 1652 | * FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a |
Kojto | 90:cb3d968589d8 | 1653 | * generic FTFE command format. The first FCCOB register, FCCOB0, always contains |
Kojto | 90:cb3d968589d8 | 1654 | * the command code. This 8-bit value defines the command to be executed. The |
Kojto | 90:cb3d968589d8 | 1655 | * command code is followed by the parameters required for this specific FTFE command, |
Kojto | 90:cb3d968589d8 | 1656 | * typically an address and/or data values. The command parameter table is |
Kojto | 90:cb3d968589d8 | 1657 | * written in terms of FCCOB Number (which is equivalent to the byte number). This |
Kojto | 90:cb3d968589d8 | 1658 | * number is a reference to the FCCOB register name and is not the register address. |
Kojto | 90:cb3d968589d8 | 1659 | * FCCOB NumberRefers to FCCOB register name, not register address Typical |
Kojto | 90:cb3d968589d8 | 1660 | * Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1 |
Kojto | 90:cb3d968589d8 | 1661 | * Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0 |
Kojto | 90:cb3d968589d8 | 1662 | * 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data |
Kojto | 90:cb3d968589d8 | 1663 | * Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB |
Kojto | 90:cb3d968589d8 | 1664 | * register group uses a big endian addressing convention. For all command parameter |
Kojto | 90:cb3d968589d8 | 1665 | * fields larger than 1 byte, the most significant data resides in the lowest FCCOB |
Kojto | 90:cb3d968589d8 | 1666 | * register number. The FCCOB register group may be read and written as |
Kojto | 90:cb3d968589d8 | 1667 | * individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes). |
Kojto | 90:cb3d968589d8 | 1668 | */ |
Kojto | 90:cb3d968589d8 | 1669 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1670 | #define BP_FTFE_FCCOB9_CCOBn (0U) /*!< Bit position for FTFE_FCCOB9_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1671 | #define BM_FTFE_FCCOB9_CCOBn (0xFFU) /*!< Bit mask for FTFE_FCCOB9_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1672 | #define BS_FTFE_FCCOB9_CCOBn (8U) /*!< Bit field size in bits for FTFE_FCCOB9_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1673 | |
Kojto | 90:cb3d968589d8 | 1674 | /*! @brief Read current value of the FTFE_FCCOB9_CCOBn field. */ |
Kojto | 90:cb3d968589d8 | 1675 | #define BR_FTFE_FCCOB9_CCOBn(x) (HW_FTFE_FCCOB9(x).U) |
Kojto | 90:cb3d968589d8 | 1676 | |
Kojto | 90:cb3d968589d8 | 1677 | /*! @brief Format value for bitfield FTFE_FCCOB9_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1678 | #define BF_FTFE_FCCOB9_CCOBn(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCCOB9_CCOBn) & BM_FTFE_FCCOB9_CCOBn) |
Kojto | 90:cb3d968589d8 | 1679 | |
Kojto | 90:cb3d968589d8 | 1680 | /*! @brief Set the CCOBn field to a new value. */ |
Kojto | 90:cb3d968589d8 | 1681 | #define BW_FTFE_FCCOB9_CCOBn(x, v) (HW_FTFE_FCCOB9_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 1682 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1683 | |
Kojto | 90:cb3d968589d8 | 1684 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 1685 | * HW_FTFE_FCCOB8 - Flash Common Command Object Registers |
Kojto | 90:cb3d968589d8 | 1686 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 1687 | |
Kojto | 90:cb3d968589d8 | 1688 | /*! |
Kojto | 90:cb3d968589d8 | 1689 | * @brief HW_FTFE_FCCOB8 - Flash Common Command Object Registers (RW) |
Kojto | 90:cb3d968589d8 | 1690 | * |
Kojto | 90:cb3d968589d8 | 1691 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 1692 | * |
Kojto | 90:cb3d968589d8 | 1693 | * The FCCOB register group provides 12 bytes for command codes and parameters. |
Kojto | 90:cb3d968589d8 | 1694 | * The individual bytes within the set append a 0-B hex identifier to the FCCOB |
Kojto | 90:cb3d968589d8 | 1695 | * register name: FCCOB0, FCCOB1, ..., FCCOBB. |
Kojto | 90:cb3d968589d8 | 1696 | */ |
Kojto | 90:cb3d968589d8 | 1697 | typedef union _hw_ftfe_fccob8 |
Kojto | 90:cb3d968589d8 | 1698 | { |
Kojto | 90:cb3d968589d8 | 1699 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 1700 | struct _hw_ftfe_fccob8_bitfields |
Kojto | 90:cb3d968589d8 | 1701 | { |
Kojto | 90:cb3d968589d8 | 1702 | uint8_t CCOBn : 8; /*!< [7:0] */ |
Kojto | 90:cb3d968589d8 | 1703 | } B; |
Kojto | 90:cb3d968589d8 | 1704 | } hw_ftfe_fccob8_t; |
Kojto | 90:cb3d968589d8 | 1705 | |
Kojto | 90:cb3d968589d8 | 1706 | /*! |
Kojto | 90:cb3d968589d8 | 1707 | * @name Constants and macros for entire FTFE_FCCOB8 register |
Kojto | 90:cb3d968589d8 | 1708 | */ |
Kojto | 90:cb3d968589d8 | 1709 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1710 | #define HW_FTFE_FCCOB8_ADDR(x) ((x) + 0xFU) |
Kojto | 90:cb3d968589d8 | 1711 | |
Kojto | 90:cb3d968589d8 | 1712 | #define HW_FTFE_FCCOB8(x) (*(__IO hw_ftfe_fccob8_t *) HW_FTFE_FCCOB8_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 1713 | #define HW_FTFE_FCCOB8_RD(x) (HW_FTFE_FCCOB8(x).U) |
Kojto | 90:cb3d968589d8 | 1714 | #define HW_FTFE_FCCOB8_WR(x, v) (HW_FTFE_FCCOB8(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 1715 | #define HW_FTFE_FCCOB8_SET(x, v) (HW_FTFE_FCCOB8_WR(x, HW_FTFE_FCCOB8_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 1716 | #define HW_FTFE_FCCOB8_CLR(x, v) (HW_FTFE_FCCOB8_WR(x, HW_FTFE_FCCOB8_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 1717 | #define HW_FTFE_FCCOB8_TOG(x, v) (HW_FTFE_FCCOB8_WR(x, HW_FTFE_FCCOB8_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 1718 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1719 | |
Kojto | 90:cb3d968589d8 | 1720 | /* |
Kojto | 90:cb3d968589d8 | 1721 | * Constants & macros for individual FTFE_FCCOB8 bitfields |
Kojto | 90:cb3d968589d8 | 1722 | */ |
Kojto | 90:cb3d968589d8 | 1723 | |
Kojto | 90:cb3d968589d8 | 1724 | /*! |
Kojto | 90:cb3d968589d8 | 1725 | * @name Register FTFE_FCCOB8, field CCOBn[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 1726 | * |
Kojto | 90:cb3d968589d8 | 1727 | * The FCCOB register provides a command code and relevant parameters to the |
Kojto | 90:cb3d968589d8 | 1728 | * memory controller. The individual registers that compose the FCCOB data set can |
Kojto | 90:cb3d968589d8 | 1729 | * be written in any order, but you must provide all needed values, which vary |
Kojto | 90:cb3d968589d8 | 1730 | * from command to command. First, set up all required FCCOB fields and then |
Kojto | 90:cb3d968589d8 | 1731 | * initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears |
Kojto | 90:cb3d968589d8 | 1732 | * the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed |
Kojto | 90:cb3d968589d8 | 1733 | * by the user until the command completes (CCIF returns to 1). No command |
Kojto | 90:cb3d968589d8 | 1734 | * buffering or queueing is provided; the next command can be loaded only after the |
Kojto | 90:cb3d968589d8 | 1735 | * current command completes. Some commands return information to the FCCOB |
Kojto | 90:cb3d968589d8 | 1736 | * registers. Any values returned to FCCOB are available for reading after the |
Kojto | 90:cb3d968589d8 | 1737 | * FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a |
Kojto | 90:cb3d968589d8 | 1738 | * generic FTFE command format. The first FCCOB register, FCCOB0, always contains |
Kojto | 90:cb3d968589d8 | 1739 | * the command code. This 8-bit value defines the command to be executed. The |
Kojto | 90:cb3d968589d8 | 1740 | * command code is followed by the parameters required for this specific FTFE command, |
Kojto | 90:cb3d968589d8 | 1741 | * typically an address and/or data values. The command parameter table is |
Kojto | 90:cb3d968589d8 | 1742 | * written in terms of FCCOB Number (which is equivalent to the byte number). This |
Kojto | 90:cb3d968589d8 | 1743 | * number is a reference to the FCCOB register name and is not the register address. |
Kojto | 90:cb3d968589d8 | 1744 | * FCCOB NumberRefers to FCCOB register name, not register address Typical |
Kojto | 90:cb3d968589d8 | 1745 | * Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1 |
Kojto | 90:cb3d968589d8 | 1746 | * Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0 |
Kojto | 90:cb3d968589d8 | 1747 | * 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data |
Kojto | 90:cb3d968589d8 | 1748 | * Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB |
Kojto | 90:cb3d968589d8 | 1749 | * register group uses a big endian addressing convention. For all command parameter |
Kojto | 90:cb3d968589d8 | 1750 | * fields larger than 1 byte, the most significant data resides in the lowest FCCOB |
Kojto | 90:cb3d968589d8 | 1751 | * register number. The FCCOB register group may be read and written as |
Kojto | 90:cb3d968589d8 | 1752 | * individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes). |
Kojto | 90:cb3d968589d8 | 1753 | */ |
Kojto | 90:cb3d968589d8 | 1754 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1755 | #define BP_FTFE_FCCOB8_CCOBn (0U) /*!< Bit position for FTFE_FCCOB8_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1756 | #define BM_FTFE_FCCOB8_CCOBn (0xFFU) /*!< Bit mask for FTFE_FCCOB8_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1757 | #define BS_FTFE_FCCOB8_CCOBn (8U) /*!< Bit field size in bits for FTFE_FCCOB8_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1758 | |
Kojto | 90:cb3d968589d8 | 1759 | /*! @brief Read current value of the FTFE_FCCOB8_CCOBn field. */ |
Kojto | 90:cb3d968589d8 | 1760 | #define BR_FTFE_FCCOB8_CCOBn(x) (HW_FTFE_FCCOB8(x).U) |
Kojto | 90:cb3d968589d8 | 1761 | |
Kojto | 90:cb3d968589d8 | 1762 | /*! @brief Format value for bitfield FTFE_FCCOB8_CCOBn. */ |
Kojto | 90:cb3d968589d8 | 1763 | #define BF_FTFE_FCCOB8_CCOBn(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCCOB8_CCOBn) & BM_FTFE_FCCOB8_CCOBn) |
Kojto | 90:cb3d968589d8 | 1764 | |
Kojto | 90:cb3d968589d8 | 1765 | /*! @brief Set the CCOBn field to a new value. */ |
Kojto | 90:cb3d968589d8 | 1766 | #define BW_FTFE_FCCOB8_CCOBn(x, v) (HW_FTFE_FCCOB8_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 1767 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1768 | |
Kojto | 90:cb3d968589d8 | 1769 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 1770 | * HW_FTFE_FPROT3 - Program Flash Protection Registers |
Kojto | 90:cb3d968589d8 | 1771 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 1772 | |
Kojto | 90:cb3d968589d8 | 1773 | /*! |
Kojto | 90:cb3d968589d8 | 1774 | * @brief HW_FTFE_FPROT3 - Program Flash Protection Registers (RW) |
Kojto | 90:cb3d968589d8 | 1775 | * |
Kojto | 90:cb3d968589d8 | 1776 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 1777 | * |
Kojto | 90:cb3d968589d8 | 1778 | * The FPROT registers define which program flash regions are protected from |
Kojto | 90:cb3d968589d8 | 1779 | * program and erase operations. Protected flash regions cannot have their content |
Kojto | 90:cb3d968589d8 | 1780 | * changed; that is, these regions cannot be programmed and cannot be erased by |
Kojto | 90:cb3d968589d8 | 1781 | * any FTFE command. Unprotected regions can be changed by program and erase |
Kojto | 90:cb3d968589d8 | 1782 | * operations. The four FPROT registers allow up to 32 protectable regions of equal |
Kojto | 90:cb3d968589d8 | 1783 | * memory size. Program flash protection register Program flash protection bits |
Kojto | 90:cb3d968589d8 | 1784 | * FPROT0 PROT[31:24] FPROT1 PROT[23:16] FPROT2 PROT[15:8] FPROT3 PROT[7:0] During |
Kojto | 90:cb3d968589d8 | 1785 | * the reset sequence, the FPROT registers are loaded with the contents of the |
Kojto | 90:cb3d968589d8 | 1786 | * program flash protection bytes in the Flash Configuration Field as indicated in |
Kojto | 90:cb3d968589d8 | 1787 | * the following table. Program flash protection register Flash Configuration Field |
Kojto | 90:cb3d968589d8 | 1788 | * offset address FPROT0 0x000B FPROT1 0x000A FPROT2 0x0009 FPROT3 0x0008 To |
Kojto | 90:cb3d968589d8 | 1789 | * change the program flash protection that is loaded during the reset sequence, |
Kojto | 90:cb3d968589d8 | 1790 | * unprotect the sector of program flash memory that contains the Flash |
Kojto | 90:cb3d968589d8 | 1791 | * Configuration Field. Then, reprogram the program flash protection byte. |
Kojto | 90:cb3d968589d8 | 1792 | */ |
Kojto | 90:cb3d968589d8 | 1793 | typedef union _hw_ftfe_fprot3 |
Kojto | 90:cb3d968589d8 | 1794 | { |
Kojto | 90:cb3d968589d8 | 1795 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 1796 | struct _hw_ftfe_fprot3_bitfields |
Kojto | 90:cb3d968589d8 | 1797 | { |
Kojto | 90:cb3d968589d8 | 1798 | uint8_t PROT : 8; /*!< [7:0] Program Flash Region Protect */ |
Kojto | 90:cb3d968589d8 | 1799 | } B; |
Kojto | 90:cb3d968589d8 | 1800 | } hw_ftfe_fprot3_t; |
Kojto | 90:cb3d968589d8 | 1801 | |
Kojto | 90:cb3d968589d8 | 1802 | /*! |
Kojto | 90:cb3d968589d8 | 1803 | * @name Constants and macros for entire FTFE_FPROT3 register |
Kojto | 90:cb3d968589d8 | 1804 | */ |
Kojto | 90:cb3d968589d8 | 1805 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1806 | #define HW_FTFE_FPROT3_ADDR(x) ((x) + 0x10U) |
Kojto | 90:cb3d968589d8 | 1807 | |
Kojto | 90:cb3d968589d8 | 1808 | #define HW_FTFE_FPROT3(x) (*(__IO hw_ftfe_fprot3_t *) HW_FTFE_FPROT3_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 1809 | #define HW_FTFE_FPROT3_RD(x) (HW_FTFE_FPROT3(x).U) |
Kojto | 90:cb3d968589d8 | 1810 | #define HW_FTFE_FPROT3_WR(x, v) (HW_FTFE_FPROT3(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 1811 | #define HW_FTFE_FPROT3_SET(x, v) (HW_FTFE_FPROT3_WR(x, HW_FTFE_FPROT3_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 1812 | #define HW_FTFE_FPROT3_CLR(x, v) (HW_FTFE_FPROT3_WR(x, HW_FTFE_FPROT3_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 1813 | #define HW_FTFE_FPROT3_TOG(x, v) (HW_FTFE_FPROT3_WR(x, HW_FTFE_FPROT3_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 1814 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1815 | |
Kojto | 90:cb3d968589d8 | 1816 | /* |
Kojto | 90:cb3d968589d8 | 1817 | * Constants & macros for individual FTFE_FPROT3 bitfields |
Kojto | 90:cb3d968589d8 | 1818 | */ |
Kojto | 90:cb3d968589d8 | 1819 | |
Kojto | 90:cb3d968589d8 | 1820 | /*! |
Kojto | 90:cb3d968589d8 | 1821 | * @name Register FTFE_FPROT3, field PROT[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 1822 | * |
Kojto | 90:cb3d968589d8 | 1823 | * Each program flash region can be protected from program and erase operations |
Kojto | 90:cb3d968589d8 | 1824 | * by setting the associated PROT bit. In NVM Normal mode: The protection can |
Kojto | 90:cb3d968589d8 | 1825 | * only be increased, meaning that currently unprotected memory can be protected, |
Kojto | 90:cb3d968589d8 | 1826 | * but currently protected memory cannot be unprotected. Since unprotected regions |
Kojto | 90:cb3d968589d8 | 1827 | * are marked with a 1 and protected regions use a 0, only writes changing 1s to |
Kojto | 90:cb3d968589d8 | 1828 | * 0s are accepted. This 1-to-0 transition check is performed on a bit-by-bit |
Kojto | 90:cb3d968589d8 | 1829 | * basis. Those FPROT bits with 1-to-0 transitions are accepted while all bits with |
Kojto | 90:cb3d968589d8 | 1830 | * 0-to-1 transitions are ignored. In NVM Special mode: All bits of FPROT are |
Kojto | 90:cb3d968589d8 | 1831 | * writable without restriction. Unprotected areas can be protected and protected |
Kojto | 90:cb3d968589d8 | 1832 | * areas can be unprotected. The user must never write to any FPROT register while |
Kojto | 90:cb3d968589d8 | 1833 | * a command is running (CCIF=0). Trying to alter data in any protected area in |
Kojto | 90:cb3d968589d8 | 1834 | * the program flash memory results in a protection violation error and sets the |
Kojto | 90:cb3d968589d8 | 1835 | * FSTAT[FPVIOL] bit. A full block erase of a program flash block is not possible |
Kojto | 90:cb3d968589d8 | 1836 | * if it contains any protected region. |
Kojto | 90:cb3d968589d8 | 1837 | * |
Kojto | 90:cb3d968589d8 | 1838 | * Values: |
Kojto | 90:cb3d968589d8 | 1839 | * - 0 - Program flash region is protected. |
Kojto | 90:cb3d968589d8 | 1840 | * - 1 - Program flash region is not protected |
Kojto | 90:cb3d968589d8 | 1841 | */ |
Kojto | 90:cb3d968589d8 | 1842 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1843 | #define BP_FTFE_FPROT3_PROT (0U) /*!< Bit position for FTFE_FPROT3_PROT. */ |
Kojto | 90:cb3d968589d8 | 1844 | #define BM_FTFE_FPROT3_PROT (0xFFU) /*!< Bit mask for FTFE_FPROT3_PROT. */ |
Kojto | 90:cb3d968589d8 | 1845 | #define BS_FTFE_FPROT3_PROT (8U) /*!< Bit field size in bits for FTFE_FPROT3_PROT. */ |
Kojto | 90:cb3d968589d8 | 1846 | |
Kojto | 90:cb3d968589d8 | 1847 | /*! @brief Read current value of the FTFE_FPROT3_PROT field. */ |
Kojto | 90:cb3d968589d8 | 1848 | #define BR_FTFE_FPROT3_PROT(x) (HW_FTFE_FPROT3(x).U) |
Kojto | 90:cb3d968589d8 | 1849 | |
Kojto | 90:cb3d968589d8 | 1850 | /*! @brief Format value for bitfield FTFE_FPROT3_PROT. */ |
Kojto | 90:cb3d968589d8 | 1851 | #define BF_FTFE_FPROT3_PROT(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FPROT3_PROT) & BM_FTFE_FPROT3_PROT) |
Kojto | 90:cb3d968589d8 | 1852 | |
Kojto | 90:cb3d968589d8 | 1853 | /*! @brief Set the PROT field to a new value. */ |
Kojto | 90:cb3d968589d8 | 1854 | #define BW_FTFE_FPROT3_PROT(x, v) (HW_FTFE_FPROT3_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 1855 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1856 | |
Kojto | 90:cb3d968589d8 | 1857 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 1858 | * HW_FTFE_FPROT2 - Program Flash Protection Registers |
Kojto | 90:cb3d968589d8 | 1859 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 1860 | |
Kojto | 90:cb3d968589d8 | 1861 | /*! |
Kojto | 90:cb3d968589d8 | 1862 | * @brief HW_FTFE_FPROT2 - Program Flash Protection Registers (RW) |
Kojto | 90:cb3d968589d8 | 1863 | * |
Kojto | 90:cb3d968589d8 | 1864 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 1865 | * |
Kojto | 90:cb3d968589d8 | 1866 | * The FPROT registers define which program flash regions are protected from |
Kojto | 90:cb3d968589d8 | 1867 | * program and erase operations. Protected flash regions cannot have their content |
Kojto | 90:cb3d968589d8 | 1868 | * changed; that is, these regions cannot be programmed and cannot be erased by |
Kojto | 90:cb3d968589d8 | 1869 | * any FTFE command. Unprotected regions can be changed by program and erase |
Kojto | 90:cb3d968589d8 | 1870 | * operations. The four FPROT registers allow up to 32 protectable regions of equal |
Kojto | 90:cb3d968589d8 | 1871 | * memory size. Program flash protection register Program flash protection bits |
Kojto | 90:cb3d968589d8 | 1872 | * FPROT0 PROT[31:24] FPROT1 PROT[23:16] FPROT2 PROT[15:8] FPROT3 PROT[7:0] During |
Kojto | 90:cb3d968589d8 | 1873 | * the reset sequence, the FPROT registers are loaded with the contents of the |
Kojto | 90:cb3d968589d8 | 1874 | * program flash protection bytes in the Flash Configuration Field as indicated in |
Kojto | 90:cb3d968589d8 | 1875 | * the following table. Program flash protection register Flash Configuration Field |
Kojto | 90:cb3d968589d8 | 1876 | * offset address FPROT0 0x000B FPROT1 0x000A FPROT2 0x0009 FPROT3 0x0008 To |
Kojto | 90:cb3d968589d8 | 1877 | * change the program flash protection that is loaded during the reset sequence, |
Kojto | 90:cb3d968589d8 | 1878 | * unprotect the sector of program flash memory that contains the Flash |
Kojto | 90:cb3d968589d8 | 1879 | * Configuration Field. Then, reprogram the program flash protection byte. |
Kojto | 90:cb3d968589d8 | 1880 | */ |
Kojto | 90:cb3d968589d8 | 1881 | typedef union _hw_ftfe_fprot2 |
Kojto | 90:cb3d968589d8 | 1882 | { |
Kojto | 90:cb3d968589d8 | 1883 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 1884 | struct _hw_ftfe_fprot2_bitfields |
Kojto | 90:cb3d968589d8 | 1885 | { |
Kojto | 90:cb3d968589d8 | 1886 | uint8_t PROT : 8; /*!< [7:0] Program Flash Region Protect */ |
Kojto | 90:cb3d968589d8 | 1887 | } B; |
Kojto | 90:cb3d968589d8 | 1888 | } hw_ftfe_fprot2_t; |
Kojto | 90:cb3d968589d8 | 1889 | |
Kojto | 90:cb3d968589d8 | 1890 | /*! |
Kojto | 90:cb3d968589d8 | 1891 | * @name Constants and macros for entire FTFE_FPROT2 register |
Kojto | 90:cb3d968589d8 | 1892 | */ |
Kojto | 90:cb3d968589d8 | 1893 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1894 | #define HW_FTFE_FPROT2_ADDR(x) ((x) + 0x11U) |
Kojto | 90:cb3d968589d8 | 1895 | |
Kojto | 90:cb3d968589d8 | 1896 | #define HW_FTFE_FPROT2(x) (*(__IO hw_ftfe_fprot2_t *) HW_FTFE_FPROT2_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 1897 | #define HW_FTFE_FPROT2_RD(x) (HW_FTFE_FPROT2(x).U) |
Kojto | 90:cb3d968589d8 | 1898 | #define HW_FTFE_FPROT2_WR(x, v) (HW_FTFE_FPROT2(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 1899 | #define HW_FTFE_FPROT2_SET(x, v) (HW_FTFE_FPROT2_WR(x, HW_FTFE_FPROT2_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 1900 | #define HW_FTFE_FPROT2_CLR(x, v) (HW_FTFE_FPROT2_WR(x, HW_FTFE_FPROT2_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 1901 | #define HW_FTFE_FPROT2_TOG(x, v) (HW_FTFE_FPROT2_WR(x, HW_FTFE_FPROT2_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 1902 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1903 | |
Kojto | 90:cb3d968589d8 | 1904 | /* |
Kojto | 90:cb3d968589d8 | 1905 | * Constants & macros for individual FTFE_FPROT2 bitfields |
Kojto | 90:cb3d968589d8 | 1906 | */ |
Kojto | 90:cb3d968589d8 | 1907 | |
Kojto | 90:cb3d968589d8 | 1908 | /*! |
Kojto | 90:cb3d968589d8 | 1909 | * @name Register FTFE_FPROT2, field PROT[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 1910 | * |
Kojto | 90:cb3d968589d8 | 1911 | * Each program flash region can be protected from program and erase operations |
Kojto | 90:cb3d968589d8 | 1912 | * by setting the associated PROT bit. In NVM Normal mode: The protection can |
Kojto | 90:cb3d968589d8 | 1913 | * only be increased, meaning that currently unprotected memory can be protected, |
Kojto | 90:cb3d968589d8 | 1914 | * but currently protected memory cannot be unprotected. Since unprotected regions |
Kojto | 90:cb3d968589d8 | 1915 | * are marked with a 1 and protected regions use a 0, only writes changing 1s to |
Kojto | 90:cb3d968589d8 | 1916 | * 0s are accepted. This 1-to-0 transition check is performed on a bit-by-bit |
Kojto | 90:cb3d968589d8 | 1917 | * basis. Those FPROT bits with 1-to-0 transitions are accepted while all bits with |
Kojto | 90:cb3d968589d8 | 1918 | * 0-to-1 transitions are ignored. In NVM Special mode: All bits of FPROT are |
Kojto | 90:cb3d968589d8 | 1919 | * writable without restriction. Unprotected areas can be protected and protected |
Kojto | 90:cb3d968589d8 | 1920 | * areas can be unprotected. The user must never write to any FPROT register while |
Kojto | 90:cb3d968589d8 | 1921 | * a command is running (CCIF=0). Trying to alter data in any protected area in |
Kojto | 90:cb3d968589d8 | 1922 | * the program flash memory results in a protection violation error and sets the |
Kojto | 90:cb3d968589d8 | 1923 | * FSTAT[FPVIOL] bit. A full block erase of a program flash block is not possible |
Kojto | 90:cb3d968589d8 | 1924 | * if it contains any protected region. |
Kojto | 90:cb3d968589d8 | 1925 | * |
Kojto | 90:cb3d968589d8 | 1926 | * Values: |
Kojto | 90:cb3d968589d8 | 1927 | * - 0 - Program flash region is protected. |
Kojto | 90:cb3d968589d8 | 1928 | * - 1 - Program flash region is not protected |
Kojto | 90:cb3d968589d8 | 1929 | */ |
Kojto | 90:cb3d968589d8 | 1930 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1931 | #define BP_FTFE_FPROT2_PROT (0U) /*!< Bit position for FTFE_FPROT2_PROT. */ |
Kojto | 90:cb3d968589d8 | 1932 | #define BM_FTFE_FPROT2_PROT (0xFFU) /*!< Bit mask for FTFE_FPROT2_PROT. */ |
Kojto | 90:cb3d968589d8 | 1933 | #define BS_FTFE_FPROT2_PROT (8U) /*!< Bit field size in bits for FTFE_FPROT2_PROT. */ |
Kojto | 90:cb3d968589d8 | 1934 | |
Kojto | 90:cb3d968589d8 | 1935 | /*! @brief Read current value of the FTFE_FPROT2_PROT field. */ |
Kojto | 90:cb3d968589d8 | 1936 | #define BR_FTFE_FPROT2_PROT(x) (HW_FTFE_FPROT2(x).U) |
Kojto | 90:cb3d968589d8 | 1937 | |
Kojto | 90:cb3d968589d8 | 1938 | /*! @brief Format value for bitfield FTFE_FPROT2_PROT. */ |
Kojto | 90:cb3d968589d8 | 1939 | #define BF_FTFE_FPROT2_PROT(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FPROT2_PROT) & BM_FTFE_FPROT2_PROT) |
Kojto | 90:cb3d968589d8 | 1940 | |
Kojto | 90:cb3d968589d8 | 1941 | /*! @brief Set the PROT field to a new value. */ |
Kojto | 90:cb3d968589d8 | 1942 | #define BW_FTFE_FPROT2_PROT(x, v) (HW_FTFE_FPROT2_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 1943 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1944 | |
Kojto | 90:cb3d968589d8 | 1945 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 1946 | * HW_FTFE_FPROT1 - Program Flash Protection Registers |
Kojto | 90:cb3d968589d8 | 1947 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 1948 | |
Kojto | 90:cb3d968589d8 | 1949 | /*! |
Kojto | 90:cb3d968589d8 | 1950 | * @brief HW_FTFE_FPROT1 - Program Flash Protection Registers (RW) |
Kojto | 90:cb3d968589d8 | 1951 | * |
Kojto | 90:cb3d968589d8 | 1952 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 1953 | * |
Kojto | 90:cb3d968589d8 | 1954 | * The FPROT registers define which program flash regions are protected from |
Kojto | 90:cb3d968589d8 | 1955 | * program and erase operations. Protected flash regions cannot have their content |
Kojto | 90:cb3d968589d8 | 1956 | * changed; that is, these regions cannot be programmed and cannot be erased by |
Kojto | 90:cb3d968589d8 | 1957 | * any FTFE command. Unprotected regions can be changed by program and erase |
Kojto | 90:cb3d968589d8 | 1958 | * operations. The four FPROT registers allow up to 32 protectable regions of equal |
Kojto | 90:cb3d968589d8 | 1959 | * memory size. Program flash protection register Program flash protection bits |
Kojto | 90:cb3d968589d8 | 1960 | * FPROT0 PROT[31:24] FPROT1 PROT[23:16] FPROT2 PROT[15:8] FPROT3 PROT[7:0] During |
Kojto | 90:cb3d968589d8 | 1961 | * the reset sequence, the FPROT registers are loaded with the contents of the |
Kojto | 90:cb3d968589d8 | 1962 | * program flash protection bytes in the Flash Configuration Field as indicated in |
Kojto | 90:cb3d968589d8 | 1963 | * the following table. Program flash protection register Flash Configuration Field |
Kojto | 90:cb3d968589d8 | 1964 | * offset address FPROT0 0x000B FPROT1 0x000A FPROT2 0x0009 FPROT3 0x0008 To |
Kojto | 90:cb3d968589d8 | 1965 | * change the program flash protection that is loaded during the reset sequence, |
Kojto | 90:cb3d968589d8 | 1966 | * unprotect the sector of program flash memory that contains the Flash |
Kojto | 90:cb3d968589d8 | 1967 | * Configuration Field. Then, reprogram the program flash protection byte. |
Kojto | 90:cb3d968589d8 | 1968 | */ |
Kojto | 90:cb3d968589d8 | 1969 | typedef union _hw_ftfe_fprot1 |
Kojto | 90:cb3d968589d8 | 1970 | { |
Kojto | 90:cb3d968589d8 | 1971 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 1972 | struct _hw_ftfe_fprot1_bitfields |
Kojto | 90:cb3d968589d8 | 1973 | { |
Kojto | 90:cb3d968589d8 | 1974 | uint8_t PROT : 8; /*!< [7:0] Program Flash Region Protect */ |
Kojto | 90:cb3d968589d8 | 1975 | } B; |
Kojto | 90:cb3d968589d8 | 1976 | } hw_ftfe_fprot1_t; |
Kojto | 90:cb3d968589d8 | 1977 | |
Kojto | 90:cb3d968589d8 | 1978 | /*! |
Kojto | 90:cb3d968589d8 | 1979 | * @name Constants and macros for entire FTFE_FPROT1 register |
Kojto | 90:cb3d968589d8 | 1980 | */ |
Kojto | 90:cb3d968589d8 | 1981 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 1982 | #define HW_FTFE_FPROT1_ADDR(x) ((x) + 0x12U) |
Kojto | 90:cb3d968589d8 | 1983 | |
Kojto | 90:cb3d968589d8 | 1984 | #define HW_FTFE_FPROT1(x) (*(__IO hw_ftfe_fprot1_t *) HW_FTFE_FPROT1_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 1985 | #define HW_FTFE_FPROT1_RD(x) (HW_FTFE_FPROT1(x).U) |
Kojto | 90:cb3d968589d8 | 1986 | #define HW_FTFE_FPROT1_WR(x, v) (HW_FTFE_FPROT1(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 1987 | #define HW_FTFE_FPROT1_SET(x, v) (HW_FTFE_FPROT1_WR(x, HW_FTFE_FPROT1_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 1988 | #define HW_FTFE_FPROT1_CLR(x, v) (HW_FTFE_FPROT1_WR(x, HW_FTFE_FPROT1_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 1989 | #define HW_FTFE_FPROT1_TOG(x, v) (HW_FTFE_FPROT1_WR(x, HW_FTFE_FPROT1_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 1990 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 1991 | |
Kojto | 90:cb3d968589d8 | 1992 | /* |
Kojto | 90:cb3d968589d8 | 1993 | * Constants & macros for individual FTFE_FPROT1 bitfields |
Kojto | 90:cb3d968589d8 | 1994 | */ |
Kojto | 90:cb3d968589d8 | 1995 | |
Kojto | 90:cb3d968589d8 | 1996 | /*! |
Kojto | 90:cb3d968589d8 | 1997 | * @name Register FTFE_FPROT1, field PROT[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 1998 | * |
Kojto | 90:cb3d968589d8 | 1999 | * Each program flash region can be protected from program and erase operations |
Kojto | 90:cb3d968589d8 | 2000 | * by setting the associated PROT bit. In NVM Normal mode: The protection can |
Kojto | 90:cb3d968589d8 | 2001 | * only be increased, meaning that currently unprotected memory can be protected, |
Kojto | 90:cb3d968589d8 | 2002 | * but currently protected memory cannot be unprotected. Since unprotected regions |
Kojto | 90:cb3d968589d8 | 2003 | * are marked with a 1 and protected regions use a 0, only writes changing 1s to |
Kojto | 90:cb3d968589d8 | 2004 | * 0s are accepted. This 1-to-0 transition check is performed on a bit-by-bit |
Kojto | 90:cb3d968589d8 | 2005 | * basis. Those FPROT bits with 1-to-0 transitions are accepted while all bits with |
Kojto | 90:cb3d968589d8 | 2006 | * 0-to-1 transitions are ignored. In NVM Special mode: All bits of FPROT are |
Kojto | 90:cb3d968589d8 | 2007 | * writable without restriction. Unprotected areas can be protected and protected |
Kojto | 90:cb3d968589d8 | 2008 | * areas can be unprotected. The user must never write to any FPROT register while |
Kojto | 90:cb3d968589d8 | 2009 | * a command is running (CCIF=0). Trying to alter data in any protected area in |
Kojto | 90:cb3d968589d8 | 2010 | * the program flash memory results in a protection violation error and sets the |
Kojto | 90:cb3d968589d8 | 2011 | * FSTAT[FPVIOL] bit. A full block erase of a program flash block is not possible |
Kojto | 90:cb3d968589d8 | 2012 | * if it contains any protected region. |
Kojto | 90:cb3d968589d8 | 2013 | * |
Kojto | 90:cb3d968589d8 | 2014 | * Values: |
Kojto | 90:cb3d968589d8 | 2015 | * - 0 - Program flash region is protected. |
Kojto | 90:cb3d968589d8 | 2016 | * - 1 - Program flash region is not protected |
Kojto | 90:cb3d968589d8 | 2017 | */ |
Kojto | 90:cb3d968589d8 | 2018 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 2019 | #define BP_FTFE_FPROT1_PROT (0U) /*!< Bit position for FTFE_FPROT1_PROT. */ |
Kojto | 90:cb3d968589d8 | 2020 | #define BM_FTFE_FPROT1_PROT (0xFFU) /*!< Bit mask for FTFE_FPROT1_PROT. */ |
Kojto | 90:cb3d968589d8 | 2021 | #define BS_FTFE_FPROT1_PROT (8U) /*!< Bit field size in bits for FTFE_FPROT1_PROT. */ |
Kojto | 90:cb3d968589d8 | 2022 | |
Kojto | 90:cb3d968589d8 | 2023 | /*! @brief Read current value of the FTFE_FPROT1_PROT field. */ |
Kojto | 90:cb3d968589d8 | 2024 | #define BR_FTFE_FPROT1_PROT(x) (HW_FTFE_FPROT1(x).U) |
Kojto | 90:cb3d968589d8 | 2025 | |
Kojto | 90:cb3d968589d8 | 2026 | /*! @brief Format value for bitfield FTFE_FPROT1_PROT. */ |
Kojto | 90:cb3d968589d8 | 2027 | #define BF_FTFE_FPROT1_PROT(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FPROT1_PROT) & BM_FTFE_FPROT1_PROT) |
Kojto | 90:cb3d968589d8 | 2028 | |
Kojto | 90:cb3d968589d8 | 2029 | /*! @brief Set the PROT field to a new value. */ |
Kojto | 90:cb3d968589d8 | 2030 | #define BW_FTFE_FPROT1_PROT(x, v) (HW_FTFE_FPROT1_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 2031 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 2032 | |
Kojto | 90:cb3d968589d8 | 2033 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 2034 | * HW_FTFE_FPROT0 - Program Flash Protection Registers |
Kojto | 90:cb3d968589d8 | 2035 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 2036 | |
Kojto | 90:cb3d968589d8 | 2037 | /*! |
Kojto | 90:cb3d968589d8 | 2038 | * @brief HW_FTFE_FPROT0 - Program Flash Protection Registers (RW) |
Kojto | 90:cb3d968589d8 | 2039 | * |
Kojto | 90:cb3d968589d8 | 2040 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 2041 | * |
Kojto | 90:cb3d968589d8 | 2042 | * The FPROT registers define which program flash regions are protected from |
Kojto | 90:cb3d968589d8 | 2043 | * program and erase operations. Protected flash regions cannot have their content |
Kojto | 90:cb3d968589d8 | 2044 | * changed; that is, these regions cannot be programmed and cannot be erased by |
Kojto | 90:cb3d968589d8 | 2045 | * any FTFE command. Unprotected regions can be changed by program and erase |
Kojto | 90:cb3d968589d8 | 2046 | * operations. The four FPROT registers allow up to 32 protectable regions of equal |
Kojto | 90:cb3d968589d8 | 2047 | * memory size. Program flash protection register Program flash protection bits |
Kojto | 90:cb3d968589d8 | 2048 | * FPROT0 PROT[31:24] FPROT1 PROT[23:16] FPROT2 PROT[15:8] FPROT3 PROT[7:0] During |
Kojto | 90:cb3d968589d8 | 2049 | * the reset sequence, the FPROT registers are loaded with the contents of the |
Kojto | 90:cb3d968589d8 | 2050 | * program flash protection bytes in the Flash Configuration Field as indicated in |
Kojto | 90:cb3d968589d8 | 2051 | * the following table. Program flash protection register Flash Configuration Field |
Kojto | 90:cb3d968589d8 | 2052 | * offset address FPROT0 0x000B FPROT1 0x000A FPROT2 0x0009 FPROT3 0x0008 To |
Kojto | 90:cb3d968589d8 | 2053 | * change the program flash protection that is loaded during the reset sequence, |
Kojto | 90:cb3d968589d8 | 2054 | * unprotect the sector of program flash memory that contains the Flash |
Kojto | 90:cb3d968589d8 | 2055 | * Configuration Field. Then, reprogram the program flash protection byte. |
Kojto | 90:cb3d968589d8 | 2056 | */ |
Kojto | 90:cb3d968589d8 | 2057 | typedef union _hw_ftfe_fprot0 |
Kojto | 90:cb3d968589d8 | 2058 | { |
Kojto | 90:cb3d968589d8 | 2059 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 2060 | struct _hw_ftfe_fprot0_bitfields |
Kojto | 90:cb3d968589d8 | 2061 | { |
Kojto | 90:cb3d968589d8 | 2062 | uint8_t PROT : 8; /*!< [7:0] Program Flash Region Protect */ |
Kojto | 90:cb3d968589d8 | 2063 | } B; |
Kojto | 90:cb3d968589d8 | 2064 | } hw_ftfe_fprot0_t; |
Kojto | 90:cb3d968589d8 | 2065 | |
Kojto | 90:cb3d968589d8 | 2066 | /*! |
Kojto | 90:cb3d968589d8 | 2067 | * @name Constants and macros for entire FTFE_FPROT0 register |
Kojto | 90:cb3d968589d8 | 2068 | */ |
Kojto | 90:cb3d968589d8 | 2069 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 2070 | #define HW_FTFE_FPROT0_ADDR(x) ((x) + 0x13U) |
Kojto | 90:cb3d968589d8 | 2071 | |
Kojto | 90:cb3d968589d8 | 2072 | #define HW_FTFE_FPROT0(x) (*(__IO hw_ftfe_fprot0_t *) HW_FTFE_FPROT0_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 2073 | #define HW_FTFE_FPROT0_RD(x) (HW_FTFE_FPROT0(x).U) |
Kojto | 90:cb3d968589d8 | 2074 | #define HW_FTFE_FPROT0_WR(x, v) (HW_FTFE_FPROT0(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 2075 | #define HW_FTFE_FPROT0_SET(x, v) (HW_FTFE_FPROT0_WR(x, HW_FTFE_FPROT0_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 2076 | #define HW_FTFE_FPROT0_CLR(x, v) (HW_FTFE_FPROT0_WR(x, HW_FTFE_FPROT0_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 2077 | #define HW_FTFE_FPROT0_TOG(x, v) (HW_FTFE_FPROT0_WR(x, HW_FTFE_FPROT0_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 2078 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 2079 | |
Kojto | 90:cb3d968589d8 | 2080 | /* |
Kojto | 90:cb3d968589d8 | 2081 | * Constants & macros for individual FTFE_FPROT0 bitfields |
Kojto | 90:cb3d968589d8 | 2082 | */ |
Kojto | 90:cb3d968589d8 | 2083 | |
Kojto | 90:cb3d968589d8 | 2084 | /*! |
Kojto | 90:cb3d968589d8 | 2085 | * @name Register FTFE_FPROT0, field PROT[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 2086 | * |
Kojto | 90:cb3d968589d8 | 2087 | * Each program flash region can be protected from program and erase operations |
Kojto | 90:cb3d968589d8 | 2088 | * by setting the associated PROT bit. In NVM Normal mode: The protection can |
Kojto | 90:cb3d968589d8 | 2089 | * only be increased, meaning that currently unprotected memory can be protected, |
Kojto | 90:cb3d968589d8 | 2090 | * but currently protected memory cannot be unprotected. Since unprotected regions |
Kojto | 90:cb3d968589d8 | 2091 | * are marked with a 1 and protected regions use a 0, only writes changing 1s to |
Kojto | 90:cb3d968589d8 | 2092 | * 0s are accepted. This 1-to-0 transition check is performed on a bit-by-bit |
Kojto | 90:cb3d968589d8 | 2093 | * basis. Those FPROT bits with 1-to-0 transitions are accepted while all bits with |
Kojto | 90:cb3d968589d8 | 2094 | * 0-to-1 transitions are ignored. In NVM Special mode: All bits of FPROT are |
Kojto | 90:cb3d968589d8 | 2095 | * writable without restriction. Unprotected areas can be protected and protected |
Kojto | 90:cb3d968589d8 | 2096 | * areas can be unprotected. The user must never write to any FPROT register while |
Kojto | 90:cb3d968589d8 | 2097 | * a command is running (CCIF=0). Trying to alter data in any protected area in |
Kojto | 90:cb3d968589d8 | 2098 | * the program flash memory results in a protection violation error and sets the |
Kojto | 90:cb3d968589d8 | 2099 | * FSTAT[FPVIOL] bit. A full block erase of a program flash block is not possible |
Kojto | 90:cb3d968589d8 | 2100 | * if it contains any protected region. |
Kojto | 90:cb3d968589d8 | 2101 | * |
Kojto | 90:cb3d968589d8 | 2102 | * Values: |
Kojto | 90:cb3d968589d8 | 2103 | * - 0 - Program flash region is protected. |
Kojto | 90:cb3d968589d8 | 2104 | * - 1 - Program flash region is not protected |
Kojto | 90:cb3d968589d8 | 2105 | */ |
Kojto | 90:cb3d968589d8 | 2106 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 2107 | #define BP_FTFE_FPROT0_PROT (0U) /*!< Bit position for FTFE_FPROT0_PROT. */ |
Kojto | 90:cb3d968589d8 | 2108 | #define BM_FTFE_FPROT0_PROT (0xFFU) /*!< Bit mask for FTFE_FPROT0_PROT. */ |
Kojto | 90:cb3d968589d8 | 2109 | #define BS_FTFE_FPROT0_PROT (8U) /*!< Bit field size in bits for FTFE_FPROT0_PROT. */ |
Kojto | 90:cb3d968589d8 | 2110 | |
Kojto | 90:cb3d968589d8 | 2111 | /*! @brief Read current value of the FTFE_FPROT0_PROT field. */ |
Kojto | 90:cb3d968589d8 | 2112 | #define BR_FTFE_FPROT0_PROT(x) (HW_FTFE_FPROT0(x).U) |
Kojto | 90:cb3d968589d8 | 2113 | |
Kojto | 90:cb3d968589d8 | 2114 | /*! @brief Format value for bitfield FTFE_FPROT0_PROT. */ |
Kojto | 90:cb3d968589d8 | 2115 | #define BF_FTFE_FPROT0_PROT(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FPROT0_PROT) & BM_FTFE_FPROT0_PROT) |
Kojto | 90:cb3d968589d8 | 2116 | |
Kojto | 90:cb3d968589d8 | 2117 | /*! @brief Set the PROT field to a new value. */ |
Kojto | 90:cb3d968589d8 | 2118 | #define BW_FTFE_FPROT0_PROT(x, v) (HW_FTFE_FPROT0_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 2119 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 2120 | |
Kojto | 90:cb3d968589d8 | 2121 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 2122 | * HW_FTFE_FEPROT - EEPROM Protection Register |
Kojto | 90:cb3d968589d8 | 2123 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 2124 | |
Kojto | 90:cb3d968589d8 | 2125 | /*! |
Kojto | 90:cb3d968589d8 | 2126 | * @brief HW_FTFE_FEPROT - EEPROM Protection Register (RW) |
Kojto | 90:cb3d968589d8 | 2127 | * |
Kojto | 90:cb3d968589d8 | 2128 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 2129 | * |
Kojto | 90:cb3d968589d8 | 2130 | * For devices with FlexNVM: The FEPROT register defines which EEPROM regions of |
Kojto | 90:cb3d968589d8 | 2131 | * the FlexRAM are protected against program and erase operations. Protected |
Kojto | 90:cb3d968589d8 | 2132 | * EEPROM regions cannot have their content changed by writing to it. Unprotected |
Kojto | 90:cb3d968589d8 | 2133 | * regions can be changed by writing to the FlexRAM. For devices with program flash |
Kojto | 90:cb3d968589d8 | 2134 | * only: This register is reserved and not used. |
Kojto | 90:cb3d968589d8 | 2135 | */ |
Kojto | 90:cb3d968589d8 | 2136 | typedef union _hw_ftfe_feprot |
Kojto | 90:cb3d968589d8 | 2137 | { |
Kojto | 90:cb3d968589d8 | 2138 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 2139 | struct _hw_ftfe_feprot_bitfields |
Kojto | 90:cb3d968589d8 | 2140 | { |
Kojto | 90:cb3d968589d8 | 2141 | uint8_t EPROT : 8; /*!< [7:0] EEPROM Region Protect */ |
Kojto | 90:cb3d968589d8 | 2142 | } B; |
Kojto | 90:cb3d968589d8 | 2143 | } hw_ftfe_feprot_t; |
Kojto | 90:cb3d968589d8 | 2144 | |
Kojto | 90:cb3d968589d8 | 2145 | /*! |
Kojto | 90:cb3d968589d8 | 2146 | * @name Constants and macros for entire FTFE_FEPROT register |
Kojto | 90:cb3d968589d8 | 2147 | */ |
Kojto | 90:cb3d968589d8 | 2148 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 2149 | #define HW_FTFE_FEPROT_ADDR(x) ((x) + 0x16U) |
Kojto | 90:cb3d968589d8 | 2150 | |
Kojto | 90:cb3d968589d8 | 2151 | #define HW_FTFE_FEPROT(x) (*(__IO hw_ftfe_feprot_t *) HW_FTFE_FEPROT_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 2152 | #define HW_FTFE_FEPROT_RD(x) (HW_FTFE_FEPROT(x).U) |
Kojto | 90:cb3d968589d8 | 2153 | #define HW_FTFE_FEPROT_WR(x, v) (HW_FTFE_FEPROT(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 2154 | #define HW_FTFE_FEPROT_SET(x, v) (HW_FTFE_FEPROT_WR(x, HW_FTFE_FEPROT_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 2155 | #define HW_FTFE_FEPROT_CLR(x, v) (HW_FTFE_FEPROT_WR(x, HW_FTFE_FEPROT_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 2156 | #define HW_FTFE_FEPROT_TOG(x, v) (HW_FTFE_FEPROT_WR(x, HW_FTFE_FEPROT_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 2157 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 2158 | |
Kojto | 90:cb3d968589d8 | 2159 | /* |
Kojto | 90:cb3d968589d8 | 2160 | * Constants & macros for individual FTFE_FEPROT bitfields |
Kojto | 90:cb3d968589d8 | 2161 | */ |
Kojto | 90:cb3d968589d8 | 2162 | |
Kojto | 90:cb3d968589d8 | 2163 | /*! |
Kojto | 90:cb3d968589d8 | 2164 | * @name Register FTFE_FEPROT, field EPROT[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 2165 | * |
Kojto | 90:cb3d968589d8 | 2166 | * For devices with program flash only: Reserved For devices with FlexNVM: |
Kojto | 90:cb3d968589d8 | 2167 | * Individual EEPROM regions can be protected from alteration by setting the |
Kojto | 90:cb3d968589d8 | 2168 | * associated EPROT bit. The EPROT bits are not used when the FlexNVM Partition Code is |
Kojto | 90:cb3d968589d8 | 2169 | * set to data flash only. When the FlexNVM Partition Code is set to data flash and |
Kojto | 90:cb3d968589d8 | 2170 | * EEPROM or EEPROM only, each EPROT bit covers one-eighth of the configured |
Kojto | 90:cb3d968589d8 | 2171 | * EEPROM data (see the EEPROM Data Set Size parameter description). In NVM Normal |
Kojto | 90:cb3d968589d8 | 2172 | * mode: The protection can only be increased. This means that |
Kojto | 90:cb3d968589d8 | 2173 | * currently-unprotected memory can be protected, but currently-protected memory cannot be |
Kojto | 90:cb3d968589d8 | 2174 | * unprotected. Since unprotected regions are marked with a 1 and protected regions use a |
Kojto | 90:cb3d968589d8 | 2175 | * 0, only writes changing 1s to 0s are accepted. This 1-to-0 transition check is |
Kojto | 90:cb3d968589d8 | 2176 | * performed on a bit-by-bit basis. Those FEPROT bits with 1-to-0 transitions |
Kojto | 90:cb3d968589d8 | 2177 | * are accepted while all bits with 0-to-1 transitions are ignored. In NVM Special |
Kojto | 90:cb3d968589d8 | 2178 | * mode: All bits of the FEPROT register are writable without restriction. |
Kojto | 90:cb3d968589d8 | 2179 | * Unprotected areas can be protected and protected areas can be unprotected. Never |
Kojto | 90:cb3d968589d8 | 2180 | * write to the FEPROT register while a command is running (CCIF=0). Reset: During |
Kojto | 90:cb3d968589d8 | 2181 | * the reset sequence, the FEPROT register is loaded with the contents of the |
Kojto | 90:cb3d968589d8 | 2182 | * FlexRAM protection byte in the Flash Configuration Field located in program flash. |
Kojto | 90:cb3d968589d8 | 2183 | * The flash basis for the reset values is signified by X in the register |
Kojto | 90:cb3d968589d8 | 2184 | * diagram. To change the EEPROM protection that will be loaded during the reset |
Kojto | 90:cb3d968589d8 | 2185 | * sequence, the sector of program flash that contains the Flash Configuration Field |
Kojto | 90:cb3d968589d8 | 2186 | * must be unprotected; then the EEPROM protection byte must be erased and |
Kojto | 90:cb3d968589d8 | 2187 | * reprogrammed. Trying to alter data by writing to any protected area in the EEPROM |
Kojto | 90:cb3d968589d8 | 2188 | * results in a protection violation error and sets the FSTAT[FPVIOL] bit. |
Kojto | 90:cb3d968589d8 | 2189 | * |
Kojto | 90:cb3d968589d8 | 2190 | * Values: |
Kojto | 90:cb3d968589d8 | 2191 | * - 0 - For devices with program flash only: Reserved For devices with FlexNVM: |
Kojto | 90:cb3d968589d8 | 2192 | * EEPROM region is protected |
Kojto | 90:cb3d968589d8 | 2193 | * - 1 - For devices with program flash only: Reserved For devices with FlexNVM: |
Kojto | 90:cb3d968589d8 | 2194 | * EEPROM region is not protected |
Kojto | 90:cb3d968589d8 | 2195 | */ |
Kojto | 90:cb3d968589d8 | 2196 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 2197 | #define BP_FTFE_FEPROT_EPROT (0U) /*!< Bit position for FTFE_FEPROT_EPROT. */ |
Kojto | 90:cb3d968589d8 | 2198 | #define BM_FTFE_FEPROT_EPROT (0xFFU) /*!< Bit mask for FTFE_FEPROT_EPROT. */ |
Kojto | 90:cb3d968589d8 | 2199 | #define BS_FTFE_FEPROT_EPROT (8U) /*!< Bit field size in bits for FTFE_FEPROT_EPROT. */ |
Kojto | 90:cb3d968589d8 | 2200 | |
Kojto | 90:cb3d968589d8 | 2201 | /*! @brief Read current value of the FTFE_FEPROT_EPROT field. */ |
Kojto | 90:cb3d968589d8 | 2202 | #define BR_FTFE_FEPROT_EPROT(x) (HW_FTFE_FEPROT(x).U) |
Kojto | 90:cb3d968589d8 | 2203 | |
Kojto | 90:cb3d968589d8 | 2204 | /*! @brief Format value for bitfield FTFE_FEPROT_EPROT. */ |
Kojto | 90:cb3d968589d8 | 2205 | #define BF_FTFE_FEPROT_EPROT(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FEPROT_EPROT) & BM_FTFE_FEPROT_EPROT) |
Kojto | 90:cb3d968589d8 | 2206 | |
Kojto | 90:cb3d968589d8 | 2207 | /*! @brief Set the EPROT field to a new value. */ |
Kojto | 90:cb3d968589d8 | 2208 | #define BW_FTFE_FEPROT_EPROT(x, v) (HW_FTFE_FEPROT_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 2209 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 2210 | |
Kojto | 90:cb3d968589d8 | 2211 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 2212 | * HW_FTFE_FDPROT - Data Flash Protection Register |
Kojto | 90:cb3d968589d8 | 2213 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 2214 | |
Kojto | 90:cb3d968589d8 | 2215 | /*! |
Kojto | 90:cb3d968589d8 | 2216 | * @brief HW_FTFE_FDPROT - Data Flash Protection Register (RW) |
Kojto | 90:cb3d968589d8 | 2217 | * |
Kojto | 90:cb3d968589d8 | 2218 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 2219 | * |
Kojto | 90:cb3d968589d8 | 2220 | * The FDPROT register defines which data flash regions are protected against |
Kojto | 90:cb3d968589d8 | 2221 | * program and erase operations. Protected Flash regions cannot have their content |
Kojto | 90:cb3d968589d8 | 2222 | * changed; that is, these regions cannot be programmed and cannot be erased by |
Kojto | 90:cb3d968589d8 | 2223 | * any FTFE command. Unprotected regions can be changed by both program and erase |
Kojto | 90:cb3d968589d8 | 2224 | * operations. |
Kojto | 90:cb3d968589d8 | 2225 | */ |
Kojto | 90:cb3d968589d8 | 2226 | typedef union _hw_ftfe_fdprot |
Kojto | 90:cb3d968589d8 | 2227 | { |
Kojto | 90:cb3d968589d8 | 2228 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 2229 | struct _hw_ftfe_fdprot_bitfields |
Kojto | 90:cb3d968589d8 | 2230 | { |
Kojto | 90:cb3d968589d8 | 2231 | uint8_t DPROT : 8; /*!< [7:0] Data Flash Region Protect */ |
Kojto | 90:cb3d968589d8 | 2232 | } B; |
Kojto | 90:cb3d968589d8 | 2233 | } hw_ftfe_fdprot_t; |
Kojto | 90:cb3d968589d8 | 2234 | |
Kojto | 90:cb3d968589d8 | 2235 | /*! |
Kojto | 90:cb3d968589d8 | 2236 | * @name Constants and macros for entire FTFE_FDPROT register |
Kojto | 90:cb3d968589d8 | 2237 | */ |
Kojto | 90:cb3d968589d8 | 2238 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 2239 | #define HW_FTFE_FDPROT_ADDR(x) ((x) + 0x17U) |
Kojto | 90:cb3d968589d8 | 2240 | |
Kojto | 90:cb3d968589d8 | 2241 | #define HW_FTFE_FDPROT(x) (*(__IO hw_ftfe_fdprot_t *) HW_FTFE_FDPROT_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 2242 | #define HW_FTFE_FDPROT_RD(x) (HW_FTFE_FDPROT(x).U) |
Kojto | 90:cb3d968589d8 | 2243 | #define HW_FTFE_FDPROT_WR(x, v) (HW_FTFE_FDPROT(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 2244 | #define HW_FTFE_FDPROT_SET(x, v) (HW_FTFE_FDPROT_WR(x, HW_FTFE_FDPROT_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 2245 | #define HW_FTFE_FDPROT_CLR(x, v) (HW_FTFE_FDPROT_WR(x, HW_FTFE_FDPROT_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 2246 | #define HW_FTFE_FDPROT_TOG(x, v) (HW_FTFE_FDPROT_WR(x, HW_FTFE_FDPROT_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 2247 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 2248 | |
Kojto | 90:cb3d968589d8 | 2249 | /* |
Kojto | 90:cb3d968589d8 | 2250 | * Constants & macros for individual FTFE_FDPROT bitfields |
Kojto | 90:cb3d968589d8 | 2251 | */ |
Kojto | 90:cb3d968589d8 | 2252 | |
Kojto | 90:cb3d968589d8 | 2253 | /*! |
Kojto | 90:cb3d968589d8 | 2254 | * @name Register FTFE_FDPROT, field DPROT[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 2255 | * |
Kojto | 90:cb3d968589d8 | 2256 | * Individual data flash regions can be protected from program and erase |
Kojto | 90:cb3d968589d8 | 2257 | * operations by setting the associated DPROT bit. Each DPROT bit protects one-eighth of |
Kojto | 90:cb3d968589d8 | 2258 | * the partitioned data flash memory space. The granularity of data flash |
Kojto | 90:cb3d968589d8 | 2259 | * protection cannot be less than the data flash sector size. If an unused DPROT bit is |
Kojto | 90:cb3d968589d8 | 2260 | * set, the Erase all Blocks command does not execute and sets the FSTAT[FPVIOL] |
Kojto | 90:cb3d968589d8 | 2261 | * bit. In NVM Normal mode: The protection can only be increased, meaning that |
Kojto | 90:cb3d968589d8 | 2262 | * currently unprotected memory can be protected but currently protected memory |
Kojto | 90:cb3d968589d8 | 2263 | * cannot be unprotected. Since unprotected regions are marked with a 1 and |
Kojto | 90:cb3d968589d8 | 2264 | * protected regions use a 0, only writes changing 1s to 0s are accepted. This 1-to-0 |
Kojto | 90:cb3d968589d8 | 2265 | * transition check is performed on a bit-by-bit basis. Those FDPROT bits with |
Kojto | 90:cb3d968589d8 | 2266 | * 1-to-0 transitions are accepted while all bits with 0-to-1 transitions are |
Kojto | 90:cb3d968589d8 | 2267 | * ignored. In NVM Special mode: All bits of the FDPROT register are writable without |
Kojto | 90:cb3d968589d8 | 2268 | * restriction. Unprotected areas can be protected and protected areas can be |
Kojto | 90:cb3d968589d8 | 2269 | * unprotected. The user must never write to the FDPROT register while a command is |
Kojto | 90:cb3d968589d8 | 2270 | * running (CCIF=0). Reset: During the reset sequence, the FDPROT register is |
Kojto | 90:cb3d968589d8 | 2271 | * loaded with the contents of the data flash protection byte in the Flash |
Kojto | 90:cb3d968589d8 | 2272 | * Configuration Field located in program flash memory. The flash basis for the reset values |
Kojto | 90:cb3d968589d8 | 2273 | * is signified by X in the register diagram. To change the data flash |
Kojto | 90:cb3d968589d8 | 2274 | * protection that will be loaded during the reset sequence, unprotect the sector of |
Kojto | 90:cb3d968589d8 | 2275 | * program flash that contains the Flash Configuration Field. Then, erase and |
Kojto | 90:cb3d968589d8 | 2276 | * reprogram the data flash protection byte. Trying to alter data with the program and |
Kojto | 90:cb3d968589d8 | 2277 | * erase commands in any protected area in the data flash memory results in a |
Kojto | 90:cb3d968589d8 | 2278 | * protection violation error and sets the FSTAT[FPVIOL] bit. A block erase of any |
Kojto | 90:cb3d968589d8 | 2279 | * data flash memory block (see the Erase Flash Block command description) is not |
Kojto | 90:cb3d968589d8 | 2280 | * possible if the data flash block contains any protected region or if the FlexNVM |
Kojto | 90:cb3d968589d8 | 2281 | * memory has been partitioned for EEPROM. |
Kojto | 90:cb3d968589d8 | 2282 | * |
Kojto | 90:cb3d968589d8 | 2283 | * Values: |
Kojto | 90:cb3d968589d8 | 2284 | * - 0 - Data Flash region is protected |
Kojto | 90:cb3d968589d8 | 2285 | * - 1 - Data Flash region is not protected |
Kojto | 90:cb3d968589d8 | 2286 | */ |
Kojto | 90:cb3d968589d8 | 2287 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 2288 | #define BP_FTFE_FDPROT_DPROT (0U) /*!< Bit position for FTFE_FDPROT_DPROT. */ |
Kojto | 90:cb3d968589d8 | 2289 | #define BM_FTFE_FDPROT_DPROT (0xFFU) /*!< Bit mask for FTFE_FDPROT_DPROT. */ |
Kojto | 90:cb3d968589d8 | 2290 | #define BS_FTFE_FDPROT_DPROT (8U) /*!< Bit field size in bits for FTFE_FDPROT_DPROT. */ |
Kojto | 90:cb3d968589d8 | 2291 | |
Kojto | 90:cb3d968589d8 | 2292 | /*! @brief Read current value of the FTFE_FDPROT_DPROT field. */ |
Kojto | 90:cb3d968589d8 | 2293 | #define BR_FTFE_FDPROT_DPROT(x) (HW_FTFE_FDPROT(x).U) |
Kojto | 90:cb3d968589d8 | 2294 | |
Kojto | 90:cb3d968589d8 | 2295 | /*! @brief Format value for bitfield FTFE_FDPROT_DPROT. */ |
Kojto | 90:cb3d968589d8 | 2296 | #define BF_FTFE_FDPROT_DPROT(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FDPROT_DPROT) & BM_FTFE_FDPROT_DPROT) |
Kojto | 90:cb3d968589d8 | 2297 | |
Kojto | 90:cb3d968589d8 | 2298 | /*! @brief Set the DPROT field to a new value. */ |
Kojto | 90:cb3d968589d8 | 2299 | #define BW_FTFE_FDPROT_DPROT(x, v) (HW_FTFE_FDPROT_WR(x, v)) |
Kojto | 90:cb3d968589d8 | 2300 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 2301 | |
Kojto | 90:cb3d968589d8 | 2302 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 2303 | * hw_ftfe_t - module struct |
Kojto | 90:cb3d968589d8 | 2304 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 2305 | /*! |
Kojto | 90:cb3d968589d8 | 2306 | * @brief All FTFE module registers. |
Kojto | 90:cb3d968589d8 | 2307 | */ |
Kojto | 90:cb3d968589d8 | 2308 | #pragma pack(1) |
Kojto | 90:cb3d968589d8 | 2309 | typedef struct _hw_ftfe |
Kojto | 90:cb3d968589d8 | 2310 | { |
Kojto | 90:cb3d968589d8 | 2311 | __IO hw_ftfe_fstat_t FSTAT; /*!< [0x0] Flash Status Register */ |
Kojto | 90:cb3d968589d8 | 2312 | __IO hw_ftfe_fcnfg_t FCNFG; /*!< [0x1] Flash Configuration Register */ |
Kojto | 90:cb3d968589d8 | 2313 | __I hw_ftfe_fsec_t FSEC; /*!< [0x2] Flash Security Register */ |
Kojto | 90:cb3d968589d8 | 2314 | __I hw_ftfe_fopt_t FOPT; /*!< [0x3] Flash Option Register */ |
Kojto | 90:cb3d968589d8 | 2315 | __IO hw_ftfe_fccob3_t FCCOB3; /*!< [0x4] Flash Common Command Object Registers */ |
Kojto | 90:cb3d968589d8 | 2316 | __IO hw_ftfe_fccob2_t FCCOB2; /*!< [0x5] Flash Common Command Object Registers */ |
Kojto | 90:cb3d968589d8 | 2317 | __IO hw_ftfe_fccob1_t FCCOB1; /*!< [0x6] Flash Common Command Object Registers */ |
Kojto | 90:cb3d968589d8 | 2318 | __IO hw_ftfe_fccob0_t FCCOB0; /*!< [0x7] Flash Common Command Object Registers */ |
Kojto | 90:cb3d968589d8 | 2319 | __IO hw_ftfe_fccob7_t FCCOB7; /*!< [0x8] Flash Common Command Object Registers */ |
Kojto | 90:cb3d968589d8 | 2320 | __IO hw_ftfe_fccob6_t FCCOB6; /*!< [0x9] Flash Common Command Object Registers */ |
Kojto | 90:cb3d968589d8 | 2321 | __IO hw_ftfe_fccob5_t FCCOB5; /*!< [0xA] Flash Common Command Object Registers */ |
Kojto | 90:cb3d968589d8 | 2322 | __IO hw_ftfe_fccob4_t FCCOB4; /*!< [0xB] Flash Common Command Object Registers */ |
Kojto | 90:cb3d968589d8 | 2323 | __IO hw_ftfe_fccobb_t FCCOBB; /*!< [0xC] Flash Common Command Object Registers */ |
Kojto | 90:cb3d968589d8 | 2324 | __IO hw_ftfe_fccoba_t FCCOBA; /*!< [0xD] Flash Common Command Object Registers */ |
Kojto | 90:cb3d968589d8 | 2325 | __IO hw_ftfe_fccob9_t FCCOB9; /*!< [0xE] Flash Common Command Object Registers */ |
Kojto | 90:cb3d968589d8 | 2326 | __IO hw_ftfe_fccob8_t FCCOB8; /*!< [0xF] Flash Common Command Object Registers */ |
Kojto | 90:cb3d968589d8 | 2327 | __IO hw_ftfe_fprot3_t FPROT3; /*!< [0x10] Program Flash Protection Registers */ |
Kojto | 90:cb3d968589d8 | 2328 | __IO hw_ftfe_fprot2_t FPROT2; /*!< [0x11] Program Flash Protection Registers */ |
Kojto | 90:cb3d968589d8 | 2329 | __IO hw_ftfe_fprot1_t FPROT1; /*!< [0x12] Program Flash Protection Registers */ |
Kojto | 90:cb3d968589d8 | 2330 | __IO hw_ftfe_fprot0_t FPROT0; /*!< [0x13] Program Flash Protection Registers */ |
Kojto | 90:cb3d968589d8 | 2331 | uint8_t _reserved0[2]; |
Kojto | 90:cb3d968589d8 | 2332 | __IO hw_ftfe_feprot_t FEPROT; /*!< [0x16] EEPROM Protection Register */ |
Kojto | 90:cb3d968589d8 | 2333 | __IO hw_ftfe_fdprot_t FDPROT; /*!< [0x17] Data Flash Protection Register */ |
Kojto | 90:cb3d968589d8 | 2334 | } hw_ftfe_t; |
Kojto | 90:cb3d968589d8 | 2335 | #pragma pack() |
Kojto | 90:cb3d968589d8 | 2336 | |
Kojto | 90:cb3d968589d8 | 2337 | /*! @brief Macro to access all FTFE registers. */ |
Kojto | 90:cb3d968589d8 | 2338 | /*! @param x FTFE module instance base address. */ |
Kojto | 90:cb3d968589d8 | 2339 | /*! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct, |
Kojto | 90:cb3d968589d8 | 2340 | * use the '&' operator, like <code>&HW_FTFE(FTFE_BASE)</code>. */ |
Kojto | 90:cb3d968589d8 | 2341 | #define HW_FTFE(x) (*(hw_ftfe_t *)(x)) |
Kojto | 90:cb3d968589d8 | 2342 | |
Kojto | 90:cb3d968589d8 | 2343 | #endif /* __HW_FTFE_REGISTERS_H__ */ |
Kojto | 90:cb3d968589d8 | 2344 | /* EOF */ |