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TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_dac.h@104:b9ad9a133dc7, 2015-08-05 (annotated)
- Committer:
- Kojto
- Date:
- Wed Aug 05 13:16:35 2015 +0100
- Revision:
- 104:b9ad9a133dc7
- Parent:
- 90:cb3d968589d8
Release 104 of the mbed library:
Changes:
- new platforms: nrf51 microbit
- MAXxxx - fix pwm array search
- LPC8xx - usart enable fix
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Kojto | 90:cb3d968589d8 | 1 | /* |
Kojto | 90:cb3d968589d8 | 2 | ** ################################################################### |
Kojto | 90:cb3d968589d8 | 3 | ** Compilers: Keil ARM C/C++ Compiler |
Kojto | 90:cb3d968589d8 | 4 | ** Freescale C/C++ for Embedded ARM |
Kojto | 90:cb3d968589d8 | 5 | ** GNU C Compiler |
Kojto | 90:cb3d968589d8 | 6 | ** IAR ANSI C/C++ Compiler for ARM |
Kojto | 90:cb3d968589d8 | 7 | ** |
Kojto | 90:cb3d968589d8 | 8 | ** Reference manual: K64P144M120SF5RM, Rev.2, January 2014 |
Kojto | 90:cb3d968589d8 | 9 | ** Version: rev. 2.5, 2014-02-10 |
Kojto | 90:cb3d968589d8 | 10 | ** Build: b140604 |
Kojto | 90:cb3d968589d8 | 11 | ** |
Kojto | 90:cb3d968589d8 | 12 | ** Abstract: |
Kojto | 90:cb3d968589d8 | 13 | ** Extension to the CMSIS register access layer header. |
Kojto | 90:cb3d968589d8 | 14 | ** |
Kojto | 90:cb3d968589d8 | 15 | ** Copyright (c) 2014 Freescale Semiconductor, Inc. |
Kojto | 90:cb3d968589d8 | 16 | ** All rights reserved. |
Kojto | 90:cb3d968589d8 | 17 | ** |
Kojto | 90:cb3d968589d8 | 18 | ** Redistribution and use in source and binary forms, with or without modification, |
Kojto | 90:cb3d968589d8 | 19 | ** are permitted provided that the following conditions are met: |
Kojto | 90:cb3d968589d8 | 20 | ** |
Kojto | 90:cb3d968589d8 | 21 | ** o Redistributions of source code must retain the above copyright notice, this list |
Kojto | 90:cb3d968589d8 | 22 | ** of conditions and the following disclaimer. |
Kojto | 90:cb3d968589d8 | 23 | ** |
Kojto | 90:cb3d968589d8 | 24 | ** o Redistributions in binary form must reproduce the above copyright notice, this |
Kojto | 90:cb3d968589d8 | 25 | ** list of conditions and the following disclaimer in the documentation and/or |
Kojto | 90:cb3d968589d8 | 26 | ** other materials provided with the distribution. |
Kojto | 90:cb3d968589d8 | 27 | ** |
Kojto | 90:cb3d968589d8 | 28 | ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
Kojto | 90:cb3d968589d8 | 29 | ** contributors may be used to endorse or promote products derived from this |
Kojto | 90:cb3d968589d8 | 30 | ** software without specific prior written permission. |
Kojto | 90:cb3d968589d8 | 31 | ** |
Kojto | 90:cb3d968589d8 | 32 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
Kojto | 90:cb3d968589d8 | 33 | ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
Kojto | 90:cb3d968589d8 | 34 | ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Kojto | 90:cb3d968589d8 | 35 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
Kojto | 90:cb3d968589d8 | 36 | ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
Kojto | 90:cb3d968589d8 | 37 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
Kojto | 90:cb3d968589d8 | 38 | ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
Kojto | 90:cb3d968589d8 | 39 | ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
Kojto | 90:cb3d968589d8 | 40 | ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
Kojto | 90:cb3d968589d8 | 41 | ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Kojto | 90:cb3d968589d8 | 42 | ** |
Kojto | 90:cb3d968589d8 | 43 | ** http: www.freescale.com |
Kojto | 90:cb3d968589d8 | 44 | ** mail: support@freescale.com |
Kojto | 90:cb3d968589d8 | 45 | ** |
Kojto | 90:cb3d968589d8 | 46 | ** Revisions: |
Kojto | 90:cb3d968589d8 | 47 | ** - rev. 1.0 (2013-08-12) |
Kojto | 90:cb3d968589d8 | 48 | ** Initial version. |
Kojto | 90:cb3d968589d8 | 49 | ** - rev. 2.0 (2013-10-29) |
Kojto | 90:cb3d968589d8 | 50 | ** Register accessor macros added to the memory map. |
Kojto | 90:cb3d968589d8 | 51 | ** Symbols for Processor Expert memory map compatibility added to the memory map. |
Kojto | 90:cb3d968589d8 | 52 | ** Startup file for gcc has been updated according to CMSIS 3.2. |
Kojto | 90:cb3d968589d8 | 53 | ** System initialization updated. |
Kojto | 90:cb3d968589d8 | 54 | ** MCG - registers updated. |
Kojto | 90:cb3d968589d8 | 55 | ** PORTA, PORTB, PORTC, PORTE - registers for digital filter removed. |
Kojto | 90:cb3d968589d8 | 56 | ** - rev. 2.1 (2013-10-30) |
Kojto | 90:cb3d968589d8 | 57 | ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled. |
Kojto | 90:cb3d968589d8 | 58 | ** - rev. 2.2 (2013-12-09) |
Kojto | 90:cb3d968589d8 | 59 | ** DMA - EARS register removed. |
Kojto | 90:cb3d968589d8 | 60 | ** AIPS0, AIPS1 - MPRA register updated. |
Kojto | 90:cb3d968589d8 | 61 | ** - rev. 2.3 (2014-01-24) |
Kojto | 90:cb3d968589d8 | 62 | ** Update according to reference manual rev. 2 |
Kojto | 90:cb3d968589d8 | 63 | ** ENET, MCG, MCM, SIM, USB - registers updated |
Kojto | 90:cb3d968589d8 | 64 | ** - rev. 2.4 (2014-02-10) |
Kojto | 90:cb3d968589d8 | 65 | ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h |
Kojto | 90:cb3d968589d8 | 66 | ** Update of SystemInit() and SystemCoreClockUpdate() functions. |
Kojto | 90:cb3d968589d8 | 67 | ** - rev. 2.5 (2014-02-10) |
Kojto | 90:cb3d968589d8 | 68 | ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h |
Kojto | 90:cb3d968589d8 | 69 | ** Update of SystemInit() and SystemCoreClockUpdate() functions. |
Kojto | 90:cb3d968589d8 | 70 | ** Module access macro module_BASES replaced by module_BASE_PTRS. |
Kojto | 90:cb3d968589d8 | 71 | ** |
Kojto | 90:cb3d968589d8 | 72 | ** ################################################################### |
Kojto | 90:cb3d968589d8 | 73 | */ |
Kojto | 90:cb3d968589d8 | 74 | |
Kojto | 90:cb3d968589d8 | 75 | /* |
Kojto | 90:cb3d968589d8 | 76 | * WARNING! DO NOT EDIT THIS FILE DIRECTLY! |
Kojto | 90:cb3d968589d8 | 77 | * |
Kojto | 90:cb3d968589d8 | 78 | * This file was generated automatically and any changes may be lost. |
Kojto | 90:cb3d968589d8 | 79 | */ |
Kojto | 90:cb3d968589d8 | 80 | #ifndef __HW_DAC_REGISTERS_H__ |
Kojto | 90:cb3d968589d8 | 81 | #define __HW_DAC_REGISTERS_H__ |
Kojto | 90:cb3d968589d8 | 82 | |
Kojto | 90:cb3d968589d8 | 83 | #include "MK64F12.h" |
Kojto | 90:cb3d968589d8 | 84 | #include "fsl_bitaccess.h" |
Kojto | 90:cb3d968589d8 | 85 | |
Kojto | 90:cb3d968589d8 | 86 | /* |
Kojto | 90:cb3d968589d8 | 87 | * MK64F12 DAC |
Kojto | 90:cb3d968589d8 | 88 | * |
Kojto | 90:cb3d968589d8 | 89 | * 12-Bit Digital-to-Analog Converter |
Kojto | 90:cb3d968589d8 | 90 | * |
Kojto | 90:cb3d968589d8 | 91 | * Registers defined in this header file: |
Kojto | 90:cb3d968589d8 | 92 | * - HW_DAC_DATnL - DAC Data Low Register |
Kojto | 90:cb3d968589d8 | 93 | * - HW_DAC_DATnH - DAC Data High Register |
Kojto | 90:cb3d968589d8 | 94 | * - HW_DAC_SR - DAC Status Register |
Kojto | 90:cb3d968589d8 | 95 | * - HW_DAC_C0 - DAC Control Register |
Kojto | 90:cb3d968589d8 | 96 | * - HW_DAC_C1 - DAC Control Register 1 |
Kojto | 90:cb3d968589d8 | 97 | * - HW_DAC_C2 - DAC Control Register 2 |
Kojto | 90:cb3d968589d8 | 98 | * |
Kojto | 90:cb3d968589d8 | 99 | * - hw_dac_t - Struct containing all module registers. |
Kojto | 90:cb3d968589d8 | 100 | */ |
Kojto | 90:cb3d968589d8 | 101 | |
Kojto | 90:cb3d968589d8 | 102 | #define HW_DAC_INSTANCE_COUNT (2U) /*!< Number of instances of the DAC module. */ |
Kojto | 90:cb3d968589d8 | 103 | #define HW_DAC0 (0U) /*!< Instance number for DAC0. */ |
Kojto | 90:cb3d968589d8 | 104 | #define HW_DAC1 (1U) /*!< Instance number for DAC1. */ |
Kojto | 90:cb3d968589d8 | 105 | |
Kojto | 90:cb3d968589d8 | 106 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 107 | * HW_DAC_DATnL - DAC Data Low Register |
Kojto | 90:cb3d968589d8 | 108 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 109 | |
Kojto | 90:cb3d968589d8 | 110 | /*! |
Kojto | 90:cb3d968589d8 | 111 | * @brief HW_DAC_DATnL - DAC Data Low Register (RW) |
Kojto | 90:cb3d968589d8 | 112 | * |
Kojto | 90:cb3d968589d8 | 113 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 114 | */ |
Kojto | 90:cb3d968589d8 | 115 | typedef union _hw_dac_datnl |
Kojto | 90:cb3d968589d8 | 116 | { |
Kojto | 90:cb3d968589d8 | 117 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 118 | struct _hw_dac_datnl_bitfields |
Kojto | 90:cb3d968589d8 | 119 | { |
Kojto | 90:cb3d968589d8 | 120 | uint8_t DATA0 : 8; /*!< [7:0] */ |
Kojto | 90:cb3d968589d8 | 121 | } B; |
Kojto | 90:cb3d968589d8 | 122 | } hw_dac_datnl_t; |
Kojto | 90:cb3d968589d8 | 123 | |
Kojto | 90:cb3d968589d8 | 124 | /*! |
Kojto | 90:cb3d968589d8 | 125 | * @name Constants and macros for entire DAC_DATnL register |
Kojto | 90:cb3d968589d8 | 126 | */ |
Kojto | 90:cb3d968589d8 | 127 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 128 | #define HW_DAC_DATnL_COUNT (16U) |
Kojto | 90:cb3d968589d8 | 129 | |
Kojto | 90:cb3d968589d8 | 130 | #define HW_DAC_DATnL_ADDR(x, n) ((x) + 0x0U + (0x2U * (n))) |
Kojto | 90:cb3d968589d8 | 131 | |
Kojto | 90:cb3d968589d8 | 132 | #define HW_DAC_DATnL(x, n) (*(__IO hw_dac_datnl_t *) HW_DAC_DATnL_ADDR(x, n)) |
Kojto | 90:cb3d968589d8 | 133 | #define HW_DAC_DATnL_RD(x, n) (HW_DAC_DATnL(x, n).U) |
Kojto | 90:cb3d968589d8 | 134 | #define HW_DAC_DATnL_WR(x, n, v) (HW_DAC_DATnL(x, n).U = (v)) |
Kojto | 90:cb3d968589d8 | 135 | #define HW_DAC_DATnL_SET(x, n, v) (HW_DAC_DATnL_WR(x, n, HW_DAC_DATnL_RD(x, n) | (v))) |
Kojto | 90:cb3d968589d8 | 136 | #define HW_DAC_DATnL_CLR(x, n, v) (HW_DAC_DATnL_WR(x, n, HW_DAC_DATnL_RD(x, n) & ~(v))) |
Kojto | 90:cb3d968589d8 | 137 | #define HW_DAC_DATnL_TOG(x, n, v) (HW_DAC_DATnL_WR(x, n, HW_DAC_DATnL_RD(x, n) ^ (v))) |
Kojto | 90:cb3d968589d8 | 138 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 139 | |
Kojto | 90:cb3d968589d8 | 140 | /* |
Kojto | 90:cb3d968589d8 | 141 | * Constants & macros for individual DAC_DATnL bitfields |
Kojto | 90:cb3d968589d8 | 142 | */ |
Kojto | 90:cb3d968589d8 | 143 | |
Kojto | 90:cb3d968589d8 | 144 | /*! |
Kojto | 90:cb3d968589d8 | 145 | * @name Register DAC_DATnL, field DATA0[7:0] (RW) |
Kojto | 90:cb3d968589d8 | 146 | * |
Kojto | 90:cb3d968589d8 | 147 | * When the DAC buffer is not enabled, DATA[11:0] controls the output voltage |
Kojto | 90:cb3d968589d8 | 148 | * based on the following formula: V out = V in * (1 + DACDAT0[11:0])/4096 When the |
Kojto | 90:cb3d968589d8 | 149 | * DAC buffer is enabled, DATA is mapped to the 16-word buffer. |
Kojto | 90:cb3d968589d8 | 150 | */ |
Kojto | 90:cb3d968589d8 | 151 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 152 | #define BP_DAC_DATnL_DATA0 (0U) /*!< Bit position for DAC_DATnL_DATA0. */ |
Kojto | 90:cb3d968589d8 | 153 | #define BM_DAC_DATnL_DATA0 (0xFFU) /*!< Bit mask for DAC_DATnL_DATA0. */ |
Kojto | 90:cb3d968589d8 | 154 | #define BS_DAC_DATnL_DATA0 (8U) /*!< Bit field size in bits for DAC_DATnL_DATA0. */ |
Kojto | 90:cb3d968589d8 | 155 | |
Kojto | 90:cb3d968589d8 | 156 | /*! @brief Read current value of the DAC_DATnL_DATA0 field. */ |
Kojto | 90:cb3d968589d8 | 157 | #define BR_DAC_DATnL_DATA0(x, n) (HW_DAC_DATnL(x, n).U) |
Kojto | 90:cb3d968589d8 | 158 | |
Kojto | 90:cb3d968589d8 | 159 | /*! @brief Format value for bitfield DAC_DATnL_DATA0. */ |
Kojto | 90:cb3d968589d8 | 160 | #define BF_DAC_DATnL_DATA0(v) ((uint8_t)((uint8_t)(v) << BP_DAC_DATnL_DATA0) & BM_DAC_DATnL_DATA0) |
Kojto | 90:cb3d968589d8 | 161 | |
Kojto | 90:cb3d968589d8 | 162 | /*! @brief Set the DATA0 field to a new value. */ |
Kojto | 90:cb3d968589d8 | 163 | #define BW_DAC_DATnL_DATA0(x, n, v) (HW_DAC_DATnL_WR(x, n, v)) |
Kojto | 90:cb3d968589d8 | 164 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 165 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 166 | * HW_DAC_DATnH - DAC Data High Register |
Kojto | 90:cb3d968589d8 | 167 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 168 | |
Kojto | 90:cb3d968589d8 | 169 | /*! |
Kojto | 90:cb3d968589d8 | 170 | * @brief HW_DAC_DATnH - DAC Data High Register (RW) |
Kojto | 90:cb3d968589d8 | 171 | * |
Kojto | 90:cb3d968589d8 | 172 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 173 | */ |
Kojto | 90:cb3d968589d8 | 174 | typedef union _hw_dac_datnh |
Kojto | 90:cb3d968589d8 | 175 | { |
Kojto | 90:cb3d968589d8 | 176 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 177 | struct _hw_dac_datnh_bitfields |
Kojto | 90:cb3d968589d8 | 178 | { |
Kojto | 90:cb3d968589d8 | 179 | uint8_t DATA1 : 4; /*!< [3:0] */ |
Kojto | 90:cb3d968589d8 | 180 | uint8_t RESERVED0 : 4; /*!< [7:4] */ |
Kojto | 90:cb3d968589d8 | 181 | } B; |
Kojto | 90:cb3d968589d8 | 182 | } hw_dac_datnh_t; |
Kojto | 90:cb3d968589d8 | 183 | |
Kojto | 90:cb3d968589d8 | 184 | /*! |
Kojto | 90:cb3d968589d8 | 185 | * @name Constants and macros for entire DAC_DATnH register |
Kojto | 90:cb3d968589d8 | 186 | */ |
Kojto | 90:cb3d968589d8 | 187 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 188 | #define HW_DAC_DATnH_COUNT (16U) |
Kojto | 90:cb3d968589d8 | 189 | |
Kojto | 90:cb3d968589d8 | 190 | #define HW_DAC_DATnH_ADDR(x, n) ((x) + 0x1U + (0x2U * (n))) |
Kojto | 90:cb3d968589d8 | 191 | |
Kojto | 90:cb3d968589d8 | 192 | #define HW_DAC_DATnH(x, n) (*(__IO hw_dac_datnh_t *) HW_DAC_DATnH_ADDR(x, n)) |
Kojto | 90:cb3d968589d8 | 193 | #define HW_DAC_DATnH_RD(x, n) (HW_DAC_DATnH(x, n).U) |
Kojto | 90:cb3d968589d8 | 194 | #define HW_DAC_DATnH_WR(x, n, v) (HW_DAC_DATnH(x, n).U = (v)) |
Kojto | 90:cb3d968589d8 | 195 | #define HW_DAC_DATnH_SET(x, n, v) (HW_DAC_DATnH_WR(x, n, HW_DAC_DATnH_RD(x, n) | (v))) |
Kojto | 90:cb3d968589d8 | 196 | #define HW_DAC_DATnH_CLR(x, n, v) (HW_DAC_DATnH_WR(x, n, HW_DAC_DATnH_RD(x, n) & ~(v))) |
Kojto | 90:cb3d968589d8 | 197 | #define HW_DAC_DATnH_TOG(x, n, v) (HW_DAC_DATnH_WR(x, n, HW_DAC_DATnH_RD(x, n) ^ (v))) |
Kojto | 90:cb3d968589d8 | 198 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 199 | |
Kojto | 90:cb3d968589d8 | 200 | /* |
Kojto | 90:cb3d968589d8 | 201 | * Constants & macros for individual DAC_DATnH bitfields |
Kojto | 90:cb3d968589d8 | 202 | */ |
Kojto | 90:cb3d968589d8 | 203 | |
Kojto | 90:cb3d968589d8 | 204 | /*! |
Kojto | 90:cb3d968589d8 | 205 | * @name Register DAC_DATnH, field DATA1[3:0] (RW) |
Kojto | 90:cb3d968589d8 | 206 | * |
Kojto | 90:cb3d968589d8 | 207 | * When the DAC Buffer is not enabled, DATA[11:0] controls the output voltage |
Kojto | 90:cb3d968589d8 | 208 | * based on the following formula. V out = V in * (1 + DACDAT0[11:0])/4096 When the |
Kojto | 90:cb3d968589d8 | 209 | * DAC buffer is enabled, DATA[11:0] is mapped to the 16-word buffer. |
Kojto | 90:cb3d968589d8 | 210 | */ |
Kojto | 90:cb3d968589d8 | 211 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 212 | #define BP_DAC_DATnH_DATA1 (0U) /*!< Bit position for DAC_DATnH_DATA1. */ |
Kojto | 90:cb3d968589d8 | 213 | #define BM_DAC_DATnH_DATA1 (0x0FU) /*!< Bit mask for DAC_DATnH_DATA1. */ |
Kojto | 90:cb3d968589d8 | 214 | #define BS_DAC_DATnH_DATA1 (4U) /*!< Bit field size in bits for DAC_DATnH_DATA1. */ |
Kojto | 90:cb3d968589d8 | 215 | |
Kojto | 90:cb3d968589d8 | 216 | /*! @brief Read current value of the DAC_DATnH_DATA1 field. */ |
Kojto | 90:cb3d968589d8 | 217 | #define BR_DAC_DATnH_DATA1(x, n) (HW_DAC_DATnH(x, n).B.DATA1) |
Kojto | 90:cb3d968589d8 | 218 | |
Kojto | 90:cb3d968589d8 | 219 | /*! @brief Format value for bitfield DAC_DATnH_DATA1. */ |
Kojto | 90:cb3d968589d8 | 220 | #define BF_DAC_DATnH_DATA1(v) ((uint8_t)((uint8_t)(v) << BP_DAC_DATnH_DATA1) & BM_DAC_DATnH_DATA1) |
Kojto | 90:cb3d968589d8 | 221 | |
Kojto | 90:cb3d968589d8 | 222 | /*! @brief Set the DATA1 field to a new value. */ |
Kojto | 90:cb3d968589d8 | 223 | #define BW_DAC_DATnH_DATA1(x, n, v) (HW_DAC_DATnH_WR(x, n, (HW_DAC_DATnH_RD(x, n) & ~BM_DAC_DATnH_DATA1) | BF_DAC_DATnH_DATA1(v))) |
Kojto | 90:cb3d968589d8 | 224 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 225 | |
Kojto | 90:cb3d968589d8 | 226 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 227 | * HW_DAC_SR - DAC Status Register |
Kojto | 90:cb3d968589d8 | 228 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 229 | |
Kojto | 90:cb3d968589d8 | 230 | /*! |
Kojto | 90:cb3d968589d8 | 231 | * @brief HW_DAC_SR - DAC Status Register (RW) |
Kojto | 90:cb3d968589d8 | 232 | * |
Kojto | 90:cb3d968589d8 | 233 | * Reset value: 0x02U |
Kojto | 90:cb3d968589d8 | 234 | * |
Kojto | 90:cb3d968589d8 | 235 | * If DMA is enabled, the flags can be cleared automatically by DMA when the DMA |
Kojto | 90:cb3d968589d8 | 236 | * request is done. Writing 0 to a field clears it whereas writing 1 has no |
Kojto | 90:cb3d968589d8 | 237 | * effect. After reset, DACBFRPTF is set and can be cleared by software, if needed. |
Kojto | 90:cb3d968589d8 | 238 | * The flags are set only when the data buffer status is changed. Do not use |
Kojto | 90:cb3d968589d8 | 239 | * 32/16-bit accesses to this register. |
Kojto | 90:cb3d968589d8 | 240 | */ |
Kojto | 90:cb3d968589d8 | 241 | typedef union _hw_dac_sr |
Kojto | 90:cb3d968589d8 | 242 | { |
Kojto | 90:cb3d968589d8 | 243 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 244 | struct _hw_dac_sr_bitfields |
Kojto | 90:cb3d968589d8 | 245 | { |
Kojto | 90:cb3d968589d8 | 246 | uint8_t DACBFRPBF : 1; /*!< [0] DAC Buffer Read Pointer Bottom |
Kojto | 90:cb3d968589d8 | 247 | * Position Flag */ |
Kojto | 90:cb3d968589d8 | 248 | uint8_t DACBFRPTF : 1; /*!< [1] DAC Buffer Read Pointer Top Position |
Kojto | 90:cb3d968589d8 | 249 | * Flag */ |
Kojto | 90:cb3d968589d8 | 250 | uint8_t DACBFWMF : 1; /*!< [2] DAC Buffer Watermark Flag */ |
Kojto | 90:cb3d968589d8 | 251 | uint8_t RESERVED0 : 5; /*!< [7:3] */ |
Kojto | 90:cb3d968589d8 | 252 | } B; |
Kojto | 90:cb3d968589d8 | 253 | } hw_dac_sr_t; |
Kojto | 90:cb3d968589d8 | 254 | |
Kojto | 90:cb3d968589d8 | 255 | /*! |
Kojto | 90:cb3d968589d8 | 256 | * @name Constants and macros for entire DAC_SR register |
Kojto | 90:cb3d968589d8 | 257 | */ |
Kojto | 90:cb3d968589d8 | 258 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 259 | #define HW_DAC_SR_ADDR(x) ((x) + 0x20U) |
Kojto | 90:cb3d968589d8 | 260 | |
Kojto | 90:cb3d968589d8 | 261 | #define HW_DAC_SR(x) (*(__IO hw_dac_sr_t *) HW_DAC_SR_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 262 | #define HW_DAC_SR_RD(x) (HW_DAC_SR(x).U) |
Kojto | 90:cb3d968589d8 | 263 | #define HW_DAC_SR_WR(x, v) (HW_DAC_SR(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 264 | #define HW_DAC_SR_SET(x, v) (HW_DAC_SR_WR(x, HW_DAC_SR_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 265 | #define HW_DAC_SR_CLR(x, v) (HW_DAC_SR_WR(x, HW_DAC_SR_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 266 | #define HW_DAC_SR_TOG(x, v) (HW_DAC_SR_WR(x, HW_DAC_SR_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 267 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 268 | |
Kojto | 90:cb3d968589d8 | 269 | /* |
Kojto | 90:cb3d968589d8 | 270 | * Constants & macros for individual DAC_SR bitfields |
Kojto | 90:cb3d968589d8 | 271 | */ |
Kojto | 90:cb3d968589d8 | 272 | |
Kojto | 90:cb3d968589d8 | 273 | /*! |
Kojto | 90:cb3d968589d8 | 274 | * @name Register DAC_SR, field DACBFRPBF[0] (RW) |
Kojto | 90:cb3d968589d8 | 275 | * |
Kojto | 90:cb3d968589d8 | 276 | * Values: |
Kojto | 90:cb3d968589d8 | 277 | * - 0 - The DAC buffer read pointer is not equal to C2[DACBFUP]. |
Kojto | 90:cb3d968589d8 | 278 | * - 1 - The DAC buffer read pointer is equal to C2[DACBFUP]. |
Kojto | 90:cb3d968589d8 | 279 | */ |
Kojto | 90:cb3d968589d8 | 280 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 281 | #define BP_DAC_SR_DACBFRPBF (0U) /*!< Bit position for DAC_SR_DACBFRPBF. */ |
Kojto | 90:cb3d968589d8 | 282 | #define BM_DAC_SR_DACBFRPBF (0x01U) /*!< Bit mask for DAC_SR_DACBFRPBF. */ |
Kojto | 90:cb3d968589d8 | 283 | #define BS_DAC_SR_DACBFRPBF (1U) /*!< Bit field size in bits for DAC_SR_DACBFRPBF. */ |
Kojto | 90:cb3d968589d8 | 284 | |
Kojto | 90:cb3d968589d8 | 285 | /*! @brief Read current value of the DAC_SR_DACBFRPBF field. */ |
Kojto | 90:cb3d968589d8 | 286 | #define BR_DAC_SR_DACBFRPBF(x) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPBF)) |
Kojto | 90:cb3d968589d8 | 287 | |
Kojto | 90:cb3d968589d8 | 288 | /*! @brief Format value for bitfield DAC_SR_DACBFRPBF. */ |
Kojto | 90:cb3d968589d8 | 289 | #define BF_DAC_SR_DACBFRPBF(v) ((uint8_t)((uint8_t)(v) << BP_DAC_SR_DACBFRPBF) & BM_DAC_SR_DACBFRPBF) |
Kojto | 90:cb3d968589d8 | 290 | |
Kojto | 90:cb3d968589d8 | 291 | /*! @brief Set the DACBFRPBF field to a new value. */ |
Kojto | 90:cb3d968589d8 | 292 | #define BW_DAC_SR_DACBFRPBF(x, v) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPBF) = (v)) |
Kojto | 90:cb3d968589d8 | 293 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 294 | |
Kojto | 90:cb3d968589d8 | 295 | /*! |
Kojto | 90:cb3d968589d8 | 296 | * @name Register DAC_SR, field DACBFRPTF[1] (RW) |
Kojto | 90:cb3d968589d8 | 297 | * |
Kojto | 90:cb3d968589d8 | 298 | * Values: |
Kojto | 90:cb3d968589d8 | 299 | * - 0 - The DAC buffer read pointer is not zero. |
Kojto | 90:cb3d968589d8 | 300 | * - 1 - The DAC buffer read pointer is zero. |
Kojto | 90:cb3d968589d8 | 301 | */ |
Kojto | 90:cb3d968589d8 | 302 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 303 | #define BP_DAC_SR_DACBFRPTF (1U) /*!< Bit position for DAC_SR_DACBFRPTF. */ |
Kojto | 90:cb3d968589d8 | 304 | #define BM_DAC_SR_DACBFRPTF (0x02U) /*!< Bit mask for DAC_SR_DACBFRPTF. */ |
Kojto | 90:cb3d968589d8 | 305 | #define BS_DAC_SR_DACBFRPTF (1U) /*!< Bit field size in bits for DAC_SR_DACBFRPTF. */ |
Kojto | 90:cb3d968589d8 | 306 | |
Kojto | 90:cb3d968589d8 | 307 | /*! @brief Read current value of the DAC_SR_DACBFRPTF field. */ |
Kojto | 90:cb3d968589d8 | 308 | #define BR_DAC_SR_DACBFRPTF(x) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPTF)) |
Kojto | 90:cb3d968589d8 | 309 | |
Kojto | 90:cb3d968589d8 | 310 | /*! @brief Format value for bitfield DAC_SR_DACBFRPTF. */ |
Kojto | 90:cb3d968589d8 | 311 | #define BF_DAC_SR_DACBFRPTF(v) ((uint8_t)((uint8_t)(v) << BP_DAC_SR_DACBFRPTF) & BM_DAC_SR_DACBFRPTF) |
Kojto | 90:cb3d968589d8 | 312 | |
Kojto | 90:cb3d968589d8 | 313 | /*! @brief Set the DACBFRPTF field to a new value. */ |
Kojto | 90:cb3d968589d8 | 314 | #define BW_DAC_SR_DACBFRPTF(x, v) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPTF) = (v)) |
Kojto | 90:cb3d968589d8 | 315 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 316 | |
Kojto | 90:cb3d968589d8 | 317 | /*! |
Kojto | 90:cb3d968589d8 | 318 | * @name Register DAC_SR, field DACBFWMF[2] (RW) |
Kojto | 90:cb3d968589d8 | 319 | * |
Kojto | 90:cb3d968589d8 | 320 | * Values: |
Kojto | 90:cb3d968589d8 | 321 | * - 0 - The DAC buffer read pointer has not reached the watermark level. |
Kojto | 90:cb3d968589d8 | 322 | * - 1 - The DAC buffer read pointer has reached the watermark level. |
Kojto | 90:cb3d968589d8 | 323 | */ |
Kojto | 90:cb3d968589d8 | 324 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 325 | #define BP_DAC_SR_DACBFWMF (2U) /*!< Bit position for DAC_SR_DACBFWMF. */ |
Kojto | 90:cb3d968589d8 | 326 | #define BM_DAC_SR_DACBFWMF (0x04U) /*!< Bit mask for DAC_SR_DACBFWMF. */ |
Kojto | 90:cb3d968589d8 | 327 | #define BS_DAC_SR_DACBFWMF (1U) /*!< Bit field size in bits for DAC_SR_DACBFWMF. */ |
Kojto | 90:cb3d968589d8 | 328 | |
Kojto | 90:cb3d968589d8 | 329 | /*! @brief Read current value of the DAC_SR_DACBFWMF field. */ |
Kojto | 90:cb3d968589d8 | 330 | #define BR_DAC_SR_DACBFWMF(x) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFWMF)) |
Kojto | 90:cb3d968589d8 | 331 | |
Kojto | 90:cb3d968589d8 | 332 | /*! @brief Format value for bitfield DAC_SR_DACBFWMF. */ |
Kojto | 90:cb3d968589d8 | 333 | #define BF_DAC_SR_DACBFWMF(v) ((uint8_t)((uint8_t)(v) << BP_DAC_SR_DACBFWMF) & BM_DAC_SR_DACBFWMF) |
Kojto | 90:cb3d968589d8 | 334 | |
Kojto | 90:cb3d968589d8 | 335 | /*! @brief Set the DACBFWMF field to a new value. */ |
Kojto | 90:cb3d968589d8 | 336 | #define BW_DAC_SR_DACBFWMF(x, v) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFWMF) = (v)) |
Kojto | 90:cb3d968589d8 | 337 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 338 | |
Kojto | 90:cb3d968589d8 | 339 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 340 | * HW_DAC_C0 - DAC Control Register |
Kojto | 90:cb3d968589d8 | 341 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 342 | |
Kojto | 90:cb3d968589d8 | 343 | /*! |
Kojto | 90:cb3d968589d8 | 344 | * @brief HW_DAC_C0 - DAC Control Register (RW) |
Kojto | 90:cb3d968589d8 | 345 | * |
Kojto | 90:cb3d968589d8 | 346 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 347 | * |
Kojto | 90:cb3d968589d8 | 348 | * Do not use 32- or 16-bit accesses to this register. |
Kojto | 90:cb3d968589d8 | 349 | */ |
Kojto | 90:cb3d968589d8 | 350 | typedef union _hw_dac_c0 |
Kojto | 90:cb3d968589d8 | 351 | { |
Kojto | 90:cb3d968589d8 | 352 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 353 | struct _hw_dac_c0_bitfields |
Kojto | 90:cb3d968589d8 | 354 | { |
Kojto | 90:cb3d968589d8 | 355 | uint8_t DACBBIEN : 1; /*!< [0] DAC Buffer Read Pointer Bottom Flag |
Kojto | 90:cb3d968589d8 | 356 | * Interrupt Enable */ |
Kojto | 90:cb3d968589d8 | 357 | uint8_t DACBTIEN : 1; /*!< [1] DAC Buffer Read Pointer Top Flag |
Kojto | 90:cb3d968589d8 | 358 | * Interrupt Enable */ |
Kojto | 90:cb3d968589d8 | 359 | uint8_t DACBWIEN : 1; /*!< [2] DAC Buffer Watermark Interrupt Enable |
Kojto | 90:cb3d968589d8 | 360 | * */ |
Kojto | 90:cb3d968589d8 | 361 | uint8_t LPEN : 1; /*!< [3] DAC Low Power Control */ |
Kojto | 90:cb3d968589d8 | 362 | uint8_t DACSWTRG : 1; /*!< [4] DAC Software Trigger */ |
Kojto | 90:cb3d968589d8 | 363 | uint8_t DACTRGSEL : 1; /*!< [5] DAC Trigger Select */ |
Kojto | 90:cb3d968589d8 | 364 | uint8_t DACRFS : 1; /*!< [6] DAC Reference Select */ |
Kojto | 90:cb3d968589d8 | 365 | uint8_t DACEN : 1; /*!< [7] DAC Enable */ |
Kojto | 90:cb3d968589d8 | 366 | } B; |
Kojto | 90:cb3d968589d8 | 367 | } hw_dac_c0_t; |
Kojto | 90:cb3d968589d8 | 368 | |
Kojto | 90:cb3d968589d8 | 369 | /*! |
Kojto | 90:cb3d968589d8 | 370 | * @name Constants and macros for entire DAC_C0 register |
Kojto | 90:cb3d968589d8 | 371 | */ |
Kojto | 90:cb3d968589d8 | 372 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 373 | #define HW_DAC_C0_ADDR(x) ((x) + 0x21U) |
Kojto | 90:cb3d968589d8 | 374 | |
Kojto | 90:cb3d968589d8 | 375 | #define HW_DAC_C0(x) (*(__IO hw_dac_c0_t *) HW_DAC_C0_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 376 | #define HW_DAC_C0_RD(x) (HW_DAC_C0(x).U) |
Kojto | 90:cb3d968589d8 | 377 | #define HW_DAC_C0_WR(x, v) (HW_DAC_C0(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 378 | #define HW_DAC_C0_SET(x, v) (HW_DAC_C0_WR(x, HW_DAC_C0_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 379 | #define HW_DAC_C0_CLR(x, v) (HW_DAC_C0_WR(x, HW_DAC_C0_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 380 | #define HW_DAC_C0_TOG(x, v) (HW_DAC_C0_WR(x, HW_DAC_C0_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 381 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 382 | |
Kojto | 90:cb3d968589d8 | 383 | /* |
Kojto | 90:cb3d968589d8 | 384 | * Constants & macros for individual DAC_C0 bitfields |
Kojto | 90:cb3d968589d8 | 385 | */ |
Kojto | 90:cb3d968589d8 | 386 | |
Kojto | 90:cb3d968589d8 | 387 | /*! |
Kojto | 90:cb3d968589d8 | 388 | * @name Register DAC_C0, field DACBBIEN[0] (RW) |
Kojto | 90:cb3d968589d8 | 389 | * |
Kojto | 90:cb3d968589d8 | 390 | * Values: |
Kojto | 90:cb3d968589d8 | 391 | * - 0 - The DAC buffer read pointer bottom flag interrupt is disabled. |
Kojto | 90:cb3d968589d8 | 392 | * - 1 - The DAC buffer read pointer bottom flag interrupt is enabled. |
Kojto | 90:cb3d968589d8 | 393 | */ |
Kojto | 90:cb3d968589d8 | 394 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 395 | #define BP_DAC_C0_DACBBIEN (0U) /*!< Bit position for DAC_C0_DACBBIEN. */ |
Kojto | 90:cb3d968589d8 | 396 | #define BM_DAC_C0_DACBBIEN (0x01U) /*!< Bit mask for DAC_C0_DACBBIEN. */ |
Kojto | 90:cb3d968589d8 | 397 | #define BS_DAC_C0_DACBBIEN (1U) /*!< Bit field size in bits for DAC_C0_DACBBIEN. */ |
Kojto | 90:cb3d968589d8 | 398 | |
Kojto | 90:cb3d968589d8 | 399 | /*! @brief Read current value of the DAC_C0_DACBBIEN field. */ |
Kojto | 90:cb3d968589d8 | 400 | #define BR_DAC_C0_DACBBIEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBBIEN)) |
Kojto | 90:cb3d968589d8 | 401 | |
Kojto | 90:cb3d968589d8 | 402 | /*! @brief Format value for bitfield DAC_C0_DACBBIEN. */ |
Kojto | 90:cb3d968589d8 | 403 | #define BF_DAC_C0_DACBBIEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACBBIEN) & BM_DAC_C0_DACBBIEN) |
Kojto | 90:cb3d968589d8 | 404 | |
Kojto | 90:cb3d968589d8 | 405 | /*! @brief Set the DACBBIEN field to a new value. */ |
Kojto | 90:cb3d968589d8 | 406 | #define BW_DAC_C0_DACBBIEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBBIEN) = (v)) |
Kojto | 90:cb3d968589d8 | 407 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 408 | |
Kojto | 90:cb3d968589d8 | 409 | /*! |
Kojto | 90:cb3d968589d8 | 410 | * @name Register DAC_C0, field DACBTIEN[1] (RW) |
Kojto | 90:cb3d968589d8 | 411 | * |
Kojto | 90:cb3d968589d8 | 412 | * Values: |
Kojto | 90:cb3d968589d8 | 413 | * - 0 - The DAC buffer read pointer top flag interrupt is disabled. |
Kojto | 90:cb3d968589d8 | 414 | * - 1 - The DAC buffer read pointer top flag interrupt is enabled. |
Kojto | 90:cb3d968589d8 | 415 | */ |
Kojto | 90:cb3d968589d8 | 416 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 417 | #define BP_DAC_C0_DACBTIEN (1U) /*!< Bit position for DAC_C0_DACBTIEN. */ |
Kojto | 90:cb3d968589d8 | 418 | #define BM_DAC_C0_DACBTIEN (0x02U) /*!< Bit mask for DAC_C0_DACBTIEN. */ |
Kojto | 90:cb3d968589d8 | 419 | #define BS_DAC_C0_DACBTIEN (1U) /*!< Bit field size in bits for DAC_C0_DACBTIEN. */ |
Kojto | 90:cb3d968589d8 | 420 | |
Kojto | 90:cb3d968589d8 | 421 | /*! @brief Read current value of the DAC_C0_DACBTIEN field. */ |
Kojto | 90:cb3d968589d8 | 422 | #define BR_DAC_C0_DACBTIEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBTIEN)) |
Kojto | 90:cb3d968589d8 | 423 | |
Kojto | 90:cb3d968589d8 | 424 | /*! @brief Format value for bitfield DAC_C0_DACBTIEN. */ |
Kojto | 90:cb3d968589d8 | 425 | #define BF_DAC_C0_DACBTIEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACBTIEN) & BM_DAC_C0_DACBTIEN) |
Kojto | 90:cb3d968589d8 | 426 | |
Kojto | 90:cb3d968589d8 | 427 | /*! @brief Set the DACBTIEN field to a new value. */ |
Kojto | 90:cb3d968589d8 | 428 | #define BW_DAC_C0_DACBTIEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBTIEN) = (v)) |
Kojto | 90:cb3d968589d8 | 429 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 430 | |
Kojto | 90:cb3d968589d8 | 431 | /*! |
Kojto | 90:cb3d968589d8 | 432 | * @name Register DAC_C0, field DACBWIEN[2] (RW) |
Kojto | 90:cb3d968589d8 | 433 | * |
Kojto | 90:cb3d968589d8 | 434 | * Values: |
Kojto | 90:cb3d968589d8 | 435 | * - 0 - The DAC buffer watermark interrupt is disabled. |
Kojto | 90:cb3d968589d8 | 436 | * - 1 - The DAC buffer watermark interrupt is enabled. |
Kojto | 90:cb3d968589d8 | 437 | */ |
Kojto | 90:cb3d968589d8 | 438 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 439 | #define BP_DAC_C0_DACBWIEN (2U) /*!< Bit position for DAC_C0_DACBWIEN. */ |
Kojto | 90:cb3d968589d8 | 440 | #define BM_DAC_C0_DACBWIEN (0x04U) /*!< Bit mask for DAC_C0_DACBWIEN. */ |
Kojto | 90:cb3d968589d8 | 441 | #define BS_DAC_C0_DACBWIEN (1U) /*!< Bit field size in bits for DAC_C0_DACBWIEN. */ |
Kojto | 90:cb3d968589d8 | 442 | |
Kojto | 90:cb3d968589d8 | 443 | /*! @brief Read current value of the DAC_C0_DACBWIEN field. */ |
Kojto | 90:cb3d968589d8 | 444 | #define BR_DAC_C0_DACBWIEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBWIEN)) |
Kojto | 90:cb3d968589d8 | 445 | |
Kojto | 90:cb3d968589d8 | 446 | /*! @brief Format value for bitfield DAC_C0_DACBWIEN. */ |
Kojto | 90:cb3d968589d8 | 447 | #define BF_DAC_C0_DACBWIEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACBWIEN) & BM_DAC_C0_DACBWIEN) |
Kojto | 90:cb3d968589d8 | 448 | |
Kojto | 90:cb3d968589d8 | 449 | /*! @brief Set the DACBWIEN field to a new value. */ |
Kojto | 90:cb3d968589d8 | 450 | #define BW_DAC_C0_DACBWIEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBWIEN) = (v)) |
Kojto | 90:cb3d968589d8 | 451 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 452 | |
Kojto | 90:cb3d968589d8 | 453 | /*! |
Kojto | 90:cb3d968589d8 | 454 | * @name Register DAC_C0, field LPEN[3] (RW) |
Kojto | 90:cb3d968589d8 | 455 | * |
Kojto | 90:cb3d968589d8 | 456 | * See the 12-bit DAC electrical characteristics of the device data sheet for |
Kojto | 90:cb3d968589d8 | 457 | * details on the impact of the modes below. |
Kojto | 90:cb3d968589d8 | 458 | * |
Kojto | 90:cb3d968589d8 | 459 | * Values: |
Kojto | 90:cb3d968589d8 | 460 | * - 0 - High-Power mode |
Kojto | 90:cb3d968589d8 | 461 | * - 1 - Low-Power mode |
Kojto | 90:cb3d968589d8 | 462 | */ |
Kojto | 90:cb3d968589d8 | 463 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 464 | #define BP_DAC_C0_LPEN (3U) /*!< Bit position for DAC_C0_LPEN. */ |
Kojto | 90:cb3d968589d8 | 465 | #define BM_DAC_C0_LPEN (0x08U) /*!< Bit mask for DAC_C0_LPEN. */ |
Kojto | 90:cb3d968589d8 | 466 | #define BS_DAC_C0_LPEN (1U) /*!< Bit field size in bits for DAC_C0_LPEN. */ |
Kojto | 90:cb3d968589d8 | 467 | |
Kojto | 90:cb3d968589d8 | 468 | /*! @brief Read current value of the DAC_C0_LPEN field. */ |
Kojto | 90:cb3d968589d8 | 469 | #define BR_DAC_C0_LPEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_LPEN)) |
Kojto | 90:cb3d968589d8 | 470 | |
Kojto | 90:cb3d968589d8 | 471 | /*! @brief Format value for bitfield DAC_C0_LPEN. */ |
Kojto | 90:cb3d968589d8 | 472 | #define BF_DAC_C0_LPEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_LPEN) & BM_DAC_C0_LPEN) |
Kojto | 90:cb3d968589d8 | 473 | |
Kojto | 90:cb3d968589d8 | 474 | /*! @brief Set the LPEN field to a new value. */ |
Kojto | 90:cb3d968589d8 | 475 | #define BW_DAC_C0_LPEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_LPEN) = (v)) |
Kojto | 90:cb3d968589d8 | 476 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 477 | |
Kojto | 90:cb3d968589d8 | 478 | /*! |
Kojto | 90:cb3d968589d8 | 479 | * @name Register DAC_C0, field DACSWTRG[4] (WORZ) |
Kojto | 90:cb3d968589d8 | 480 | * |
Kojto | 90:cb3d968589d8 | 481 | * Active high. This is a write-only field, which always reads 0. If DAC |
Kojto | 90:cb3d968589d8 | 482 | * software trigger is selected and buffer is enabled, writing 1 to this field will |
Kojto | 90:cb3d968589d8 | 483 | * advance the buffer read pointer once. |
Kojto | 90:cb3d968589d8 | 484 | * |
Kojto | 90:cb3d968589d8 | 485 | * Values: |
Kojto | 90:cb3d968589d8 | 486 | * - 0 - The DAC soft trigger is not valid. |
Kojto | 90:cb3d968589d8 | 487 | * - 1 - The DAC soft trigger is valid. |
Kojto | 90:cb3d968589d8 | 488 | */ |
Kojto | 90:cb3d968589d8 | 489 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 490 | #define BP_DAC_C0_DACSWTRG (4U) /*!< Bit position for DAC_C0_DACSWTRG. */ |
Kojto | 90:cb3d968589d8 | 491 | #define BM_DAC_C0_DACSWTRG (0x10U) /*!< Bit mask for DAC_C0_DACSWTRG. */ |
Kojto | 90:cb3d968589d8 | 492 | #define BS_DAC_C0_DACSWTRG (1U) /*!< Bit field size in bits for DAC_C0_DACSWTRG. */ |
Kojto | 90:cb3d968589d8 | 493 | |
Kojto | 90:cb3d968589d8 | 494 | /*! @brief Format value for bitfield DAC_C0_DACSWTRG. */ |
Kojto | 90:cb3d968589d8 | 495 | #define BF_DAC_C0_DACSWTRG(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACSWTRG) & BM_DAC_C0_DACSWTRG) |
Kojto | 90:cb3d968589d8 | 496 | |
Kojto | 90:cb3d968589d8 | 497 | /*! @brief Set the DACSWTRG field to a new value. */ |
Kojto | 90:cb3d968589d8 | 498 | #define BW_DAC_C0_DACSWTRG(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACSWTRG) = (v)) |
Kojto | 90:cb3d968589d8 | 499 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 500 | |
Kojto | 90:cb3d968589d8 | 501 | /*! |
Kojto | 90:cb3d968589d8 | 502 | * @name Register DAC_C0, field DACTRGSEL[5] (RW) |
Kojto | 90:cb3d968589d8 | 503 | * |
Kojto | 90:cb3d968589d8 | 504 | * Values: |
Kojto | 90:cb3d968589d8 | 505 | * - 0 - The DAC hardware trigger is selected. |
Kojto | 90:cb3d968589d8 | 506 | * - 1 - The DAC software trigger is selected. |
Kojto | 90:cb3d968589d8 | 507 | */ |
Kojto | 90:cb3d968589d8 | 508 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 509 | #define BP_DAC_C0_DACTRGSEL (5U) /*!< Bit position for DAC_C0_DACTRGSEL. */ |
Kojto | 90:cb3d968589d8 | 510 | #define BM_DAC_C0_DACTRGSEL (0x20U) /*!< Bit mask for DAC_C0_DACTRGSEL. */ |
Kojto | 90:cb3d968589d8 | 511 | #define BS_DAC_C0_DACTRGSEL (1U) /*!< Bit field size in bits for DAC_C0_DACTRGSEL. */ |
Kojto | 90:cb3d968589d8 | 512 | |
Kojto | 90:cb3d968589d8 | 513 | /*! @brief Read current value of the DAC_C0_DACTRGSEL field. */ |
Kojto | 90:cb3d968589d8 | 514 | #define BR_DAC_C0_DACTRGSEL(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACTRGSEL)) |
Kojto | 90:cb3d968589d8 | 515 | |
Kojto | 90:cb3d968589d8 | 516 | /*! @brief Format value for bitfield DAC_C0_DACTRGSEL. */ |
Kojto | 90:cb3d968589d8 | 517 | #define BF_DAC_C0_DACTRGSEL(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACTRGSEL) & BM_DAC_C0_DACTRGSEL) |
Kojto | 90:cb3d968589d8 | 518 | |
Kojto | 90:cb3d968589d8 | 519 | /*! @brief Set the DACTRGSEL field to a new value. */ |
Kojto | 90:cb3d968589d8 | 520 | #define BW_DAC_C0_DACTRGSEL(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACTRGSEL) = (v)) |
Kojto | 90:cb3d968589d8 | 521 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 522 | |
Kojto | 90:cb3d968589d8 | 523 | /*! |
Kojto | 90:cb3d968589d8 | 524 | * @name Register DAC_C0, field DACRFS[6] (RW) |
Kojto | 90:cb3d968589d8 | 525 | * |
Kojto | 90:cb3d968589d8 | 526 | * Values: |
Kojto | 90:cb3d968589d8 | 527 | * - 0 - The DAC selects DACREF_1 as the reference voltage. |
Kojto | 90:cb3d968589d8 | 528 | * - 1 - The DAC selects DACREF_2 as the reference voltage. |
Kojto | 90:cb3d968589d8 | 529 | */ |
Kojto | 90:cb3d968589d8 | 530 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 531 | #define BP_DAC_C0_DACRFS (6U) /*!< Bit position for DAC_C0_DACRFS. */ |
Kojto | 90:cb3d968589d8 | 532 | #define BM_DAC_C0_DACRFS (0x40U) /*!< Bit mask for DAC_C0_DACRFS. */ |
Kojto | 90:cb3d968589d8 | 533 | #define BS_DAC_C0_DACRFS (1U) /*!< Bit field size in bits for DAC_C0_DACRFS. */ |
Kojto | 90:cb3d968589d8 | 534 | |
Kojto | 90:cb3d968589d8 | 535 | /*! @brief Read current value of the DAC_C0_DACRFS field. */ |
Kojto | 90:cb3d968589d8 | 536 | #define BR_DAC_C0_DACRFS(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACRFS)) |
Kojto | 90:cb3d968589d8 | 537 | |
Kojto | 90:cb3d968589d8 | 538 | /*! @brief Format value for bitfield DAC_C0_DACRFS. */ |
Kojto | 90:cb3d968589d8 | 539 | #define BF_DAC_C0_DACRFS(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACRFS) & BM_DAC_C0_DACRFS) |
Kojto | 90:cb3d968589d8 | 540 | |
Kojto | 90:cb3d968589d8 | 541 | /*! @brief Set the DACRFS field to a new value. */ |
Kojto | 90:cb3d968589d8 | 542 | #define BW_DAC_C0_DACRFS(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACRFS) = (v)) |
Kojto | 90:cb3d968589d8 | 543 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 544 | |
Kojto | 90:cb3d968589d8 | 545 | /*! |
Kojto | 90:cb3d968589d8 | 546 | * @name Register DAC_C0, field DACEN[7] (RW) |
Kojto | 90:cb3d968589d8 | 547 | * |
Kojto | 90:cb3d968589d8 | 548 | * Starts the Programmable Reference Generator operation. |
Kojto | 90:cb3d968589d8 | 549 | * |
Kojto | 90:cb3d968589d8 | 550 | * Values: |
Kojto | 90:cb3d968589d8 | 551 | * - 0 - The DAC system is disabled. |
Kojto | 90:cb3d968589d8 | 552 | * - 1 - The DAC system is enabled. |
Kojto | 90:cb3d968589d8 | 553 | */ |
Kojto | 90:cb3d968589d8 | 554 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 555 | #define BP_DAC_C0_DACEN (7U) /*!< Bit position for DAC_C0_DACEN. */ |
Kojto | 90:cb3d968589d8 | 556 | #define BM_DAC_C0_DACEN (0x80U) /*!< Bit mask for DAC_C0_DACEN. */ |
Kojto | 90:cb3d968589d8 | 557 | #define BS_DAC_C0_DACEN (1U) /*!< Bit field size in bits for DAC_C0_DACEN. */ |
Kojto | 90:cb3d968589d8 | 558 | |
Kojto | 90:cb3d968589d8 | 559 | /*! @brief Read current value of the DAC_C0_DACEN field. */ |
Kojto | 90:cb3d968589d8 | 560 | #define BR_DAC_C0_DACEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACEN)) |
Kojto | 90:cb3d968589d8 | 561 | |
Kojto | 90:cb3d968589d8 | 562 | /*! @brief Format value for bitfield DAC_C0_DACEN. */ |
Kojto | 90:cb3d968589d8 | 563 | #define BF_DAC_C0_DACEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACEN) & BM_DAC_C0_DACEN) |
Kojto | 90:cb3d968589d8 | 564 | |
Kojto | 90:cb3d968589d8 | 565 | /*! @brief Set the DACEN field to a new value. */ |
Kojto | 90:cb3d968589d8 | 566 | #define BW_DAC_C0_DACEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACEN) = (v)) |
Kojto | 90:cb3d968589d8 | 567 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 568 | |
Kojto | 90:cb3d968589d8 | 569 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 570 | * HW_DAC_C1 - DAC Control Register 1 |
Kojto | 90:cb3d968589d8 | 571 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 572 | |
Kojto | 90:cb3d968589d8 | 573 | /*! |
Kojto | 90:cb3d968589d8 | 574 | * @brief HW_DAC_C1 - DAC Control Register 1 (RW) |
Kojto | 90:cb3d968589d8 | 575 | * |
Kojto | 90:cb3d968589d8 | 576 | * Reset value: 0x00U |
Kojto | 90:cb3d968589d8 | 577 | * |
Kojto | 90:cb3d968589d8 | 578 | * Do not use 32- or 16-bit accesses to this register. |
Kojto | 90:cb3d968589d8 | 579 | */ |
Kojto | 90:cb3d968589d8 | 580 | typedef union _hw_dac_c1 |
Kojto | 90:cb3d968589d8 | 581 | { |
Kojto | 90:cb3d968589d8 | 582 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 583 | struct _hw_dac_c1_bitfields |
Kojto | 90:cb3d968589d8 | 584 | { |
Kojto | 90:cb3d968589d8 | 585 | uint8_t DACBFEN : 1; /*!< [0] DAC Buffer Enable */ |
Kojto | 90:cb3d968589d8 | 586 | uint8_t DACBFMD : 2; /*!< [2:1] DAC Buffer Work Mode Select */ |
Kojto | 90:cb3d968589d8 | 587 | uint8_t DACBFWM : 2; /*!< [4:3] DAC Buffer Watermark Select */ |
Kojto | 90:cb3d968589d8 | 588 | uint8_t RESERVED0 : 2; /*!< [6:5] */ |
Kojto | 90:cb3d968589d8 | 589 | uint8_t DMAEN : 1; /*!< [7] DMA Enable Select */ |
Kojto | 90:cb3d968589d8 | 590 | } B; |
Kojto | 90:cb3d968589d8 | 591 | } hw_dac_c1_t; |
Kojto | 90:cb3d968589d8 | 592 | |
Kojto | 90:cb3d968589d8 | 593 | /*! |
Kojto | 90:cb3d968589d8 | 594 | * @name Constants and macros for entire DAC_C1 register |
Kojto | 90:cb3d968589d8 | 595 | */ |
Kojto | 90:cb3d968589d8 | 596 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 597 | #define HW_DAC_C1_ADDR(x) ((x) + 0x22U) |
Kojto | 90:cb3d968589d8 | 598 | |
Kojto | 90:cb3d968589d8 | 599 | #define HW_DAC_C1(x) (*(__IO hw_dac_c1_t *) HW_DAC_C1_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 600 | #define HW_DAC_C1_RD(x) (HW_DAC_C1(x).U) |
Kojto | 90:cb3d968589d8 | 601 | #define HW_DAC_C1_WR(x, v) (HW_DAC_C1(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 602 | #define HW_DAC_C1_SET(x, v) (HW_DAC_C1_WR(x, HW_DAC_C1_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 603 | #define HW_DAC_C1_CLR(x, v) (HW_DAC_C1_WR(x, HW_DAC_C1_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 604 | #define HW_DAC_C1_TOG(x, v) (HW_DAC_C1_WR(x, HW_DAC_C1_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 605 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 606 | |
Kojto | 90:cb3d968589d8 | 607 | /* |
Kojto | 90:cb3d968589d8 | 608 | * Constants & macros for individual DAC_C1 bitfields |
Kojto | 90:cb3d968589d8 | 609 | */ |
Kojto | 90:cb3d968589d8 | 610 | |
Kojto | 90:cb3d968589d8 | 611 | /*! |
Kojto | 90:cb3d968589d8 | 612 | * @name Register DAC_C1, field DACBFEN[0] (RW) |
Kojto | 90:cb3d968589d8 | 613 | * |
Kojto | 90:cb3d968589d8 | 614 | * Values: |
Kojto | 90:cb3d968589d8 | 615 | * - 0 - Buffer read pointer is disabled. The converted data is always the first |
Kojto | 90:cb3d968589d8 | 616 | * word of the buffer. |
Kojto | 90:cb3d968589d8 | 617 | * - 1 - Buffer read pointer is enabled. The converted data is the word that the |
Kojto | 90:cb3d968589d8 | 618 | * read pointer points to. It means converted data can be from any word of |
Kojto | 90:cb3d968589d8 | 619 | * the buffer. |
Kojto | 90:cb3d968589d8 | 620 | */ |
Kojto | 90:cb3d968589d8 | 621 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 622 | #define BP_DAC_C1_DACBFEN (0U) /*!< Bit position for DAC_C1_DACBFEN. */ |
Kojto | 90:cb3d968589d8 | 623 | #define BM_DAC_C1_DACBFEN (0x01U) /*!< Bit mask for DAC_C1_DACBFEN. */ |
Kojto | 90:cb3d968589d8 | 624 | #define BS_DAC_C1_DACBFEN (1U) /*!< Bit field size in bits for DAC_C1_DACBFEN. */ |
Kojto | 90:cb3d968589d8 | 625 | |
Kojto | 90:cb3d968589d8 | 626 | /*! @brief Read current value of the DAC_C1_DACBFEN field. */ |
Kojto | 90:cb3d968589d8 | 627 | #define BR_DAC_C1_DACBFEN(x) (BITBAND_ACCESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DACBFEN)) |
Kojto | 90:cb3d968589d8 | 628 | |
Kojto | 90:cb3d968589d8 | 629 | /*! @brief Format value for bitfield DAC_C1_DACBFEN. */ |
Kojto | 90:cb3d968589d8 | 630 | #define BF_DAC_C1_DACBFEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C1_DACBFEN) & BM_DAC_C1_DACBFEN) |
Kojto | 90:cb3d968589d8 | 631 | |
Kojto | 90:cb3d968589d8 | 632 | /*! @brief Set the DACBFEN field to a new value. */ |
Kojto | 90:cb3d968589d8 | 633 | #define BW_DAC_C1_DACBFEN(x, v) (BITBAND_ACCESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DACBFEN) = (v)) |
Kojto | 90:cb3d968589d8 | 634 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 635 | |
Kojto | 90:cb3d968589d8 | 636 | /*! |
Kojto | 90:cb3d968589d8 | 637 | * @name Register DAC_C1, field DACBFMD[2:1] (RW) |
Kojto | 90:cb3d968589d8 | 638 | * |
Kojto | 90:cb3d968589d8 | 639 | * Values: |
Kojto | 90:cb3d968589d8 | 640 | * - 00 - Normal mode |
Kojto | 90:cb3d968589d8 | 641 | * - 01 - Swing mode |
Kojto | 90:cb3d968589d8 | 642 | * - 10 - One-Time Scan mode |
Kojto | 90:cb3d968589d8 | 643 | * - 11 - Reserved |
Kojto | 90:cb3d968589d8 | 644 | */ |
Kojto | 90:cb3d968589d8 | 645 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 646 | #define BP_DAC_C1_DACBFMD (1U) /*!< Bit position for DAC_C1_DACBFMD. */ |
Kojto | 90:cb3d968589d8 | 647 | #define BM_DAC_C1_DACBFMD (0x06U) /*!< Bit mask for DAC_C1_DACBFMD. */ |
Kojto | 90:cb3d968589d8 | 648 | #define BS_DAC_C1_DACBFMD (2U) /*!< Bit field size in bits for DAC_C1_DACBFMD. */ |
Kojto | 90:cb3d968589d8 | 649 | |
Kojto | 90:cb3d968589d8 | 650 | /*! @brief Read current value of the DAC_C1_DACBFMD field. */ |
Kojto | 90:cb3d968589d8 | 651 | #define BR_DAC_C1_DACBFMD(x) (HW_DAC_C1(x).B.DACBFMD) |
Kojto | 90:cb3d968589d8 | 652 | |
Kojto | 90:cb3d968589d8 | 653 | /*! @brief Format value for bitfield DAC_C1_DACBFMD. */ |
Kojto | 90:cb3d968589d8 | 654 | #define BF_DAC_C1_DACBFMD(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C1_DACBFMD) & BM_DAC_C1_DACBFMD) |
Kojto | 90:cb3d968589d8 | 655 | |
Kojto | 90:cb3d968589d8 | 656 | /*! @brief Set the DACBFMD field to a new value. */ |
Kojto | 90:cb3d968589d8 | 657 | #define BW_DAC_C1_DACBFMD(x, v) (HW_DAC_C1_WR(x, (HW_DAC_C1_RD(x) & ~BM_DAC_C1_DACBFMD) | BF_DAC_C1_DACBFMD(v))) |
Kojto | 90:cb3d968589d8 | 658 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 659 | |
Kojto | 90:cb3d968589d8 | 660 | /*! |
Kojto | 90:cb3d968589d8 | 661 | * @name Register DAC_C1, field DACBFWM[4:3] (RW) |
Kojto | 90:cb3d968589d8 | 662 | * |
Kojto | 90:cb3d968589d8 | 663 | * Controls when SR[DACBFWMF] is set. When the DAC buffer read pointer reaches |
Kojto | 90:cb3d968589d8 | 664 | * the word defined by this field, which is 1-4 words away from the upper limit |
Kojto | 90:cb3d968589d8 | 665 | * (DACBUP), SR[DACBFWMF] will be set. This allows user configuration of the |
Kojto | 90:cb3d968589d8 | 666 | * watermark interrupt. |
Kojto | 90:cb3d968589d8 | 667 | * |
Kojto | 90:cb3d968589d8 | 668 | * Values: |
Kojto | 90:cb3d968589d8 | 669 | * - 00 - 1 word |
Kojto | 90:cb3d968589d8 | 670 | * - 01 - 2 words |
Kojto | 90:cb3d968589d8 | 671 | * - 10 - 3 words |
Kojto | 90:cb3d968589d8 | 672 | * - 11 - 4 words |
Kojto | 90:cb3d968589d8 | 673 | */ |
Kojto | 90:cb3d968589d8 | 674 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 675 | #define BP_DAC_C1_DACBFWM (3U) /*!< Bit position for DAC_C1_DACBFWM. */ |
Kojto | 90:cb3d968589d8 | 676 | #define BM_DAC_C1_DACBFWM (0x18U) /*!< Bit mask for DAC_C1_DACBFWM. */ |
Kojto | 90:cb3d968589d8 | 677 | #define BS_DAC_C1_DACBFWM (2U) /*!< Bit field size in bits for DAC_C1_DACBFWM. */ |
Kojto | 90:cb3d968589d8 | 678 | |
Kojto | 90:cb3d968589d8 | 679 | /*! @brief Read current value of the DAC_C1_DACBFWM field. */ |
Kojto | 90:cb3d968589d8 | 680 | #define BR_DAC_C1_DACBFWM(x) (HW_DAC_C1(x).B.DACBFWM) |
Kojto | 90:cb3d968589d8 | 681 | |
Kojto | 90:cb3d968589d8 | 682 | /*! @brief Format value for bitfield DAC_C1_DACBFWM. */ |
Kojto | 90:cb3d968589d8 | 683 | #define BF_DAC_C1_DACBFWM(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C1_DACBFWM) & BM_DAC_C1_DACBFWM) |
Kojto | 90:cb3d968589d8 | 684 | |
Kojto | 90:cb3d968589d8 | 685 | /*! @brief Set the DACBFWM field to a new value. */ |
Kojto | 90:cb3d968589d8 | 686 | #define BW_DAC_C1_DACBFWM(x, v) (HW_DAC_C1_WR(x, (HW_DAC_C1_RD(x) & ~BM_DAC_C1_DACBFWM) | BF_DAC_C1_DACBFWM(v))) |
Kojto | 90:cb3d968589d8 | 687 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 688 | |
Kojto | 90:cb3d968589d8 | 689 | /*! |
Kojto | 90:cb3d968589d8 | 690 | * @name Register DAC_C1, field DMAEN[7] (RW) |
Kojto | 90:cb3d968589d8 | 691 | * |
Kojto | 90:cb3d968589d8 | 692 | * Values: |
Kojto | 90:cb3d968589d8 | 693 | * - 0 - DMA is disabled. |
Kojto | 90:cb3d968589d8 | 694 | * - 1 - DMA is enabled. When DMA is enabled, the DMA request will be generated |
Kojto | 90:cb3d968589d8 | 695 | * by original interrupts. The interrupts will not be presented on this |
Kojto | 90:cb3d968589d8 | 696 | * module at the same time. |
Kojto | 90:cb3d968589d8 | 697 | */ |
Kojto | 90:cb3d968589d8 | 698 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 699 | #define BP_DAC_C1_DMAEN (7U) /*!< Bit position for DAC_C1_DMAEN. */ |
Kojto | 90:cb3d968589d8 | 700 | #define BM_DAC_C1_DMAEN (0x80U) /*!< Bit mask for DAC_C1_DMAEN. */ |
Kojto | 90:cb3d968589d8 | 701 | #define BS_DAC_C1_DMAEN (1U) /*!< Bit field size in bits for DAC_C1_DMAEN. */ |
Kojto | 90:cb3d968589d8 | 702 | |
Kojto | 90:cb3d968589d8 | 703 | /*! @brief Read current value of the DAC_C1_DMAEN field. */ |
Kojto | 90:cb3d968589d8 | 704 | #define BR_DAC_C1_DMAEN(x) (BITBAND_ACCESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DMAEN)) |
Kojto | 90:cb3d968589d8 | 705 | |
Kojto | 90:cb3d968589d8 | 706 | /*! @brief Format value for bitfield DAC_C1_DMAEN. */ |
Kojto | 90:cb3d968589d8 | 707 | #define BF_DAC_C1_DMAEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C1_DMAEN) & BM_DAC_C1_DMAEN) |
Kojto | 90:cb3d968589d8 | 708 | |
Kojto | 90:cb3d968589d8 | 709 | /*! @brief Set the DMAEN field to a new value. */ |
Kojto | 90:cb3d968589d8 | 710 | #define BW_DAC_C1_DMAEN(x, v) (BITBAND_ACCESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DMAEN) = (v)) |
Kojto | 90:cb3d968589d8 | 711 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 712 | |
Kojto | 90:cb3d968589d8 | 713 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 714 | * HW_DAC_C2 - DAC Control Register 2 |
Kojto | 90:cb3d968589d8 | 715 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 716 | |
Kojto | 90:cb3d968589d8 | 717 | /*! |
Kojto | 90:cb3d968589d8 | 718 | * @brief HW_DAC_C2 - DAC Control Register 2 (RW) |
Kojto | 90:cb3d968589d8 | 719 | * |
Kojto | 90:cb3d968589d8 | 720 | * Reset value: 0x0FU |
Kojto | 90:cb3d968589d8 | 721 | */ |
Kojto | 90:cb3d968589d8 | 722 | typedef union _hw_dac_c2 |
Kojto | 90:cb3d968589d8 | 723 | { |
Kojto | 90:cb3d968589d8 | 724 | uint8_t U; |
Kojto | 90:cb3d968589d8 | 725 | struct _hw_dac_c2_bitfields |
Kojto | 90:cb3d968589d8 | 726 | { |
Kojto | 90:cb3d968589d8 | 727 | uint8_t DACBFUP : 4; /*!< [3:0] DAC Buffer Upper Limit */ |
Kojto | 90:cb3d968589d8 | 728 | uint8_t DACBFRP : 4; /*!< [7:4] DAC Buffer Read Pointer */ |
Kojto | 90:cb3d968589d8 | 729 | } B; |
Kojto | 90:cb3d968589d8 | 730 | } hw_dac_c2_t; |
Kojto | 90:cb3d968589d8 | 731 | |
Kojto | 90:cb3d968589d8 | 732 | /*! |
Kojto | 90:cb3d968589d8 | 733 | * @name Constants and macros for entire DAC_C2 register |
Kojto | 90:cb3d968589d8 | 734 | */ |
Kojto | 90:cb3d968589d8 | 735 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 736 | #define HW_DAC_C2_ADDR(x) ((x) + 0x23U) |
Kojto | 90:cb3d968589d8 | 737 | |
Kojto | 90:cb3d968589d8 | 738 | #define HW_DAC_C2(x) (*(__IO hw_dac_c2_t *) HW_DAC_C2_ADDR(x)) |
Kojto | 90:cb3d968589d8 | 739 | #define HW_DAC_C2_RD(x) (HW_DAC_C2(x).U) |
Kojto | 90:cb3d968589d8 | 740 | #define HW_DAC_C2_WR(x, v) (HW_DAC_C2(x).U = (v)) |
Kojto | 90:cb3d968589d8 | 741 | #define HW_DAC_C2_SET(x, v) (HW_DAC_C2_WR(x, HW_DAC_C2_RD(x) | (v))) |
Kojto | 90:cb3d968589d8 | 742 | #define HW_DAC_C2_CLR(x, v) (HW_DAC_C2_WR(x, HW_DAC_C2_RD(x) & ~(v))) |
Kojto | 90:cb3d968589d8 | 743 | #define HW_DAC_C2_TOG(x, v) (HW_DAC_C2_WR(x, HW_DAC_C2_RD(x) ^ (v))) |
Kojto | 90:cb3d968589d8 | 744 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 745 | |
Kojto | 90:cb3d968589d8 | 746 | /* |
Kojto | 90:cb3d968589d8 | 747 | * Constants & macros for individual DAC_C2 bitfields |
Kojto | 90:cb3d968589d8 | 748 | */ |
Kojto | 90:cb3d968589d8 | 749 | |
Kojto | 90:cb3d968589d8 | 750 | /*! |
Kojto | 90:cb3d968589d8 | 751 | * @name Register DAC_C2, field DACBFUP[3:0] (RW) |
Kojto | 90:cb3d968589d8 | 752 | * |
Kojto | 90:cb3d968589d8 | 753 | * Selects the upper limit of the DAC buffer. The buffer read pointer cannot |
Kojto | 90:cb3d968589d8 | 754 | * exceed it. |
Kojto | 90:cb3d968589d8 | 755 | */ |
Kojto | 90:cb3d968589d8 | 756 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 757 | #define BP_DAC_C2_DACBFUP (0U) /*!< Bit position for DAC_C2_DACBFUP. */ |
Kojto | 90:cb3d968589d8 | 758 | #define BM_DAC_C2_DACBFUP (0x0FU) /*!< Bit mask for DAC_C2_DACBFUP. */ |
Kojto | 90:cb3d968589d8 | 759 | #define BS_DAC_C2_DACBFUP (4U) /*!< Bit field size in bits for DAC_C2_DACBFUP. */ |
Kojto | 90:cb3d968589d8 | 760 | |
Kojto | 90:cb3d968589d8 | 761 | /*! @brief Read current value of the DAC_C2_DACBFUP field. */ |
Kojto | 90:cb3d968589d8 | 762 | #define BR_DAC_C2_DACBFUP(x) (HW_DAC_C2(x).B.DACBFUP) |
Kojto | 90:cb3d968589d8 | 763 | |
Kojto | 90:cb3d968589d8 | 764 | /*! @brief Format value for bitfield DAC_C2_DACBFUP. */ |
Kojto | 90:cb3d968589d8 | 765 | #define BF_DAC_C2_DACBFUP(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C2_DACBFUP) & BM_DAC_C2_DACBFUP) |
Kojto | 90:cb3d968589d8 | 766 | |
Kojto | 90:cb3d968589d8 | 767 | /*! @brief Set the DACBFUP field to a new value. */ |
Kojto | 90:cb3d968589d8 | 768 | #define BW_DAC_C2_DACBFUP(x, v) (HW_DAC_C2_WR(x, (HW_DAC_C2_RD(x) & ~BM_DAC_C2_DACBFUP) | BF_DAC_C2_DACBFUP(v))) |
Kojto | 90:cb3d968589d8 | 769 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 770 | |
Kojto | 90:cb3d968589d8 | 771 | /*! |
Kojto | 90:cb3d968589d8 | 772 | * @name Register DAC_C2, field DACBFRP[7:4] (RW) |
Kojto | 90:cb3d968589d8 | 773 | * |
Kojto | 90:cb3d968589d8 | 774 | * Keeps the current value of the buffer read pointer. |
Kojto | 90:cb3d968589d8 | 775 | */ |
Kojto | 90:cb3d968589d8 | 776 | /*@{*/ |
Kojto | 90:cb3d968589d8 | 777 | #define BP_DAC_C2_DACBFRP (4U) /*!< Bit position for DAC_C2_DACBFRP. */ |
Kojto | 90:cb3d968589d8 | 778 | #define BM_DAC_C2_DACBFRP (0xF0U) /*!< Bit mask for DAC_C2_DACBFRP. */ |
Kojto | 90:cb3d968589d8 | 779 | #define BS_DAC_C2_DACBFRP (4U) /*!< Bit field size in bits for DAC_C2_DACBFRP. */ |
Kojto | 90:cb3d968589d8 | 780 | |
Kojto | 90:cb3d968589d8 | 781 | /*! @brief Read current value of the DAC_C2_DACBFRP field. */ |
Kojto | 90:cb3d968589d8 | 782 | #define BR_DAC_C2_DACBFRP(x) (HW_DAC_C2(x).B.DACBFRP) |
Kojto | 90:cb3d968589d8 | 783 | |
Kojto | 90:cb3d968589d8 | 784 | /*! @brief Format value for bitfield DAC_C2_DACBFRP. */ |
Kojto | 90:cb3d968589d8 | 785 | #define BF_DAC_C2_DACBFRP(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C2_DACBFRP) & BM_DAC_C2_DACBFRP) |
Kojto | 90:cb3d968589d8 | 786 | |
Kojto | 90:cb3d968589d8 | 787 | /*! @brief Set the DACBFRP field to a new value. */ |
Kojto | 90:cb3d968589d8 | 788 | #define BW_DAC_C2_DACBFRP(x, v) (HW_DAC_C2_WR(x, (HW_DAC_C2_RD(x) & ~BM_DAC_C2_DACBFRP) | BF_DAC_C2_DACBFRP(v))) |
Kojto | 90:cb3d968589d8 | 789 | /*@}*/ |
Kojto | 90:cb3d968589d8 | 790 | |
Kojto | 90:cb3d968589d8 | 791 | /******************************************************************************* |
Kojto | 90:cb3d968589d8 | 792 | * hw_dac_t - module struct |
Kojto | 90:cb3d968589d8 | 793 | ******************************************************************************/ |
Kojto | 90:cb3d968589d8 | 794 | /*! |
Kojto | 90:cb3d968589d8 | 795 | * @brief All DAC module registers. |
Kojto | 90:cb3d968589d8 | 796 | */ |
Kojto | 90:cb3d968589d8 | 797 | #pragma pack(1) |
Kojto | 90:cb3d968589d8 | 798 | typedef struct _hw_dac |
Kojto | 90:cb3d968589d8 | 799 | { |
Kojto | 90:cb3d968589d8 | 800 | struct { |
Kojto | 90:cb3d968589d8 | 801 | __IO hw_dac_datnl_t DATnL; /*!< [0x0] DAC Data Low Register */ |
Kojto | 90:cb3d968589d8 | 802 | __IO hw_dac_datnh_t DATnH; /*!< [0x1] DAC Data High Register */ |
Kojto | 90:cb3d968589d8 | 803 | } DAT[16]; |
Kojto | 90:cb3d968589d8 | 804 | __IO hw_dac_sr_t SR; /*!< [0x20] DAC Status Register */ |
Kojto | 90:cb3d968589d8 | 805 | __IO hw_dac_c0_t C0; /*!< [0x21] DAC Control Register */ |
Kojto | 90:cb3d968589d8 | 806 | __IO hw_dac_c1_t C1; /*!< [0x22] DAC Control Register 1 */ |
Kojto | 90:cb3d968589d8 | 807 | __IO hw_dac_c2_t C2; /*!< [0x23] DAC Control Register 2 */ |
Kojto | 90:cb3d968589d8 | 808 | } hw_dac_t; |
Kojto | 90:cb3d968589d8 | 809 | #pragma pack() |
Kojto | 90:cb3d968589d8 | 810 | |
Kojto | 90:cb3d968589d8 | 811 | /*! @brief Macro to access all DAC registers. */ |
Kojto | 90:cb3d968589d8 | 812 | /*! @param x DAC module instance base address. */ |
Kojto | 90:cb3d968589d8 | 813 | /*! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct, |
Kojto | 90:cb3d968589d8 | 814 | * use the '&' operator, like <code>&HW_DAC(DAC0_BASE)</code>. */ |
Kojto | 90:cb3d968589d8 | 815 | #define HW_DAC(x) (*(hw_dac_t *)(x)) |
Kojto | 90:cb3d968589d8 | 816 | |
Kojto | 90:cb3d968589d8 | 817 | #endif /* __HW_DAC_REGISTERS_H__ */ |
Kojto | 90:cb3d968589d8 | 818 | /* EOF */ |