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TARGET_NRF51_DONGLE/cmsis_gcc.h@169:a7c7b631e539, 2018-06-22 (annotated)

Committer:: Anna Bridge
Date:: Fri Jun 22 15:38:59 2018 +0100
Revision:: 169:a7c7b631e539
Parent:: 160:5571c4ff569f

mbed library. Release version 162

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	145:64910690c574	1	/************************************************************************//
AnnaBridge	145:64910690c574	2	* @file cmsis_gcc.h
AnnaBridge	145:64910690c574	3	* @brief CMSIS compiler GCC header file
Anna Bridge	169:a7c7b631e539	4	* @version V5.0.3
Anna Bridge	169:a7c7b631e539	5	* @date 16. January 2018
AnnaBridge	145:64910690c574	6	******************************************************************************/
AnnaBridge	145:64910690c574	7	/*
AnnaBridge	145:64910690c574	8	* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge	145:64910690c574	9	*
AnnaBridge	145:64910690c574	10	* SPDX-License-Identifier: Apache-2.0
AnnaBridge	145:64910690c574	11	*
AnnaBridge	145:64910690c574	12	* Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge	145:64910690c574	13	* not use this file except in compliance with the License.
AnnaBridge	145:64910690c574	14	* You may obtain a copy of the License at
AnnaBridge	145:64910690c574	15	*
AnnaBridge	145:64910690c574	16	* www.apache.org/licenses/LICENSE-2.0
AnnaBridge	145:64910690c574	17	*
AnnaBridge	145:64910690c574	18	* Unless required by applicable law or agreed to in writing, software
AnnaBridge	145:64910690c574	19	* distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge	145:64910690c574	20	* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge	145:64910690c574	21	* See the License for the specific language governing permissions and
AnnaBridge	145:64910690c574	22	* limitations under the License.
AnnaBridge	145:64910690c574	23	*/
AnnaBridge	145:64910690c574	24
AnnaBridge	145:64910690c574	25	#ifndef __CMSIS_GCC_H
AnnaBridge	145:64910690c574	26	#define __CMSIS_GCC_H
AnnaBridge	145:64910690c574	27
AnnaBridge	145:64910690c574	28	/* ignore some GCC warnings */
AnnaBridge	145:64910690c574	29	#pragma GCC diagnostic push
AnnaBridge	145:64910690c574	30	#pragma GCC diagnostic ignored "-Wsign-conversion"
AnnaBridge	145:64910690c574	31	#pragma GCC diagnostic ignored "-Wconversion"
AnnaBridge	145:64910690c574	32	#pragma GCC diagnostic ignored "-Wunused-parameter"
AnnaBridge	145:64910690c574	33
Anna Bridge	160:5571c4ff569f	34	/* Fallback for __has_builtin */
Anna Bridge	160:5571c4ff569f	35	#ifndef __has_builtin
Anna Bridge	160:5571c4ff569f	36	#define __has_builtin(x) (0)
Anna Bridge	160:5571c4ff569f	37	#endif
Anna Bridge	160:5571c4ff569f	38
AnnaBridge	145:64910690c574	39	/* CMSIS compiler specific defines */
AnnaBridge	145:64910690c574	40	#ifndef __ASM
AnnaBridge	145:64910690c574	41	#define __ASM __asm
AnnaBridge	145:64910690c574	42	#endif
AnnaBridge	145:64910690c574	43	#ifndef __INLINE
AnnaBridge	145:64910690c574	44	#define __INLINE inline
AnnaBridge	145:64910690c574	45	#endif
AnnaBridge	145:64910690c574	46	#ifndef __STATIC_INLINE
AnnaBridge	145:64910690c574	47	#define __STATIC_INLINE static inline
AnnaBridge	145:64910690c574	48	#endif
Anna Bridge	169:a7c7b631e539	49	#ifndef __STATIC_FORCEINLINE
Anna Bridge	169:a7c7b631e539	50	#define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
Anna Bridge	169:a7c7b631e539	51	#endif
AnnaBridge	145:64910690c574	52	#ifndef __NO_RETURN
Anna Bridge	169:a7c7b631e539	53	#define __NO_RETURN __attribute__((__noreturn__))
AnnaBridge	145:64910690c574	54	#endif
AnnaBridge	145:64910690c574	55	#ifndef __USED
AnnaBridge	145:64910690c574	56	#define __USED __attribute__((used))
AnnaBridge	145:64910690c574	57	#endif
AnnaBridge	145:64910690c574	58	#ifndef __WEAK
AnnaBridge	145:64910690c574	59	#define __WEAK __attribute__((weak))
AnnaBridge	145:64910690c574	60	#endif
AnnaBridge	145:64910690c574	61	#ifndef __PACKED
AnnaBridge	145:64910690c574	62	#define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge	145:64910690c574	63	#endif
AnnaBridge	145:64910690c574	64	#ifndef __PACKED_STRUCT
AnnaBridge	145:64910690c574	65	#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge	145:64910690c574	66	#endif
Anna Bridge	160:5571c4ff569f	67	#ifndef __PACKED_UNION
Anna Bridge	160:5571c4ff569f	68	#define __PACKED_UNION union __attribute__((packed, aligned(1)))
Anna Bridge	160:5571c4ff569f	69	#endif
AnnaBridge	145:64910690c574	70	#ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge	145:64910690c574	71	#pragma GCC diagnostic push
AnnaBridge	145:64910690c574	72	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	145:64910690c574	73	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	145:64910690c574	74	struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge	145:64910690c574	75	#pragma GCC diagnostic pop
AnnaBridge	145:64910690c574	76	#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge	145:64910690c574	77	#endif
AnnaBridge	145:64910690c574	78	#ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge	145:64910690c574	79	#pragma GCC diagnostic push
AnnaBridge	145:64910690c574	80	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	145:64910690c574	81	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	145:64910690c574	82	__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge	145:64910690c574	83	#pragma GCC diagnostic pop
AnnaBridge	145:64910690c574	84	#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE )(void )(addr))->v) = (val))
AnnaBridge	145:64910690c574	85	#endif
AnnaBridge	145:64910690c574	86	#ifndef __UNALIGNED_UINT16_READ
AnnaBridge	145:64910690c574	87	#pragma GCC diagnostic push
AnnaBridge	145:64910690c574	88	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	145:64910690c574	89	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	145:64910690c574	90	__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge	145:64910690c574	91	#pragma GCC diagnostic pop
AnnaBridge	145:64910690c574	92	#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ )(const void )(addr))->v)
AnnaBridge	145:64910690c574	93	#endif
AnnaBridge	145:64910690c574	94	#ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge	145:64910690c574	95	#pragma GCC diagnostic push
AnnaBridge	145:64910690c574	96	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	145:64910690c574	97	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	145:64910690c574	98	__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge	145:64910690c574	99	#pragma GCC diagnostic pop
AnnaBridge	145:64910690c574	100	#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE )(void )(addr))->v) = (val))
AnnaBridge	145:64910690c574	101	#endif
AnnaBridge	145:64910690c574	102	#ifndef __UNALIGNED_UINT32_READ
AnnaBridge	145:64910690c574	103	#pragma GCC diagnostic push
AnnaBridge	145:64910690c574	104	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	145:64910690c574	105	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	145:64910690c574	106	__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge	145:64910690c574	107	#pragma GCC diagnostic pop
AnnaBridge	145:64910690c574	108	#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ )(const void )(addr))->v)
AnnaBridge	145:64910690c574	109	#endif
AnnaBridge	145:64910690c574	110	#ifndef __ALIGNED
AnnaBridge	145:64910690c574	111	#define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge	145:64910690c574	112	#endif
Anna Bridge	160:5571c4ff569f	113	#ifndef __RESTRICT
Anna Bridge	160:5571c4ff569f	114	#define __RESTRICT __restrict
Anna Bridge	160:5571c4ff569f	115	#endif
AnnaBridge	145:64910690c574	116
AnnaBridge	145:64910690c574	117
AnnaBridge	145:64910690c574	118	/* ########################### Core Function Access ########################### */
AnnaBridge	145:64910690c574	119	/** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge	145:64910690c574	120	\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge	145:64910690c574	121	@{
AnnaBridge	145:64910690c574	122	*/
AnnaBridge	145:64910690c574	123
AnnaBridge	145:64910690c574	124	/**
AnnaBridge	145:64910690c574	125	\brief Enable IRQ Interrupts
AnnaBridge	145:64910690c574	126	\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge	145:64910690c574	127	Can only be executed in Privileged modes.
AnnaBridge	145:64910690c574	128	*/
Anna Bridge	169:a7c7b631e539	129	__STATIC_FORCEINLINE void __enable_irq(void)
AnnaBridge	145:64910690c574	130	{
AnnaBridge	145:64910690c574	131	__ASM volatile ("cpsie i" : : : "memory");
AnnaBridge	145:64910690c574	132	}
AnnaBridge	145:64910690c574	133
AnnaBridge	145:64910690c574	134
AnnaBridge	145:64910690c574	135	/**
AnnaBridge	145:64910690c574	136	\brief Disable IRQ Interrupts
AnnaBridge	145:64910690c574	137	\details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge	145:64910690c574	138	Can only be executed in Privileged modes.
AnnaBridge	145:64910690c574	139	*/
Anna Bridge	169:a7c7b631e539	140	__STATIC_FORCEINLINE void __disable_irq(void)
AnnaBridge	145:64910690c574	141	{
AnnaBridge	145:64910690c574	142	__ASM volatile ("cpsid i" : : : "memory");
AnnaBridge	145:64910690c574	143	}
AnnaBridge	145:64910690c574	144
AnnaBridge	145:64910690c574	145
AnnaBridge	145:64910690c574	146	/**
AnnaBridge	145:64910690c574	147	\brief Get Control Register
AnnaBridge	145:64910690c574	148	\details Returns the content of the Control Register.
AnnaBridge	145:64910690c574	149	\return Control Register value
AnnaBridge	145:64910690c574	150	*/
Anna Bridge	169:a7c7b631e539	151	__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
AnnaBridge	145:64910690c574	152	{
AnnaBridge	145:64910690c574	153	uint32_t result;
AnnaBridge	145:64910690c574	154
AnnaBridge	145:64910690c574	155	__ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge	145:64910690c574	156	return(result);
AnnaBridge	145:64910690c574	157	}
AnnaBridge	145:64910690c574	158
AnnaBridge	145:64910690c574	159
AnnaBridge	145:64910690c574	160	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	161	/**
AnnaBridge	145:64910690c574	162	\brief Get Control Register (non-secure)
AnnaBridge	145:64910690c574	163	\details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge	145:64910690c574	164	\return non-secure Control Register value
AnnaBridge	145:64910690c574	165	*/
Anna Bridge	169:a7c7b631e539	166	__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge	145:64910690c574	167	{
AnnaBridge	145:64910690c574	168	uint32_t result;
AnnaBridge	145:64910690c574	169
AnnaBridge	145:64910690c574	170	__ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	171	return(result);
AnnaBridge	145:64910690c574	172	}
AnnaBridge	145:64910690c574	173	#endif
AnnaBridge	145:64910690c574	174
AnnaBridge	145:64910690c574	175
AnnaBridge	145:64910690c574	176	/**
AnnaBridge	145:64910690c574	177	\brief Set Control Register
AnnaBridge	145:64910690c574	178	\details Writes the given value to the Control Register.
AnnaBridge	145:64910690c574	179	\param [in] control Control Register value to set
AnnaBridge	145:64910690c574	180	*/
Anna Bridge	169:a7c7b631e539	181	__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
AnnaBridge	145:64910690c574	182	{
AnnaBridge	145:64910690c574	183	__ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge	145:64910690c574	184	}
AnnaBridge	145:64910690c574	185
AnnaBridge	145:64910690c574	186
AnnaBridge	145:64910690c574	187	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	188	/**
AnnaBridge	145:64910690c574	189	\brief Set Control Register (non-secure)
AnnaBridge	145:64910690c574	190	\details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge	145:64910690c574	191	\param [in] control Control Register value to set
AnnaBridge	145:64910690c574	192	*/
Anna Bridge	169:a7c7b631e539	193	__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge	145:64910690c574	194	{
AnnaBridge	145:64910690c574	195	__ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge	145:64910690c574	196	}
AnnaBridge	145:64910690c574	197	#endif
AnnaBridge	145:64910690c574	198
AnnaBridge	145:64910690c574	199
AnnaBridge	145:64910690c574	200	/**
AnnaBridge	145:64910690c574	201	\brief Get IPSR Register
AnnaBridge	145:64910690c574	202	\details Returns the content of the IPSR Register.
AnnaBridge	145:64910690c574	203	\return IPSR Register value
AnnaBridge	145:64910690c574	204	*/
Anna Bridge	169:a7c7b631e539	205	__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
AnnaBridge	145:64910690c574	206	{
AnnaBridge	145:64910690c574	207	uint32_t result;
AnnaBridge	145:64910690c574	208
AnnaBridge	145:64910690c574	209	__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge	145:64910690c574	210	return(result);
AnnaBridge	145:64910690c574	211	}
AnnaBridge	145:64910690c574	212
AnnaBridge	145:64910690c574	213
AnnaBridge	145:64910690c574	214	/**
AnnaBridge	145:64910690c574	215	\brief Get APSR Register
AnnaBridge	145:64910690c574	216	\details Returns the content of the APSR Register.
AnnaBridge	145:64910690c574	217	\return APSR Register value
AnnaBridge	145:64910690c574	218	*/
Anna Bridge	169:a7c7b631e539	219	__STATIC_FORCEINLINE uint32_t __get_APSR(void)
AnnaBridge	145:64910690c574	220	{
AnnaBridge	145:64910690c574	221	uint32_t result;
AnnaBridge	145:64910690c574	222
AnnaBridge	145:64910690c574	223	__ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge	145:64910690c574	224	return(result);
AnnaBridge	145:64910690c574	225	}
AnnaBridge	145:64910690c574	226
AnnaBridge	145:64910690c574	227
AnnaBridge	145:64910690c574	228	/**
AnnaBridge	145:64910690c574	229	\brief Get xPSR Register
AnnaBridge	145:64910690c574	230	\details Returns the content of the xPSR Register.
AnnaBridge	145:64910690c574	231	\return xPSR Register value
AnnaBridge	145:64910690c574	232	*/
Anna Bridge	169:a7c7b631e539	233	__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
AnnaBridge	145:64910690c574	234	{
AnnaBridge	145:64910690c574	235	uint32_t result;
AnnaBridge	145:64910690c574	236
AnnaBridge	145:64910690c574	237	__ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge	145:64910690c574	238	return(result);
AnnaBridge	145:64910690c574	239	}
AnnaBridge	145:64910690c574	240
AnnaBridge	145:64910690c574	241
AnnaBridge	145:64910690c574	242	/**
AnnaBridge	145:64910690c574	243	\brief Get Process Stack Pointer
AnnaBridge	145:64910690c574	244	\details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge	145:64910690c574	245	\return PSP Register value
AnnaBridge	145:64910690c574	246	*/
Anna Bridge	169:a7c7b631e539	247	__STATIC_FORCEINLINE uint32_t __get_PSP(void)
AnnaBridge	145:64910690c574	248	{
AnnaBridge	145:64910690c574	249	register uint32_t result;
AnnaBridge	145:64910690c574	250
AnnaBridge	145:64910690c574	251	__ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge	145:64910690c574	252	return(result);
AnnaBridge	145:64910690c574	253	}
AnnaBridge	145:64910690c574	254
AnnaBridge	145:64910690c574	255
AnnaBridge	145:64910690c574	256	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	257	/**
AnnaBridge	145:64910690c574	258	\brief Get Process Stack Pointer (non-secure)
AnnaBridge	145:64910690c574	259	\details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge	145:64910690c574	260	\return PSP Register value
AnnaBridge	145:64910690c574	261	*/
Anna Bridge	169:a7c7b631e539	262	__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge	145:64910690c574	263	{
AnnaBridge	145:64910690c574	264	register uint32_t result;
AnnaBridge	145:64910690c574	265
AnnaBridge	145:64910690c574	266	__ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	267	return(result);
AnnaBridge	145:64910690c574	268	}
AnnaBridge	145:64910690c574	269	#endif
AnnaBridge	145:64910690c574	270
AnnaBridge	145:64910690c574	271
AnnaBridge	145:64910690c574	272	/**
AnnaBridge	145:64910690c574	273	\brief Set Process Stack Pointer
AnnaBridge	145:64910690c574	274	\details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge	145:64910690c574	275	\param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge	145:64910690c574	276	*/
Anna Bridge	169:a7c7b631e539	277	__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge	145:64910690c574	278	{
AnnaBridge	145:64910690c574	279	__ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge	145:64910690c574	280	}
AnnaBridge	145:64910690c574	281
AnnaBridge	145:64910690c574	282
AnnaBridge	145:64910690c574	283	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	284	/**
AnnaBridge	145:64910690c574	285	\brief Set Process Stack Pointer (non-secure)
AnnaBridge	145:64910690c574	286	\details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge	145:64910690c574	287	\param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge	145:64910690c574	288	*/
Anna Bridge	169:a7c7b631e539	289	__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge	145:64910690c574	290	{
AnnaBridge	145:64910690c574	291	__ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge	145:64910690c574	292	}
AnnaBridge	145:64910690c574	293	#endif
AnnaBridge	145:64910690c574	294
AnnaBridge	145:64910690c574	295
AnnaBridge	145:64910690c574	296	/**
AnnaBridge	145:64910690c574	297	\brief Get Main Stack Pointer
AnnaBridge	145:64910690c574	298	\details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge	145:64910690c574	299	\return MSP Register value
AnnaBridge	145:64910690c574	300	*/
Anna Bridge	169:a7c7b631e539	301	__STATIC_FORCEINLINE uint32_t __get_MSP(void)
AnnaBridge	145:64910690c574	302	{
AnnaBridge	145:64910690c574	303	register uint32_t result;
AnnaBridge	145:64910690c574	304
AnnaBridge	145:64910690c574	305	__ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge	145:64910690c574	306	return(result);
AnnaBridge	145:64910690c574	307	}
AnnaBridge	145:64910690c574	308
AnnaBridge	145:64910690c574	309
AnnaBridge	145:64910690c574	310	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	311	/**
AnnaBridge	145:64910690c574	312	\brief Get Main Stack Pointer (non-secure)
AnnaBridge	145:64910690c574	313	\details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge	145:64910690c574	314	\return MSP Register value
AnnaBridge	145:64910690c574	315	*/
Anna Bridge	169:a7c7b631e539	316	__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge	145:64910690c574	317	{
AnnaBridge	145:64910690c574	318	register uint32_t result;
AnnaBridge	145:64910690c574	319
AnnaBridge	145:64910690c574	320	__ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	321	return(result);
AnnaBridge	145:64910690c574	322	}
AnnaBridge	145:64910690c574	323	#endif
AnnaBridge	145:64910690c574	324
AnnaBridge	145:64910690c574	325
AnnaBridge	145:64910690c574	326	/**
AnnaBridge	145:64910690c574	327	\brief Set Main Stack Pointer
AnnaBridge	145:64910690c574	328	\details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge	145:64910690c574	329	\param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge	145:64910690c574	330	*/
Anna Bridge	169:a7c7b631e539	331	__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge	145:64910690c574	332	{
AnnaBridge	145:64910690c574	333	__ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge	145:64910690c574	334	}
AnnaBridge	145:64910690c574	335
AnnaBridge	145:64910690c574	336
AnnaBridge	145:64910690c574	337	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	338	/**
AnnaBridge	145:64910690c574	339	\brief Set Main Stack Pointer (non-secure)
AnnaBridge	145:64910690c574	340	\details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge	145:64910690c574	341	\param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge	145:64910690c574	342	*/
Anna Bridge	169:a7c7b631e539	343	__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge	145:64910690c574	344	{
AnnaBridge	145:64910690c574	345	__ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge	145:64910690c574	346	}
AnnaBridge	145:64910690c574	347	#endif
AnnaBridge	145:64910690c574	348
AnnaBridge	145:64910690c574	349
AnnaBridge	145:64910690c574	350	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	351	/**
AnnaBridge	145:64910690c574	352	\brief Get Stack Pointer (non-secure)
AnnaBridge	145:64910690c574	353	\details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge	145:64910690c574	354	\return SP Register value
AnnaBridge	145:64910690c574	355	*/
Anna Bridge	169:a7c7b631e539	356	__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge	145:64910690c574	357	{
AnnaBridge	145:64910690c574	358	register uint32_t result;
AnnaBridge	145:64910690c574	359
AnnaBridge	145:64910690c574	360	__ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	361	return(result);
AnnaBridge	145:64910690c574	362	}
AnnaBridge	145:64910690c574	363
AnnaBridge	145:64910690c574	364
AnnaBridge	145:64910690c574	365	/**
AnnaBridge	145:64910690c574	366	\brief Set Stack Pointer (non-secure)
AnnaBridge	145:64910690c574	367	\details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge	145:64910690c574	368	\param [in] topOfStack Stack Pointer value to set
AnnaBridge	145:64910690c574	369	*/
Anna Bridge	169:a7c7b631e539	370	__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge	145:64910690c574	371	{
AnnaBridge	145:64910690c574	372	__ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge	145:64910690c574	373	}
AnnaBridge	145:64910690c574	374	#endif
AnnaBridge	145:64910690c574	375
AnnaBridge	145:64910690c574	376
AnnaBridge	145:64910690c574	377	/**
AnnaBridge	145:64910690c574	378	\brief Get Priority Mask
AnnaBridge	145:64910690c574	379	\details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge	145:64910690c574	380	\return Priority Mask value
AnnaBridge	145:64910690c574	381	*/
Anna Bridge	169:a7c7b631e539	382	__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
AnnaBridge	145:64910690c574	383	{
AnnaBridge	145:64910690c574	384	uint32_t result;
AnnaBridge	145:64910690c574	385
Anna Bridge	169:a7c7b631e539	386	__ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
AnnaBridge	145:64910690c574	387	return(result);
AnnaBridge	145:64910690c574	388	}
AnnaBridge	145:64910690c574	389
AnnaBridge	145:64910690c574	390
AnnaBridge	145:64910690c574	391	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	392	/**
AnnaBridge	145:64910690c574	393	\brief Get Priority Mask (non-secure)
AnnaBridge	145:64910690c574	394	\details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge	145:64910690c574	395	\return Priority Mask value
AnnaBridge	145:64910690c574	396	*/
Anna Bridge	169:a7c7b631e539	397	__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge	145:64910690c574	398	{
AnnaBridge	145:64910690c574	399	uint32_t result;
AnnaBridge	145:64910690c574	400
Anna Bridge	169:a7c7b631e539	401	__ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
AnnaBridge	145:64910690c574	402	return(result);
AnnaBridge	145:64910690c574	403	}
AnnaBridge	145:64910690c574	404	#endif
AnnaBridge	145:64910690c574	405
AnnaBridge	145:64910690c574	406
AnnaBridge	145:64910690c574	407	/**
AnnaBridge	145:64910690c574	408	\brief Set Priority Mask
AnnaBridge	145:64910690c574	409	\details Assigns the given value to the Priority Mask Register.
AnnaBridge	145:64910690c574	410	\param [in] priMask Priority Mask
AnnaBridge	145:64910690c574	411	*/
Anna Bridge	169:a7c7b631e539	412	__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge	145:64910690c574	413	{
AnnaBridge	145:64910690c574	414	__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge	145:64910690c574	415	}
AnnaBridge	145:64910690c574	416
AnnaBridge	145:64910690c574	417
AnnaBridge	145:64910690c574	418	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	419	/**
AnnaBridge	145:64910690c574	420	\brief Set Priority Mask (non-secure)
AnnaBridge	145:64910690c574	421	\details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge	145:64910690c574	422	\param [in] priMask Priority Mask
AnnaBridge	145:64910690c574	423	*/
Anna Bridge	169:a7c7b631e539	424	__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge	145:64910690c574	425	{
AnnaBridge	145:64910690c574	426	__ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge	145:64910690c574	427	}
AnnaBridge	145:64910690c574	428	#endif
AnnaBridge	145:64910690c574	429
AnnaBridge	145:64910690c574	430
AnnaBridge	145:64910690c574	431	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	145:64910690c574	432	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	433	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	145:64910690c574	434	/**
AnnaBridge	145:64910690c574	435	\brief Enable FIQ
AnnaBridge	145:64910690c574	436	\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge	145:64910690c574	437	Can only be executed in Privileged modes.
AnnaBridge	145:64910690c574	438	*/
Anna Bridge	169:a7c7b631e539	439	__STATIC_FORCEINLINE void __enable_fault_irq(void)
AnnaBridge	145:64910690c574	440	{
AnnaBridge	145:64910690c574	441	__ASM volatile ("cpsie f" : : : "memory");
AnnaBridge	145:64910690c574	442	}
AnnaBridge	145:64910690c574	443
AnnaBridge	145:64910690c574	444
AnnaBridge	145:64910690c574	445	/**
AnnaBridge	145:64910690c574	446	\brief Disable FIQ
AnnaBridge	145:64910690c574	447	\details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge	145:64910690c574	448	Can only be executed in Privileged modes.
AnnaBridge	145:64910690c574	449	*/
Anna Bridge	169:a7c7b631e539	450	__STATIC_FORCEINLINE void __disable_fault_irq(void)
AnnaBridge	145:64910690c574	451	{
AnnaBridge	145:64910690c574	452	__ASM volatile ("cpsid f" : : : "memory");
AnnaBridge	145:64910690c574	453	}
AnnaBridge	145:64910690c574	454
AnnaBridge	145:64910690c574	455
AnnaBridge	145:64910690c574	456	/**
AnnaBridge	145:64910690c574	457	\brief Get Base Priority
AnnaBridge	145:64910690c574	458	\details Returns the current value of the Base Priority register.
AnnaBridge	145:64910690c574	459	\return Base Priority register value
AnnaBridge	145:64910690c574	460	*/
Anna Bridge	169:a7c7b631e539	461	__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
AnnaBridge	145:64910690c574	462	{
AnnaBridge	145:64910690c574	463	uint32_t result;
AnnaBridge	145:64910690c574	464
AnnaBridge	145:64910690c574	465	__ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge	145:64910690c574	466	return(result);
AnnaBridge	145:64910690c574	467	}
AnnaBridge	145:64910690c574	468
AnnaBridge	145:64910690c574	469
AnnaBridge	145:64910690c574	470	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	471	/**
AnnaBridge	145:64910690c574	472	\brief Get Base Priority (non-secure)
AnnaBridge	145:64910690c574	473	\details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge	145:64910690c574	474	\return Base Priority register value
AnnaBridge	145:64910690c574	475	*/
Anna Bridge	169:a7c7b631e539	476	__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge	145:64910690c574	477	{
AnnaBridge	145:64910690c574	478	uint32_t result;
AnnaBridge	145:64910690c574	479
AnnaBridge	145:64910690c574	480	__ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	481	return(result);
AnnaBridge	145:64910690c574	482	}
AnnaBridge	145:64910690c574	483	#endif
AnnaBridge	145:64910690c574	484
AnnaBridge	145:64910690c574	485
AnnaBridge	145:64910690c574	486	/**
AnnaBridge	145:64910690c574	487	\brief Set Base Priority
AnnaBridge	145:64910690c574	488	\details Assigns the given value to the Base Priority register.
AnnaBridge	145:64910690c574	489	\param [in] basePri Base Priority value to set
AnnaBridge	145:64910690c574	490	*/
Anna Bridge	169:a7c7b631e539	491	__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge	145:64910690c574	492	{
AnnaBridge	145:64910690c574	493	__ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge	145:64910690c574	494	}
AnnaBridge	145:64910690c574	495
AnnaBridge	145:64910690c574	496
AnnaBridge	145:64910690c574	497	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	498	/**
AnnaBridge	145:64910690c574	499	\brief Set Base Priority (non-secure)
AnnaBridge	145:64910690c574	500	\details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge	145:64910690c574	501	\param [in] basePri Base Priority value to set
AnnaBridge	145:64910690c574	502	*/
Anna Bridge	169:a7c7b631e539	503	__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge	145:64910690c574	504	{
AnnaBridge	145:64910690c574	505	__ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge	145:64910690c574	506	}
AnnaBridge	145:64910690c574	507	#endif
AnnaBridge	145:64910690c574	508
AnnaBridge	145:64910690c574	509
AnnaBridge	145:64910690c574	510	/**
AnnaBridge	145:64910690c574	511	\brief Set Base Priority with condition
AnnaBridge	145:64910690c574	512	\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge	145:64910690c574	513	or the new value increases the BASEPRI priority level.
AnnaBridge	145:64910690c574	514	\param [in] basePri Base Priority value to set
AnnaBridge	145:64910690c574	515	*/
Anna Bridge	169:a7c7b631e539	516	__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge	145:64910690c574	517	{
AnnaBridge	145:64910690c574	518	__ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge	145:64910690c574	519	}
AnnaBridge	145:64910690c574	520
AnnaBridge	145:64910690c574	521
AnnaBridge	145:64910690c574	522	/**
AnnaBridge	145:64910690c574	523	\brief Get Fault Mask
AnnaBridge	145:64910690c574	524	\details Returns the current value of the Fault Mask register.
AnnaBridge	145:64910690c574	525	\return Fault Mask register value
AnnaBridge	145:64910690c574	526	*/
Anna Bridge	169:a7c7b631e539	527	__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
AnnaBridge	145:64910690c574	528	{
AnnaBridge	145:64910690c574	529	uint32_t result;
AnnaBridge	145:64910690c574	530
AnnaBridge	145:64910690c574	531	__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge	145:64910690c574	532	return(result);
AnnaBridge	145:64910690c574	533	}
AnnaBridge	145:64910690c574	534
AnnaBridge	145:64910690c574	535
AnnaBridge	145:64910690c574	536	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	537	/**
AnnaBridge	145:64910690c574	538	\brief Get Fault Mask (non-secure)
AnnaBridge	145:64910690c574	539	\details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge	145:64910690c574	540	\return Fault Mask register value
AnnaBridge	145:64910690c574	541	*/
Anna Bridge	169:a7c7b631e539	542	__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge	145:64910690c574	543	{
AnnaBridge	145:64910690c574	544	uint32_t result;
AnnaBridge	145:64910690c574	545
AnnaBridge	145:64910690c574	546	__ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge	145:64910690c574	547	return(result);
AnnaBridge	145:64910690c574	548	}
AnnaBridge	145:64910690c574	549	#endif
AnnaBridge	145:64910690c574	550
AnnaBridge	145:64910690c574	551
AnnaBridge	145:64910690c574	552	/**
AnnaBridge	145:64910690c574	553	\brief Set Fault Mask
AnnaBridge	145:64910690c574	554	\details Assigns the given value to the Fault Mask register.
AnnaBridge	145:64910690c574	555	\param [in] faultMask Fault Mask value to set
AnnaBridge	145:64910690c574	556	*/
Anna Bridge	169:a7c7b631e539	557	__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge	145:64910690c574	558	{
AnnaBridge	145:64910690c574	559	__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge	145:64910690c574	560	}
AnnaBridge	145:64910690c574	561
AnnaBridge	145:64910690c574	562
AnnaBridge	145:64910690c574	563	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	564	/**
AnnaBridge	145:64910690c574	565	\brief Set Fault Mask (non-secure)
AnnaBridge	145:64910690c574	566	\details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge	145:64910690c574	567	\param [in] faultMask Fault Mask value to set
AnnaBridge	145:64910690c574	568	*/
Anna Bridge	169:a7c7b631e539	569	__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge	145:64910690c574	570	{
AnnaBridge	145:64910690c574	571	__ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge	145:64910690c574	572	}
AnnaBridge	145:64910690c574	573	#endif
AnnaBridge	145:64910690c574	574
AnnaBridge	145:64910690c574	575	#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	145:64910690c574	576	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	577	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge	145:64910690c574	578
AnnaBridge	145:64910690c574	579
AnnaBridge	145:64910690c574	580	#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	145:64910690c574	581	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge	145:64910690c574	582
AnnaBridge	145:64910690c574	583	/**
AnnaBridge	145:64910690c574	584	\brief Get Process Stack Pointer Limit
Anna Bridge	169:a7c7b631e539	585	Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge	169:a7c7b631e539	586	Stack Pointer Limit register hence zero is returned always in non-secure
Anna Bridge	169:a7c7b631e539	587	mode.
Anna Bridge	169:a7c7b631e539	588
AnnaBridge	145:64910690c574	589	\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge	145:64910690c574	590	\return PSPLIM Register value
AnnaBridge	145:64910690c574	591	*/
Anna Bridge	169:a7c7b631e539	592	__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
AnnaBridge	145:64910690c574	593	{
Anna Bridge	169:a7c7b631e539	594	#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge	169:a7c7b631e539	595	(!defined (__ARM_FEATURE_CMSE) \|\| (__ARM_FEATURE_CMSE < 3)))
Anna Bridge	169:a7c7b631e539	596	// without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge	169:a7c7b631e539	597	return 0U;
Anna Bridge	169:a7c7b631e539	598	#else
AnnaBridge	145:64910690c574	599	register uint32_t result;
AnnaBridge	145:64910690c574	600	__ASM volatile ("MRS %0, psplim" : "=r" (result) );
Anna Bridge	169:a7c7b631e539	601	return result;
Anna Bridge	169:a7c7b631e539	602	#endif
AnnaBridge	145:64910690c574	603	}
AnnaBridge	145:64910690c574	604
Anna Bridge	169:a7c7b631e539	605	#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	606	/**
AnnaBridge	145:64910690c574	607	\brief Get Process Stack Pointer Limit (non-secure)
Anna Bridge	169:a7c7b631e539	608	Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge	169:a7c7b631e539	609	Stack Pointer Limit register hence zero is returned always.
Anna Bridge	169:a7c7b631e539	610
AnnaBridge	145:64910690c574	611	\details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge	145:64910690c574	612	\return PSPLIM Register value
AnnaBridge	145:64910690c574	613	*/
Anna Bridge	169:a7c7b631e539	614	__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge	145:64910690c574	615	{
Anna Bridge	169:a7c7b631e539	616	#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Anna Bridge	169:a7c7b631e539	617	// without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge	169:a7c7b631e539	618	return 0U;
Anna Bridge	169:a7c7b631e539	619	#else
AnnaBridge	145:64910690c574	620	register uint32_t result;
AnnaBridge	145:64910690c574	621	__ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
Anna Bridge	169:a7c7b631e539	622	return result;
Anna Bridge	169:a7c7b631e539	623	#endif
AnnaBridge	145:64910690c574	624	}
AnnaBridge	145:64910690c574	625	#endif
AnnaBridge	145:64910690c574	626
AnnaBridge	145:64910690c574	627
AnnaBridge	145:64910690c574	628	/**
AnnaBridge	145:64910690c574	629	\brief Set Process Stack Pointer Limit
Anna Bridge	169:a7c7b631e539	630	Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge	169:a7c7b631e539	631	Stack Pointer Limit register hence the write is silently ignored in non-secure
Anna Bridge	169:a7c7b631e539	632	mode.
Anna Bridge	169:a7c7b631e539	633
AnnaBridge	145:64910690c574	634	\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge	145:64910690c574	635	\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge	145:64910690c574	636	*/
Anna Bridge	169:a7c7b631e539	637	__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge	145:64910690c574	638	{
Anna Bridge	169:a7c7b631e539	639	#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge	169:a7c7b631e539	640	(!defined (__ARM_FEATURE_CMSE) \|\| (__ARM_FEATURE_CMSE < 3)))
Anna Bridge	169:a7c7b631e539	641	// without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge	169:a7c7b631e539	642	(void)ProcStackPtrLimit;
Anna Bridge	169:a7c7b631e539	643	#else
AnnaBridge	145:64910690c574	644	__ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
Anna Bridge	169:a7c7b631e539	645	#endif
AnnaBridge	145:64910690c574	646	}
AnnaBridge	145:64910690c574	647
AnnaBridge	145:64910690c574	648
Anna Bridge	169:a7c7b631e539	649	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	650	/**
AnnaBridge	145:64910690c574	651	\brief Set Process Stack Pointer (non-secure)
Anna Bridge	169:a7c7b631e539	652	Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge	169:a7c7b631e539	653	Stack Pointer Limit register hence the write is silently ignored.
Anna Bridge	169:a7c7b631e539	654
AnnaBridge	145:64910690c574	655	\details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge	145:64910690c574	656	\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge	145:64910690c574	657	*/
Anna Bridge	169:a7c7b631e539	658	__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge	145:64910690c574	659	{
Anna Bridge	169:a7c7b631e539	660	#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Anna Bridge	169:a7c7b631e539	661	// without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge	169:a7c7b631e539	662	(void)ProcStackPtrLimit;
Anna Bridge	169:a7c7b631e539	663	#else
AnnaBridge	145:64910690c574	664	__ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
Anna Bridge	169:a7c7b631e539	665	#endif
AnnaBridge	145:64910690c574	666	}
AnnaBridge	145:64910690c574	667	#endif
AnnaBridge	145:64910690c574	668
AnnaBridge	145:64910690c574	669
AnnaBridge	145:64910690c574	670	/**
AnnaBridge	145:64910690c574	671	\brief Get Main Stack Pointer Limit
Anna Bridge	169:a7c7b631e539	672	Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge	169:a7c7b631e539	673	Stack Pointer Limit register hence zero is returned always in non-secure
Anna Bridge	169:a7c7b631e539	674	mode.
Anna Bridge	169:a7c7b631e539	675
AnnaBridge	145:64910690c574	676	\details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge	145:64910690c574	677	\return MSPLIM Register value
AnnaBridge	145:64910690c574	678	*/
Anna Bridge	169:a7c7b631e539	679	__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
AnnaBridge	145:64910690c574	680	{
Anna Bridge	169:a7c7b631e539	681	#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge	169:a7c7b631e539	682	(!defined (__ARM_FEATURE_CMSE) \|\| (__ARM_FEATURE_CMSE < 3)))
Anna Bridge	169:a7c7b631e539	683	// without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge	169:a7c7b631e539	684	return 0U;
Anna Bridge	169:a7c7b631e539	685	#else
AnnaBridge	145:64910690c574	686	register uint32_t result;
AnnaBridge	145:64910690c574	687	__ASM volatile ("MRS %0, msplim" : "=r" (result) );
Anna Bridge	169:a7c7b631e539	688	return result;
Anna Bridge	169:a7c7b631e539	689	#endif
AnnaBridge	145:64910690c574	690	}
AnnaBridge	145:64910690c574	691
AnnaBridge	145:64910690c574	692
Anna Bridge	169:a7c7b631e539	693	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	694	/**
AnnaBridge	145:64910690c574	695	\brief Get Main Stack Pointer Limit (non-secure)
Anna Bridge	169:a7c7b631e539	696	Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge	169:a7c7b631e539	697	Stack Pointer Limit register hence zero is returned always.
Anna Bridge	169:a7c7b631e539	698
AnnaBridge	145:64910690c574	699	\details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge	145:64910690c574	700	\return MSPLIM Register value
AnnaBridge	145:64910690c574	701	*/
Anna Bridge	169:a7c7b631e539	702	__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge	145:64910690c574	703	{
Anna Bridge	169:a7c7b631e539	704	#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Anna Bridge	169:a7c7b631e539	705	// without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge	169:a7c7b631e539	706	return 0U;
Anna Bridge	169:a7c7b631e539	707	#else
AnnaBridge	145:64910690c574	708	register uint32_t result;
AnnaBridge	145:64910690c574	709	__ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
Anna Bridge	169:a7c7b631e539	710	return result;
Anna Bridge	169:a7c7b631e539	711	#endif
AnnaBridge	145:64910690c574	712	}
AnnaBridge	145:64910690c574	713	#endif
AnnaBridge	145:64910690c574	714
AnnaBridge	145:64910690c574	715
AnnaBridge	145:64910690c574	716	/**
AnnaBridge	145:64910690c574	717	\brief Set Main Stack Pointer Limit
Anna Bridge	169:a7c7b631e539	718	Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge	169:a7c7b631e539	719	Stack Pointer Limit register hence the write is silently ignored in non-secure
Anna Bridge	169:a7c7b631e539	720	mode.
Anna Bridge	169:a7c7b631e539	721
AnnaBridge	145:64910690c574	722	\details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge	145:64910690c574	723	\param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge	145:64910690c574	724	*/
Anna Bridge	169:a7c7b631e539	725	__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge	145:64910690c574	726	{
Anna Bridge	169:a7c7b631e539	727	#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge	169:a7c7b631e539	728	(!defined (__ARM_FEATURE_CMSE) \|\| (__ARM_FEATURE_CMSE < 3)))
Anna Bridge	169:a7c7b631e539	729	// without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge	169:a7c7b631e539	730	(void)MainStackPtrLimit;
Anna Bridge	169:a7c7b631e539	731	#else
AnnaBridge	145:64910690c574	732	__ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
Anna Bridge	169:a7c7b631e539	733	#endif
AnnaBridge	145:64910690c574	734	}
AnnaBridge	145:64910690c574	735
AnnaBridge	145:64910690c574	736
Anna Bridge	169:a7c7b631e539	737	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	145:64910690c574	738	/**
AnnaBridge	145:64910690c574	739	\brief Set Main Stack Pointer Limit (non-secure)
Anna Bridge	169:a7c7b631e539	740	Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge	169:a7c7b631e539	741	Stack Pointer Limit register hence the write is silently ignored.
Anna Bridge	169:a7c7b631e539	742
AnnaBridge	145:64910690c574	743	\details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge	145:64910690c574	744	\param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge	145:64910690c574	745	*/
Anna Bridge	169:a7c7b631e539	746	__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge	145:64910690c574	747	{
Anna Bridge	169:a7c7b631e539	748	#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Anna Bridge	169:a7c7b631e539	749	// without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge	169:a7c7b631e539	750	(void)MainStackPtrLimit;
Anna Bridge	169:a7c7b631e539	751	#else
AnnaBridge	145:64910690c574	752	__ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
Anna Bridge	169:a7c7b631e539	753	#endif
AnnaBridge	145:64910690c574	754	}
AnnaBridge	145:64910690c574	755	#endif
AnnaBridge	145:64910690c574	756
AnnaBridge	145:64910690c574	757	#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	145:64910690c574	758	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge	145:64910690c574	759
AnnaBridge	145:64910690c574	760
AnnaBridge	145:64910690c574	761	#if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	762	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	145:64910690c574	763
AnnaBridge	145:64910690c574	764	/**
AnnaBridge	145:64910690c574	765	\brief Get FPSCR
AnnaBridge	145:64910690c574	766	\details Returns the current value of the Floating Point Status/Control register.
AnnaBridge	145:64910690c574	767	\return Floating Point Status/Control register value
AnnaBridge	145:64910690c574	768	*/
Anna Bridge	169:a7c7b631e539	769	__STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
AnnaBridge	145:64910690c574	770	{
AnnaBridge	145:64910690c574	771	#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge	145:64910690c574	772	(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Anna Bridge	160:5571c4ff569f	773	#if __has_builtin(__builtin_arm_get_fpscr) \|\| (__GNUC__ > 7) \|\| (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
Anna Bridge	160:5571c4ff569f	774	/* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
Anna Bridge	160:5571c4ff569f	775	return __builtin_arm_get_fpscr();
Anna Bridge	160:5571c4ff569f	776	#else
AnnaBridge	145:64910690c574	777	uint32_t result;
AnnaBridge	145:64910690c574	778
AnnaBridge	145:64910690c574	779	__ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
AnnaBridge	145:64910690c574	780	return(result);
Anna Bridge	160:5571c4ff569f	781	#endif
AnnaBridge	145:64910690c574	782	#else
Anna Bridge	160:5571c4ff569f	783	return(0U);
AnnaBridge	145:64910690c574	784	#endif
AnnaBridge	145:64910690c574	785	}
AnnaBridge	145:64910690c574	786
AnnaBridge	145:64910690c574	787
AnnaBridge	145:64910690c574	788	/**
AnnaBridge	145:64910690c574	789	\brief Set FPSCR
AnnaBridge	145:64910690c574	790	\details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge	145:64910690c574	791	\param [in] fpscr Floating Point Status/Control value to set
AnnaBridge	145:64910690c574	792	*/
Anna Bridge	169:a7c7b631e539	793	__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
AnnaBridge	145:64910690c574	794	{
AnnaBridge	145:64910690c574	795	#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge	145:64910690c574	796	(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Anna Bridge	160:5571c4ff569f	797	#if __has_builtin(__builtin_arm_set_fpscr) \|\| (__GNUC__ > 7) \|\| (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
Anna Bridge	160:5571c4ff569f	798	/* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
Anna Bridge	160:5571c4ff569f	799	__builtin_arm_set_fpscr(fpscr);
Anna Bridge	160:5571c4ff569f	800	#else
AnnaBridge	145:64910690c574	801	__ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
Anna Bridge	160:5571c4ff569f	802	#endif
AnnaBridge	145:64910690c574	803	#else
AnnaBridge	145:64910690c574	804	(void)fpscr;
AnnaBridge	145:64910690c574	805	#endif
AnnaBridge	145:64910690c574	806	}
AnnaBridge	145:64910690c574	807
AnnaBridge	145:64910690c574	808	#endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	809	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge	145:64910690c574	810
AnnaBridge	145:64910690c574	811
AnnaBridge	145:64910690c574	812
AnnaBridge	145:64910690c574	813	/@} end of CMSIS_Core_RegAccFunctions /
AnnaBridge	145:64910690c574	814
AnnaBridge	145:64910690c574	815
AnnaBridge	145:64910690c574	816	/* ########################## Core Instruction Access ######################### */
AnnaBridge	145:64910690c574	817	/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge	145:64910690c574	818	Access to dedicated instructions
AnnaBridge	145:64910690c574	819	@{
AnnaBridge	145:64910690c574	820	*/
AnnaBridge	145:64910690c574	821
AnnaBridge	145:64910690c574	822	/* Define macros for porting to both thumb1 and thumb2.
AnnaBridge	145:64910690c574	823	* For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge	145:64910690c574	824	* Otherwise, use general registers, specified by constraint "r" */
AnnaBridge	145:64910690c574	825	#if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge	145:64910690c574	826	#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge	145:64910690c574	827	#define __CMSIS_GCC_RW_REG(r) "+l" (r)
AnnaBridge	145:64910690c574	828	#define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge	145:64910690c574	829	#else
AnnaBridge	145:64910690c574	830	#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge	145:64910690c574	831	#define __CMSIS_GCC_RW_REG(r) "+r" (r)
AnnaBridge	145:64910690c574	832	#define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge	145:64910690c574	833	#endif
AnnaBridge	145:64910690c574	834
AnnaBridge	145:64910690c574	835	/**
AnnaBridge	145:64910690c574	836	\brief No Operation
AnnaBridge	145:64910690c574	837	\details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge	145:64910690c574	838	*/
Anna Bridge	169:a7c7b631e539	839	#define __NOP() __ASM volatile ("nop")
AnnaBridge	145:64910690c574	840
AnnaBridge	145:64910690c574	841	/**
AnnaBridge	145:64910690c574	842	\brief Wait For Interrupt
AnnaBridge	145:64910690c574	843	\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge	145:64910690c574	844	*/
Anna Bridge	169:a7c7b631e539	845	#define __WFI() __ASM volatile ("wfi")
AnnaBridge	145:64910690c574	846
AnnaBridge	145:64910690c574	847
AnnaBridge	145:64910690c574	848	/**
AnnaBridge	145:64910690c574	849	\brief Wait For Event
AnnaBridge	145:64910690c574	850	\details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge	145:64910690c574	851	a low-power state until one of a number of events occurs.
AnnaBridge	145:64910690c574	852	*/
Anna Bridge	169:a7c7b631e539	853	#define __WFE() __ASM volatile ("wfe")
AnnaBridge	145:64910690c574	854
AnnaBridge	145:64910690c574	855
AnnaBridge	145:64910690c574	856	/**
AnnaBridge	145:64910690c574	857	\brief Send Event
AnnaBridge	145:64910690c574	858	\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge	145:64910690c574	859	*/
Anna Bridge	169:a7c7b631e539	860	#define __SEV() __ASM volatile ("sev")
AnnaBridge	145:64910690c574	861
AnnaBridge	145:64910690c574	862
AnnaBridge	145:64910690c574	863	/**
AnnaBridge	145:64910690c574	864	\brief Instruction Synchronization Barrier
AnnaBridge	145:64910690c574	865	\details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge	145:64910690c574	866	so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge	145:64910690c574	867	after the instruction has been completed.
AnnaBridge	145:64910690c574	868	*/
Anna Bridge	169:a7c7b631e539	869	__STATIC_FORCEINLINE void __ISB(void)
AnnaBridge	145:64910690c574	870	{
AnnaBridge	145:64910690c574	871	__ASM volatile ("isb 0xF":::"memory");
AnnaBridge	145:64910690c574	872	}
AnnaBridge	145:64910690c574	873
AnnaBridge	145:64910690c574	874
AnnaBridge	145:64910690c574	875	/**
AnnaBridge	145:64910690c574	876	\brief Data Synchronization Barrier
AnnaBridge	145:64910690c574	877	\details Acts as a special kind of Data Memory Barrier.
AnnaBridge	145:64910690c574	878	It completes when all explicit memory accesses before this instruction complete.
AnnaBridge	145:64910690c574	879	*/
Anna Bridge	169:a7c7b631e539	880	__STATIC_FORCEINLINE void __DSB(void)
AnnaBridge	145:64910690c574	881	{
AnnaBridge	145:64910690c574	882	__ASM volatile ("dsb 0xF":::"memory");
AnnaBridge	145:64910690c574	883	}
AnnaBridge	145:64910690c574	884
AnnaBridge	145:64910690c574	885
AnnaBridge	145:64910690c574	886	/**
AnnaBridge	145:64910690c574	887	\brief Data Memory Barrier
AnnaBridge	145:64910690c574	888	\details Ensures the apparent order of the explicit memory operations before
AnnaBridge	145:64910690c574	889	and after the instruction, without ensuring their completion.
AnnaBridge	145:64910690c574	890	*/
Anna Bridge	169:a7c7b631e539	891	__STATIC_FORCEINLINE void __DMB(void)
AnnaBridge	145:64910690c574	892	{
AnnaBridge	145:64910690c574	893	__ASM volatile ("dmb 0xF":::"memory");
AnnaBridge	145:64910690c574	894	}
AnnaBridge	145:64910690c574	895
AnnaBridge	145:64910690c574	896
AnnaBridge	145:64910690c574	897	/**
AnnaBridge	145:64910690c574	898	\brief Reverse byte order (32 bit)
Anna Bridge	169:a7c7b631e539	899	\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
AnnaBridge	145:64910690c574	900	\param [in] value Value to reverse
AnnaBridge	145:64910690c574	901	\return Reversed value
AnnaBridge	145:64910690c574	902	*/
Anna Bridge	169:a7c7b631e539	903	__STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
AnnaBridge	145:64910690c574	904	{
AnnaBridge	145:64910690c574	905	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
AnnaBridge	145:64910690c574	906	return __builtin_bswap32(value);
AnnaBridge	145:64910690c574	907	#else
AnnaBridge	145:64910690c574	908	uint32_t result;
AnnaBridge	145:64910690c574	909
AnnaBridge	145:64910690c574	910	__ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Anna Bridge	169:a7c7b631e539	911	return result;
AnnaBridge	145:64910690c574	912	#endif
AnnaBridge	145:64910690c574	913	}
AnnaBridge	145:64910690c574	914
AnnaBridge	145:64910690c574	915
AnnaBridge	145:64910690c574	916	/**
AnnaBridge	145:64910690c574	917	\brief Reverse byte order (16 bit)
Anna Bridge	169:a7c7b631e539	918	\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
AnnaBridge	145:64910690c574	919	\param [in] value Value to reverse
AnnaBridge	145:64910690c574	920	\return Reversed value
AnnaBridge	145:64910690c574	921	*/
Anna Bridge	169:a7c7b631e539	922	__STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
AnnaBridge	145:64910690c574	923	{
Anna Bridge	169:a7c7b631e539	924	uint32_t result;
AnnaBridge	145:64910690c574	925
AnnaBridge	145:64910690c574	926	__ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Anna Bridge	169:a7c7b631e539	927	return result;
AnnaBridge	145:64910690c574	928	}
AnnaBridge	145:64910690c574	929
AnnaBridge	145:64910690c574	930
AnnaBridge	145:64910690c574	931	/**
Anna Bridge	169:a7c7b631e539	932	\brief Reverse byte order (16 bit)
Anna Bridge	169:a7c7b631e539	933	\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
AnnaBridge	145:64910690c574	934	\param [in] value Value to reverse
AnnaBridge	145:64910690c574	935	\return Reversed value
AnnaBridge	145:64910690c574	936	*/
Anna Bridge	169:a7c7b631e539	937	__STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
AnnaBridge	145:64910690c574	938	{
AnnaBridge	145:64910690c574	939	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Anna Bridge	160:5571c4ff569f	940	return (int16_t)__builtin_bswap16(value);
AnnaBridge	145:64910690c574	941	#else
Anna Bridge	160:5571c4ff569f	942	int16_t result;
AnnaBridge	145:64910690c574	943
AnnaBridge	145:64910690c574	944	__ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Anna Bridge	160:5571c4ff569f	945	return result;
AnnaBridge	145:64910690c574	946	#endif
AnnaBridge	145:64910690c574	947	}
AnnaBridge	145:64910690c574	948
AnnaBridge	145:64910690c574	949
AnnaBridge	145:64910690c574	950	/**
AnnaBridge	145:64910690c574	951	\brief Rotate Right in unsigned value (32 bit)
AnnaBridge	145:64910690c574	952	\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge	145:64910690c574	953	\param [in] op1 Value to rotate
AnnaBridge	145:64910690c574	954	\param [in] op2 Number of Bits to rotate
AnnaBridge	145:64910690c574	955	\return Rotated value
AnnaBridge	145:64910690c574	956	*/
Anna Bridge	169:a7c7b631e539	957	__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	958	{
Anna Bridge	169:a7c7b631e539	959	op2 %= 32U;
Anna Bridge	169:a7c7b631e539	960	if (op2 == 0U)
Anna Bridge	169:a7c7b631e539	961	{
Anna Bridge	169:a7c7b631e539	962	return op1;
Anna Bridge	169:a7c7b631e539	963	}
AnnaBridge	145:64910690c574	964	return (op1 >> op2) \| (op1 << (32U - op2));
AnnaBridge	145:64910690c574	965	}
AnnaBridge	145:64910690c574	966
AnnaBridge	145:64910690c574	967
AnnaBridge	145:64910690c574	968	/**
AnnaBridge	145:64910690c574	969	\brief Breakpoint
AnnaBridge	145:64910690c574	970	\details Causes the processor to enter Debug state.
AnnaBridge	145:64910690c574	971	Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge	145:64910690c574	972	\param [in] value is ignored by the processor.
AnnaBridge	145:64910690c574	973	If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge	145:64910690c574	974	*/
AnnaBridge	145:64910690c574	975	#define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge	145:64910690c574	976
AnnaBridge	145:64910690c574	977
AnnaBridge	145:64910690c574	978	/**
AnnaBridge	145:64910690c574	979	\brief Reverse bit order of value
AnnaBridge	145:64910690c574	980	\details Reverses the bit order of the given value.
AnnaBridge	145:64910690c574	981	\param [in] value Value to reverse
AnnaBridge	145:64910690c574	982	\return Reversed value
AnnaBridge	145:64910690c574	983	*/
Anna Bridge	169:a7c7b631e539	984	__STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
AnnaBridge	145:64910690c574	985	{
AnnaBridge	145:64910690c574	986	uint32_t result;
AnnaBridge	145:64910690c574	987
AnnaBridge	145:64910690c574	988	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	145:64910690c574	989	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	990	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	145:64910690c574	991	__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
AnnaBridge	145:64910690c574	992	#else
Anna Bridge	160:5571c4ff569f	993	uint32_t s = (4U /sizeof(v)/ * 8U) - 1U; /* extra shift needed at end */
AnnaBridge	145:64910690c574	994
AnnaBridge	145:64910690c574	995	result = value; /* r will be reversed bits of v; first get LSB of v */
Anna Bridge	160:5571c4ff569f	996	for (value >>= 1U; value != 0U; value >>= 1U)
AnnaBridge	145:64910690c574	997	{
AnnaBridge	145:64910690c574	998	result <<= 1U;
AnnaBridge	145:64910690c574	999	result \|= value & 1U;
AnnaBridge	145:64910690c574	1000	s--;
AnnaBridge	145:64910690c574	1001	}
AnnaBridge	145:64910690c574	1002	result <<= s; /* shift when v's highest bits are zero */
AnnaBridge	145:64910690c574	1003	#endif
Anna Bridge	160:5571c4ff569f	1004	return result;
AnnaBridge	145:64910690c574	1005	}
AnnaBridge	145:64910690c574	1006
AnnaBridge	145:64910690c574	1007
AnnaBridge	145:64910690c574	1008	/**
AnnaBridge	145:64910690c574	1009	\brief Count leading zeros
AnnaBridge	145:64910690c574	1010	\details Counts the number of leading zeros of a data value.
AnnaBridge	145:64910690c574	1011	\param [in] value Value to count the leading zeros
AnnaBridge	145:64910690c574	1012	\return number of leading zeros in value
AnnaBridge	145:64910690c574	1013	*/
Anna Bridge	169:a7c7b631e539	1014	#define __CLZ (uint8_t)__builtin_clz
AnnaBridge	145:64910690c574	1015
AnnaBridge	145:64910690c574	1016
AnnaBridge	145:64910690c574	1017	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1018	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1019	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1020	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge	145:64910690c574	1021	/**
AnnaBridge	145:64910690c574	1022	\brief LDR Exclusive (8 bit)
AnnaBridge	145:64910690c574	1023	\details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge	145:64910690c574	1024	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1025	\return value of type uint8_t at (*ptr)
AnnaBridge	145:64910690c574	1026	*/
Anna Bridge	169:a7c7b631e539	1027	__STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
AnnaBridge	145:64910690c574	1028	{
AnnaBridge	145:64910690c574	1029	uint32_t result;
AnnaBridge	145:64910690c574	1030
AnnaBridge	145:64910690c574	1031	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge	145:64910690c574	1032	__ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge	145:64910690c574	1033	#else
AnnaBridge	145:64910690c574	1034	/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge	145:64910690c574	1035	accepted by assembler. So has to use following less efficient pattern.
AnnaBridge	145:64910690c574	1036	*/
AnnaBridge	145:64910690c574	1037	__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
AnnaBridge	145:64910690c574	1038	#endif
AnnaBridge	145:64910690c574	1039	return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge	145:64910690c574	1040	}
AnnaBridge	145:64910690c574	1041
AnnaBridge	145:64910690c574	1042
AnnaBridge	145:64910690c574	1043	/**
AnnaBridge	145:64910690c574	1044	\brief LDR Exclusive (16 bit)
AnnaBridge	145:64910690c574	1045	\details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge	145:64910690c574	1046	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1047	\return value of type uint16_t at (*ptr)
AnnaBridge	145:64910690c574	1048	*/
Anna Bridge	169:a7c7b631e539	1049	__STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
AnnaBridge	145:64910690c574	1050	{
AnnaBridge	145:64910690c574	1051	uint32_t result;
AnnaBridge	145:64910690c574	1052
AnnaBridge	145:64910690c574	1053	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge	145:64910690c574	1054	__ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge	145:64910690c574	1055	#else
AnnaBridge	145:64910690c574	1056	/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge	145:64910690c574	1057	accepted by assembler. So has to use following less efficient pattern.
AnnaBridge	145:64910690c574	1058	*/
AnnaBridge	145:64910690c574	1059	__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
AnnaBridge	145:64910690c574	1060	#endif
AnnaBridge	145:64910690c574	1061	return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge	145:64910690c574	1062	}
AnnaBridge	145:64910690c574	1063
AnnaBridge	145:64910690c574	1064
AnnaBridge	145:64910690c574	1065	/**
AnnaBridge	145:64910690c574	1066	\brief LDR Exclusive (32 bit)
AnnaBridge	145:64910690c574	1067	\details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge	145:64910690c574	1068	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1069	\return value of type uint32_t at (*ptr)
AnnaBridge	145:64910690c574	1070	*/
Anna Bridge	169:a7c7b631e539	1071	__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
AnnaBridge	145:64910690c574	1072	{
AnnaBridge	145:64910690c574	1073	uint32_t result;
AnnaBridge	145:64910690c574	1074
AnnaBridge	145:64910690c574	1075	__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge	145:64910690c574	1076	return(result);
AnnaBridge	145:64910690c574	1077	}
AnnaBridge	145:64910690c574	1078
AnnaBridge	145:64910690c574	1079
AnnaBridge	145:64910690c574	1080	/**
AnnaBridge	145:64910690c574	1081	\brief STR Exclusive (8 bit)
AnnaBridge	145:64910690c574	1082	\details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge	145:64910690c574	1083	\param [in] value Value to store
AnnaBridge	145:64910690c574	1084	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1085	\return 0 Function succeeded
AnnaBridge	145:64910690c574	1086	\return 1 Function failed
AnnaBridge	145:64910690c574	1087	*/
Anna Bridge	169:a7c7b631e539	1088	__STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
AnnaBridge	145:64910690c574	1089	{
AnnaBridge	145:64910690c574	1090	uint32_t result;
AnnaBridge	145:64910690c574	1091
AnnaBridge	145:64910690c574	1092	__ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1093	return(result);
AnnaBridge	145:64910690c574	1094	}
AnnaBridge	145:64910690c574	1095
AnnaBridge	145:64910690c574	1096
AnnaBridge	145:64910690c574	1097	/**
AnnaBridge	145:64910690c574	1098	\brief STR Exclusive (16 bit)
AnnaBridge	145:64910690c574	1099	\details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge	145:64910690c574	1100	\param [in] value Value to store
AnnaBridge	145:64910690c574	1101	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1102	\return 0 Function succeeded
AnnaBridge	145:64910690c574	1103	\return 1 Function failed
AnnaBridge	145:64910690c574	1104	*/
Anna Bridge	169:a7c7b631e539	1105	__STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
AnnaBridge	145:64910690c574	1106	{
AnnaBridge	145:64910690c574	1107	uint32_t result;
AnnaBridge	145:64910690c574	1108
AnnaBridge	145:64910690c574	1109	__ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1110	return(result);
AnnaBridge	145:64910690c574	1111	}
AnnaBridge	145:64910690c574	1112
AnnaBridge	145:64910690c574	1113
AnnaBridge	145:64910690c574	1114	/**
AnnaBridge	145:64910690c574	1115	\brief STR Exclusive (32 bit)
AnnaBridge	145:64910690c574	1116	\details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge	145:64910690c574	1117	\param [in] value Value to store
AnnaBridge	145:64910690c574	1118	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1119	\return 0 Function succeeded
AnnaBridge	145:64910690c574	1120	\return 1 Function failed
AnnaBridge	145:64910690c574	1121	*/
Anna Bridge	169:a7c7b631e539	1122	__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
AnnaBridge	145:64910690c574	1123	{
AnnaBridge	145:64910690c574	1124	uint32_t result;
AnnaBridge	145:64910690c574	1125
AnnaBridge	145:64910690c574	1126	__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
AnnaBridge	145:64910690c574	1127	return(result);
AnnaBridge	145:64910690c574	1128	}
AnnaBridge	145:64910690c574	1129
AnnaBridge	145:64910690c574	1130
AnnaBridge	145:64910690c574	1131	/**
AnnaBridge	145:64910690c574	1132	\brief Remove the exclusive lock
AnnaBridge	145:64910690c574	1133	\details Removes the exclusive lock which is created by LDREX.
AnnaBridge	145:64910690c574	1134	*/
Anna Bridge	169:a7c7b631e539	1135	__STATIC_FORCEINLINE void __CLREX(void)
AnnaBridge	145:64910690c574	1136	{
AnnaBridge	145:64910690c574	1137	__ASM volatile ("clrex" ::: "memory");
AnnaBridge	145:64910690c574	1138	}
AnnaBridge	145:64910690c574	1139
AnnaBridge	145:64910690c574	1140	#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1141	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1142	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1143	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge	145:64910690c574	1144
AnnaBridge	145:64910690c574	1145
AnnaBridge	145:64910690c574	1146	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1147	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1148	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	145:64910690c574	1149	/**
AnnaBridge	145:64910690c574	1150	\brief Signed Saturate
AnnaBridge	145:64910690c574	1151	\details Saturates a signed value.
Anna Bridge	160:5571c4ff569f	1152	\param [in] ARG1 Value to be saturated
Anna Bridge	160:5571c4ff569f	1153	\param [in] ARG2 Bit position to saturate to (1..32)
AnnaBridge	145:64910690c574	1154	\return Saturated value
AnnaBridge	145:64910690c574	1155	*/
AnnaBridge	145:64910690c574	1156	#define __SSAT(ARG1,ARG2) \
Anna Bridge	160:5571c4ff569f	1157	__extension__ \
AnnaBridge	145:64910690c574	1158	({ \
AnnaBridge	145:64910690c574	1159	int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge	145:64910690c574	1160	__ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge	145:64910690c574	1161	__RES; \
AnnaBridge	145:64910690c574	1162	})
AnnaBridge	145:64910690c574	1163
AnnaBridge	145:64910690c574	1164
AnnaBridge	145:64910690c574	1165	/**
AnnaBridge	145:64910690c574	1166	\brief Unsigned Saturate
AnnaBridge	145:64910690c574	1167	\details Saturates an unsigned value.
Anna Bridge	160:5571c4ff569f	1168	\param [in] ARG1 Value to be saturated
Anna Bridge	160:5571c4ff569f	1169	\param [in] ARG2 Bit position to saturate to (0..31)
AnnaBridge	145:64910690c574	1170	\return Saturated value
AnnaBridge	145:64910690c574	1171	*/
AnnaBridge	145:64910690c574	1172	#define __USAT(ARG1,ARG2) \
Anna Bridge	160:5571c4ff569f	1173	__extension__ \
AnnaBridge	145:64910690c574	1174	({ \
AnnaBridge	145:64910690c574	1175	uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge	145:64910690c574	1176	__ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge	145:64910690c574	1177	__RES; \
AnnaBridge	145:64910690c574	1178	})
AnnaBridge	145:64910690c574	1179
AnnaBridge	145:64910690c574	1180
AnnaBridge	145:64910690c574	1181	/**
AnnaBridge	145:64910690c574	1182	\brief Rotate Right with Extend (32 bit)
AnnaBridge	145:64910690c574	1183	\details Moves each bit of a bitstring right by one bit.
AnnaBridge	145:64910690c574	1184	The carry input is shifted in at the left end of the bitstring.
AnnaBridge	145:64910690c574	1185	\param [in] value Value to rotate
AnnaBridge	145:64910690c574	1186	\return Rotated value
AnnaBridge	145:64910690c574	1187	*/
Anna Bridge	169:a7c7b631e539	1188	__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
AnnaBridge	145:64910690c574	1189	{
AnnaBridge	145:64910690c574	1190	uint32_t result;
AnnaBridge	145:64910690c574	1191
AnnaBridge	145:64910690c574	1192	__ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge	145:64910690c574	1193	return(result);
AnnaBridge	145:64910690c574	1194	}
AnnaBridge	145:64910690c574	1195
AnnaBridge	145:64910690c574	1196
AnnaBridge	145:64910690c574	1197	/**
AnnaBridge	145:64910690c574	1198	\brief LDRT Unprivileged (8 bit)
AnnaBridge	145:64910690c574	1199	\details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge	145:64910690c574	1200	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1201	\return value of type uint8_t at (*ptr)
AnnaBridge	145:64910690c574	1202	*/
Anna Bridge	169:a7c7b631e539	1203	__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge	145:64910690c574	1204	{
AnnaBridge	145:64910690c574	1205	uint32_t result;
AnnaBridge	145:64910690c574	1206
AnnaBridge	145:64910690c574	1207	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge	145:64910690c574	1208	__ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	1209	#else
AnnaBridge	145:64910690c574	1210	/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge	145:64910690c574	1211	accepted by assembler. So has to use following less efficient pattern.
AnnaBridge	145:64910690c574	1212	*/
AnnaBridge	145:64910690c574	1213	__ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
AnnaBridge	145:64910690c574	1214	#endif
AnnaBridge	145:64910690c574	1215	return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge	145:64910690c574	1216	}
AnnaBridge	145:64910690c574	1217
AnnaBridge	145:64910690c574	1218
AnnaBridge	145:64910690c574	1219	/**
AnnaBridge	145:64910690c574	1220	\brief LDRT Unprivileged (16 bit)
AnnaBridge	145:64910690c574	1221	\details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge	145:64910690c574	1222	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1223	\return value of type uint16_t at (*ptr)
AnnaBridge	145:64910690c574	1224	*/
Anna Bridge	169:a7c7b631e539	1225	__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge	145:64910690c574	1226	{
AnnaBridge	145:64910690c574	1227	uint32_t result;
AnnaBridge	145:64910690c574	1228
AnnaBridge	145:64910690c574	1229	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge	145:64910690c574	1230	__ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	1231	#else
AnnaBridge	145:64910690c574	1232	/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge	145:64910690c574	1233	accepted by assembler. So has to use following less efficient pattern.
AnnaBridge	145:64910690c574	1234	*/
AnnaBridge	145:64910690c574	1235	__ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
AnnaBridge	145:64910690c574	1236	#endif
AnnaBridge	145:64910690c574	1237	return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge	145:64910690c574	1238	}
AnnaBridge	145:64910690c574	1239
AnnaBridge	145:64910690c574	1240
AnnaBridge	145:64910690c574	1241	/**
AnnaBridge	145:64910690c574	1242	\brief LDRT Unprivileged (32 bit)
AnnaBridge	145:64910690c574	1243	\details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge	145:64910690c574	1244	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1245	\return value of type uint32_t at (*ptr)
AnnaBridge	145:64910690c574	1246	*/
Anna Bridge	169:a7c7b631e539	1247	__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge	145:64910690c574	1248	{
AnnaBridge	145:64910690c574	1249	uint32_t result;
AnnaBridge	145:64910690c574	1250
AnnaBridge	145:64910690c574	1251	__ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	1252	return(result);
AnnaBridge	145:64910690c574	1253	}
AnnaBridge	145:64910690c574	1254
AnnaBridge	145:64910690c574	1255
AnnaBridge	145:64910690c574	1256	/**
AnnaBridge	145:64910690c574	1257	\brief STRT Unprivileged (8 bit)
AnnaBridge	145:64910690c574	1258	\details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge	145:64910690c574	1259	\param [in] value Value to store
AnnaBridge	145:64910690c574	1260	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1261	*/
Anna Bridge	169:a7c7b631e539	1262	__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge	145:64910690c574	1263	{
AnnaBridge	145:64910690c574	1264	__ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1265	}
AnnaBridge	145:64910690c574	1266
AnnaBridge	145:64910690c574	1267
AnnaBridge	145:64910690c574	1268	/**
AnnaBridge	145:64910690c574	1269	\brief STRT Unprivileged (16 bit)
AnnaBridge	145:64910690c574	1270	\details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge	145:64910690c574	1271	\param [in] value Value to store
AnnaBridge	145:64910690c574	1272	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1273	*/
Anna Bridge	169:a7c7b631e539	1274	__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge	145:64910690c574	1275	{
AnnaBridge	145:64910690c574	1276	__ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1277	}
AnnaBridge	145:64910690c574	1278
AnnaBridge	145:64910690c574	1279
AnnaBridge	145:64910690c574	1280	/**
AnnaBridge	145:64910690c574	1281	\brief STRT Unprivileged (32 bit)
AnnaBridge	145:64910690c574	1282	\details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge	145:64910690c574	1283	\param [in] value Value to store
AnnaBridge	145:64910690c574	1284	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1285	*/
Anna Bridge	169:a7c7b631e539	1286	__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge	145:64910690c574	1287	{
AnnaBridge	145:64910690c574	1288	__ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge	145:64910690c574	1289	}
AnnaBridge	145:64910690c574	1290
Anna Bridge	160:5571c4ff569f	1291	#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
Anna Bridge	160:5571c4ff569f	1292	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
Anna Bridge	160:5571c4ff569f	1293	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
Anna Bridge	160:5571c4ff569f	1294
Anna Bridge	160:5571c4ff569f	1295	/**
Anna Bridge	160:5571c4ff569f	1296	\brief Signed Saturate
Anna Bridge	160:5571c4ff569f	1297	\details Saturates a signed value.
Anna Bridge	160:5571c4ff569f	1298	\param [in] value Value to be saturated
Anna Bridge	160:5571c4ff569f	1299	\param [in] sat Bit position to saturate to (1..32)
Anna Bridge	160:5571c4ff569f	1300	\return Saturated value
Anna Bridge	160:5571c4ff569f	1301	*/
Anna Bridge	169:a7c7b631e539	1302	__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
Anna Bridge	160:5571c4ff569f	1303	{
Anna Bridge	169:a7c7b631e539	1304	if ((sat >= 1U) && (sat <= 32U))
Anna Bridge	169:a7c7b631e539	1305	{
Anna Bridge	160:5571c4ff569f	1306	const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
Anna Bridge	160:5571c4ff569f	1307	const int32_t min = -1 - max ;
Anna Bridge	169:a7c7b631e539	1308	if (val > max)
Anna Bridge	169:a7c7b631e539	1309	{
Anna Bridge	160:5571c4ff569f	1310	return max;
Anna Bridge	169:a7c7b631e539	1311	}
Anna Bridge	169:a7c7b631e539	1312	else if (val < min)
Anna Bridge	169:a7c7b631e539	1313	{
Anna Bridge	160:5571c4ff569f	1314	return min;
Anna Bridge	160:5571c4ff569f	1315	}
Anna Bridge	160:5571c4ff569f	1316	}
Anna Bridge	160:5571c4ff569f	1317	return val;
Anna Bridge	160:5571c4ff569f	1318	}
Anna Bridge	160:5571c4ff569f	1319
Anna Bridge	160:5571c4ff569f	1320	/**
Anna Bridge	160:5571c4ff569f	1321	\brief Unsigned Saturate
Anna Bridge	160:5571c4ff569f	1322	\details Saturates an unsigned value.
Anna Bridge	160:5571c4ff569f	1323	\param [in] value Value to be saturated
Anna Bridge	160:5571c4ff569f	1324	\param [in] sat Bit position to saturate to (0..31)
Anna Bridge	160:5571c4ff569f	1325	\return Saturated value
Anna Bridge	160:5571c4ff569f	1326	*/
Anna Bridge	169:a7c7b631e539	1327	__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
Anna Bridge	160:5571c4ff569f	1328	{
Anna Bridge	169:a7c7b631e539	1329	if (sat <= 31U)
Anna Bridge	169:a7c7b631e539	1330	{
Anna Bridge	160:5571c4ff569f	1331	const uint32_t max = ((1U << sat) - 1U);
Anna Bridge	169:a7c7b631e539	1332	if (val > (int32_t)max)
Anna Bridge	169:a7c7b631e539	1333	{
Anna Bridge	160:5571c4ff569f	1334	return max;
Anna Bridge	169:a7c7b631e539	1335	}
Anna Bridge	169:a7c7b631e539	1336	else if (val < 0)
Anna Bridge	169:a7c7b631e539	1337	{
Anna Bridge	160:5571c4ff569f	1338	return 0U;
Anna Bridge	160:5571c4ff569f	1339	}
Anna Bridge	160:5571c4ff569f	1340	}
Anna Bridge	160:5571c4ff569f	1341	return (uint32_t)val;
Anna Bridge	160:5571c4ff569f	1342	}
Anna Bridge	160:5571c4ff569f	1343
AnnaBridge	145:64910690c574	1344	#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1345	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1346	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge	145:64910690c574	1347
AnnaBridge	145:64910690c574	1348
AnnaBridge	145:64910690c574	1349	#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1350	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge	145:64910690c574	1351	/**
AnnaBridge	145:64910690c574	1352	\brief Load-Acquire (8 bit)
AnnaBridge	145:64910690c574	1353	\details Executes a LDAB instruction for 8 bit value.
AnnaBridge	145:64910690c574	1354	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1355	\return value of type uint8_t at (*ptr)
AnnaBridge	145:64910690c574	1356	*/
Anna Bridge	169:a7c7b631e539	1357	__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge	145:64910690c574	1358	{
AnnaBridge	145:64910690c574	1359	uint32_t result;
AnnaBridge	145:64910690c574	1360
AnnaBridge	145:64910690c574	1361	__ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	1362	return ((uint8_t) result);
AnnaBridge	145:64910690c574	1363	}
AnnaBridge	145:64910690c574	1364
AnnaBridge	145:64910690c574	1365
AnnaBridge	145:64910690c574	1366	/**
AnnaBridge	145:64910690c574	1367	\brief Load-Acquire (16 bit)
AnnaBridge	145:64910690c574	1368	\details Executes a LDAH instruction for 16 bit values.
AnnaBridge	145:64910690c574	1369	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1370	\return value of type uint16_t at (*ptr)
AnnaBridge	145:64910690c574	1371	*/
Anna Bridge	169:a7c7b631e539	1372	__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge	145:64910690c574	1373	{
AnnaBridge	145:64910690c574	1374	uint32_t result;
AnnaBridge	145:64910690c574	1375
AnnaBridge	145:64910690c574	1376	__ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	1377	return ((uint16_t) result);
AnnaBridge	145:64910690c574	1378	}
AnnaBridge	145:64910690c574	1379
AnnaBridge	145:64910690c574	1380
AnnaBridge	145:64910690c574	1381	/**
AnnaBridge	145:64910690c574	1382	\brief Load-Acquire (32 bit)
AnnaBridge	145:64910690c574	1383	\details Executes a LDA instruction for 32 bit values.
AnnaBridge	145:64910690c574	1384	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1385	\return value of type uint32_t at (*ptr)
AnnaBridge	145:64910690c574	1386	*/
Anna Bridge	169:a7c7b631e539	1387	__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge	145:64910690c574	1388	{
AnnaBridge	145:64910690c574	1389	uint32_t result;
AnnaBridge	145:64910690c574	1390
AnnaBridge	145:64910690c574	1391	__ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	1392	return(result);
AnnaBridge	145:64910690c574	1393	}
AnnaBridge	145:64910690c574	1394
AnnaBridge	145:64910690c574	1395
AnnaBridge	145:64910690c574	1396	/**
AnnaBridge	145:64910690c574	1397	\brief Store-Release (8 bit)
AnnaBridge	145:64910690c574	1398	\details Executes a STLB instruction for 8 bit values.
AnnaBridge	145:64910690c574	1399	\param [in] value Value to store
AnnaBridge	145:64910690c574	1400	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1401	*/
Anna Bridge	169:a7c7b631e539	1402	__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge	145:64910690c574	1403	{
AnnaBridge	145:64910690c574	1404	__ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1405	}
AnnaBridge	145:64910690c574	1406
AnnaBridge	145:64910690c574	1407
AnnaBridge	145:64910690c574	1408	/**
AnnaBridge	145:64910690c574	1409	\brief Store-Release (16 bit)
AnnaBridge	145:64910690c574	1410	\details Executes a STLH instruction for 16 bit values.
AnnaBridge	145:64910690c574	1411	\param [in] value Value to store
AnnaBridge	145:64910690c574	1412	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1413	*/
Anna Bridge	169:a7c7b631e539	1414	__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge	145:64910690c574	1415	{
AnnaBridge	145:64910690c574	1416	__ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1417	}
AnnaBridge	145:64910690c574	1418
AnnaBridge	145:64910690c574	1419
AnnaBridge	145:64910690c574	1420	/**
AnnaBridge	145:64910690c574	1421	\brief Store-Release (32 bit)
AnnaBridge	145:64910690c574	1422	\details Executes a STL instruction for 32 bit values.
AnnaBridge	145:64910690c574	1423	\param [in] value Value to store
AnnaBridge	145:64910690c574	1424	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1425	*/
Anna Bridge	169:a7c7b631e539	1426	__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge	145:64910690c574	1427	{
AnnaBridge	145:64910690c574	1428	__ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1429	}
AnnaBridge	145:64910690c574	1430
AnnaBridge	145:64910690c574	1431
AnnaBridge	145:64910690c574	1432	/**
AnnaBridge	145:64910690c574	1433	\brief Load-Acquire Exclusive (8 bit)
AnnaBridge	145:64910690c574	1434	\details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge	145:64910690c574	1435	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1436	\return value of type uint8_t at (*ptr)
AnnaBridge	145:64910690c574	1437	*/
Anna Bridge	169:a7c7b631e539	1438	__STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
AnnaBridge	145:64910690c574	1439	{
AnnaBridge	145:64910690c574	1440	uint32_t result;
AnnaBridge	145:64910690c574	1441
AnnaBridge	145:64910690c574	1442	__ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	1443	return ((uint8_t) result);
AnnaBridge	145:64910690c574	1444	}
AnnaBridge	145:64910690c574	1445
AnnaBridge	145:64910690c574	1446
AnnaBridge	145:64910690c574	1447	/**
AnnaBridge	145:64910690c574	1448	\brief Load-Acquire Exclusive (16 bit)
AnnaBridge	145:64910690c574	1449	\details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge	145:64910690c574	1450	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1451	\return value of type uint16_t at (*ptr)
AnnaBridge	145:64910690c574	1452	*/
Anna Bridge	169:a7c7b631e539	1453	__STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
AnnaBridge	145:64910690c574	1454	{
AnnaBridge	145:64910690c574	1455	uint32_t result;
AnnaBridge	145:64910690c574	1456
AnnaBridge	145:64910690c574	1457	__ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	1458	return ((uint16_t) result);
AnnaBridge	145:64910690c574	1459	}
AnnaBridge	145:64910690c574	1460
AnnaBridge	145:64910690c574	1461
AnnaBridge	145:64910690c574	1462	/**
AnnaBridge	145:64910690c574	1463	\brief Load-Acquire Exclusive (32 bit)
AnnaBridge	145:64910690c574	1464	\details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge	145:64910690c574	1465	\param [in] ptr Pointer to data
AnnaBridge	145:64910690c574	1466	\return value of type uint32_t at (*ptr)
AnnaBridge	145:64910690c574	1467	*/
Anna Bridge	169:a7c7b631e539	1468	__STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
AnnaBridge	145:64910690c574	1469	{
AnnaBridge	145:64910690c574	1470	uint32_t result;
AnnaBridge	145:64910690c574	1471
AnnaBridge	145:64910690c574	1472	__ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	145:64910690c574	1473	return(result);
AnnaBridge	145:64910690c574	1474	}
AnnaBridge	145:64910690c574	1475
AnnaBridge	145:64910690c574	1476
AnnaBridge	145:64910690c574	1477	/**
AnnaBridge	145:64910690c574	1478	\brief Store-Release Exclusive (8 bit)
AnnaBridge	145:64910690c574	1479	\details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge	145:64910690c574	1480	\param [in] value Value to store
AnnaBridge	145:64910690c574	1481	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1482	\return 0 Function succeeded
AnnaBridge	145:64910690c574	1483	\return 1 Function failed
AnnaBridge	145:64910690c574	1484	*/
Anna Bridge	169:a7c7b631e539	1485	__STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge	145:64910690c574	1486	{
AnnaBridge	145:64910690c574	1487	uint32_t result;
AnnaBridge	145:64910690c574	1488
AnnaBridge	145:64910690c574	1489	__ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1490	return(result);
AnnaBridge	145:64910690c574	1491	}
AnnaBridge	145:64910690c574	1492
AnnaBridge	145:64910690c574	1493
AnnaBridge	145:64910690c574	1494	/**
AnnaBridge	145:64910690c574	1495	\brief Store-Release Exclusive (16 bit)
AnnaBridge	145:64910690c574	1496	\details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge	145:64910690c574	1497	\param [in] value Value to store
AnnaBridge	145:64910690c574	1498	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1499	\return 0 Function succeeded
AnnaBridge	145:64910690c574	1500	\return 1 Function failed
AnnaBridge	145:64910690c574	1501	*/
Anna Bridge	169:a7c7b631e539	1502	__STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge	145:64910690c574	1503	{
AnnaBridge	145:64910690c574	1504	uint32_t result;
AnnaBridge	145:64910690c574	1505
AnnaBridge	145:64910690c574	1506	__ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1507	return(result);
AnnaBridge	145:64910690c574	1508	}
AnnaBridge	145:64910690c574	1509
AnnaBridge	145:64910690c574	1510
AnnaBridge	145:64910690c574	1511	/**
AnnaBridge	145:64910690c574	1512	\brief Store-Release Exclusive (32 bit)
AnnaBridge	145:64910690c574	1513	\details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge	145:64910690c574	1514	\param [in] value Value to store
AnnaBridge	145:64910690c574	1515	\param [in] ptr Pointer to location
AnnaBridge	145:64910690c574	1516	\return 0 Function succeeded
AnnaBridge	145:64910690c574	1517	\return 1 Function failed
AnnaBridge	145:64910690c574	1518	*/
Anna Bridge	169:a7c7b631e539	1519	__STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
AnnaBridge	145:64910690c574	1520	{
AnnaBridge	145:64910690c574	1521	uint32_t result;
AnnaBridge	145:64910690c574	1522
AnnaBridge	145:64910690c574	1523	__ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	145:64910690c574	1524	return(result);
AnnaBridge	145:64910690c574	1525	}
AnnaBridge	145:64910690c574	1526
AnnaBridge	145:64910690c574	1527	#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	145:64910690c574	1528	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge	145:64910690c574	1529
AnnaBridge	145:64910690c574	1530	/@}/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge	145:64910690c574	1531
AnnaBridge	145:64910690c574	1532
AnnaBridge	145:64910690c574	1533	/* ################### Compiler specific Intrinsics ########################### */
AnnaBridge	145:64910690c574	1534	/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge	145:64910690c574	1535	Access to dedicated SIMD instructions
AnnaBridge	145:64910690c574	1536	@{
AnnaBridge	145:64910690c574	1537	*/
AnnaBridge	145:64910690c574	1538
Anna Bridge	169:a7c7b631e539	1539	#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
AnnaBridge	145:64910690c574	1540
Anna Bridge	169:a7c7b631e539	1541	__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1542	{
AnnaBridge	145:64910690c574	1543	uint32_t result;
AnnaBridge	145:64910690c574	1544
AnnaBridge	145:64910690c574	1545	__ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1546	return(result);
AnnaBridge	145:64910690c574	1547	}
AnnaBridge	145:64910690c574	1548
Anna Bridge	169:a7c7b631e539	1549	__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1550	{
AnnaBridge	145:64910690c574	1551	uint32_t result;
AnnaBridge	145:64910690c574	1552
AnnaBridge	145:64910690c574	1553	__ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1554	return(result);
AnnaBridge	145:64910690c574	1555	}
AnnaBridge	145:64910690c574	1556
Anna Bridge	169:a7c7b631e539	1557	__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1558	{
AnnaBridge	145:64910690c574	1559	uint32_t result;
AnnaBridge	145:64910690c574	1560
AnnaBridge	145:64910690c574	1561	__ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1562	return(result);
AnnaBridge	145:64910690c574	1563	}
AnnaBridge	145:64910690c574	1564
Anna Bridge	169:a7c7b631e539	1565	__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1566	{
AnnaBridge	145:64910690c574	1567	uint32_t result;
AnnaBridge	145:64910690c574	1568
AnnaBridge	145:64910690c574	1569	__ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1570	return(result);
AnnaBridge	145:64910690c574	1571	}
AnnaBridge	145:64910690c574	1572
Anna Bridge	169:a7c7b631e539	1573	__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1574	{
AnnaBridge	145:64910690c574	1575	uint32_t result;
AnnaBridge	145:64910690c574	1576
AnnaBridge	145:64910690c574	1577	__ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1578	return(result);
AnnaBridge	145:64910690c574	1579	}
AnnaBridge	145:64910690c574	1580
Anna Bridge	169:a7c7b631e539	1581	__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1582	{
AnnaBridge	145:64910690c574	1583	uint32_t result;
AnnaBridge	145:64910690c574	1584
AnnaBridge	145:64910690c574	1585	__ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1586	return(result);
AnnaBridge	145:64910690c574	1587	}
AnnaBridge	145:64910690c574	1588
AnnaBridge	145:64910690c574	1589
Anna Bridge	169:a7c7b631e539	1590	__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1591	{
AnnaBridge	145:64910690c574	1592	uint32_t result;
AnnaBridge	145:64910690c574	1593
AnnaBridge	145:64910690c574	1594	__ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1595	return(result);
AnnaBridge	145:64910690c574	1596	}
AnnaBridge	145:64910690c574	1597
Anna Bridge	169:a7c7b631e539	1598	__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1599	{
AnnaBridge	145:64910690c574	1600	uint32_t result;
AnnaBridge	145:64910690c574	1601
AnnaBridge	145:64910690c574	1602	__ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1603	return(result);
AnnaBridge	145:64910690c574	1604	}
AnnaBridge	145:64910690c574	1605
Anna Bridge	169:a7c7b631e539	1606	__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1607	{
AnnaBridge	145:64910690c574	1608	uint32_t result;
AnnaBridge	145:64910690c574	1609
AnnaBridge	145:64910690c574	1610	__ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1611	return(result);
AnnaBridge	145:64910690c574	1612	}
AnnaBridge	145:64910690c574	1613
Anna Bridge	169:a7c7b631e539	1614	__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1615	{
AnnaBridge	145:64910690c574	1616	uint32_t result;
AnnaBridge	145:64910690c574	1617
AnnaBridge	145:64910690c574	1618	__ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1619	return(result);
AnnaBridge	145:64910690c574	1620	}
AnnaBridge	145:64910690c574	1621
Anna Bridge	169:a7c7b631e539	1622	__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1623	{
AnnaBridge	145:64910690c574	1624	uint32_t result;
AnnaBridge	145:64910690c574	1625
AnnaBridge	145:64910690c574	1626	__ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1627	return(result);
AnnaBridge	145:64910690c574	1628	}
AnnaBridge	145:64910690c574	1629
Anna Bridge	169:a7c7b631e539	1630	__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1631	{
AnnaBridge	145:64910690c574	1632	uint32_t result;
AnnaBridge	145:64910690c574	1633
AnnaBridge	145:64910690c574	1634	__ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1635	return(result);
AnnaBridge	145:64910690c574	1636	}
AnnaBridge	145:64910690c574	1637
AnnaBridge	145:64910690c574	1638
Anna Bridge	169:a7c7b631e539	1639	__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1640	{
AnnaBridge	145:64910690c574	1641	uint32_t result;
AnnaBridge	145:64910690c574	1642
AnnaBridge	145:64910690c574	1643	__ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1644	return(result);
AnnaBridge	145:64910690c574	1645	}
AnnaBridge	145:64910690c574	1646
Anna Bridge	169:a7c7b631e539	1647	__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1648	{
AnnaBridge	145:64910690c574	1649	uint32_t result;
AnnaBridge	145:64910690c574	1650
AnnaBridge	145:64910690c574	1651	__ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1652	return(result);
AnnaBridge	145:64910690c574	1653	}
AnnaBridge	145:64910690c574	1654
Anna Bridge	169:a7c7b631e539	1655	__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1656	{
AnnaBridge	145:64910690c574	1657	uint32_t result;
AnnaBridge	145:64910690c574	1658
AnnaBridge	145:64910690c574	1659	__ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1660	return(result);
AnnaBridge	145:64910690c574	1661	}
AnnaBridge	145:64910690c574	1662
Anna Bridge	169:a7c7b631e539	1663	__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1664	{
AnnaBridge	145:64910690c574	1665	uint32_t result;
AnnaBridge	145:64910690c574	1666
AnnaBridge	145:64910690c574	1667	__ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1668	return(result);
AnnaBridge	145:64910690c574	1669	}
AnnaBridge	145:64910690c574	1670
Anna Bridge	169:a7c7b631e539	1671	__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1672	{
AnnaBridge	145:64910690c574	1673	uint32_t result;
AnnaBridge	145:64910690c574	1674
AnnaBridge	145:64910690c574	1675	__ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1676	return(result);
AnnaBridge	145:64910690c574	1677	}
AnnaBridge	145:64910690c574	1678
Anna Bridge	169:a7c7b631e539	1679	__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1680	{
AnnaBridge	145:64910690c574	1681	uint32_t result;
AnnaBridge	145:64910690c574	1682
AnnaBridge	145:64910690c574	1683	__ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1684	return(result);
AnnaBridge	145:64910690c574	1685	}
AnnaBridge	145:64910690c574	1686
Anna Bridge	169:a7c7b631e539	1687	__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1688	{
AnnaBridge	145:64910690c574	1689	uint32_t result;
AnnaBridge	145:64910690c574	1690
AnnaBridge	145:64910690c574	1691	__ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1692	return(result);
AnnaBridge	145:64910690c574	1693	}
AnnaBridge	145:64910690c574	1694
Anna Bridge	169:a7c7b631e539	1695	__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1696	{
AnnaBridge	145:64910690c574	1697	uint32_t result;
AnnaBridge	145:64910690c574	1698
AnnaBridge	145:64910690c574	1699	__ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1700	return(result);
AnnaBridge	145:64910690c574	1701	}
AnnaBridge	145:64910690c574	1702
Anna Bridge	169:a7c7b631e539	1703	__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1704	{
AnnaBridge	145:64910690c574	1705	uint32_t result;
AnnaBridge	145:64910690c574	1706
AnnaBridge	145:64910690c574	1707	__ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1708	return(result);
AnnaBridge	145:64910690c574	1709	}
AnnaBridge	145:64910690c574	1710
Anna Bridge	169:a7c7b631e539	1711	__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1712	{
AnnaBridge	145:64910690c574	1713	uint32_t result;
AnnaBridge	145:64910690c574	1714
AnnaBridge	145:64910690c574	1715	__ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1716	return(result);
AnnaBridge	145:64910690c574	1717	}
AnnaBridge	145:64910690c574	1718
Anna Bridge	169:a7c7b631e539	1719	__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1720	{
AnnaBridge	145:64910690c574	1721	uint32_t result;
AnnaBridge	145:64910690c574	1722
AnnaBridge	145:64910690c574	1723	__ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1724	return(result);
AnnaBridge	145:64910690c574	1725	}
AnnaBridge	145:64910690c574	1726
Anna Bridge	169:a7c7b631e539	1727	__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1728	{
AnnaBridge	145:64910690c574	1729	uint32_t result;
AnnaBridge	145:64910690c574	1730
AnnaBridge	145:64910690c574	1731	__ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1732	return(result);
AnnaBridge	145:64910690c574	1733	}
AnnaBridge	145:64910690c574	1734
Anna Bridge	169:a7c7b631e539	1735	__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1736	{
AnnaBridge	145:64910690c574	1737	uint32_t result;
AnnaBridge	145:64910690c574	1738
AnnaBridge	145:64910690c574	1739	__ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1740	return(result);
AnnaBridge	145:64910690c574	1741	}
AnnaBridge	145:64910690c574	1742
Anna Bridge	169:a7c7b631e539	1743	__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1744	{
AnnaBridge	145:64910690c574	1745	uint32_t result;
AnnaBridge	145:64910690c574	1746
AnnaBridge	145:64910690c574	1747	__ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1748	return(result);
AnnaBridge	145:64910690c574	1749	}
AnnaBridge	145:64910690c574	1750
Anna Bridge	169:a7c7b631e539	1751	__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1752	{
AnnaBridge	145:64910690c574	1753	uint32_t result;
AnnaBridge	145:64910690c574	1754
AnnaBridge	145:64910690c574	1755	__ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1756	return(result);
AnnaBridge	145:64910690c574	1757	}
AnnaBridge	145:64910690c574	1758
Anna Bridge	169:a7c7b631e539	1759	__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1760	{
AnnaBridge	145:64910690c574	1761	uint32_t result;
AnnaBridge	145:64910690c574	1762
AnnaBridge	145:64910690c574	1763	__ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1764	return(result);
AnnaBridge	145:64910690c574	1765	}
AnnaBridge	145:64910690c574	1766
Anna Bridge	169:a7c7b631e539	1767	__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1768	{
AnnaBridge	145:64910690c574	1769	uint32_t result;
AnnaBridge	145:64910690c574	1770
AnnaBridge	145:64910690c574	1771	__ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1772	return(result);
AnnaBridge	145:64910690c574	1773	}
AnnaBridge	145:64910690c574	1774
Anna Bridge	169:a7c7b631e539	1775	__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1776	{
AnnaBridge	145:64910690c574	1777	uint32_t result;
AnnaBridge	145:64910690c574	1778
AnnaBridge	145:64910690c574	1779	__ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1780	return(result);
AnnaBridge	145:64910690c574	1781	}
AnnaBridge	145:64910690c574	1782
Anna Bridge	169:a7c7b631e539	1783	__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1784	{
AnnaBridge	145:64910690c574	1785	uint32_t result;
AnnaBridge	145:64910690c574	1786
AnnaBridge	145:64910690c574	1787	__ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1788	return(result);
AnnaBridge	145:64910690c574	1789	}
AnnaBridge	145:64910690c574	1790
Anna Bridge	169:a7c7b631e539	1791	__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1792	{
AnnaBridge	145:64910690c574	1793	uint32_t result;
AnnaBridge	145:64910690c574	1794
AnnaBridge	145:64910690c574	1795	__ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1796	return(result);
AnnaBridge	145:64910690c574	1797	}
AnnaBridge	145:64910690c574	1798
Anna Bridge	169:a7c7b631e539	1799	__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1800	{
AnnaBridge	145:64910690c574	1801	uint32_t result;
AnnaBridge	145:64910690c574	1802
AnnaBridge	145:64910690c574	1803	__ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1804	return(result);
AnnaBridge	145:64910690c574	1805	}
AnnaBridge	145:64910690c574	1806
Anna Bridge	169:a7c7b631e539	1807	__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1808	{
AnnaBridge	145:64910690c574	1809	uint32_t result;
AnnaBridge	145:64910690c574	1810
AnnaBridge	145:64910690c574	1811	__ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1812	return(result);
AnnaBridge	145:64910690c574	1813	}
AnnaBridge	145:64910690c574	1814
Anna Bridge	169:a7c7b631e539	1815	__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1816	{
AnnaBridge	145:64910690c574	1817	uint32_t result;
AnnaBridge	145:64910690c574	1818
AnnaBridge	145:64910690c574	1819	__ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1820	return(result);
AnnaBridge	145:64910690c574	1821	}
AnnaBridge	145:64910690c574	1822
Anna Bridge	169:a7c7b631e539	1823	__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1824	{
AnnaBridge	145:64910690c574	1825	uint32_t result;
AnnaBridge	145:64910690c574	1826
AnnaBridge	145:64910690c574	1827	__ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1828	return(result);
AnnaBridge	145:64910690c574	1829	}
AnnaBridge	145:64910690c574	1830
Anna Bridge	169:a7c7b631e539	1831	__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1832	{
AnnaBridge	145:64910690c574	1833	uint32_t result;
AnnaBridge	145:64910690c574	1834
AnnaBridge	145:64910690c574	1835	__ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1836	return(result);
AnnaBridge	145:64910690c574	1837	}
AnnaBridge	145:64910690c574	1838
Anna Bridge	169:a7c7b631e539	1839	__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	145:64910690c574	1840	{
AnnaBridge	145:64910690c574	1841	uint32_t result;
AnnaBridge	145:64910690c574	1842
AnnaBridge	145:64910690c574	1843	__ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	145:64910690c574	1844	return(result);
AnnaBridge	145:64910690c574	1845	}
AnnaBridge	145:64910690c574	1846
AnnaBridge	145:64910690c574	1847	#define __SSAT16(ARG1,ARG2) \
AnnaBridge	145:64910690c574	1848	({ \
AnnaBridge	145:64910690c574	1849	int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge	145:64910690c574	1850	__ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge	145:64910690c574	1851	__RES; \
AnnaBridge	145:64910690c574	1852	})
AnnaBridge	145:64910690c574	1853
AnnaBridge	145:64910690c574	1854	#define __USAT16(ARG1,ARG2) \
AnnaBridge	145:64910690c574	1855	({ \
AnnaBridge	145:64910690c574	1856	uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge	145:64910690c574	1857	__ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge	145:64910690c574	1858	__RES; \
AnnaBridge	145:64910690c574	1859	})
AnnaBridge	145:64910690c574	1860
Anna Bridge	169:a7c7b631e539	1861	__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge	145:64910690c574	1862	{
AnnaBridge	145:64910690c574	1863	uint32_t result;
AnnaBridge	145:64910690c574	1864
AnnaBridge	145:64910690c574	1865	__ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge	145:64910690c574	1866	return(result);
AnnaBridge	145:64910690c574	1867	}
AnnaBridge	145:64910690c574	1868
Anna Bridge	169:a7c7b631e539	1869	__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1870	{
AnnaBridge	145:64910690c574	1871	uint32_t result;
AnnaBridge	145:64910690c574	1872
AnnaBridge	145:64910690c574	1873	__ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1874	return(result);
AnnaBridge	145:64910690c574	1875	}
AnnaBridge	145:64910690c574	1876
Anna Bridge	169:a7c7b631e539	1877	__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge	145:64910690c574	1878	{
AnnaBridge	145:64910690c574	1879	uint32_t result;
AnnaBridge	145:64910690c574	1880
AnnaBridge	145:64910690c574	1881	__ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge	145:64910690c574	1882	return(result);
AnnaBridge	145:64910690c574	1883	}
AnnaBridge	145:64910690c574	1884
Anna Bridge	169:a7c7b631e539	1885	__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1886	{
AnnaBridge	145:64910690c574	1887	uint32_t result;
AnnaBridge	145:64910690c574	1888
AnnaBridge	145:64910690c574	1889	__ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1890	return(result);
AnnaBridge	145:64910690c574	1891	}
AnnaBridge	145:64910690c574	1892
Anna Bridge	169:a7c7b631e539	1893	__STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1894	{
AnnaBridge	145:64910690c574	1895	uint32_t result;
AnnaBridge	145:64910690c574	1896
AnnaBridge	145:64910690c574	1897	__ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1898	return(result);
AnnaBridge	145:64910690c574	1899	}
AnnaBridge	145:64910690c574	1900
Anna Bridge	169:a7c7b631e539	1901	__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1902	{
AnnaBridge	145:64910690c574	1903	uint32_t result;
AnnaBridge	145:64910690c574	1904
AnnaBridge	145:64910690c574	1905	__ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1906	return(result);
AnnaBridge	145:64910690c574	1907	}
AnnaBridge	145:64910690c574	1908
Anna Bridge	169:a7c7b631e539	1909	__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	145:64910690c574	1910	{
AnnaBridge	145:64910690c574	1911	uint32_t result;
AnnaBridge	145:64910690c574	1912
AnnaBridge	145:64910690c574	1913	__ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	145:64910690c574	1914	return(result);
AnnaBridge	145:64910690c574	1915	}
AnnaBridge	145:64910690c574	1916
Anna Bridge	169:a7c7b631e539	1917	__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	145:64910690c574	1918	{
AnnaBridge	145:64910690c574	1919	uint32_t result;
AnnaBridge	145:64910690c574	1920
AnnaBridge	145:64910690c574	1921	__ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	145:64910690c574	1922	return(result);
AnnaBridge	145:64910690c574	1923	}
AnnaBridge	145:64910690c574	1924
Anna Bridge	169:a7c7b631e539	1925	__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	145:64910690c574	1926	{
AnnaBridge	145:64910690c574	1927	union llreg_u{
AnnaBridge	145:64910690c574	1928	uint32_t w32[2];
AnnaBridge	145:64910690c574	1929	uint64_t w64;
AnnaBridge	145:64910690c574	1930	} llr;
AnnaBridge	145:64910690c574	1931	llr.w64 = acc;
AnnaBridge	145:64910690c574	1932
AnnaBridge	145:64910690c574	1933	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	145:64910690c574	1934	__ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	145:64910690c574	1935	#else /* Big endian */
AnnaBridge	145:64910690c574	1936	__ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	145:64910690c574	1937	#endif
AnnaBridge	145:64910690c574	1938
AnnaBridge	145:64910690c574	1939	return(llr.w64);
AnnaBridge	145:64910690c574	1940	}
AnnaBridge	145:64910690c574	1941
Anna Bridge	169:a7c7b631e539	1942	__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	145:64910690c574	1943	{
AnnaBridge	145:64910690c574	1944	union llreg_u{
AnnaBridge	145:64910690c574	1945	uint32_t w32[2];
AnnaBridge	145:64910690c574	1946	uint64_t w64;
AnnaBridge	145:64910690c574	1947	} llr;
AnnaBridge	145:64910690c574	1948	llr.w64 = acc;
AnnaBridge	145:64910690c574	1949
AnnaBridge	145:64910690c574	1950	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	145:64910690c574	1951	__ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	145:64910690c574	1952	#else /* Big endian */
AnnaBridge	145:64910690c574	1953	__ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	145:64910690c574	1954	#endif
AnnaBridge	145:64910690c574	1955
AnnaBridge	145:64910690c574	1956	return(llr.w64);
AnnaBridge	145:64910690c574	1957	}
AnnaBridge	145:64910690c574	1958
Anna Bridge	169:a7c7b631e539	1959	__STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1960	{
AnnaBridge	145:64910690c574	1961	uint32_t result;
AnnaBridge	145:64910690c574	1962
AnnaBridge	145:64910690c574	1963	__ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1964	return(result);
AnnaBridge	145:64910690c574	1965	}
AnnaBridge	145:64910690c574	1966
Anna Bridge	169:a7c7b631e539	1967	__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	1968	{
AnnaBridge	145:64910690c574	1969	uint32_t result;
AnnaBridge	145:64910690c574	1970
AnnaBridge	145:64910690c574	1971	__ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	1972	return(result);
AnnaBridge	145:64910690c574	1973	}
AnnaBridge	145:64910690c574	1974
Anna Bridge	169:a7c7b631e539	1975	__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	145:64910690c574	1976	{
AnnaBridge	145:64910690c574	1977	uint32_t result;
AnnaBridge	145:64910690c574	1978
AnnaBridge	145:64910690c574	1979	__ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	145:64910690c574	1980	return(result);
AnnaBridge	145:64910690c574	1981	}
AnnaBridge	145:64910690c574	1982
Anna Bridge	169:a7c7b631e539	1983	__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	145:64910690c574	1984	{
AnnaBridge	145:64910690c574	1985	uint32_t result;
AnnaBridge	145:64910690c574	1986
AnnaBridge	145:64910690c574	1987	__ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	145:64910690c574	1988	return(result);
AnnaBridge	145:64910690c574	1989	}
AnnaBridge	145:64910690c574	1990
Anna Bridge	169:a7c7b631e539	1991	__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	145:64910690c574	1992	{
AnnaBridge	145:64910690c574	1993	union llreg_u{
AnnaBridge	145:64910690c574	1994	uint32_t w32[2];
AnnaBridge	145:64910690c574	1995	uint64_t w64;
AnnaBridge	145:64910690c574	1996	} llr;
AnnaBridge	145:64910690c574	1997	llr.w64 = acc;
AnnaBridge	145:64910690c574	1998
AnnaBridge	145:64910690c574	1999	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	145:64910690c574	2000	__ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	145:64910690c574	2001	#else /* Big endian */
AnnaBridge	145:64910690c574	2002	__ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	145:64910690c574	2003	#endif
AnnaBridge	145:64910690c574	2004
AnnaBridge	145:64910690c574	2005	return(llr.w64);
AnnaBridge	145:64910690c574	2006	}
AnnaBridge	145:64910690c574	2007
Anna Bridge	169:a7c7b631e539	2008	__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	145:64910690c574	2009	{
AnnaBridge	145:64910690c574	2010	union llreg_u{
AnnaBridge	145:64910690c574	2011	uint32_t w32[2];
AnnaBridge	145:64910690c574	2012	uint64_t w64;
AnnaBridge	145:64910690c574	2013	} llr;
AnnaBridge	145:64910690c574	2014	llr.w64 = acc;
AnnaBridge	145:64910690c574	2015
AnnaBridge	145:64910690c574	2016	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	145:64910690c574	2017	__ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	145:64910690c574	2018	#else /* Big endian */
AnnaBridge	145:64910690c574	2019	__ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	145:64910690c574	2020	#endif
AnnaBridge	145:64910690c574	2021
AnnaBridge	145:64910690c574	2022	return(llr.w64);
AnnaBridge	145:64910690c574	2023	}
AnnaBridge	145:64910690c574	2024
Anna Bridge	169:a7c7b631e539	2025	__STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge	145:64910690c574	2026	{
AnnaBridge	145:64910690c574	2027	uint32_t result;
AnnaBridge	145:64910690c574	2028
AnnaBridge	145:64910690c574	2029	__ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	2030	return(result);
AnnaBridge	145:64910690c574	2031	}
AnnaBridge	145:64910690c574	2032
Anna Bridge	169:a7c7b631e539	2033	__STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge	145:64910690c574	2034	{
AnnaBridge	145:64910690c574	2035	int32_t result;
AnnaBridge	145:64910690c574	2036
AnnaBridge	145:64910690c574	2037	__ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	2038	return(result);
AnnaBridge	145:64910690c574	2039	}
AnnaBridge	145:64910690c574	2040
Anna Bridge	169:a7c7b631e539	2041	__STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge	145:64910690c574	2042	{
AnnaBridge	145:64910690c574	2043	int32_t result;
AnnaBridge	145:64910690c574	2044
AnnaBridge	145:64910690c574	2045	__ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	145:64910690c574	2046	return(result);
AnnaBridge	145:64910690c574	2047	}
AnnaBridge	145:64910690c574	2048
AnnaBridge	145:64910690c574	2049	#if 0
AnnaBridge	145:64910690c574	2050	#define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge	145:64910690c574	2051	({ \
AnnaBridge	145:64910690c574	2052	uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge	145:64910690c574	2053	__ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge	145:64910690c574	2054	__RES; \
AnnaBridge	145:64910690c574	2055	})
AnnaBridge	145:64910690c574	2056
AnnaBridge	145:64910690c574	2057	#define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge	145:64910690c574	2058	({ \
AnnaBridge	145:64910690c574	2059	uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge	145:64910690c574	2060	if (ARG3 == 0) \
AnnaBridge	145:64910690c574	2061	__ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge	145:64910690c574	2062	else \
AnnaBridge	145:64910690c574	2063	__ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge	145:64910690c574	2064	__RES; \
AnnaBridge	145:64910690c574	2065	})
AnnaBridge	145:64910690c574	2066	#endif
AnnaBridge	145:64910690c574	2067
AnnaBridge	145:64910690c574	2068	#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) \| \
AnnaBridge	145:64910690c574	2069	((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge	145:64910690c574	2070
AnnaBridge	145:64910690c574	2071	#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) \| \
AnnaBridge	145:64910690c574	2072	((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge	145:64910690c574	2073
Anna Bridge	169:a7c7b631e539	2074	__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge	145:64910690c574	2075	{
AnnaBridge	145:64910690c574	2076	int32_t result;
AnnaBridge	145:64910690c574	2077
AnnaBridge	145:64910690c574	2078	__ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	145:64910690c574	2079	return(result);
AnnaBridge	145:64910690c574	2080	}
AnnaBridge	145:64910690c574	2081
AnnaBridge	145:64910690c574	2082	#endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge	145:64910690c574	2083	/@} end of group CMSIS_SIMD_intrinsics /
AnnaBridge	145:64910690c574	2084
AnnaBridge	145:64910690c574	2085
AnnaBridge	145:64910690c574	2086	#pragma GCC diagnostic pop
AnnaBridge	145:64910690c574	2087
AnnaBridge	145:64910690c574	2088	#endif /* __CMSIS_GCC_H */