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TARGET_EFM32ZG_STK3200/cmsis_armclang.h@169:a7c7b631e539, 2018-06-22 (annotated)

Committer:
Anna Bridge
Date:
Fri Jun 22 15:38:59 2018 +0100
Revision:
169:a7c7b631e539
Parent:
160:5571c4ff569f 
mbed library. Release version 162

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 145:64910690c574 1 /**************************************************************************//**
AnnaBridge 145:64910690c574 2 * @file cmsis_armclang.h
Anna Bridge 169:a7c7b631e539 3 * @brief CMSIS compiler armclang (Arm Compiler 6) header file
Anna Bridge 169:a7c7b631e539 4 * @version V5.0.4
Anna Bridge 169:a7c7b631e539 5 * @date 10. January 2018
AnnaBridge 145:64910690c574 6 ******************************************************************************/
AnnaBridge 145:64910690c574 7 /*
Anna Bridge 169:a7c7b631e539 8 * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
AnnaBridge 145:64910690c574 9 *
AnnaBridge 145:64910690c574 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 145:64910690c574 11 *
AnnaBridge 145:64910690c574 12 * Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge 145:64910690c574 13 * not use this file except in compliance with the License.
AnnaBridge 145:64910690c574 14 * You may obtain a copy of the License at
AnnaBridge 145:64910690c574 15 *
AnnaBridge 145:64910690c574 16 * www.apache.org/licenses/LICENSE-2.0
AnnaBridge 145:64910690c574 17 *
AnnaBridge 145:64910690c574 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 145:64910690c574 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge 145:64910690c574 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 145:64910690c574 21 * See the License for the specific language governing permissions and
AnnaBridge 145:64910690c574 22 * limitations under the License.
AnnaBridge 145:64910690c574 23 */
AnnaBridge 145:64910690c574 24
Anna Bridge 160:5571c4ff569f 25 /*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
AnnaBridge 145:64910690c574 26
AnnaBridge 145:64910690c574 27 #ifndef __CMSIS_ARMCLANG_H
AnnaBridge 145:64910690c574 28 #define __CMSIS_ARMCLANG_H
AnnaBridge 145:64910690c574 29
Anna Bridge 169:a7c7b631e539 30 #pragma clang system_header /* treat file as system include file */
Anna Bridge 169:a7c7b631e539 31
AnnaBridge 145:64910690c574 32 #ifndef __ARM_COMPAT_H
Anna Bridge 169:a7c7b631e539 33 #include <arm_compat.h> /* Compatibility header for Arm Compiler 5 intrinsics */
AnnaBridge 145:64910690c574 34 #endif
AnnaBridge 145:64910690c574 35
AnnaBridge 145:64910690c574 36 /* CMSIS compiler specific defines */
AnnaBridge 145:64910690c574 37 #ifndef __ASM
AnnaBridge 145:64910690c574 38 #define __ASM __asm
AnnaBridge 145:64910690c574 39 #endif
AnnaBridge 145:64910690c574 40 #ifndef __INLINE
AnnaBridge 145:64910690c574 41 #define __INLINE __inline
AnnaBridge 145:64910690c574 42 #endif
AnnaBridge 145:64910690c574 43 #ifndef __STATIC_INLINE
AnnaBridge 145:64910690c574 44 #define __STATIC_INLINE static __inline
AnnaBridge 145:64910690c574 45 #endif
Anna Bridge 169:a7c7b631e539 46 #ifndef __STATIC_FORCEINLINE
Anna Bridge 169:a7c7b631e539 47 #define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline
Anna Bridge 169:a7c7b631e539 48 #endif
AnnaBridge 145:64910690c574 49 #ifndef __NO_RETURN
Anna Bridge 169:a7c7b631e539 50 #define __NO_RETURN __attribute__((__noreturn__))
AnnaBridge 145:64910690c574 51 #endif
AnnaBridge 145:64910690c574 52 #ifndef __USED
AnnaBridge 145:64910690c574 53 #define __USED __attribute__((used))
AnnaBridge 145:64910690c574 54 #endif
AnnaBridge 145:64910690c574 55 #ifndef __WEAK
AnnaBridge 145:64910690c574 56 #define __WEAK __attribute__((weak))
AnnaBridge 145:64910690c574 57 #endif
AnnaBridge 145:64910690c574 58 #ifndef __PACKED
AnnaBridge 145:64910690c574 59 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 145:64910690c574 60 #endif
AnnaBridge 145:64910690c574 61 #ifndef __PACKED_STRUCT
AnnaBridge 145:64910690c574 62 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 145:64910690c574 63 #endif
Anna Bridge 160:5571c4ff569f 64 #ifndef __PACKED_UNION
Anna Bridge 160:5571c4ff569f 65 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
Anna Bridge 160:5571c4ff569f 66 #endif
AnnaBridge 145:64910690c574 67 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 145:64910690c574 68 #pragma clang diagnostic push
AnnaBridge 145:64910690c574 69 #pragma clang diagnostic ignored "-Wpacked"
Anna Bridge 160:5571c4ff569f 70 /*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
AnnaBridge 145:64910690c574 71 struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge 145:64910690c574 72 #pragma clang diagnostic pop
AnnaBridge 145:64910690c574 73 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge 145:64910690c574 74 #endif
AnnaBridge 145:64910690c574 75 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 145:64910690c574 76 #pragma clang diagnostic push
AnnaBridge 145:64910690c574 77 #pragma clang diagnostic ignored "-Wpacked"
Anna Bridge 160:5571c4ff569f 78 /*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
AnnaBridge 145:64910690c574 79 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge 145:64910690c574 80 #pragma clang diagnostic pop
AnnaBridge 145:64910690c574 81 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 145:64910690c574 82 #endif
AnnaBridge 145:64910690c574 83 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 145:64910690c574 84 #pragma clang diagnostic push
AnnaBridge 145:64910690c574 85 #pragma clang diagnostic ignored "-Wpacked"
Anna Bridge 160:5571c4ff569f 86 /*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
AnnaBridge 145:64910690c574 87 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge 145:64910690c574 88 #pragma clang diagnostic pop
AnnaBridge 145:64910690c574 89 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
AnnaBridge 145:64910690c574 90 #endif
AnnaBridge 145:64910690c574 91 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 145:64910690c574 92 #pragma clang diagnostic push
AnnaBridge 145:64910690c574 93 #pragma clang diagnostic ignored "-Wpacked"
Anna Bridge 160:5571c4ff569f 94 /*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
AnnaBridge 145:64910690c574 95 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge 145:64910690c574 96 #pragma clang diagnostic pop
AnnaBridge 145:64910690c574 97 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 145:64910690c574 98 #endif
AnnaBridge 145:64910690c574 99 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 145:64910690c574 100 #pragma clang diagnostic push
AnnaBridge 145:64910690c574 101 #pragma clang diagnostic ignored "-Wpacked"
Anna Bridge 160:5571c4ff569f 102 /*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
AnnaBridge 145:64910690c574 103 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge 145:64910690c574 104 #pragma clang diagnostic pop
AnnaBridge 145:64910690c574 105 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
AnnaBridge 145:64910690c574 106 #endif
AnnaBridge 145:64910690c574 107 #ifndef __ALIGNED
AnnaBridge 145:64910690c574 108 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 145:64910690c574 109 #endif
Anna Bridge 160:5571c4ff569f 110 #ifndef __RESTRICT
Anna Bridge 160:5571c4ff569f 111 #define __RESTRICT __restrict
Anna Bridge 160:5571c4ff569f 112 #endif
AnnaBridge 145:64910690c574 113
AnnaBridge 145:64910690c574 114
AnnaBridge 145:64910690c574 115 /* ########################### Core Function Access ########################### */
AnnaBridge 145:64910690c574 116 /** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge 145:64910690c574 117 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge 145:64910690c574 118 @{
AnnaBridge 145:64910690c574 119 */
AnnaBridge 145:64910690c574 120
AnnaBridge 145:64910690c574 121 /**
AnnaBridge 145:64910690c574 122 \brief Enable IRQ Interrupts
AnnaBridge 145:64910690c574 123 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge 145:64910690c574 124 Can only be executed in Privileged modes.
AnnaBridge 145:64910690c574 125 */
AnnaBridge 145:64910690c574 126 /* intrinsic void __enable_irq(); see arm_compat.h */
AnnaBridge 145:64910690c574 127
AnnaBridge 145:64910690c574 128
AnnaBridge 145:64910690c574 129 /**
AnnaBridge 145:64910690c574 130 \brief Disable IRQ Interrupts
AnnaBridge 145:64910690c574 131 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge 145:64910690c574 132 Can only be executed in Privileged modes.
AnnaBridge 145:64910690c574 133 */
AnnaBridge 145:64910690c574 134 /* intrinsic void __disable_irq(); see arm_compat.h */
AnnaBridge 145:64910690c574 135
AnnaBridge 145:64910690c574 136
AnnaBridge 145:64910690c574 137 /**
AnnaBridge 145:64910690c574 138 \brief Get Control Register
AnnaBridge 145:64910690c574 139 \details Returns the content of the Control Register.
AnnaBridge 145:64910690c574 140 \return Control Register value
AnnaBridge 145:64910690c574 141 */
Anna Bridge 169:a7c7b631e539 142 __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
AnnaBridge 145:64910690c574 143 {
AnnaBridge 145:64910690c574 144 uint32_t result;
AnnaBridge 145:64910690c574 145
AnnaBridge 145:64910690c574 146 __ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge 145:64910690c574 147 return(result);
AnnaBridge 145:64910690c574 148 }
AnnaBridge 145:64910690c574 149
AnnaBridge 145:64910690c574 150
AnnaBridge 145:64910690c574 151 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 152 /**
AnnaBridge 145:64910690c574 153 \brief Get Control Register (non-secure)
AnnaBridge 145:64910690c574 154 \details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge 145:64910690c574 155 \return non-secure Control Register value
AnnaBridge 145:64910690c574 156 */
Anna Bridge 169:a7c7b631e539 157 __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge 145:64910690c574 158 {
AnnaBridge 145:64910690c574 159 uint32_t result;
AnnaBridge 145:64910690c574 160
AnnaBridge 145:64910690c574 161 __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge 145:64910690c574 162 return(result);
AnnaBridge 145:64910690c574 163 }
AnnaBridge 145:64910690c574 164 #endif
AnnaBridge 145:64910690c574 165
AnnaBridge 145:64910690c574 166
AnnaBridge 145:64910690c574 167 /**
AnnaBridge 145:64910690c574 168 \brief Set Control Register
AnnaBridge 145:64910690c574 169 \details Writes the given value to the Control Register.
AnnaBridge 145:64910690c574 170 \param [in] control Control Register value to set
AnnaBridge 145:64910690c574 171 */
Anna Bridge 169:a7c7b631e539 172 __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
AnnaBridge 145:64910690c574 173 {
AnnaBridge 145:64910690c574 174 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge 145:64910690c574 175 }
AnnaBridge 145:64910690c574 176
AnnaBridge 145:64910690c574 177
AnnaBridge 145:64910690c574 178 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 179 /**
AnnaBridge 145:64910690c574 180 \brief Set Control Register (non-secure)
AnnaBridge 145:64910690c574 181 \details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge 145:64910690c574 182 \param [in] control Control Register value to set
AnnaBridge 145:64910690c574 183 */
Anna Bridge 169:a7c7b631e539 184 __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge 145:64910690c574 185 {
AnnaBridge 145:64910690c574 186 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge 145:64910690c574 187 }
AnnaBridge 145:64910690c574 188 #endif
AnnaBridge 145:64910690c574 189
AnnaBridge 145:64910690c574 190
AnnaBridge 145:64910690c574 191 /**
AnnaBridge 145:64910690c574 192 \brief Get IPSR Register
AnnaBridge 145:64910690c574 193 \details Returns the content of the IPSR Register.
AnnaBridge 145:64910690c574 194 \return IPSR Register value
AnnaBridge 145:64910690c574 195 */
Anna Bridge 169:a7c7b631e539 196 __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
AnnaBridge 145:64910690c574 197 {
AnnaBridge 145:64910690c574 198 uint32_t result;
AnnaBridge 145:64910690c574 199
AnnaBridge 145:64910690c574 200 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge 145:64910690c574 201 return(result);
AnnaBridge 145:64910690c574 202 }
AnnaBridge 145:64910690c574 203
AnnaBridge 145:64910690c574 204
AnnaBridge 145:64910690c574 205 /**
AnnaBridge 145:64910690c574 206 \brief Get APSR Register
AnnaBridge 145:64910690c574 207 \details Returns the content of the APSR Register.
AnnaBridge 145:64910690c574 208 \return APSR Register value
AnnaBridge 145:64910690c574 209 */
Anna Bridge 169:a7c7b631e539 210 __STATIC_FORCEINLINE uint32_t __get_APSR(void)
AnnaBridge 145:64910690c574 211 {
AnnaBridge 145:64910690c574 212 uint32_t result;
AnnaBridge 145:64910690c574 213
AnnaBridge 145:64910690c574 214 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge 145:64910690c574 215 return(result);
AnnaBridge 145:64910690c574 216 }
AnnaBridge 145:64910690c574 217
AnnaBridge 145:64910690c574 218
AnnaBridge 145:64910690c574 219 /**
AnnaBridge 145:64910690c574 220 \brief Get xPSR Register
AnnaBridge 145:64910690c574 221 \details Returns the content of the xPSR Register.
AnnaBridge 145:64910690c574 222 \return xPSR Register value
AnnaBridge 145:64910690c574 223 */
Anna Bridge 169:a7c7b631e539 224 __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
AnnaBridge 145:64910690c574 225 {
AnnaBridge 145:64910690c574 226 uint32_t result;
AnnaBridge 145:64910690c574 227
AnnaBridge 145:64910690c574 228 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge 145:64910690c574 229 return(result);
AnnaBridge 145:64910690c574 230 }
AnnaBridge 145:64910690c574 231
AnnaBridge 145:64910690c574 232
AnnaBridge 145:64910690c574 233 /**
AnnaBridge 145:64910690c574 234 \brief Get Process Stack Pointer
AnnaBridge 145:64910690c574 235 \details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge 145:64910690c574 236 \return PSP Register value
AnnaBridge 145:64910690c574 237 */
Anna Bridge 169:a7c7b631e539 238 __STATIC_FORCEINLINE uint32_t __get_PSP(void)
AnnaBridge 145:64910690c574 239 {
AnnaBridge 145:64910690c574 240 register uint32_t result;
AnnaBridge 145:64910690c574 241
AnnaBridge 145:64910690c574 242 __ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge 145:64910690c574 243 return(result);
AnnaBridge 145:64910690c574 244 }
AnnaBridge 145:64910690c574 245
AnnaBridge 145:64910690c574 246
AnnaBridge 145:64910690c574 247 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 248 /**
AnnaBridge 145:64910690c574 249 \brief Get Process Stack Pointer (non-secure)
AnnaBridge 145:64910690c574 250 \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 145:64910690c574 251 \return PSP Register value
AnnaBridge 145:64910690c574 252 */
Anna Bridge 169:a7c7b631e539 253 __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge 145:64910690c574 254 {
AnnaBridge 145:64910690c574 255 register uint32_t result;
AnnaBridge 145:64910690c574 256
AnnaBridge 145:64910690c574 257 __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge 145:64910690c574 258 return(result);
AnnaBridge 145:64910690c574 259 }
AnnaBridge 145:64910690c574 260 #endif
AnnaBridge 145:64910690c574 261
AnnaBridge 145:64910690c574 262
AnnaBridge 145:64910690c574 263 /**
AnnaBridge 145:64910690c574 264 \brief Set Process Stack Pointer
AnnaBridge 145:64910690c574 265 \details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge 145:64910690c574 266 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 145:64910690c574 267 */
Anna Bridge 169:a7c7b631e539 268 __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge 145:64910690c574 269 {
AnnaBridge 145:64910690c574 270 __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge 145:64910690c574 271 }
AnnaBridge 145:64910690c574 272
AnnaBridge 145:64910690c574 273
AnnaBridge 145:64910690c574 274 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 275 /**
AnnaBridge 145:64910690c574 276 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 145:64910690c574 277 \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 145:64910690c574 278 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 145:64910690c574 279 */
Anna Bridge 169:a7c7b631e539 280 __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge 145:64910690c574 281 {
AnnaBridge 145:64910690c574 282 __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge 145:64910690c574 283 }
AnnaBridge 145:64910690c574 284 #endif
AnnaBridge 145:64910690c574 285
AnnaBridge 145:64910690c574 286
AnnaBridge 145:64910690c574 287 /**
AnnaBridge 145:64910690c574 288 \brief Get Main Stack Pointer
AnnaBridge 145:64910690c574 289 \details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge 145:64910690c574 290 \return MSP Register value
AnnaBridge 145:64910690c574 291 */
Anna Bridge 169:a7c7b631e539 292 __STATIC_FORCEINLINE uint32_t __get_MSP(void)
AnnaBridge 145:64910690c574 293 {
AnnaBridge 145:64910690c574 294 register uint32_t result;
AnnaBridge 145:64910690c574 295
AnnaBridge 145:64910690c574 296 __ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge 145:64910690c574 297 return(result);
AnnaBridge 145:64910690c574 298 }
AnnaBridge 145:64910690c574 299
AnnaBridge 145:64910690c574 300
AnnaBridge 145:64910690c574 301 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 302 /**
AnnaBridge 145:64910690c574 303 \brief Get Main Stack Pointer (non-secure)
AnnaBridge 145:64910690c574 304 \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 145:64910690c574 305 \return MSP Register value
AnnaBridge 145:64910690c574 306 */
Anna Bridge 169:a7c7b631e539 307 __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge 145:64910690c574 308 {
AnnaBridge 145:64910690c574 309 register uint32_t result;
AnnaBridge 145:64910690c574 310
AnnaBridge 145:64910690c574 311 __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge 145:64910690c574 312 return(result);
AnnaBridge 145:64910690c574 313 }
AnnaBridge 145:64910690c574 314 #endif
AnnaBridge 145:64910690c574 315
AnnaBridge 145:64910690c574 316
AnnaBridge 145:64910690c574 317 /**
AnnaBridge 145:64910690c574 318 \brief Set Main Stack Pointer
AnnaBridge 145:64910690c574 319 \details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge 145:64910690c574 320 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 145:64910690c574 321 */
Anna Bridge 169:a7c7b631e539 322 __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge 145:64910690c574 323 {
AnnaBridge 145:64910690c574 324 __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge 145:64910690c574 325 }
AnnaBridge 145:64910690c574 326
AnnaBridge 145:64910690c574 327
AnnaBridge 145:64910690c574 328 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 329 /**
AnnaBridge 145:64910690c574 330 \brief Set Main Stack Pointer (non-secure)
AnnaBridge 145:64910690c574 331 \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 145:64910690c574 332 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 145:64910690c574 333 */
Anna Bridge 169:a7c7b631e539 334 __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge 145:64910690c574 335 {
AnnaBridge 145:64910690c574 336 __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge 145:64910690c574 337 }
AnnaBridge 145:64910690c574 338 #endif
AnnaBridge 145:64910690c574 339
AnnaBridge 145:64910690c574 340
AnnaBridge 145:64910690c574 341 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 342 /**
AnnaBridge 145:64910690c574 343 \brief Get Stack Pointer (non-secure)
AnnaBridge 145:64910690c574 344 \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 145:64910690c574 345 \return SP Register value
AnnaBridge 145:64910690c574 346 */
Anna Bridge 169:a7c7b631e539 347 __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge 145:64910690c574 348 {
AnnaBridge 145:64910690c574 349 register uint32_t result;
AnnaBridge 145:64910690c574 350
AnnaBridge 145:64910690c574 351 __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge 145:64910690c574 352 return(result);
AnnaBridge 145:64910690c574 353 }
AnnaBridge 145:64910690c574 354
AnnaBridge 145:64910690c574 355
AnnaBridge 145:64910690c574 356 /**
AnnaBridge 145:64910690c574 357 \brief Set Stack Pointer (non-secure)
AnnaBridge 145:64910690c574 358 \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 145:64910690c574 359 \param [in] topOfStack Stack Pointer value to set
AnnaBridge 145:64910690c574 360 */
Anna Bridge 169:a7c7b631e539 361 __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge 145:64910690c574 362 {
AnnaBridge 145:64910690c574 363 __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge 145:64910690c574 364 }
AnnaBridge 145:64910690c574 365 #endif
AnnaBridge 145:64910690c574 366
AnnaBridge 145:64910690c574 367
AnnaBridge 145:64910690c574 368 /**
AnnaBridge 145:64910690c574 369 \brief Get Priority Mask
AnnaBridge 145:64910690c574 370 \details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge 145:64910690c574 371 \return Priority Mask value
AnnaBridge 145:64910690c574 372 */
Anna Bridge 169:a7c7b631e539 373 __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
AnnaBridge 145:64910690c574 374 {
AnnaBridge 145:64910690c574 375 uint32_t result;
AnnaBridge 145:64910690c574 376
AnnaBridge 145:64910690c574 377 __ASM volatile ("MRS %0, primask" : "=r" (result) );
AnnaBridge 145:64910690c574 378 return(result);
AnnaBridge 145:64910690c574 379 }
AnnaBridge 145:64910690c574 380
AnnaBridge 145:64910690c574 381
AnnaBridge 145:64910690c574 382 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 383 /**
AnnaBridge 145:64910690c574 384 \brief Get Priority Mask (non-secure)
AnnaBridge 145:64910690c574 385 \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge 145:64910690c574 386 \return Priority Mask value
AnnaBridge 145:64910690c574 387 */
Anna Bridge 169:a7c7b631e539 388 __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge 145:64910690c574 389 {
AnnaBridge 145:64910690c574 390 uint32_t result;
AnnaBridge 145:64910690c574 391
AnnaBridge 145:64910690c574 392 __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
AnnaBridge 145:64910690c574 393 return(result);
AnnaBridge 145:64910690c574 394 }
AnnaBridge 145:64910690c574 395 #endif
AnnaBridge 145:64910690c574 396
AnnaBridge 145:64910690c574 397
AnnaBridge 145:64910690c574 398 /**
AnnaBridge 145:64910690c574 399 \brief Set Priority Mask
AnnaBridge 145:64910690c574 400 \details Assigns the given value to the Priority Mask Register.
AnnaBridge 145:64910690c574 401 \param [in] priMask Priority Mask
AnnaBridge 145:64910690c574 402 */
Anna Bridge 169:a7c7b631e539 403 __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge 145:64910690c574 404 {
AnnaBridge 145:64910690c574 405 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge 145:64910690c574 406 }
AnnaBridge 145:64910690c574 407
AnnaBridge 145:64910690c574 408
AnnaBridge 145:64910690c574 409 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 410 /**
AnnaBridge 145:64910690c574 411 \brief Set Priority Mask (non-secure)
AnnaBridge 145:64910690c574 412 \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge 145:64910690c574 413 \param [in] priMask Priority Mask
AnnaBridge 145:64910690c574 414 */
Anna Bridge 169:a7c7b631e539 415 __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge 145:64910690c574 416 {
AnnaBridge 145:64910690c574 417 __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge 145:64910690c574 418 }
AnnaBridge 145:64910690c574 419 #endif
AnnaBridge 145:64910690c574 420
AnnaBridge 145:64910690c574 421
AnnaBridge 145:64910690c574 422 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 145:64910690c574 423 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 145:64910690c574 424 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 145:64910690c574 425 /**
AnnaBridge 145:64910690c574 426 \brief Enable FIQ
AnnaBridge 145:64910690c574 427 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge 145:64910690c574 428 Can only be executed in Privileged modes.
AnnaBridge 145:64910690c574 429 */
AnnaBridge 145:64910690c574 430 #define __enable_fault_irq __enable_fiq /* see arm_compat.h */
AnnaBridge 145:64910690c574 431
AnnaBridge 145:64910690c574 432
AnnaBridge 145:64910690c574 433 /**
AnnaBridge 145:64910690c574 434 \brief Disable FIQ
AnnaBridge 145:64910690c574 435 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge 145:64910690c574 436 Can only be executed in Privileged modes.
AnnaBridge 145:64910690c574 437 */
AnnaBridge 145:64910690c574 438 #define __disable_fault_irq __disable_fiq /* see arm_compat.h */
AnnaBridge 145:64910690c574 439
AnnaBridge 145:64910690c574 440
AnnaBridge 145:64910690c574 441 /**
AnnaBridge 145:64910690c574 442 \brief Get Base Priority
AnnaBridge 145:64910690c574 443 \details Returns the current value of the Base Priority register.
AnnaBridge 145:64910690c574 444 \return Base Priority register value
AnnaBridge 145:64910690c574 445 */
Anna Bridge 169:a7c7b631e539 446 __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
AnnaBridge 145:64910690c574 447 {
AnnaBridge 145:64910690c574 448 uint32_t result;
AnnaBridge 145:64910690c574 449
AnnaBridge 145:64910690c574 450 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge 145:64910690c574 451 return(result);
AnnaBridge 145:64910690c574 452 }
AnnaBridge 145:64910690c574 453
AnnaBridge 145:64910690c574 454
AnnaBridge 145:64910690c574 455 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 456 /**
AnnaBridge 145:64910690c574 457 \brief Get Base Priority (non-secure)
AnnaBridge 145:64910690c574 458 \details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge 145:64910690c574 459 \return Base Priority register value
AnnaBridge 145:64910690c574 460 */
Anna Bridge 169:a7c7b631e539 461 __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge 145:64910690c574 462 {
AnnaBridge 145:64910690c574 463 uint32_t result;
AnnaBridge 145:64910690c574 464
AnnaBridge 145:64910690c574 465 __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge 145:64910690c574 466 return(result);
AnnaBridge 145:64910690c574 467 }
AnnaBridge 145:64910690c574 468 #endif
AnnaBridge 145:64910690c574 469
AnnaBridge 145:64910690c574 470
AnnaBridge 145:64910690c574 471 /**
AnnaBridge 145:64910690c574 472 \brief Set Base Priority
AnnaBridge 145:64910690c574 473 \details Assigns the given value to the Base Priority register.
AnnaBridge 145:64910690c574 474 \param [in] basePri Base Priority value to set
AnnaBridge 145:64910690c574 475 */
Anna Bridge 169:a7c7b631e539 476 __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge 145:64910690c574 477 {
AnnaBridge 145:64910690c574 478 __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge 145:64910690c574 479 }
AnnaBridge 145:64910690c574 480
AnnaBridge 145:64910690c574 481
AnnaBridge 145:64910690c574 482 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 483 /**
AnnaBridge 145:64910690c574 484 \brief Set Base Priority (non-secure)
AnnaBridge 145:64910690c574 485 \details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge 145:64910690c574 486 \param [in] basePri Base Priority value to set
AnnaBridge 145:64910690c574 487 */
Anna Bridge 169:a7c7b631e539 488 __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge 145:64910690c574 489 {
AnnaBridge 145:64910690c574 490 __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge 145:64910690c574 491 }
AnnaBridge 145:64910690c574 492 #endif
AnnaBridge 145:64910690c574 493
AnnaBridge 145:64910690c574 494
AnnaBridge 145:64910690c574 495 /**
AnnaBridge 145:64910690c574 496 \brief Set Base Priority with condition
AnnaBridge 145:64910690c574 497 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge 145:64910690c574 498 or the new value increases the BASEPRI priority level.
AnnaBridge 145:64910690c574 499 \param [in] basePri Base Priority value to set
AnnaBridge 145:64910690c574 500 */
Anna Bridge 169:a7c7b631e539 501 __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge 145:64910690c574 502 {
AnnaBridge 145:64910690c574 503 __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge 145:64910690c574 504 }
AnnaBridge 145:64910690c574 505
AnnaBridge 145:64910690c574 506
AnnaBridge 145:64910690c574 507 /**
AnnaBridge 145:64910690c574 508 \brief Get Fault Mask
AnnaBridge 145:64910690c574 509 \details Returns the current value of the Fault Mask register.
AnnaBridge 145:64910690c574 510 \return Fault Mask register value
AnnaBridge 145:64910690c574 511 */
Anna Bridge 169:a7c7b631e539 512 __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
AnnaBridge 145:64910690c574 513 {
AnnaBridge 145:64910690c574 514 uint32_t result;
AnnaBridge 145:64910690c574 515
AnnaBridge 145:64910690c574 516 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge 145:64910690c574 517 return(result);
AnnaBridge 145:64910690c574 518 }
AnnaBridge 145:64910690c574 519
AnnaBridge 145:64910690c574 520
AnnaBridge 145:64910690c574 521 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 522 /**
AnnaBridge 145:64910690c574 523 \brief Get Fault Mask (non-secure)
AnnaBridge 145:64910690c574 524 \details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge 145:64910690c574 525 \return Fault Mask register value
AnnaBridge 145:64910690c574 526 */
Anna Bridge 169:a7c7b631e539 527 __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge 145:64910690c574 528 {
AnnaBridge 145:64910690c574 529 uint32_t result;
AnnaBridge 145:64910690c574 530
AnnaBridge 145:64910690c574 531 __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge 145:64910690c574 532 return(result);
AnnaBridge 145:64910690c574 533 }
AnnaBridge 145:64910690c574 534 #endif
AnnaBridge 145:64910690c574 535
AnnaBridge 145:64910690c574 536
AnnaBridge 145:64910690c574 537 /**
AnnaBridge 145:64910690c574 538 \brief Set Fault Mask
AnnaBridge 145:64910690c574 539 \details Assigns the given value to the Fault Mask register.
AnnaBridge 145:64910690c574 540 \param [in] faultMask Fault Mask value to set
AnnaBridge 145:64910690c574 541 */
Anna Bridge 169:a7c7b631e539 542 __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge 145:64910690c574 543 {
AnnaBridge 145:64910690c574 544 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge 145:64910690c574 545 }
AnnaBridge 145:64910690c574 546
AnnaBridge 145:64910690c574 547
AnnaBridge 145:64910690c574 548 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 549 /**
AnnaBridge 145:64910690c574 550 \brief Set Fault Mask (non-secure)
AnnaBridge 145:64910690c574 551 \details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge 145:64910690c574 552 \param [in] faultMask Fault Mask value to set
AnnaBridge 145:64910690c574 553 */
Anna Bridge 169:a7c7b631e539 554 __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge 145:64910690c574 555 {
AnnaBridge 145:64910690c574 556 __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge 145:64910690c574 557 }
AnnaBridge 145:64910690c574 558 #endif
AnnaBridge 145:64910690c574 559
AnnaBridge 145:64910690c574 560 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 145:64910690c574 561 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 145:64910690c574 562 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 145:64910690c574 563
AnnaBridge 145:64910690c574 564
AnnaBridge 145:64910690c574 565 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 145:64910690c574 566 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 145:64910690c574 567
AnnaBridge 145:64910690c574 568 /**
AnnaBridge 145:64910690c574 569 \brief Get Process Stack Pointer Limit
Anna Bridge 169:a7c7b631e539 570 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 571 Stack Pointer Limit register hence zero is returned always in non-secure
Anna Bridge 169:a7c7b631e539 572 mode.
Anna Bridge 169:a7c7b631e539 573
AnnaBridge 145:64910690c574 574 \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 145:64910690c574 575 \return PSPLIM Register value
AnnaBridge 145:64910690c574 576 */
Anna Bridge 169:a7c7b631e539 577 __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
AnnaBridge 145:64910690c574 578 {
Anna Bridge 169:a7c7b631e539 579 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 580 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 581 // without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 582 return 0U;
Anna Bridge 169:a7c7b631e539 583 #else
AnnaBridge 145:64910690c574 584 register uint32_t result;
AnnaBridge 145:64910690c574 585 __ASM volatile ("MRS %0, psplim" : "=r" (result) );
Anna Bridge 169:a7c7b631e539 586 return result;
Anna Bridge 169:a7c7b631e539 587 #endif
AnnaBridge 145:64910690c574 588 }
AnnaBridge 145:64910690c574 589
Anna Bridge 169:a7c7b631e539 590 #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 591 /**
AnnaBridge 145:64910690c574 592 \brief Get Process Stack Pointer Limit (non-secure)
Anna Bridge 169:a7c7b631e539 593 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 594 Stack Pointer Limit register hence zero is returned always in non-secure
Anna Bridge 169:a7c7b631e539 595 mode.
Anna Bridge 169:a7c7b631e539 596
AnnaBridge 145:64910690c574 597 \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 145:64910690c574 598 \return PSPLIM Register value
AnnaBridge 145:64910690c574 599 */
Anna Bridge 169:a7c7b631e539 600 __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge 145:64910690c574 601 {
Anna Bridge 169:a7c7b631e539 602 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Anna Bridge 169:a7c7b631e539 603 // without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 604 return 0U;
Anna Bridge 169:a7c7b631e539 605 #else
AnnaBridge 145:64910690c574 606 register uint32_t result;
AnnaBridge 145:64910690c574 607 __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
Anna Bridge 169:a7c7b631e539 608 return result;
Anna Bridge 169:a7c7b631e539 609 #endif
AnnaBridge 145:64910690c574 610 }
AnnaBridge 145:64910690c574 611 #endif
AnnaBridge 145:64910690c574 612
AnnaBridge 145:64910690c574 613
AnnaBridge 145:64910690c574 614 /**
AnnaBridge 145:64910690c574 615 \brief Set Process Stack Pointer Limit
Anna Bridge 169:a7c7b631e539 616 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 617 Stack Pointer Limit register hence the write is silently ignored in non-secure
Anna Bridge 169:a7c7b631e539 618 mode.
Anna Bridge 169:a7c7b631e539 619
AnnaBridge 145:64910690c574 620 \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 145:64910690c574 621 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 145:64910690c574 622 */
Anna Bridge 169:a7c7b631e539 623 __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge 145:64910690c574 624 {
Anna Bridge 169:a7c7b631e539 625 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 626 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 627 // without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 628 (void)ProcStackPtrLimit;
Anna Bridge 169:a7c7b631e539 629 #else
AnnaBridge 145:64910690c574 630 __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
Anna Bridge 169:a7c7b631e539 631 #endif
AnnaBridge 145:64910690c574 632 }
AnnaBridge 145:64910690c574 633
AnnaBridge 145:64910690c574 634
Anna Bridge 169:a7c7b631e539 635 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 636 /**
AnnaBridge 145:64910690c574 637 \brief Set Process Stack Pointer (non-secure)
Anna Bridge 169:a7c7b631e539 638 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 639 Stack Pointer Limit register hence the write is silently ignored in non-secure
Anna Bridge 169:a7c7b631e539 640 mode.
Anna Bridge 169:a7c7b631e539 641
AnnaBridge 145:64910690c574 642 \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 145:64910690c574 643 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 145:64910690c574 644 */
Anna Bridge 169:a7c7b631e539 645 __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge 145:64910690c574 646 {
Anna Bridge 169:a7c7b631e539 647 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Anna Bridge 169:a7c7b631e539 648 // without main extensions, the non-secure PSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 649 (void)ProcStackPtrLimit;
Anna Bridge 169:a7c7b631e539 650 #else
AnnaBridge 145:64910690c574 651 __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
Anna Bridge 169:a7c7b631e539 652 #endif
AnnaBridge 145:64910690c574 653 }
AnnaBridge 145:64910690c574 654 #endif
AnnaBridge 145:64910690c574 655
AnnaBridge 145:64910690c574 656
AnnaBridge 145:64910690c574 657 /**
AnnaBridge 145:64910690c574 658 \brief Get Main Stack Pointer Limit
Anna Bridge 169:a7c7b631e539 659 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 660 Stack Pointer Limit register hence zero is returned always.
Anna Bridge 169:a7c7b631e539 661
AnnaBridge 145:64910690c574 662 \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 145:64910690c574 663 \return MSPLIM Register value
AnnaBridge 145:64910690c574 664 */
Anna Bridge 169:a7c7b631e539 665 __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
AnnaBridge 145:64910690c574 666 {
Anna Bridge 169:a7c7b631e539 667 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 668 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 669 // without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 670 return 0U;
Anna Bridge 169:a7c7b631e539 671 #else
AnnaBridge 145:64910690c574 672 register uint32_t result;
AnnaBridge 145:64910690c574 673 __ASM volatile ("MRS %0, msplim" : "=r" (result) );
Anna Bridge 169:a7c7b631e539 674 return result;
Anna Bridge 169:a7c7b631e539 675 #endif
AnnaBridge 145:64910690c574 676 }
AnnaBridge 145:64910690c574 677
AnnaBridge 145:64910690c574 678
Anna Bridge 169:a7c7b631e539 679 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 680 /**
AnnaBridge 145:64910690c574 681 \brief Get Main Stack Pointer Limit (non-secure)
Anna Bridge 169:a7c7b631e539 682 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 683 Stack Pointer Limit register hence zero is returned always.
Anna Bridge 169:a7c7b631e539 684
AnnaBridge 145:64910690c574 685 \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge 145:64910690c574 686 \return MSPLIM Register value
AnnaBridge 145:64910690c574 687 */
Anna Bridge 169:a7c7b631e539 688 __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge 145:64910690c574 689 {
Anna Bridge 169:a7c7b631e539 690 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Anna Bridge 169:a7c7b631e539 691 // without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 692 return 0U;
Anna Bridge 169:a7c7b631e539 693 #else
AnnaBridge 145:64910690c574 694 register uint32_t result;
AnnaBridge 145:64910690c574 695 __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
Anna Bridge 169:a7c7b631e539 696 return result;
Anna Bridge 169:a7c7b631e539 697 #endif
AnnaBridge 145:64910690c574 698 }
AnnaBridge 145:64910690c574 699 #endif
AnnaBridge 145:64910690c574 700
AnnaBridge 145:64910690c574 701
AnnaBridge 145:64910690c574 702 /**
AnnaBridge 145:64910690c574 703 \brief Set Main Stack Pointer Limit
Anna Bridge 169:a7c7b631e539 704 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 705 Stack Pointer Limit register hence the write is silently ignored.
Anna Bridge 169:a7c7b631e539 706
AnnaBridge 145:64910690c574 707 \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 145:64910690c574 708 \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge 145:64910690c574 709 */
Anna Bridge 169:a7c7b631e539 710 __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge 145:64910690c574 711 {
Anna Bridge 169:a7c7b631e539 712 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Anna Bridge 169:a7c7b631e539 713 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Anna Bridge 169:a7c7b631e539 714 // without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 715 (void)MainStackPtrLimit;
Anna Bridge 169:a7c7b631e539 716 #else
AnnaBridge 145:64910690c574 717 __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
Anna Bridge 169:a7c7b631e539 718 #endif
AnnaBridge 145:64910690c574 719 }
AnnaBridge 145:64910690c574 720
AnnaBridge 145:64910690c574 721
Anna Bridge 169:a7c7b631e539 722 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 145:64910690c574 723 /**
AnnaBridge 145:64910690c574 724 \brief Set Main Stack Pointer Limit (non-secure)
Anna Bridge 169:a7c7b631e539 725 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Anna Bridge 169:a7c7b631e539 726 Stack Pointer Limit register hence the write is silently ignored.
Anna Bridge 169:a7c7b631e539 727
AnnaBridge 145:64910690c574 728 \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge 145:64910690c574 729 \param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge 145:64910690c574 730 */
Anna Bridge 169:a7c7b631e539 731 __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge 145:64910690c574 732 {
Anna Bridge 169:a7c7b631e539 733 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Anna Bridge 169:a7c7b631e539 734 // without main extensions, the non-secure MSPLIM is RAZ/WI
Anna Bridge 169:a7c7b631e539 735 (void)MainStackPtrLimit;
Anna Bridge 169:a7c7b631e539 736 #else
AnnaBridge 145:64910690c574 737 __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
Anna Bridge 169:a7c7b631e539 738 #endif
AnnaBridge 145:64910690c574 739 }
AnnaBridge 145:64910690c574 740 #endif
AnnaBridge 145:64910690c574 741
AnnaBridge 145:64910690c574 742 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 145:64910690c574 743 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 145:64910690c574 744
AnnaBridge 145:64910690c574 745
AnnaBridge 145:64910690c574 746 #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 145:64910690c574 747 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 145:64910690c574 748
AnnaBridge 145:64910690c574 749 /**
AnnaBridge 145:64910690c574 750 \brief Get FPSCR
AnnaBridge 145:64910690c574 751 \details Returns the current value of the Floating Point Status/Control register.
AnnaBridge 145:64910690c574 752 \return Floating Point Status/Control register value
AnnaBridge 145:64910690c574 753 */
AnnaBridge 145:64910690c574 754 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 145:64910690c574 755 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Anna Bridge 160:5571c4ff569f 756 #define __get_FPSCR (uint32_t)__builtin_arm_get_fpscr
AnnaBridge 145:64910690c574 757 #else
Anna Bridge 160:5571c4ff569f 758 #define __get_FPSCR() ((uint32_t)0U)
AnnaBridge 145:64910690c574 759 #endif
AnnaBridge 145:64910690c574 760
AnnaBridge 145:64910690c574 761 /**
AnnaBridge 145:64910690c574 762 \brief Set FPSCR
AnnaBridge 145:64910690c574 763 \details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge 145:64910690c574 764 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 145:64910690c574 765 */
AnnaBridge 145:64910690c574 766 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 145:64910690c574 767 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Anna Bridge 160:5571c4ff569f 768 #define __set_FPSCR __builtin_arm_set_fpscr
AnnaBridge 145:64910690c574 769 #else
Anna Bridge 160:5571c4ff569f 770 #define __set_FPSCR(x) ((void)(x))
AnnaBridge 145:64910690c574 771 #endif
AnnaBridge 145:64910690c574 772
AnnaBridge 145:64910690c574 773 #endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 145:64910690c574 774 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 145:64910690c574 775
AnnaBridge 145:64910690c574 776
AnnaBridge 145:64910690c574 777
AnnaBridge 145:64910690c574 778 /*@} end of CMSIS_Core_RegAccFunctions */
AnnaBridge 145:64910690c574 779
AnnaBridge 145:64910690c574 780
AnnaBridge 145:64910690c574 781 /* ########################## Core Instruction Access ######################### */
AnnaBridge 145:64910690c574 782 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge 145:64910690c574 783 Access to dedicated instructions
AnnaBridge 145:64910690c574 784 @{
AnnaBridge 145:64910690c574 785 */
AnnaBridge 145:64910690c574 786
AnnaBridge 145:64910690c574 787 /* Define macros for porting to both thumb1 and thumb2.
AnnaBridge 145:64910690c574 788 * For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge 145:64910690c574 789 * Otherwise, use general registers, specified by constraint "r" */
AnnaBridge 145:64910690c574 790 #if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge 145:64910690c574 791 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge 145:64910690c574 792 #define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge 145:64910690c574 793 #else
AnnaBridge 145:64910690c574 794 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge 145:64910690c574 795 #define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge 145:64910690c574 796 #endif
AnnaBridge 145:64910690c574 797
AnnaBridge 145:64910690c574 798 /**
AnnaBridge 145:64910690c574 799 \brief No Operation
AnnaBridge 145:64910690c574 800 \details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge 145:64910690c574 801 */
AnnaBridge 145:64910690c574 802 #define __NOP __builtin_arm_nop
AnnaBridge 145:64910690c574 803
AnnaBridge 145:64910690c574 804 /**
AnnaBridge 145:64910690c574 805 \brief Wait For Interrupt
AnnaBridge 145:64910690c574 806 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge 145:64910690c574 807 */
AnnaBridge 145:64910690c574 808 #define __WFI __builtin_arm_wfi
AnnaBridge 145:64910690c574 809
AnnaBridge 145:64910690c574 810
AnnaBridge 145:64910690c574 811 /**
AnnaBridge 145:64910690c574 812 \brief Wait For Event
AnnaBridge 145:64910690c574 813 \details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge 145:64910690c574 814 a low-power state until one of a number of events occurs.
AnnaBridge 145:64910690c574 815 */
AnnaBridge 145:64910690c574 816 #define __WFE __builtin_arm_wfe
AnnaBridge 145:64910690c574 817
AnnaBridge 145:64910690c574 818
AnnaBridge 145:64910690c574 819 /**
AnnaBridge 145:64910690c574 820 \brief Send Event
AnnaBridge 145:64910690c574 821 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge 145:64910690c574 822 */
AnnaBridge 145:64910690c574 823 #define __SEV __builtin_arm_sev
AnnaBridge 145:64910690c574 824
AnnaBridge 145:64910690c574 825
AnnaBridge 145:64910690c574 826 /**
AnnaBridge 145:64910690c574 827 \brief Instruction Synchronization Barrier
AnnaBridge 145:64910690c574 828 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge 145:64910690c574 829 so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge 145:64910690c574 830 after the instruction has been completed.
AnnaBridge 145:64910690c574 831 */
AnnaBridge 145:64910690c574 832 #define __ISB() __builtin_arm_isb(0xF);
AnnaBridge 145:64910690c574 833
AnnaBridge 145:64910690c574 834 /**
AnnaBridge 145:64910690c574 835 \brief Data Synchronization Barrier
AnnaBridge 145:64910690c574 836 \details Acts as a special kind of Data Memory Barrier.
AnnaBridge 145:64910690c574 837 It completes when all explicit memory accesses before this instruction complete.
AnnaBridge 145:64910690c574 838 */
AnnaBridge 145:64910690c574 839 #define __DSB() __builtin_arm_dsb(0xF);
AnnaBridge 145:64910690c574 840
AnnaBridge 145:64910690c574 841
AnnaBridge 145:64910690c574 842 /**
AnnaBridge 145:64910690c574 843 \brief Data Memory Barrier
AnnaBridge 145:64910690c574 844 \details Ensures the apparent order of the explicit memory operations before
AnnaBridge 145:64910690c574 845 and after the instruction, without ensuring their completion.
AnnaBridge 145:64910690c574 846 */
AnnaBridge 145:64910690c574 847 #define __DMB() __builtin_arm_dmb(0xF);
AnnaBridge 145:64910690c574 848
AnnaBridge 145:64910690c574 849
AnnaBridge 145:64910690c574 850 /**
AnnaBridge 145:64910690c574 851 \brief Reverse byte order (32 bit)
Anna Bridge 169:a7c7b631e539 852 \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
AnnaBridge 145:64910690c574 853 \param [in] value Value to reverse
AnnaBridge 145:64910690c574 854 \return Reversed value
AnnaBridge 145:64910690c574 855 */
Anna Bridge 169:a7c7b631e539 856 #define __REV(value) __builtin_bswap32(value)
AnnaBridge 145:64910690c574 857
AnnaBridge 145:64910690c574 858
AnnaBridge 145:64910690c574 859 /**
AnnaBridge 145:64910690c574 860 \brief Reverse byte order (16 bit)
Anna Bridge 169:a7c7b631e539 861 \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
AnnaBridge 145:64910690c574 862 \param [in] value Value to reverse
AnnaBridge 145:64910690c574 863 \return Reversed value
AnnaBridge 145:64910690c574 864 */
Anna Bridge 169:a7c7b631e539 865 #define __REV16(value) __ROR(__REV(value), 16)
AnnaBridge 145:64910690c574 866
AnnaBridge 145:64910690c574 867
AnnaBridge 145:64910690c574 868 /**
Anna Bridge 169:a7c7b631e539 869 \brief Reverse byte order (16 bit)
Anna Bridge 169:a7c7b631e539 870 \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
AnnaBridge 145:64910690c574 871 \param [in] value Value to reverse
AnnaBridge 145:64910690c574 872 \return Reversed value
AnnaBridge 145:64910690c574 873 */
Anna Bridge 169:a7c7b631e539 874 #define __REVSH(value) (int16_t)__builtin_bswap16(value)
AnnaBridge 145:64910690c574 875
AnnaBridge 145:64910690c574 876
AnnaBridge 145:64910690c574 877 /**
AnnaBridge 145:64910690c574 878 \brief Rotate Right in unsigned value (32 bit)
AnnaBridge 145:64910690c574 879 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge 145:64910690c574 880 \param [in] op1 Value to rotate
AnnaBridge 145:64910690c574 881 \param [in] op2 Number of Bits to rotate
AnnaBridge 145:64910690c574 882 \return Rotated value
AnnaBridge 145:64910690c574 883 */
Anna Bridge 169:a7c7b631e539 884 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 885 {
Anna Bridge 169:a7c7b631e539 886 op2 %= 32U;
Anna Bridge 169:a7c7b631e539 887 if (op2 == 0U)
Anna Bridge 169:a7c7b631e539 888 {
Anna Bridge 169:a7c7b631e539 889 return op1;
Anna Bridge 169:a7c7b631e539 890 }
AnnaBridge 145:64910690c574 891 return (op1 >> op2) | (op1 << (32U - op2));
AnnaBridge 145:64910690c574 892 }
AnnaBridge 145:64910690c574 893
AnnaBridge 145:64910690c574 894
AnnaBridge 145:64910690c574 895 /**
AnnaBridge 145:64910690c574 896 \brief Breakpoint
AnnaBridge 145:64910690c574 897 \details Causes the processor to enter Debug state.
AnnaBridge 145:64910690c574 898 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge 145:64910690c574 899 \param [in] value is ignored by the processor.
AnnaBridge 145:64910690c574 900 If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge 145:64910690c574 901 */
Anna Bridge 160:5571c4ff569f 902 #define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge 145:64910690c574 903
AnnaBridge 145:64910690c574 904
AnnaBridge 145:64910690c574 905 /**
AnnaBridge 145:64910690c574 906 \brief Reverse bit order of value
AnnaBridge 145:64910690c574 907 \details Reverses the bit order of the given value.
AnnaBridge 145:64910690c574 908 \param [in] value Value to reverse
AnnaBridge 145:64910690c574 909 \return Reversed value
AnnaBridge 145:64910690c574 910 */
Anna Bridge 169:a7c7b631e539 911 #define __RBIT __builtin_arm_rbit
AnnaBridge 145:64910690c574 912
AnnaBridge 145:64910690c574 913 /**
AnnaBridge 145:64910690c574 914 \brief Count leading zeros
AnnaBridge 145:64910690c574 915 \details Counts the number of leading zeros of a data value.
AnnaBridge 145:64910690c574 916 \param [in] value Value to count the leading zeros
AnnaBridge 145:64910690c574 917 \return number of leading zeros in value
AnnaBridge 145:64910690c574 918 */
Anna Bridge 169:a7c7b631e539 919 #define __CLZ (uint8_t)__builtin_clz
AnnaBridge 145:64910690c574 920
AnnaBridge 145:64910690c574 921
AnnaBridge 145:64910690c574 922 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 145:64910690c574 923 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 145:64910690c574 924 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 145:64910690c574 925 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 145:64910690c574 926 /**
AnnaBridge 145:64910690c574 927 \brief LDR Exclusive (8 bit)
AnnaBridge 145:64910690c574 928 \details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge 145:64910690c574 929 \param [in] ptr Pointer to data
AnnaBridge 145:64910690c574 930 \return value of type uint8_t at (*ptr)
AnnaBridge 145:64910690c574 931 */
AnnaBridge 145:64910690c574 932 #define __LDREXB (uint8_t)__builtin_arm_ldrex
AnnaBridge 145:64910690c574 933
AnnaBridge 145:64910690c574 934
AnnaBridge 145:64910690c574 935 /**
AnnaBridge 145:64910690c574 936 \brief LDR Exclusive (16 bit)
AnnaBridge 145:64910690c574 937 \details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge 145:64910690c574 938 \param [in] ptr Pointer to data
AnnaBridge 145:64910690c574 939 \return value of type uint16_t at (*ptr)
AnnaBridge 145:64910690c574 940 */
AnnaBridge 145:64910690c574 941 #define __LDREXH (uint16_t)__builtin_arm_ldrex
AnnaBridge 145:64910690c574 942
AnnaBridge 145:64910690c574 943
AnnaBridge 145:64910690c574 944 /**
AnnaBridge 145:64910690c574 945 \brief LDR Exclusive (32 bit)
AnnaBridge 145:64910690c574 946 \details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge 145:64910690c574 947 \param [in] ptr Pointer to data
AnnaBridge 145:64910690c574 948 \return value of type uint32_t at (*ptr)
AnnaBridge 145:64910690c574 949 */
AnnaBridge 145:64910690c574 950 #define __LDREXW (uint32_t)__builtin_arm_ldrex
AnnaBridge 145:64910690c574 951
AnnaBridge 145:64910690c574 952
AnnaBridge 145:64910690c574 953 /**
AnnaBridge 145:64910690c574 954 \brief STR Exclusive (8 bit)
AnnaBridge 145:64910690c574 955 \details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge 145:64910690c574 956 \param [in] value Value to store
AnnaBridge 145:64910690c574 957 \param [in] ptr Pointer to location
AnnaBridge 145:64910690c574 958 \return 0 Function succeeded
AnnaBridge 145:64910690c574 959 \return 1 Function failed
AnnaBridge 145:64910690c574 960 */
AnnaBridge 145:64910690c574 961 #define __STREXB (uint32_t)__builtin_arm_strex
AnnaBridge 145:64910690c574 962
AnnaBridge 145:64910690c574 963
AnnaBridge 145:64910690c574 964 /**
AnnaBridge 145:64910690c574 965 \brief STR Exclusive (16 bit)
AnnaBridge 145:64910690c574 966 \details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge 145:64910690c574 967 \param [in] value Value to store
AnnaBridge 145:64910690c574 968 \param [in] ptr Pointer to location
AnnaBridge 145:64910690c574 969 \return 0 Function succeeded
AnnaBridge 145:64910690c574 970 \return 1 Function failed
AnnaBridge 145:64910690c574 971 */
AnnaBridge 145:64910690c574 972 #define __STREXH (uint32_t)__builtin_arm_strex
AnnaBridge 145:64910690c574 973
AnnaBridge 145:64910690c574 974
AnnaBridge 145:64910690c574 975 /**
AnnaBridge 145:64910690c574 976 \brief STR Exclusive (32 bit)
AnnaBridge 145:64910690c574 977 \details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge 145:64910690c574 978 \param [in] value Value to store
AnnaBridge 145:64910690c574 979 \param [in] ptr Pointer to location
AnnaBridge 145:64910690c574 980 \return 0 Function succeeded
AnnaBridge 145:64910690c574 981 \return 1 Function failed
AnnaBridge 145:64910690c574 982 */
AnnaBridge 145:64910690c574 983 #define __STREXW (uint32_t)__builtin_arm_strex
AnnaBridge 145:64910690c574 984
AnnaBridge 145:64910690c574 985
AnnaBridge 145:64910690c574 986 /**
AnnaBridge 145:64910690c574 987 \brief Remove the exclusive lock
AnnaBridge 145:64910690c574 988 \details Removes the exclusive lock which is created by LDREX.
AnnaBridge 145:64910690c574 989 */
AnnaBridge 145:64910690c574 990 #define __CLREX __builtin_arm_clrex
AnnaBridge 145:64910690c574 991
AnnaBridge 145:64910690c574 992 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 145:64910690c574 993 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 145:64910690c574 994 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 145:64910690c574 995 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 145:64910690c574 996
AnnaBridge 145:64910690c574 997
AnnaBridge 145:64910690c574 998 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 145:64910690c574 999 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 145:64910690c574 1000 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
Anna Bridge 160:5571c4ff569f 1001
AnnaBridge 145:64910690c574 1002 /**
AnnaBridge 145:64910690c574 1003 \brief Signed Saturate
AnnaBridge 145:64910690c574 1004 \details Saturates a signed value.
AnnaBridge 145:64910690c574 1005 \param [in] value Value to be saturated
AnnaBridge 145:64910690c574 1006 \param [in] sat Bit position to saturate to (1..32)
AnnaBridge 145:64910690c574 1007 \return Saturated value
AnnaBridge 145:64910690c574 1008 */
AnnaBridge 145:64910690c574 1009 #define __SSAT __builtin_arm_ssat
AnnaBridge 145:64910690c574 1010
AnnaBridge 145:64910690c574 1011
AnnaBridge 145:64910690c574 1012 /**
AnnaBridge 145:64910690c574 1013 \brief Unsigned Saturate
AnnaBridge 145:64910690c574 1014 \details Saturates an unsigned value.
AnnaBridge 145:64910690c574 1015 \param [in] value Value to be saturated
AnnaBridge 145:64910690c574 1016 \param [in] sat Bit position to saturate to (0..31)
AnnaBridge 145:64910690c574 1017 \return Saturated value
AnnaBridge 145:64910690c574 1018 */
AnnaBridge 145:64910690c574 1019 #define __USAT __builtin_arm_usat
AnnaBridge 145:64910690c574 1020
AnnaBridge 145:64910690c574 1021
AnnaBridge 145:64910690c574 1022 /**
AnnaBridge 145:64910690c574 1023 \brief Rotate Right with Extend (32 bit)
AnnaBridge 145:64910690c574 1024 \details Moves each bit of a bitstring right by one bit.
AnnaBridge 145:64910690c574 1025 The carry input is shifted in at the left end of the bitstring.
AnnaBridge 145:64910690c574 1026 \param [in] value Value to rotate
AnnaBridge 145:64910690c574 1027 \return Rotated value
AnnaBridge 145:64910690c574 1028 */
Anna Bridge 169:a7c7b631e539 1029 __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
AnnaBridge 145:64910690c574 1030 {
AnnaBridge 145:64910690c574 1031 uint32_t result;
AnnaBridge 145:64910690c574 1032
AnnaBridge 145:64910690c574 1033 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 145:64910690c574 1034 return(result);
AnnaBridge 145:64910690c574 1035 }
AnnaBridge 145:64910690c574 1036
AnnaBridge 145:64910690c574 1037
AnnaBridge 145:64910690c574 1038 /**
AnnaBridge 145:64910690c574 1039 \brief LDRT Unprivileged (8 bit)
AnnaBridge 145:64910690c574 1040 \details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge 145:64910690c574 1041 \param [in] ptr Pointer to data
AnnaBridge 145:64910690c574 1042 \return value of type uint8_t at (*ptr)
AnnaBridge 145:64910690c574 1043 */
Anna Bridge 169:a7c7b631e539 1044 __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge 145:64910690c574 1045 {
AnnaBridge 145:64910690c574 1046 uint32_t result;
AnnaBridge 145:64910690c574 1047
AnnaBridge 145:64910690c574 1048 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 145:64910690c574 1049 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 145:64910690c574 1050 }
AnnaBridge 145:64910690c574 1051
AnnaBridge 145:64910690c574 1052
AnnaBridge 145:64910690c574 1053 /**
AnnaBridge 145:64910690c574 1054 \brief LDRT Unprivileged (16 bit)
AnnaBridge 145:64910690c574 1055 \details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge 145:64910690c574 1056 \param [in] ptr Pointer to data
AnnaBridge 145:64910690c574 1057 \return value of type uint16_t at (*ptr)
AnnaBridge 145:64910690c574 1058 */
Anna Bridge 169:a7c7b631e539 1059 __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge 145:64910690c574 1060 {
AnnaBridge 145:64910690c574 1061 uint32_t result;
AnnaBridge 145:64910690c574 1062
AnnaBridge 145:64910690c574 1063 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 145:64910690c574 1064 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 145:64910690c574 1065 }
AnnaBridge 145:64910690c574 1066
AnnaBridge 145:64910690c574 1067
AnnaBridge 145:64910690c574 1068 /**
AnnaBridge 145:64910690c574 1069 \brief LDRT Unprivileged (32 bit)
AnnaBridge 145:64910690c574 1070 \details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge 145:64910690c574 1071 \param [in] ptr Pointer to data
AnnaBridge 145:64910690c574 1072 \return value of type uint32_t at (*ptr)
AnnaBridge 145:64910690c574 1073 */
Anna Bridge 169:a7c7b631e539 1074 __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge 145:64910690c574 1075 {
AnnaBridge 145:64910690c574 1076 uint32_t result;
AnnaBridge 145:64910690c574 1077
AnnaBridge 145:64910690c574 1078 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 145:64910690c574 1079 return(result);
AnnaBridge 145:64910690c574 1080 }
AnnaBridge 145:64910690c574 1081
AnnaBridge 145:64910690c574 1082
AnnaBridge 145:64910690c574 1083 /**
AnnaBridge 145:64910690c574 1084 \brief STRT Unprivileged (8 bit)
AnnaBridge 145:64910690c574 1085 \details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge 145:64910690c574 1086 \param [in] value Value to store
AnnaBridge 145:64910690c574 1087 \param [in] ptr Pointer to location
AnnaBridge 145:64910690c574 1088 */
Anna Bridge 169:a7c7b631e539 1089 __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 145:64910690c574 1090 {
AnnaBridge 145:64910690c574 1091 __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 145:64910690c574 1092 }
AnnaBridge 145:64910690c574 1093
AnnaBridge 145:64910690c574 1094
AnnaBridge 145:64910690c574 1095 /**
AnnaBridge 145:64910690c574 1096 \brief STRT Unprivileged (16 bit)
AnnaBridge 145:64910690c574 1097 \details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge 145:64910690c574 1098 \param [in] value Value to store
AnnaBridge 145:64910690c574 1099 \param [in] ptr Pointer to location
AnnaBridge 145:64910690c574 1100 */
Anna Bridge 169:a7c7b631e539 1101 __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 145:64910690c574 1102 {
AnnaBridge 145:64910690c574 1103 __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 145:64910690c574 1104 }
AnnaBridge 145:64910690c574 1105
AnnaBridge 145:64910690c574 1106
AnnaBridge 145:64910690c574 1107 /**
AnnaBridge 145:64910690c574 1108 \brief STRT Unprivileged (32 bit)
AnnaBridge 145:64910690c574 1109 \details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge 145:64910690c574 1110 \param [in] value Value to store
AnnaBridge 145:64910690c574 1111 \param [in] ptr Pointer to location
AnnaBridge 145:64910690c574 1112 */
Anna Bridge 169:a7c7b631e539 1113 __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 145:64910690c574 1114 {
AnnaBridge 145:64910690c574 1115 __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge 145:64910690c574 1116 }
AnnaBridge 145:64910690c574 1117
Anna Bridge 160:5571c4ff569f 1118 #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Anna Bridge 160:5571c4ff569f 1119 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Anna Bridge 160:5571c4ff569f 1120 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
Anna Bridge 160:5571c4ff569f 1121
Anna Bridge 160:5571c4ff569f 1122 /**
Anna Bridge 160:5571c4ff569f 1123 \brief Signed Saturate
Anna Bridge 160:5571c4ff569f 1124 \details Saturates a signed value.
Anna Bridge 160:5571c4ff569f 1125 \param [in] value Value to be saturated
Anna Bridge 160:5571c4ff569f 1126 \param [in] sat Bit position to saturate to (1..32)
Anna Bridge 160:5571c4ff569f 1127 \return Saturated value
Anna Bridge 160:5571c4ff569f 1128 */
Anna Bridge 169:a7c7b631e539 1129 __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
Anna Bridge 160:5571c4ff569f 1130 {
Anna Bridge 169:a7c7b631e539 1131 if ((sat >= 1U) && (sat <= 32U))
Anna Bridge 169:a7c7b631e539 1132 {
Anna Bridge 160:5571c4ff569f 1133 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
Anna Bridge 160:5571c4ff569f 1134 const int32_t min = -1 - max ;
Anna Bridge 169:a7c7b631e539 1135 if (val > max)
Anna Bridge 169:a7c7b631e539 1136 {
Anna Bridge 160:5571c4ff569f 1137 return max;
Anna Bridge 169:a7c7b631e539 1138 }
Anna Bridge 169:a7c7b631e539 1139 else if (val < min)
Anna Bridge 169:a7c7b631e539 1140 {
Anna Bridge 160:5571c4ff569f 1141 return min;
Anna Bridge 160:5571c4ff569f 1142 }
Anna Bridge 160:5571c4ff569f 1143 }
Anna Bridge 160:5571c4ff569f 1144 return val;
Anna Bridge 160:5571c4ff569f 1145 }
Anna Bridge 160:5571c4ff569f 1146
Anna Bridge 160:5571c4ff569f 1147 /**
Anna Bridge 160:5571c4ff569f 1148 \brief Unsigned Saturate
Anna Bridge 160:5571c4ff569f 1149 \details Saturates an unsigned value.
Anna Bridge 160:5571c4ff569f 1150 \param [in] value Value to be saturated
Anna Bridge 160:5571c4ff569f 1151 \param [in] sat Bit position to saturate to (0..31)
Anna Bridge 160:5571c4ff569f 1152 \return Saturated value
Anna Bridge 160:5571c4ff569f 1153 */
Anna Bridge 169:a7c7b631e539 1154 __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
Anna Bridge 160:5571c4ff569f 1155 {
Anna Bridge 169:a7c7b631e539 1156 if (sat <= 31U)
Anna Bridge 169:a7c7b631e539 1157 {
Anna Bridge 160:5571c4ff569f 1158 const uint32_t max = ((1U << sat) - 1U);
Anna Bridge 169:a7c7b631e539 1159 if (val > (int32_t)max)
Anna Bridge 169:a7c7b631e539 1160 {
Anna Bridge 160:5571c4ff569f 1161 return max;
Anna Bridge 169:a7c7b631e539 1162 }
Anna Bridge 169:a7c7b631e539 1163 else if (val < 0)
Anna Bridge 169:a7c7b631e539 1164 {
Anna Bridge 160:5571c4ff569f 1165 return 0U;
Anna Bridge 160:5571c4ff569f 1166 }
Anna Bridge 160:5571c4ff569f 1167 }
Anna Bridge 160:5571c4ff569f 1168 return (uint32_t)val;
Anna Bridge 160:5571c4ff569f 1169 }
Anna Bridge 160:5571c4ff569f 1170
AnnaBridge 145:64910690c574 1171 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 145:64910690c574 1172 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 145:64910690c574 1173 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 145:64910690c574 1174
AnnaBridge 145:64910690c574 1175
AnnaBridge 145:64910690c574 1176 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 145:64910690c574 1177 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 145:64910690c574 1178 /**
AnnaBridge 145:64910690c574 1179 \brief Load-Acquire (8 bit)
AnnaBridge 145:64910690c574 1180 \details Executes a LDAB instruction for 8 bit value.
AnnaBridge 145:64910690c574 1181 \param [in] ptr Pointer to data
AnnaBridge 145:64910690c574 1182 \return value of type uint8_t at (*ptr)
AnnaBridge 145:64910690c574 1183 */
Anna Bridge 169:a7c7b631e539 1184 __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge 145:64910690c574 1185 {
AnnaBridge 145:64910690c574 1186 uint32_t result;
AnnaBridge 145:64910690c574 1187
AnnaBridge 145:64910690c574 1188 __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 145:64910690c574 1189 return ((uint8_t) result);
AnnaBridge 145:64910690c574 1190 }
AnnaBridge 145:64910690c574 1191
AnnaBridge 145:64910690c574 1192
AnnaBridge 145:64910690c574 1193 /**
AnnaBridge 145:64910690c574 1194 \brief Load-Acquire (16 bit)
AnnaBridge 145:64910690c574 1195 \details Executes a LDAH instruction for 16 bit values.
AnnaBridge 145:64910690c574 1196 \param [in] ptr Pointer to data
AnnaBridge 145:64910690c574 1197 \return value of type uint16_t at (*ptr)
AnnaBridge 145:64910690c574 1198 */
Anna Bridge 169:a7c7b631e539 1199 __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge 145:64910690c574 1200 {
AnnaBridge 145:64910690c574 1201 uint32_t result;
AnnaBridge 145:64910690c574 1202
AnnaBridge 145:64910690c574 1203 __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 145:64910690c574 1204 return ((uint16_t) result);
AnnaBridge 145:64910690c574 1205 }
AnnaBridge 145:64910690c574 1206
AnnaBridge 145:64910690c574 1207
AnnaBridge 145:64910690c574 1208 /**
AnnaBridge 145:64910690c574 1209 \brief Load-Acquire (32 bit)
AnnaBridge 145:64910690c574 1210 \details Executes a LDA instruction for 32 bit values.
AnnaBridge 145:64910690c574 1211 \param [in] ptr Pointer to data
AnnaBridge 145:64910690c574 1212 \return value of type uint32_t at (*ptr)
AnnaBridge 145:64910690c574 1213 */
Anna Bridge 169:a7c7b631e539 1214 __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge 145:64910690c574 1215 {
AnnaBridge 145:64910690c574 1216 uint32_t result;
AnnaBridge 145:64910690c574 1217
AnnaBridge 145:64910690c574 1218 __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 145:64910690c574 1219 return(result);
AnnaBridge 145:64910690c574 1220 }
AnnaBridge 145:64910690c574 1221
AnnaBridge 145:64910690c574 1222
AnnaBridge 145:64910690c574 1223 /**
AnnaBridge 145:64910690c574 1224 \brief Store-Release (8 bit)
AnnaBridge 145:64910690c574 1225 \details Executes a STLB instruction for 8 bit values.
AnnaBridge 145:64910690c574 1226 \param [in] value Value to store
AnnaBridge 145:64910690c574 1227 \param [in] ptr Pointer to location
AnnaBridge 145:64910690c574 1228 */
Anna Bridge 169:a7c7b631e539 1229 __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 145:64910690c574 1230 {
AnnaBridge 145:64910690c574 1231 __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 145:64910690c574 1232 }
AnnaBridge 145:64910690c574 1233
AnnaBridge 145:64910690c574 1234
AnnaBridge 145:64910690c574 1235 /**
AnnaBridge 145:64910690c574 1236 \brief Store-Release (16 bit)
AnnaBridge 145:64910690c574 1237 \details Executes a STLH instruction for 16 bit values.
AnnaBridge 145:64910690c574 1238 \param [in] value Value to store
AnnaBridge 145:64910690c574 1239 \param [in] ptr Pointer to location
AnnaBridge 145:64910690c574 1240 */
Anna Bridge 169:a7c7b631e539 1241 __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 145:64910690c574 1242 {
AnnaBridge 145:64910690c574 1243 __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 145:64910690c574 1244 }
AnnaBridge 145:64910690c574 1245
AnnaBridge 145:64910690c574 1246
AnnaBridge 145:64910690c574 1247 /**
AnnaBridge 145:64910690c574 1248 \brief Store-Release (32 bit)
AnnaBridge 145:64910690c574 1249 \details Executes a STL instruction for 32 bit values.
AnnaBridge 145:64910690c574 1250 \param [in] value Value to store
AnnaBridge 145:64910690c574 1251 \param [in] ptr Pointer to location
AnnaBridge 145:64910690c574 1252 */
Anna Bridge 169:a7c7b631e539 1253 __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 145:64910690c574 1254 {
AnnaBridge 145:64910690c574 1255 __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 145:64910690c574 1256 }
AnnaBridge 145:64910690c574 1257
AnnaBridge 145:64910690c574 1258
AnnaBridge 145:64910690c574 1259 /**
AnnaBridge 145:64910690c574 1260 \brief Load-Acquire Exclusive (8 bit)
AnnaBridge 145:64910690c574 1261 \details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge 145:64910690c574 1262 \param [in] ptr Pointer to data
AnnaBridge 145:64910690c574 1263 \return value of type uint8_t at (*ptr)
AnnaBridge 145:64910690c574 1264 */
AnnaBridge 145:64910690c574 1265 #define __LDAEXB (uint8_t)__builtin_arm_ldaex
AnnaBridge 145:64910690c574 1266
AnnaBridge 145:64910690c574 1267
AnnaBridge 145:64910690c574 1268 /**
AnnaBridge 145:64910690c574 1269 \brief Load-Acquire Exclusive (16 bit)
AnnaBridge 145:64910690c574 1270 \details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge 145:64910690c574 1271 \param [in] ptr Pointer to data
AnnaBridge 145:64910690c574 1272 \return value of type uint16_t at (*ptr)
AnnaBridge 145:64910690c574 1273 */
AnnaBridge 145:64910690c574 1274 #define __LDAEXH (uint16_t)__builtin_arm_ldaex
AnnaBridge 145:64910690c574 1275
AnnaBridge 145:64910690c574 1276
AnnaBridge 145:64910690c574 1277 /**
AnnaBridge 145:64910690c574 1278 \brief Load-Acquire Exclusive (32 bit)
AnnaBridge 145:64910690c574 1279 \details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge 145:64910690c574 1280 \param [in] ptr Pointer to data
AnnaBridge 145:64910690c574 1281 \return value of type uint32_t at (*ptr)
AnnaBridge 145:64910690c574 1282 */
AnnaBridge 145:64910690c574 1283 #define __LDAEX (uint32_t)__builtin_arm_ldaex
AnnaBridge 145:64910690c574 1284
AnnaBridge 145:64910690c574 1285
AnnaBridge 145:64910690c574 1286 /**
AnnaBridge 145:64910690c574 1287 \brief Store-Release Exclusive (8 bit)
AnnaBridge 145:64910690c574 1288 \details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge 145:64910690c574 1289 \param [in] value Value to store
AnnaBridge 145:64910690c574 1290 \param [in] ptr Pointer to location
AnnaBridge 145:64910690c574 1291 \return 0 Function succeeded
AnnaBridge 145:64910690c574 1292 \return 1 Function failed
AnnaBridge 145:64910690c574 1293 */
AnnaBridge 145:64910690c574 1294 #define __STLEXB (uint32_t)__builtin_arm_stlex
AnnaBridge 145:64910690c574 1295
AnnaBridge 145:64910690c574 1296
AnnaBridge 145:64910690c574 1297 /**
AnnaBridge 145:64910690c574 1298 \brief Store-Release Exclusive (16 bit)
AnnaBridge 145:64910690c574 1299 \details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge 145:64910690c574 1300 \param [in] value Value to store
AnnaBridge 145:64910690c574 1301 \param [in] ptr Pointer to location
AnnaBridge 145:64910690c574 1302 \return 0 Function succeeded
AnnaBridge 145:64910690c574 1303 \return 1 Function failed
AnnaBridge 145:64910690c574 1304 */
AnnaBridge 145:64910690c574 1305 #define __STLEXH (uint32_t)__builtin_arm_stlex
AnnaBridge 145:64910690c574 1306
AnnaBridge 145:64910690c574 1307
AnnaBridge 145:64910690c574 1308 /**
AnnaBridge 145:64910690c574 1309 \brief Store-Release Exclusive (32 bit)
AnnaBridge 145:64910690c574 1310 \details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge 145:64910690c574 1311 \param [in] value Value to store
AnnaBridge 145:64910690c574 1312 \param [in] ptr Pointer to location
AnnaBridge 145:64910690c574 1313 \return 0 Function succeeded
AnnaBridge 145:64910690c574 1314 \return 1 Function failed
AnnaBridge 145:64910690c574 1315 */
AnnaBridge 145:64910690c574 1316 #define __STLEX (uint32_t)__builtin_arm_stlex
AnnaBridge 145:64910690c574 1317
AnnaBridge 145:64910690c574 1318 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 145:64910690c574 1319 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 145:64910690c574 1320
AnnaBridge 145:64910690c574 1321 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge 145:64910690c574 1322
AnnaBridge 145:64910690c574 1323
AnnaBridge 145:64910690c574 1324 /* ################### Compiler specific Intrinsics ########################### */
AnnaBridge 145:64910690c574 1325 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge 145:64910690c574 1326 Access to dedicated SIMD instructions
AnnaBridge 145:64910690c574 1327 @{
AnnaBridge 145:64910690c574 1328 */
AnnaBridge 145:64910690c574 1329
AnnaBridge 145:64910690c574 1330 #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
AnnaBridge 145:64910690c574 1331
Anna Bridge 169:a7c7b631e539 1332 __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1333 {
AnnaBridge 145:64910690c574 1334 uint32_t result;
AnnaBridge 145:64910690c574 1335
AnnaBridge 145:64910690c574 1336 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1337 return(result);
AnnaBridge 145:64910690c574 1338 }
AnnaBridge 145:64910690c574 1339
Anna Bridge 169:a7c7b631e539 1340 __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1341 {
AnnaBridge 145:64910690c574 1342 uint32_t result;
AnnaBridge 145:64910690c574 1343
AnnaBridge 145:64910690c574 1344 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1345 return(result);
AnnaBridge 145:64910690c574 1346 }
AnnaBridge 145:64910690c574 1347
Anna Bridge 169:a7c7b631e539 1348 __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1349 {
AnnaBridge 145:64910690c574 1350 uint32_t result;
AnnaBridge 145:64910690c574 1351
AnnaBridge 145:64910690c574 1352 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1353 return(result);
AnnaBridge 145:64910690c574 1354 }
AnnaBridge 145:64910690c574 1355
Anna Bridge 169:a7c7b631e539 1356 __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1357 {
AnnaBridge 145:64910690c574 1358 uint32_t result;
AnnaBridge 145:64910690c574 1359
AnnaBridge 145:64910690c574 1360 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1361 return(result);
AnnaBridge 145:64910690c574 1362 }
AnnaBridge 145:64910690c574 1363
Anna Bridge 169:a7c7b631e539 1364 __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1365 {
AnnaBridge 145:64910690c574 1366 uint32_t result;
AnnaBridge 145:64910690c574 1367
AnnaBridge 145:64910690c574 1368 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1369 return(result);
AnnaBridge 145:64910690c574 1370 }
AnnaBridge 145:64910690c574 1371
Anna Bridge 169:a7c7b631e539 1372 __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1373 {
AnnaBridge 145:64910690c574 1374 uint32_t result;
AnnaBridge 145:64910690c574 1375
AnnaBridge 145:64910690c574 1376 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1377 return(result);
AnnaBridge 145:64910690c574 1378 }
AnnaBridge 145:64910690c574 1379
AnnaBridge 145:64910690c574 1380
Anna Bridge 169:a7c7b631e539 1381 __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1382 {
AnnaBridge 145:64910690c574 1383 uint32_t result;
AnnaBridge 145:64910690c574 1384
AnnaBridge 145:64910690c574 1385 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1386 return(result);
AnnaBridge 145:64910690c574 1387 }
AnnaBridge 145:64910690c574 1388
Anna Bridge 169:a7c7b631e539 1389 __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1390 {
AnnaBridge 145:64910690c574 1391 uint32_t result;
AnnaBridge 145:64910690c574 1392
AnnaBridge 145:64910690c574 1393 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1394 return(result);
AnnaBridge 145:64910690c574 1395 }
AnnaBridge 145:64910690c574 1396
Anna Bridge 169:a7c7b631e539 1397 __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1398 {
AnnaBridge 145:64910690c574 1399 uint32_t result;
AnnaBridge 145:64910690c574 1400
AnnaBridge 145:64910690c574 1401 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1402 return(result);
AnnaBridge 145:64910690c574 1403 }
AnnaBridge 145:64910690c574 1404
Anna Bridge 169:a7c7b631e539 1405 __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1406 {
AnnaBridge 145:64910690c574 1407 uint32_t result;
AnnaBridge 145:64910690c574 1408
AnnaBridge 145:64910690c574 1409 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1410 return(result);
AnnaBridge 145:64910690c574 1411 }
AnnaBridge 145:64910690c574 1412
Anna Bridge 169:a7c7b631e539 1413 __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1414 {
AnnaBridge 145:64910690c574 1415 uint32_t result;
AnnaBridge 145:64910690c574 1416
AnnaBridge 145:64910690c574 1417 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1418 return(result);
AnnaBridge 145:64910690c574 1419 }
AnnaBridge 145:64910690c574 1420
Anna Bridge 169:a7c7b631e539 1421 __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1422 {
AnnaBridge 145:64910690c574 1423 uint32_t result;
AnnaBridge 145:64910690c574 1424
AnnaBridge 145:64910690c574 1425 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1426 return(result);
AnnaBridge 145:64910690c574 1427 }
AnnaBridge 145:64910690c574 1428
AnnaBridge 145:64910690c574 1429
Anna Bridge 169:a7c7b631e539 1430 __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1431 {
AnnaBridge 145:64910690c574 1432 uint32_t result;
AnnaBridge 145:64910690c574 1433
AnnaBridge 145:64910690c574 1434 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1435 return(result);
AnnaBridge 145:64910690c574 1436 }
AnnaBridge 145:64910690c574 1437
Anna Bridge 169:a7c7b631e539 1438 __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1439 {
AnnaBridge 145:64910690c574 1440 uint32_t result;
AnnaBridge 145:64910690c574 1441
AnnaBridge 145:64910690c574 1442 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1443 return(result);
AnnaBridge 145:64910690c574 1444 }
AnnaBridge 145:64910690c574 1445
Anna Bridge 169:a7c7b631e539 1446 __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1447 {
AnnaBridge 145:64910690c574 1448 uint32_t result;
AnnaBridge 145:64910690c574 1449
AnnaBridge 145:64910690c574 1450 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1451 return(result);
AnnaBridge 145:64910690c574 1452 }
AnnaBridge 145:64910690c574 1453
Anna Bridge 169:a7c7b631e539 1454 __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1455 {
AnnaBridge 145:64910690c574 1456 uint32_t result;
AnnaBridge 145:64910690c574 1457
AnnaBridge 145:64910690c574 1458 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1459 return(result);
AnnaBridge 145:64910690c574 1460 }
AnnaBridge 145:64910690c574 1461
Anna Bridge 169:a7c7b631e539 1462 __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1463 {
AnnaBridge 145:64910690c574 1464 uint32_t result;
AnnaBridge 145:64910690c574 1465
AnnaBridge 145:64910690c574 1466 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1467 return(result);
AnnaBridge 145:64910690c574 1468 }
AnnaBridge 145:64910690c574 1469
Anna Bridge 169:a7c7b631e539 1470 __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1471 {
AnnaBridge 145:64910690c574 1472 uint32_t result;
AnnaBridge 145:64910690c574 1473
AnnaBridge 145:64910690c574 1474 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1475 return(result);
AnnaBridge 145:64910690c574 1476 }
AnnaBridge 145:64910690c574 1477
Anna Bridge 169:a7c7b631e539 1478 __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1479 {
AnnaBridge 145:64910690c574 1480 uint32_t result;
AnnaBridge 145:64910690c574 1481
AnnaBridge 145:64910690c574 1482 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1483 return(result);
AnnaBridge 145:64910690c574 1484 }
AnnaBridge 145:64910690c574 1485
Anna Bridge 169:a7c7b631e539 1486 __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1487 {
AnnaBridge 145:64910690c574 1488 uint32_t result;
AnnaBridge 145:64910690c574 1489
AnnaBridge 145:64910690c574 1490 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1491 return(result);
AnnaBridge 145:64910690c574 1492 }
AnnaBridge 145:64910690c574 1493
Anna Bridge 169:a7c7b631e539 1494 __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1495 {
AnnaBridge 145:64910690c574 1496 uint32_t result;
AnnaBridge 145:64910690c574 1497
AnnaBridge 145:64910690c574 1498 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1499 return(result);
AnnaBridge 145:64910690c574 1500 }
AnnaBridge 145:64910690c574 1501
Anna Bridge 169:a7c7b631e539 1502 __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1503 {
AnnaBridge 145:64910690c574 1504 uint32_t result;
AnnaBridge 145:64910690c574 1505
AnnaBridge 145:64910690c574 1506 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1507 return(result);
AnnaBridge 145:64910690c574 1508 }
AnnaBridge 145:64910690c574 1509
Anna Bridge 169:a7c7b631e539 1510 __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1511 {
AnnaBridge 145:64910690c574 1512 uint32_t result;
AnnaBridge 145:64910690c574 1513
AnnaBridge 145:64910690c574 1514 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1515 return(result);
AnnaBridge 145:64910690c574 1516 }
AnnaBridge 145:64910690c574 1517
Anna Bridge 169:a7c7b631e539 1518 __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1519 {
AnnaBridge 145:64910690c574 1520 uint32_t result;
AnnaBridge 145:64910690c574 1521
AnnaBridge 145:64910690c574 1522 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1523 return(result);
AnnaBridge 145:64910690c574 1524 }
AnnaBridge 145:64910690c574 1525
Anna Bridge 169:a7c7b631e539 1526 __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1527 {
AnnaBridge 145:64910690c574 1528 uint32_t result;
AnnaBridge 145:64910690c574 1529
AnnaBridge 145:64910690c574 1530 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1531 return(result);
AnnaBridge 145:64910690c574 1532 }
AnnaBridge 145:64910690c574 1533
Anna Bridge 169:a7c7b631e539 1534 __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1535 {
AnnaBridge 145:64910690c574 1536 uint32_t result;
AnnaBridge 145:64910690c574 1537
AnnaBridge 145:64910690c574 1538 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1539 return(result);
AnnaBridge 145:64910690c574 1540 }
AnnaBridge 145:64910690c574 1541
Anna Bridge 169:a7c7b631e539 1542 __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1543 {
AnnaBridge 145:64910690c574 1544 uint32_t result;
AnnaBridge 145:64910690c574 1545
AnnaBridge 145:64910690c574 1546 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1547 return(result);
AnnaBridge 145:64910690c574 1548 }
AnnaBridge 145:64910690c574 1549
Anna Bridge 169:a7c7b631e539 1550 __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1551 {
AnnaBridge 145:64910690c574 1552 uint32_t result;
AnnaBridge 145:64910690c574 1553
AnnaBridge 145:64910690c574 1554 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1555 return(result);
AnnaBridge 145:64910690c574 1556 }
AnnaBridge 145:64910690c574 1557
Anna Bridge 169:a7c7b631e539 1558 __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1559 {
AnnaBridge 145:64910690c574 1560 uint32_t result;
AnnaBridge 145:64910690c574 1561
AnnaBridge 145:64910690c574 1562 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1563 return(result);
AnnaBridge 145:64910690c574 1564 }
AnnaBridge 145:64910690c574 1565
Anna Bridge 169:a7c7b631e539 1566 __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1567 {
AnnaBridge 145:64910690c574 1568 uint32_t result;
AnnaBridge 145:64910690c574 1569
AnnaBridge 145:64910690c574 1570 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1571 return(result);
AnnaBridge 145:64910690c574 1572 }
AnnaBridge 145:64910690c574 1573
Anna Bridge 169:a7c7b631e539 1574 __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1575 {
AnnaBridge 145:64910690c574 1576 uint32_t result;
AnnaBridge 145:64910690c574 1577
AnnaBridge 145:64910690c574 1578 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1579 return(result);
AnnaBridge 145:64910690c574 1580 }
AnnaBridge 145:64910690c574 1581
Anna Bridge 169:a7c7b631e539 1582 __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1583 {
AnnaBridge 145:64910690c574 1584 uint32_t result;
AnnaBridge 145:64910690c574 1585
AnnaBridge 145:64910690c574 1586 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1587 return(result);
AnnaBridge 145:64910690c574 1588 }
AnnaBridge 145:64910690c574 1589
Anna Bridge 169:a7c7b631e539 1590 __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1591 {
AnnaBridge 145:64910690c574 1592 uint32_t result;
AnnaBridge 145:64910690c574 1593
AnnaBridge 145:64910690c574 1594 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1595 return(result);
AnnaBridge 145:64910690c574 1596 }
AnnaBridge 145:64910690c574 1597
Anna Bridge 169:a7c7b631e539 1598 __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1599 {
AnnaBridge 145:64910690c574 1600 uint32_t result;
AnnaBridge 145:64910690c574 1601
AnnaBridge 145:64910690c574 1602 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1603 return(result);
AnnaBridge 145:64910690c574 1604 }
AnnaBridge 145:64910690c574 1605
Anna Bridge 169:a7c7b631e539 1606 __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1607 {
AnnaBridge 145:64910690c574 1608 uint32_t result;
AnnaBridge 145:64910690c574 1609
AnnaBridge 145:64910690c574 1610 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1611 return(result);
AnnaBridge 145:64910690c574 1612 }
AnnaBridge 145:64910690c574 1613
Anna Bridge 169:a7c7b631e539 1614 __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1615 {
AnnaBridge 145:64910690c574 1616 uint32_t result;
AnnaBridge 145:64910690c574 1617
AnnaBridge 145:64910690c574 1618 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1619 return(result);
AnnaBridge 145:64910690c574 1620 }
AnnaBridge 145:64910690c574 1621
Anna Bridge 169:a7c7b631e539 1622 __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1623 {
AnnaBridge 145:64910690c574 1624 uint32_t result;
AnnaBridge 145:64910690c574 1625
AnnaBridge 145:64910690c574 1626 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1627 return(result);
AnnaBridge 145:64910690c574 1628 }
AnnaBridge 145:64910690c574 1629
Anna Bridge 169:a7c7b631e539 1630 __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 145:64910690c574 1631 {
AnnaBridge 145:64910690c574 1632 uint32_t result;
AnnaBridge 145:64910690c574 1633
AnnaBridge 145:64910690c574 1634 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 145:64910690c574 1635 return(result);
AnnaBridge 145:64910690c574 1636 }
AnnaBridge 145:64910690c574 1637
AnnaBridge 145:64910690c574 1638 #define __SSAT16(ARG1,ARG2) \
AnnaBridge 145:64910690c574 1639 ({ \
AnnaBridge 145:64910690c574 1640 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 145:64910690c574 1641 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 145:64910690c574 1642 __RES; \
AnnaBridge 145:64910690c574 1643 })
AnnaBridge 145:64910690c574 1644
AnnaBridge 145:64910690c574 1645 #define __USAT16(ARG1,ARG2) \
AnnaBridge 145:64910690c574 1646 ({ \
AnnaBridge 145:64910690c574 1647 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 145:64910690c574 1648 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 145:64910690c574 1649 __RES; \
AnnaBridge 145:64910690c574 1650 })
AnnaBridge 145:64910690c574 1651
Anna Bridge 169:a7c7b631e539 1652 __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge 145:64910690c574 1653 {
AnnaBridge 145:64910690c574 1654 uint32_t result;
AnnaBridge 145:64910690c574 1655
AnnaBridge 145:64910690c574 1656 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 145:64910690c574 1657 return(result);
AnnaBridge 145:64910690c574 1658 }
AnnaBridge 145:64910690c574 1659
Anna Bridge 169:a7c7b631e539 1660 __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1661 {
AnnaBridge 145:64910690c574 1662 uint32_t result;
AnnaBridge 145:64910690c574 1663
AnnaBridge 145:64910690c574 1664 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1665 return(result);
AnnaBridge 145:64910690c574 1666 }
AnnaBridge 145:64910690c574 1667
Anna Bridge 169:a7c7b631e539 1668 __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge 145:64910690c574 1669 {
AnnaBridge 145:64910690c574 1670 uint32_t result;
AnnaBridge 145:64910690c574 1671
AnnaBridge 145:64910690c574 1672 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 145:64910690c574 1673 return(result);
AnnaBridge 145:64910690c574 1674 }
AnnaBridge 145:64910690c574 1675
Anna Bridge 169:a7c7b631e539 1676 __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1677 {
AnnaBridge 145:64910690c574 1678 uint32_t result;
AnnaBridge 145:64910690c574 1679
AnnaBridge 145:64910690c574 1680 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1681 return(result);
AnnaBridge 145:64910690c574 1682 }
AnnaBridge 145:64910690c574 1683
Anna Bridge 169:a7c7b631e539 1684 __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1685 {
AnnaBridge 145:64910690c574 1686 uint32_t result;
AnnaBridge 145:64910690c574 1687
AnnaBridge 145:64910690c574 1688 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1689 return(result);
AnnaBridge 145:64910690c574 1690 }
AnnaBridge 145:64910690c574 1691
Anna Bridge 169:a7c7b631e539 1692 __STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1693 {
AnnaBridge 145:64910690c574 1694 uint32_t result;
AnnaBridge 145:64910690c574 1695
AnnaBridge 145:64910690c574 1696 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1697 return(result);
AnnaBridge 145:64910690c574 1698 }
AnnaBridge 145:64910690c574 1699
Anna Bridge 169:a7c7b631e539 1700 __STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 145:64910690c574 1701 {
AnnaBridge 145:64910690c574 1702 uint32_t result;
AnnaBridge 145:64910690c574 1703
AnnaBridge 145:64910690c574 1704 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 145:64910690c574 1705 return(result);
AnnaBridge 145:64910690c574 1706 }
AnnaBridge 145:64910690c574 1707
Anna Bridge 169:a7c7b631e539 1708 __STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 145:64910690c574 1709 {
AnnaBridge 145:64910690c574 1710 uint32_t result;
AnnaBridge 145:64910690c574 1711
AnnaBridge 145:64910690c574 1712 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 145:64910690c574 1713 return(result);
AnnaBridge 145:64910690c574 1714 }
AnnaBridge 145:64910690c574 1715
Anna Bridge 169:a7c7b631e539 1716 __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 145:64910690c574 1717 {
AnnaBridge 145:64910690c574 1718 union llreg_u{
AnnaBridge 145:64910690c574 1719 uint32_t w32[2];
AnnaBridge 145:64910690c574 1720 uint64_t w64;
AnnaBridge 145:64910690c574 1721 } llr;
AnnaBridge 145:64910690c574 1722 llr.w64 = acc;
AnnaBridge 145:64910690c574 1723
AnnaBridge 145:64910690c574 1724 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 145:64910690c574 1725 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 145:64910690c574 1726 #else /* Big endian */
AnnaBridge 145:64910690c574 1727 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 145:64910690c574 1728 #endif
AnnaBridge 145:64910690c574 1729
AnnaBridge 145:64910690c574 1730 return(llr.w64);
AnnaBridge 145:64910690c574 1731 }
AnnaBridge 145:64910690c574 1732
Anna Bridge 169:a7c7b631e539 1733 __STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 145:64910690c574 1734 {
AnnaBridge 145:64910690c574 1735 union llreg_u{
AnnaBridge 145:64910690c574 1736 uint32_t w32[2];
AnnaBridge 145:64910690c574 1737 uint64_t w64;
AnnaBridge 145:64910690c574 1738 } llr;
AnnaBridge 145:64910690c574 1739 llr.w64 = acc;
AnnaBridge 145:64910690c574 1740
AnnaBridge 145:64910690c574 1741 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 145:64910690c574 1742 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 145:64910690c574 1743 #else /* Big endian */
AnnaBridge 145:64910690c574 1744 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 145:64910690c574 1745 #endif
AnnaBridge 145:64910690c574 1746
AnnaBridge 145:64910690c574 1747 return(llr.w64);
AnnaBridge 145:64910690c574 1748 }
AnnaBridge 145:64910690c574 1749
Anna Bridge 169:a7c7b631e539 1750 __STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1751 {
AnnaBridge 145:64910690c574 1752 uint32_t result;
AnnaBridge 145:64910690c574 1753
AnnaBridge 145:64910690c574 1754 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1755 return(result);
AnnaBridge 145:64910690c574 1756 }
AnnaBridge 145:64910690c574 1757
Anna Bridge 169:a7c7b631e539 1758 __STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1759 {
AnnaBridge 145:64910690c574 1760 uint32_t result;
AnnaBridge 145:64910690c574 1761
AnnaBridge 145:64910690c574 1762 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1763 return(result);
AnnaBridge 145:64910690c574 1764 }
AnnaBridge 145:64910690c574 1765
Anna Bridge 169:a7c7b631e539 1766 __STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 145:64910690c574 1767 {
AnnaBridge 145:64910690c574 1768 uint32_t result;
AnnaBridge 145:64910690c574 1769
AnnaBridge 145:64910690c574 1770 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 145:64910690c574 1771 return(result);
AnnaBridge 145:64910690c574 1772 }
AnnaBridge 145:64910690c574 1773
Anna Bridge 169:a7c7b631e539 1774 __STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 145:64910690c574 1775 {
AnnaBridge 145:64910690c574 1776 uint32_t result;
AnnaBridge 145:64910690c574 1777
AnnaBridge 145:64910690c574 1778 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 145:64910690c574 1779 return(result);
AnnaBridge 145:64910690c574 1780 }
AnnaBridge 145:64910690c574 1781
Anna Bridge 169:a7c7b631e539 1782 __STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 145:64910690c574 1783 {
AnnaBridge 145:64910690c574 1784 union llreg_u{
AnnaBridge 145:64910690c574 1785 uint32_t w32[2];
AnnaBridge 145:64910690c574 1786 uint64_t w64;
AnnaBridge 145:64910690c574 1787 } llr;
AnnaBridge 145:64910690c574 1788 llr.w64 = acc;
AnnaBridge 145:64910690c574 1789
AnnaBridge 145:64910690c574 1790 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 145:64910690c574 1791 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 145:64910690c574 1792 #else /* Big endian */
AnnaBridge 145:64910690c574 1793 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 145:64910690c574 1794 #endif
AnnaBridge 145:64910690c574 1795
AnnaBridge 145:64910690c574 1796 return(llr.w64);
AnnaBridge 145:64910690c574 1797 }
AnnaBridge 145:64910690c574 1798
Anna Bridge 169:a7c7b631e539 1799 __STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 145:64910690c574 1800 {
AnnaBridge 145:64910690c574 1801 union llreg_u{
AnnaBridge 145:64910690c574 1802 uint32_t w32[2];
AnnaBridge 145:64910690c574 1803 uint64_t w64;
AnnaBridge 145:64910690c574 1804 } llr;
AnnaBridge 145:64910690c574 1805 llr.w64 = acc;
AnnaBridge 145:64910690c574 1806
AnnaBridge 145:64910690c574 1807 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 145:64910690c574 1808 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 145:64910690c574 1809 #else /* Big endian */
AnnaBridge 145:64910690c574 1810 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 145:64910690c574 1811 #endif
AnnaBridge 145:64910690c574 1812
AnnaBridge 145:64910690c574 1813 return(llr.w64);
AnnaBridge 145:64910690c574 1814 }
AnnaBridge 145:64910690c574 1815
Anna Bridge 169:a7c7b631e539 1816 __STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge 145:64910690c574 1817 {
AnnaBridge 145:64910690c574 1818 uint32_t result;
AnnaBridge 145:64910690c574 1819
AnnaBridge 145:64910690c574 1820 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1821 return(result);
AnnaBridge 145:64910690c574 1822 }
AnnaBridge 145:64910690c574 1823
Anna Bridge 169:a7c7b631e539 1824 __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge 145:64910690c574 1825 {
AnnaBridge 145:64910690c574 1826 int32_t result;
AnnaBridge 145:64910690c574 1827
AnnaBridge 145:64910690c574 1828 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1829 return(result);
AnnaBridge 145:64910690c574 1830 }
AnnaBridge 145:64910690c574 1831
Anna Bridge 169:a7c7b631e539 1832 __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge 145:64910690c574 1833 {
AnnaBridge 145:64910690c574 1834 int32_t result;
AnnaBridge 145:64910690c574 1835
AnnaBridge 145:64910690c574 1836 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 145:64910690c574 1837 return(result);
AnnaBridge 145:64910690c574 1838 }
AnnaBridge 145:64910690c574 1839
AnnaBridge 145:64910690c574 1840 #if 0
AnnaBridge 145:64910690c574 1841 #define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge 145:64910690c574 1842 ({ \
AnnaBridge 145:64910690c574 1843 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 145:64910690c574 1844 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 145:64910690c574 1845 __RES; \
AnnaBridge 145:64910690c574 1846 })
AnnaBridge 145:64910690c574 1847
AnnaBridge 145:64910690c574 1848 #define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge 145:64910690c574 1849 ({ \
AnnaBridge 145:64910690c574 1850 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 145:64910690c574 1851 if (ARG3 == 0) \
AnnaBridge 145:64910690c574 1852 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge 145:64910690c574 1853 else \
AnnaBridge 145:64910690c574 1854 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 145:64910690c574 1855 __RES; \
AnnaBridge 145:64910690c574 1856 })
AnnaBridge 145:64910690c574 1857 #endif
AnnaBridge 145:64910690c574 1858
AnnaBridge 145:64910690c574 1859 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
AnnaBridge 145:64910690c574 1860 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge 145:64910690c574 1861
AnnaBridge 145:64910690c574 1862 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
AnnaBridge 145:64910690c574 1863 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge 145:64910690c574 1864
Anna Bridge 169:a7c7b631e539 1865 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge 145:64910690c574 1866 {
AnnaBridge 145:64910690c574 1867 int32_t result;
AnnaBridge 145:64910690c574 1868
AnnaBridge 145:64910690c574 1869 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 145:64910690c574 1870 return(result);
AnnaBridge 145:64910690c574 1871 }
AnnaBridge 145:64910690c574 1872
AnnaBridge 145:64910690c574 1873 #endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge 145:64910690c574 1874 /*@} end of group CMSIS_SIMD_intrinsics */
AnnaBridge 145:64910690c574 1875
AnnaBridge 145:64910690c574 1876
AnnaBridge 145:64910690c574 1877 #endif /* __CMSIS_ARMCLANG_H */