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TARGET_UNO_91H/TOOLCHAIN_ARM_STD/RDA5981C.sct@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 172:65be27845400 1 #! armcc -E
AnnaBridge 172:65be27845400 2
AnnaBridge 172:65be27845400 3 //#define RDA_ICACHE_DISABLE
AnnaBridge 172:65be27845400 4 #define RDA_PARTITION_INDEX 0
AnnaBridge 172:65be27845400 5
AnnaBridge 172:65be27845400 6 #define RDA_ROM_BASE (0x00000000)
AnnaBridge 172:65be27845400 7 #define RDA_IRAM_BASE (0x00100000)
AnnaBridge 172:65be27845400 8 #define RDA_IRAM_SIZE (0x00020000)
AnnaBridge 172:65be27845400 9 #define RDA_DRAM_BASE (0x00180000)
AnnaBridge 172:65be27845400 10 #define RDA_DRAM_SIZE (0x00028000)
AnnaBridge 172:65be27845400 11 #define RDA_PSRAM_BASE (0x10000000)
AnnaBridge 172:65be27845400 12 #define RDA_FLASH_BASE (0x14000000)
AnnaBridge 172:65be27845400 13 #define RDA_ICACHE_BASE (0x18000000)
AnnaBridge 172:65be27845400 14 #if (0 == RDA_PARTITION_INDEX)
AnnaBridge 172:65be27845400 15 #define RDA_PADDR_OFST (0x00001000)
AnnaBridge 172:65be27845400 16 #elif (1 == RDA_PARTITION_INDEX)
AnnaBridge 172:65be27845400 17 #define RDA_PADDR_OFST (0x001F5000)
AnnaBridge 172:65be27845400 18 #else
AnnaBridge 172:65be27845400 19 #error "Not supported"
AnnaBridge 172:65be27845400 20 #endif
AnnaBridge 172:65be27845400 21 #if defined(RDA_ICACHE_DISABLE)
AnnaBridge 172:65be27845400 22 #define RDA_CODE_BASE (RDA_FLASH_BASE + RDA_PADDR_OFST)
AnnaBridge 172:65be27845400 23 #else /* RDA_ICACHE_DISABLE */
AnnaBridge 172:65be27845400 24 #define RDA_CODE_BASE (RDA_ICACHE_BASE + RDA_PADDR_OFST)
AnnaBridge 172:65be27845400 25 #endif /* RDA_ICACHE_DISABLE */
AnnaBridge 172:65be27845400 26 #define RDA_CODE_SIZE (0x001F4000)
AnnaBridge 172:65be27845400 27 #define RDA_AHB1_BASE (0x40100000)
AnnaBridge 172:65be27845400 28 #define RDA_MEMC_BASE (RDA_AHB1_BASE + 0x00000)
AnnaBridge 172:65be27845400 29
AnnaBridge 172:65be27845400 30 ; max code size: RDA_CODE_SIZE
AnnaBridge 172:65be27845400 31 LR_IROM1 RDA_CODE_BASE RDA_CODE_SIZE { ; load region size_region
AnnaBridge 172:65be27845400 32 ER_IROM0 RDA_CODE_BASE RDA_CODE_SIZE { ; load address = execution address
AnnaBridge 172:65be27845400 33 *.o (RESET, +First)
AnnaBridge 172:65be27845400 34 *(InRoot$$Sections)
AnnaBridge 172:65be27845400 35 .ANY (+RO)
AnnaBridge 172:65be27845400 36 }
AnnaBridge 172:65be27845400 37 ; 8_byte_aligned(31 vect * 4 bytes) = 8_byte_aligned(0x7C) = 0x80
AnnaBridge 172:65be27845400 38 ER_IRAMVEC RDA_IRAM_BASE EMPTY 0x80 { ; Reserved for vectors
AnnaBridge 172:65be27845400 39 }
AnnaBridge 172:65be27845400 40 ; IRAM Size: Total(128KB) - Vector(128B) - Stack(2KB)
AnnaBridge 172:65be27845400 41 RW_IRAM1 AlignExpr(+0, 8) (0x20000 - 0x80 - 0x800) {
AnnaBridge 172:65be27845400 42 .ANY (+RW +ZI)
AnnaBridge 172:65be27845400 43 }
AnnaBridge 172:65be27845400 44 ARM_LIB_STACK AlignExpr(+0, 8) EMPTY (RDA_IRAM_BASE + RDA_IRAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 8)) {
AnnaBridge 172:65be27845400 45 }
AnnaBridge 172:65be27845400 46 ARM_LIB_HEAP RDA_DRAM_BASE EMPTY RDA_DRAM_SIZE {
AnnaBridge 172:65be27845400 47 }
AnnaBridge 172:65be27845400 48 RW_IRAM2 RDA_MEMC_BASE 0x18C00 { ; RW data, MACLIB_RAM
AnnaBridge 172:65be27845400 49 .ANY (SECTIONRESERVED1)
AnnaBridge 172:65be27845400 50 }
AnnaBridge 172:65be27845400 51 RW_IRAM3 (RDA_MEMC_BASE + 0x18C00) 0x0C00 { ; RW data, AES_RAM
AnnaBridge 172:65be27845400 52 .ANY (AHB1SMEM0)
AnnaBridge 172:65be27845400 53 }
AnnaBridge 172:65be27845400 54 RW_IRAM4 (RDA_MEMC_BASE + 0x19800) 0x6800 { ; RW data, WLAN RAM
AnnaBridge 172:65be27845400 55 .ANY (AHB1SMEM1)
AnnaBridge 172:65be27845400 56 }
AnnaBridge 172:65be27845400 57 }