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TARGET_TEENSY3_1/TOOLCHAIN_GCC_ARM/clk_freqs.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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Kojto | 93:e188a91d3eaa | 1 | /* mbed Microcontroller Library |
Kojto | 93:e188a91d3eaa | 2 | * Copyright (c) 2006-2015 ARM Limited |
Kojto | 93:e188a91d3eaa | 3 | * |
Kojto | 93:e188a91d3eaa | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
Kojto | 93:e188a91d3eaa | 5 | * you may not use this file except in compliance with the License. |
Kojto | 93:e188a91d3eaa | 6 | * You may obtain a copy of the License at |
Kojto | 93:e188a91d3eaa | 7 | * |
Kojto | 93:e188a91d3eaa | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
Kojto | 93:e188a91d3eaa | 9 | * |
Kojto | 93:e188a91d3eaa | 10 | * Unless required by applicable law or agreed to in writing, software |
Kojto | 93:e188a91d3eaa | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
Kojto | 93:e188a91d3eaa | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
Kojto | 93:e188a91d3eaa | 13 | * See the License for the specific language governing permissions and |
Kojto | 93:e188a91d3eaa | 14 | * limitations under the License. |
Kojto | 93:e188a91d3eaa | 15 | */ |
Kojto | 93:e188a91d3eaa | 16 | #ifndef CLK_FREQS_H |
Kojto | 93:e188a91d3eaa | 17 | #define CLK_FREQS_H |
Kojto | 93:e188a91d3eaa | 18 | |
Kojto | 93:e188a91d3eaa | 19 | #ifdef __cplusplus |
Kojto | 93:e188a91d3eaa | 20 | extern "C" { |
Kojto | 93:e188a91d3eaa | 21 | #endif |
Kojto | 93:e188a91d3eaa | 22 | |
Kojto | 93:e188a91d3eaa | 23 | /*! |
Kojto | 93:e188a91d3eaa | 24 | * \brief Get the peripheral bus clock frequency |
Kojto | 93:e188a91d3eaa | 25 | * \return Bus frequency |
Kojto | 93:e188a91d3eaa | 26 | */ |
Kojto | 93:e188a91d3eaa | 27 | static inline uint32_t bus_frequency(void) { |
Kojto | 93:e188a91d3eaa | 28 | return SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV2_MASK) >> SIM_CLKDIV1_OUTDIV2_SHIFT) + 1); |
Kojto | 93:e188a91d3eaa | 29 | } |
Kojto | 93:e188a91d3eaa | 30 | |
Kojto | 93:e188a91d3eaa | 31 | /*! |
Kojto | 93:e188a91d3eaa | 32 | * \brief Get external oscillator (crystal) frequency |
Kojto | 93:e188a91d3eaa | 33 | * \return External osc frequency |
Kojto | 93:e188a91d3eaa | 34 | */ |
Kojto | 93:e188a91d3eaa | 35 | static uint32_t extosc_frequency(void) { |
Kojto | 93:e188a91d3eaa | 36 | uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT)); |
Kojto | 93:e188a91d3eaa | 37 | |
Kojto | 93:e188a91d3eaa | 38 | if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(2)) //MCG clock = external reference clock |
Kojto | 93:e188a91d3eaa | 39 | return MCGClock; |
Kojto | 93:e188a91d3eaa | 40 | |
Kojto | 93:e188a91d3eaa | 41 | if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0)) { //PLL/FLL is selected |
Kojto | 93:e188a91d3eaa | 42 | uint32_t divider, multiplier; |
Kojto | 93:e188a91d3eaa | 43 | if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) { //FLL is selected |
Kojto | 93:e188a91d3eaa | 44 | if ((MCG->S & MCG_S_IREFST_MASK) == 0x0u) { //FLL uses external reference |
Kojto | 93:e188a91d3eaa | 45 | divider = (uint8_t)(1u << ((MCG->C1 & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT)); |
Kojto | 93:e188a91d3eaa | 46 | if ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u) |
Kojto | 93:e188a91d3eaa | 47 | divider <<= 5u; |
Kojto | 93:e188a91d3eaa | 48 | /* Select correct multiplier to calculate the MCG output clock */ |
Kojto | 93:e188a91d3eaa | 49 | switch (MCG->C4 & (MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS_MASK)) { |
Kojto | 93:e188a91d3eaa | 50 | case 0x0u: |
Kojto | 93:e188a91d3eaa | 51 | multiplier = 640u; |
Kojto | 93:e188a91d3eaa | 52 | break; |
Kojto | 93:e188a91d3eaa | 53 | case 0x20u: |
Kojto | 93:e188a91d3eaa | 54 | multiplier = 1280u; |
Kojto | 93:e188a91d3eaa | 55 | break; |
Kojto | 93:e188a91d3eaa | 56 | case 0x40u: |
Kojto | 93:e188a91d3eaa | 57 | multiplier = 1920u; |
Kojto | 93:e188a91d3eaa | 58 | break; |
Kojto | 93:e188a91d3eaa | 59 | case 0x60u: |
Kojto | 93:e188a91d3eaa | 60 | multiplier = 2560u; |
Kojto | 93:e188a91d3eaa | 61 | break; |
Kojto | 93:e188a91d3eaa | 62 | case 0x80u: |
Kojto | 93:e188a91d3eaa | 63 | multiplier = 732u; |
Kojto | 93:e188a91d3eaa | 64 | break; |
Kojto | 93:e188a91d3eaa | 65 | case 0xA0u: |
Kojto | 93:e188a91d3eaa | 66 | multiplier = 1464u; |
Kojto | 93:e188a91d3eaa | 67 | break; |
Kojto | 93:e188a91d3eaa | 68 | case 0xC0u: |
Kojto | 93:e188a91d3eaa | 69 | multiplier = 2197u; |
Kojto | 93:e188a91d3eaa | 70 | break; |
Kojto | 93:e188a91d3eaa | 71 | case 0xE0u: |
Kojto | 93:e188a91d3eaa | 72 | default: |
Kojto | 93:e188a91d3eaa | 73 | multiplier = 2929u; |
Kojto | 93:e188a91d3eaa | 74 | break; |
Kojto | 93:e188a91d3eaa | 75 | } |
Kojto | 93:e188a91d3eaa | 76 | |
Kojto | 93:e188a91d3eaa | 77 | return MCGClock * divider / multiplier; |
Kojto | 93:e188a91d3eaa | 78 | } |
Kojto | 93:e188a91d3eaa | 79 | } else { //PLL is selected |
Kojto | 93:e188a91d3eaa | 80 | divider = (1u + (MCG->C5 & MCG_C5_PRDIV0_MASK)); |
Kojto | 93:e188a91d3eaa | 81 | multiplier = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 24u); |
Kojto | 93:e188a91d3eaa | 82 | return MCGClock * divider / multiplier; |
Kojto | 93:e188a91d3eaa | 83 | } |
Kojto | 93:e188a91d3eaa | 84 | } |
Kojto | 93:e188a91d3eaa | 85 | |
Kojto | 93:e188a91d3eaa | 86 | //In all other cases either there is no crystal or we cannot determine it |
Kojto | 93:e188a91d3eaa | 87 | //For example when the FLL is running on the internal reference, and there is also an |
Kojto | 93:e188a91d3eaa | 88 | //external crystal. However these are unlikely situations |
Kojto | 93:e188a91d3eaa | 89 | return 0; |
Kojto | 93:e188a91d3eaa | 90 | } |
Kojto | 93:e188a91d3eaa | 91 | |
Kojto | 93:e188a91d3eaa | 92 | //Get MCG PLL/2 or FLL frequency, depending on which one is active, sets PLLFLLSEL bit |
Kojto | 93:e188a91d3eaa | 93 | static uint32_t mcgpllfll_frequency(void) { |
Kojto | 93:e188a91d3eaa | 94 | if ((MCG->C1 & MCG_C1_CLKS_MASK) != MCG_C1_CLKS(0)) //PLL/FLL is not selected |
Kojto | 93:e188a91d3eaa | 95 | return 0; |
Kojto | 93:e188a91d3eaa | 96 | |
Kojto | 93:e188a91d3eaa | 97 | uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT)); |
Kojto | 93:e188a91d3eaa | 98 | if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) { //FLL is selected |
Kojto | 93:e188a91d3eaa | 99 | SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK; //MCG peripheral clock is FLL output |
Kojto | 93:e188a91d3eaa | 100 | return MCGClock; |
Kojto | 93:e188a91d3eaa | 101 | } else { //PLL is selected |
Kojto | 93:e188a91d3eaa | 102 | SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; //MCG peripheral clock is PLL output |
Kojto | 93:e188a91d3eaa | 103 | return MCGClock; |
Kojto | 93:e188a91d3eaa | 104 | } |
Kojto | 93:e188a91d3eaa | 105 | |
Kojto | 93:e188a91d3eaa | 106 | //It is possible the SystemCoreClock isn't running on the PLL, and the PLL is still active |
Kojto | 93:e188a91d3eaa | 107 | //for the peripherals, this is however an unlikely setup |
Kojto | 93:e188a91d3eaa | 108 | } |
Kojto | 93:e188a91d3eaa | 109 | |
Kojto | 93:e188a91d3eaa | 110 | |
Kojto | 93:e188a91d3eaa | 111 | #ifdef __cplusplus |
Kojto | 93:e188a91d3eaa | 112 | } |
Kojto | 93:e188a91d3eaa | 113 | #endif |
Kojto | 93:e188a91d3eaa | 114 | |
Kojto | 93:e188a91d3eaa | 115 | #endif |