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TARGET_SAMD21J18A/TOOLCHAIN_GCC_ARM/comp_ac.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 171:3a7713b1edbc | 1 | /** |
AnnaBridge | 171:3a7713b1edbc | 2 | * \file |
AnnaBridge | 171:3a7713b1edbc | 3 | * |
AnnaBridge | 171:3a7713b1edbc | 4 | * \brief Component description for AC |
AnnaBridge | 171:3a7713b1edbc | 5 | * |
AnnaBridge | 171:3a7713b1edbc | 6 | * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. |
AnnaBridge | 171:3a7713b1edbc | 7 | * |
AnnaBridge | 171:3a7713b1edbc | 8 | * \asf_license_start |
AnnaBridge | 171:3a7713b1edbc | 9 | * |
AnnaBridge | 171:3a7713b1edbc | 10 | * \page License |
AnnaBridge | 171:3a7713b1edbc | 11 | * |
AnnaBridge | 171:3a7713b1edbc | 12 | * Redistribution and use in source and binary forms, with or without |
AnnaBridge | 171:3a7713b1edbc | 13 | * modification, are permitted provided that the following conditions are met: |
AnnaBridge | 171:3a7713b1edbc | 14 | * |
AnnaBridge | 171:3a7713b1edbc | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 171:3a7713b1edbc | 16 | * this list of conditions and the following disclaimer. |
AnnaBridge | 171:3a7713b1edbc | 17 | * |
AnnaBridge | 171:3a7713b1edbc | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 171:3a7713b1edbc | 19 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 171:3a7713b1edbc | 20 | * and/or other materials provided with the distribution. |
AnnaBridge | 171:3a7713b1edbc | 21 | * |
AnnaBridge | 171:3a7713b1edbc | 22 | * 3. The name of Atmel may not be used to endorse or promote products derived |
AnnaBridge | 171:3a7713b1edbc | 23 | * from this software without specific prior written permission. |
AnnaBridge | 171:3a7713b1edbc | 24 | * |
AnnaBridge | 171:3a7713b1edbc | 25 | * 4. This software may only be redistributed and used in connection with an |
AnnaBridge | 171:3a7713b1edbc | 26 | * Atmel microcontroller product. |
AnnaBridge | 171:3a7713b1edbc | 27 | * |
AnnaBridge | 171:3a7713b1edbc | 28 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED |
AnnaBridge | 171:3a7713b1edbc | 29 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
AnnaBridge | 171:3a7713b1edbc | 30 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
AnnaBridge | 171:3a7713b1edbc | 31 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR |
AnnaBridge | 171:3a7713b1edbc | 32 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
AnnaBridge | 171:3a7713b1edbc | 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
AnnaBridge | 171:3a7713b1edbc | 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
AnnaBridge | 171:3a7713b1edbc | 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
AnnaBridge | 171:3a7713b1edbc | 36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
AnnaBridge | 171:3a7713b1edbc | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
AnnaBridge | 171:3a7713b1edbc | 38 | * POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 171:3a7713b1edbc | 39 | * |
AnnaBridge | 171:3a7713b1edbc | 40 | * \asf_license_stop |
AnnaBridge | 171:3a7713b1edbc | 41 | * |
AnnaBridge | 171:3a7713b1edbc | 42 | */ |
AnnaBridge | 171:3a7713b1edbc | 43 | /* |
AnnaBridge | 171:3a7713b1edbc | 44 | * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> |
AnnaBridge | 171:3a7713b1edbc | 45 | */ |
AnnaBridge | 171:3a7713b1edbc | 46 | |
AnnaBridge | 171:3a7713b1edbc | 47 | #ifndef _SAMD21_AC_COMPONENT_ |
AnnaBridge | 171:3a7713b1edbc | 48 | #define _SAMD21_AC_COMPONENT_ |
AnnaBridge | 171:3a7713b1edbc | 49 | |
AnnaBridge | 171:3a7713b1edbc | 50 | /* ========================================================================== */ |
AnnaBridge | 171:3a7713b1edbc | 51 | /** SOFTWARE API DEFINITION FOR AC */ |
AnnaBridge | 171:3a7713b1edbc | 52 | /* ========================================================================== */ |
AnnaBridge | 171:3a7713b1edbc | 53 | /** \addtogroup SAMD21_AC Analog Comparators */ |
AnnaBridge | 171:3a7713b1edbc | 54 | /*@{*/ |
AnnaBridge | 171:3a7713b1edbc | 55 | |
AnnaBridge | 171:3a7713b1edbc | 56 | #define AC_U2205 |
AnnaBridge | 171:3a7713b1edbc | 57 | #define REV_AC 0x112 |
AnnaBridge | 171:3a7713b1edbc | 58 | |
AnnaBridge | 171:3a7713b1edbc | 59 | /* -------- AC_CTRLA : (AC Offset: 0x00) (R/W 8) Control A -------- */ |
AnnaBridge | 171:3a7713b1edbc | 60 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
AnnaBridge | 171:3a7713b1edbc | 61 | typedef union { |
AnnaBridge | 171:3a7713b1edbc | 62 | struct { |
AnnaBridge | 171:3a7713b1edbc | 63 | uint8_t SWRST:1; /*!< bit: 0 Software Reset */ |
AnnaBridge | 171:3a7713b1edbc | 64 | uint8_t ENABLE:1; /*!< bit: 1 Enable */ |
AnnaBridge | 171:3a7713b1edbc | 65 | uint8_t RUNSTDBY:1; /*!< bit: 2 Run in Standby */ |
AnnaBridge | 171:3a7713b1edbc | 66 | uint8_t :4; /*!< bit: 3.. 6 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 67 | uint8_t LPMUX:1; /*!< bit: 7 Low-Power Mux */ |
AnnaBridge | 171:3a7713b1edbc | 68 | } bit; /*!< Structure used for bit access */ |
AnnaBridge | 171:3a7713b1edbc | 69 | uint8_t reg; /*!< Type used for register access */ |
AnnaBridge | 171:3a7713b1edbc | 70 | } AC_CTRLA_Type; |
AnnaBridge | 171:3a7713b1edbc | 71 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
AnnaBridge | 171:3a7713b1edbc | 72 | |
AnnaBridge | 171:3a7713b1edbc | 73 | #define AC_CTRLA_OFFSET 0x00 /**< \brief (AC_CTRLA offset) Control A */ |
AnnaBridge | 171:3a7713b1edbc | 74 | #define AC_CTRLA_RESETVALUE 0x00ul /**< \brief (AC_CTRLA reset_value) Control A */ |
AnnaBridge | 171:3a7713b1edbc | 75 | |
AnnaBridge | 171:3a7713b1edbc | 76 | #define AC_CTRLA_SWRST_Pos 0 /**< \brief (AC_CTRLA) Software Reset */ |
AnnaBridge | 171:3a7713b1edbc | 77 | #define AC_CTRLA_SWRST (0x1ul << AC_CTRLA_SWRST_Pos) |
AnnaBridge | 171:3a7713b1edbc | 78 | #define AC_CTRLA_ENABLE_Pos 1 /**< \brief (AC_CTRLA) Enable */ |
AnnaBridge | 171:3a7713b1edbc | 79 | #define AC_CTRLA_ENABLE (0x1ul << AC_CTRLA_ENABLE_Pos) |
AnnaBridge | 171:3a7713b1edbc | 80 | #define AC_CTRLA_RUNSTDBY_Pos 2 /**< \brief (AC_CTRLA) Run in Standby */ |
AnnaBridge | 171:3a7713b1edbc | 81 | #define AC_CTRLA_RUNSTDBY_Msk (0x1ul << AC_CTRLA_RUNSTDBY_Pos) |
AnnaBridge | 171:3a7713b1edbc | 82 | #define AC_CTRLA_RUNSTDBY(value) ((AC_CTRLA_RUNSTDBY_Msk & ((value) << AC_CTRLA_RUNSTDBY_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 83 | #define AC_CTRLA_LPMUX_Pos 7 /**< \brief (AC_CTRLA) Low-Power Mux */ |
AnnaBridge | 171:3a7713b1edbc | 84 | #define AC_CTRLA_LPMUX (0x1ul << AC_CTRLA_LPMUX_Pos) |
AnnaBridge | 171:3a7713b1edbc | 85 | #define AC_CTRLA_MASK 0x87ul /**< \brief (AC_CTRLA) MASK Register */ |
AnnaBridge | 171:3a7713b1edbc | 86 | |
AnnaBridge | 171:3a7713b1edbc | 87 | /* -------- AC_CTRLB : (AC Offset: 0x01) ( /W 8) Control B -------- */ |
AnnaBridge | 171:3a7713b1edbc | 88 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
AnnaBridge | 171:3a7713b1edbc | 89 | typedef union { |
AnnaBridge | 171:3a7713b1edbc | 90 | struct { |
AnnaBridge | 171:3a7713b1edbc | 91 | uint8_t START0:1; /*!< bit: 0 Comparator 0 Start Comparison */ |
AnnaBridge | 171:3a7713b1edbc | 92 | uint8_t START1:1; /*!< bit: 1 Comparator 1 Start Comparison */ |
AnnaBridge | 171:3a7713b1edbc | 93 | uint8_t :6; /*!< bit: 2.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 94 | } bit; /*!< Structure used for bit access */ |
AnnaBridge | 171:3a7713b1edbc | 95 | struct { |
AnnaBridge | 171:3a7713b1edbc | 96 | uint8_t START:2; /*!< bit: 0.. 1 Comparator x Start Comparison */ |
AnnaBridge | 171:3a7713b1edbc | 97 | uint8_t :6; /*!< bit: 2.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 98 | } vec; /*!< Structure used for vec access */ |
AnnaBridge | 171:3a7713b1edbc | 99 | uint8_t reg; /*!< Type used for register access */ |
AnnaBridge | 171:3a7713b1edbc | 100 | } AC_CTRLB_Type; |
AnnaBridge | 171:3a7713b1edbc | 101 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
AnnaBridge | 171:3a7713b1edbc | 102 | |
AnnaBridge | 171:3a7713b1edbc | 103 | #define AC_CTRLB_OFFSET 0x01 /**< \brief (AC_CTRLB offset) Control B */ |
AnnaBridge | 171:3a7713b1edbc | 104 | #define AC_CTRLB_RESETVALUE 0x00ul /**< \brief (AC_CTRLB reset_value) Control B */ |
AnnaBridge | 171:3a7713b1edbc | 105 | |
AnnaBridge | 171:3a7713b1edbc | 106 | #define AC_CTRLB_START0_Pos 0 /**< \brief (AC_CTRLB) Comparator 0 Start Comparison */ |
AnnaBridge | 171:3a7713b1edbc | 107 | #define AC_CTRLB_START0 (1 << AC_CTRLB_START0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 108 | #define AC_CTRLB_START1_Pos 1 /**< \brief (AC_CTRLB) Comparator 1 Start Comparison */ |
AnnaBridge | 171:3a7713b1edbc | 109 | #define AC_CTRLB_START1 (1 << AC_CTRLB_START1_Pos) |
AnnaBridge | 171:3a7713b1edbc | 110 | #define AC_CTRLB_START_Pos 0 /**< \brief (AC_CTRLB) Comparator x Start Comparison */ |
AnnaBridge | 171:3a7713b1edbc | 111 | #define AC_CTRLB_START_Msk (0x3ul << AC_CTRLB_START_Pos) |
AnnaBridge | 171:3a7713b1edbc | 112 | #define AC_CTRLB_START(value) ((AC_CTRLB_START_Msk & ((value) << AC_CTRLB_START_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 113 | #define AC_CTRLB_MASK 0x03ul /**< \brief (AC_CTRLB) MASK Register */ |
AnnaBridge | 171:3a7713b1edbc | 114 | |
AnnaBridge | 171:3a7713b1edbc | 115 | /* -------- AC_EVCTRL : (AC Offset: 0x02) (R/W 16) Event Control -------- */ |
AnnaBridge | 171:3a7713b1edbc | 116 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
AnnaBridge | 171:3a7713b1edbc | 117 | typedef union { |
AnnaBridge | 171:3a7713b1edbc | 118 | struct { |
AnnaBridge | 171:3a7713b1edbc | 119 | uint16_t COMPEO0:1; /*!< bit: 0 Comparator 0 Event Output Enable */ |
AnnaBridge | 171:3a7713b1edbc | 120 | uint16_t COMPEO1:1; /*!< bit: 1 Comparator 1 Event Output Enable */ |
AnnaBridge | 171:3a7713b1edbc | 121 | uint16_t :2; /*!< bit: 2.. 3 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 122 | uint16_t WINEO0:1; /*!< bit: 4 Window 0 Event Output Enable */ |
AnnaBridge | 171:3a7713b1edbc | 123 | uint16_t :3; /*!< bit: 5.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 124 | uint16_t COMPEI0:1; /*!< bit: 8 Comparator 0 Event Input */ |
AnnaBridge | 171:3a7713b1edbc | 125 | uint16_t COMPEI1:1; /*!< bit: 9 Comparator 1 Event Input */ |
AnnaBridge | 171:3a7713b1edbc | 126 | uint16_t :6; /*!< bit: 10..15 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 127 | } bit; /*!< Structure used for bit access */ |
AnnaBridge | 171:3a7713b1edbc | 128 | struct { |
AnnaBridge | 171:3a7713b1edbc | 129 | uint16_t COMPEO:2; /*!< bit: 0.. 1 Comparator x Event Output Enable */ |
AnnaBridge | 171:3a7713b1edbc | 130 | uint16_t :2; /*!< bit: 2.. 3 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 131 | uint16_t WINEO:1; /*!< bit: 4 Window x Event Output Enable */ |
AnnaBridge | 171:3a7713b1edbc | 132 | uint16_t :3; /*!< bit: 5.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 133 | uint16_t COMPEI:2; /*!< bit: 8.. 9 Comparator x Event Input */ |
AnnaBridge | 171:3a7713b1edbc | 134 | uint16_t :6; /*!< bit: 10..15 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 135 | } vec; /*!< Structure used for vec access */ |
AnnaBridge | 171:3a7713b1edbc | 136 | uint16_t reg; /*!< Type used for register access */ |
AnnaBridge | 171:3a7713b1edbc | 137 | } AC_EVCTRL_Type; |
AnnaBridge | 171:3a7713b1edbc | 138 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
AnnaBridge | 171:3a7713b1edbc | 139 | |
AnnaBridge | 171:3a7713b1edbc | 140 | #define AC_EVCTRL_OFFSET 0x02 /**< \brief (AC_EVCTRL offset) Event Control */ |
AnnaBridge | 171:3a7713b1edbc | 141 | #define AC_EVCTRL_RESETVALUE 0x0000ul /**< \brief (AC_EVCTRL reset_value) Event Control */ |
AnnaBridge | 171:3a7713b1edbc | 142 | |
AnnaBridge | 171:3a7713b1edbc | 143 | #define AC_EVCTRL_COMPEO0_Pos 0 /**< \brief (AC_EVCTRL) Comparator 0 Event Output Enable */ |
AnnaBridge | 171:3a7713b1edbc | 144 | #define AC_EVCTRL_COMPEO0 (1 << AC_EVCTRL_COMPEO0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 145 | #define AC_EVCTRL_COMPEO1_Pos 1 /**< \brief (AC_EVCTRL) Comparator 1 Event Output Enable */ |
AnnaBridge | 171:3a7713b1edbc | 146 | #define AC_EVCTRL_COMPEO1 (1 << AC_EVCTRL_COMPEO1_Pos) |
AnnaBridge | 171:3a7713b1edbc | 147 | #define AC_EVCTRL_COMPEO_Pos 0 /**< \brief (AC_EVCTRL) Comparator x Event Output Enable */ |
AnnaBridge | 171:3a7713b1edbc | 148 | #define AC_EVCTRL_COMPEO_Msk (0x3ul << AC_EVCTRL_COMPEO_Pos) |
AnnaBridge | 171:3a7713b1edbc | 149 | #define AC_EVCTRL_COMPEO(value) ((AC_EVCTRL_COMPEO_Msk & ((value) << AC_EVCTRL_COMPEO_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 150 | #define AC_EVCTRL_WINEO0_Pos 4 /**< \brief (AC_EVCTRL) Window 0 Event Output Enable */ |
AnnaBridge | 171:3a7713b1edbc | 151 | #define AC_EVCTRL_WINEO0 (1 << AC_EVCTRL_WINEO0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 152 | #define AC_EVCTRL_WINEO_Pos 4 /**< \brief (AC_EVCTRL) Window x Event Output Enable */ |
AnnaBridge | 171:3a7713b1edbc | 153 | #define AC_EVCTRL_WINEO_Msk (0x1ul << AC_EVCTRL_WINEO_Pos) |
AnnaBridge | 171:3a7713b1edbc | 154 | #define AC_EVCTRL_WINEO(value) ((AC_EVCTRL_WINEO_Msk & ((value) << AC_EVCTRL_WINEO_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 155 | #define AC_EVCTRL_COMPEI0_Pos 8 /**< \brief (AC_EVCTRL) Comparator 0 Event Input */ |
AnnaBridge | 171:3a7713b1edbc | 156 | #define AC_EVCTRL_COMPEI0 (1 << AC_EVCTRL_COMPEI0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 157 | #define AC_EVCTRL_COMPEI1_Pos 9 /**< \brief (AC_EVCTRL) Comparator 1 Event Input */ |
AnnaBridge | 171:3a7713b1edbc | 158 | #define AC_EVCTRL_COMPEI1 (1 << AC_EVCTRL_COMPEI1_Pos) |
AnnaBridge | 171:3a7713b1edbc | 159 | #define AC_EVCTRL_COMPEI_Pos 8 /**< \brief (AC_EVCTRL) Comparator x Event Input */ |
AnnaBridge | 171:3a7713b1edbc | 160 | #define AC_EVCTRL_COMPEI_Msk (0x3ul << AC_EVCTRL_COMPEI_Pos) |
AnnaBridge | 171:3a7713b1edbc | 161 | #define AC_EVCTRL_COMPEI(value) ((AC_EVCTRL_COMPEI_Msk & ((value) << AC_EVCTRL_COMPEI_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 162 | #define AC_EVCTRL_MASK 0x0313ul /**< \brief (AC_EVCTRL) MASK Register */ |
AnnaBridge | 171:3a7713b1edbc | 163 | |
AnnaBridge | 171:3a7713b1edbc | 164 | /* -------- AC_INTENCLR : (AC Offset: 0x04) (R/W 8) Interrupt Enable Clear -------- */ |
AnnaBridge | 171:3a7713b1edbc | 165 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
AnnaBridge | 171:3a7713b1edbc | 166 | typedef union { |
AnnaBridge | 171:3a7713b1edbc | 167 | struct { |
AnnaBridge | 171:3a7713b1edbc | 168 | uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 169 | uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 170 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 171 | uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 172 | uint8_t :3; /*!< bit: 5.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 173 | } bit; /*!< Structure used for bit access */ |
AnnaBridge | 171:3a7713b1edbc | 174 | struct { |
AnnaBridge | 171:3a7713b1edbc | 175 | uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 176 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 177 | uint8_t WIN:1; /*!< bit: 4 Window x Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 178 | uint8_t :3; /*!< bit: 5.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 179 | } vec; /*!< Structure used for vec access */ |
AnnaBridge | 171:3a7713b1edbc | 180 | uint8_t reg; /*!< Type used for register access */ |
AnnaBridge | 171:3a7713b1edbc | 181 | } AC_INTENCLR_Type; |
AnnaBridge | 171:3a7713b1edbc | 182 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
AnnaBridge | 171:3a7713b1edbc | 183 | |
AnnaBridge | 171:3a7713b1edbc | 184 | #define AC_INTENCLR_OFFSET 0x04 /**< \brief (AC_INTENCLR offset) Interrupt Enable Clear */ |
AnnaBridge | 171:3a7713b1edbc | 185 | #define AC_INTENCLR_RESETVALUE 0x00ul /**< \brief (AC_INTENCLR reset_value) Interrupt Enable Clear */ |
AnnaBridge | 171:3a7713b1edbc | 186 | |
AnnaBridge | 171:3a7713b1edbc | 187 | #define AC_INTENCLR_COMP0_Pos 0 /**< \brief (AC_INTENCLR) Comparator 0 Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 188 | #define AC_INTENCLR_COMP0 (1 << AC_INTENCLR_COMP0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 189 | #define AC_INTENCLR_COMP1_Pos 1 /**< \brief (AC_INTENCLR) Comparator 1 Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 190 | #define AC_INTENCLR_COMP1 (1 << AC_INTENCLR_COMP1_Pos) |
AnnaBridge | 171:3a7713b1edbc | 191 | #define AC_INTENCLR_COMP_Pos 0 /**< \brief (AC_INTENCLR) Comparator x Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 192 | #define AC_INTENCLR_COMP_Msk (0x3ul << AC_INTENCLR_COMP_Pos) |
AnnaBridge | 171:3a7713b1edbc | 193 | #define AC_INTENCLR_COMP(value) ((AC_INTENCLR_COMP_Msk & ((value) << AC_INTENCLR_COMP_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 194 | #define AC_INTENCLR_WIN0_Pos 4 /**< \brief (AC_INTENCLR) Window 0 Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 195 | #define AC_INTENCLR_WIN0 (1 << AC_INTENCLR_WIN0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 196 | #define AC_INTENCLR_WIN_Pos 4 /**< \brief (AC_INTENCLR) Window x Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 197 | #define AC_INTENCLR_WIN_Msk (0x1ul << AC_INTENCLR_WIN_Pos) |
AnnaBridge | 171:3a7713b1edbc | 198 | #define AC_INTENCLR_WIN(value) ((AC_INTENCLR_WIN_Msk & ((value) << AC_INTENCLR_WIN_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 199 | #define AC_INTENCLR_MASK 0x13ul /**< \brief (AC_INTENCLR) MASK Register */ |
AnnaBridge | 171:3a7713b1edbc | 200 | |
AnnaBridge | 171:3a7713b1edbc | 201 | /* -------- AC_INTENSET : (AC Offset: 0x05) (R/W 8) Interrupt Enable Set -------- */ |
AnnaBridge | 171:3a7713b1edbc | 202 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
AnnaBridge | 171:3a7713b1edbc | 203 | typedef union { |
AnnaBridge | 171:3a7713b1edbc | 204 | struct { |
AnnaBridge | 171:3a7713b1edbc | 205 | uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 206 | uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 207 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 208 | uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 209 | uint8_t :3; /*!< bit: 5.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 210 | } bit; /*!< Structure used for bit access */ |
AnnaBridge | 171:3a7713b1edbc | 211 | struct { |
AnnaBridge | 171:3a7713b1edbc | 212 | uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 213 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 214 | uint8_t WIN:1; /*!< bit: 4 Window x Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 215 | uint8_t :3; /*!< bit: 5.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 216 | } vec; /*!< Structure used for vec access */ |
AnnaBridge | 171:3a7713b1edbc | 217 | uint8_t reg; /*!< Type used for register access */ |
AnnaBridge | 171:3a7713b1edbc | 218 | } AC_INTENSET_Type; |
AnnaBridge | 171:3a7713b1edbc | 219 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
AnnaBridge | 171:3a7713b1edbc | 220 | |
AnnaBridge | 171:3a7713b1edbc | 221 | #define AC_INTENSET_OFFSET 0x05 /**< \brief (AC_INTENSET offset) Interrupt Enable Set */ |
AnnaBridge | 171:3a7713b1edbc | 222 | #define AC_INTENSET_RESETVALUE 0x00ul /**< \brief (AC_INTENSET reset_value) Interrupt Enable Set */ |
AnnaBridge | 171:3a7713b1edbc | 223 | |
AnnaBridge | 171:3a7713b1edbc | 224 | #define AC_INTENSET_COMP0_Pos 0 /**< \brief (AC_INTENSET) Comparator 0 Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 225 | #define AC_INTENSET_COMP0 (1 << AC_INTENSET_COMP0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 226 | #define AC_INTENSET_COMP1_Pos 1 /**< \brief (AC_INTENSET) Comparator 1 Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 227 | #define AC_INTENSET_COMP1 (1 << AC_INTENSET_COMP1_Pos) |
AnnaBridge | 171:3a7713b1edbc | 228 | #define AC_INTENSET_COMP_Pos 0 /**< \brief (AC_INTENSET) Comparator x Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 229 | #define AC_INTENSET_COMP_Msk (0x3ul << AC_INTENSET_COMP_Pos) |
AnnaBridge | 171:3a7713b1edbc | 230 | #define AC_INTENSET_COMP(value) ((AC_INTENSET_COMP_Msk & ((value) << AC_INTENSET_COMP_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 231 | #define AC_INTENSET_WIN0_Pos 4 /**< \brief (AC_INTENSET) Window 0 Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 232 | #define AC_INTENSET_WIN0 (1 << AC_INTENSET_WIN0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 233 | #define AC_INTENSET_WIN_Pos 4 /**< \brief (AC_INTENSET) Window x Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 234 | #define AC_INTENSET_WIN_Msk (0x1ul << AC_INTENSET_WIN_Pos) |
AnnaBridge | 171:3a7713b1edbc | 235 | #define AC_INTENSET_WIN(value) ((AC_INTENSET_WIN_Msk & ((value) << AC_INTENSET_WIN_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 236 | #define AC_INTENSET_MASK 0x13ul /**< \brief (AC_INTENSET) MASK Register */ |
AnnaBridge | 171:3a7713b1edbc | 237 | |
AnnaBridge | 171:3a7713b1edbc | 238 | /* -------- AC_INTFLAG : (AC Offset: 0x06) (R/W 8) Interrupt Flag Status and Clear -------- */ |
AnnaBridge | 171:3a7713b1edbc | 239 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
AnnaBridge | 171:3a7713b1edbc | 240 | typedef union { |
AnnaBridge | 171:3a7713b1edbc | 241 | struct { |
AnnaBridge | 171:3a7713b1edbc | 242 | uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */ |
AnnaBridge | 171:3a7713b1edbc | 243 | uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */ |
AnnaBridge | 171:3a7713b1edbc | 244 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 245 | uint8_t WIN0:1; /*!< bit: 4 Window 0 */ |
AnnaBridge | 171:3a7713b1edbc | 246 | uint8_t :3; /*!< bit: 5.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 247 | } bit; /*!< Structure used for bit access */ |
AnnaBridge | 171:3a7713b1edbc | 248 | struct { |
AnnaBridge | 171:3a7713b1edbc | 249 | uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x */ |
AnnaBridge | 171:3a7713b1edbc | 250 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 251 | uint8_t WIN:1; /*!< bit: 4 Window x */ |
AnnaBridge | 171:3a7713b1edbc | 252 | uint8_t :3; /*!< bit: 5.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 253 | } vec; /*!< Structure used for vec access */ |
AnnaBridge | 171:3a7713b1edbc | 254 | uint8_t reg; /*!< Type used for register access */ |
AnnaBridge | 171:3a7713b1edbc | 255 | } AC_INTFLAG_Type; |
AnnaBridge | 171:3a7713b1edbc | 256 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
AnnaBridge | 171:3a7713b1edbc | 257 | |
AnnaBridge | 171:3a7713b1edbc | 258 | #define AC_INTFLAG_OFFSET 0x06 /**< \brief (AC_INTFLAG offset) Interrupt Flag Status and Clear */ |
AnnaBridge | 171:3a7713b1edbc | 259 | #define AC_INTFLAG_RESETVALUE 0x00ul /**< \brief (AC_INTFLAG reset_value) Interrupt Flag Status and Clear */ |
AnnaBridge | 171:3a7713b1edbc | 260 | |
AnnaBridge | 171:3a7713b1edbc | 261 | #define AC_INTFLAG_COMP0_Pos 0 /**< \brief (AC_INTFLAG) Comparator 0 */ |
AnnaBridge | 171:3a7713b1edbc | 262 | #define AC_INTFLAG_COMP0 (1 << AC_INTFLAG_COMP0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 263 | #define AC_INTFLAG_COMP1_Pos 1 /**< \brief (AC_INTFLAG) Comparator 1 */ |
AnnaBridge | 171:3a7713b1edbc | 264 | #define AC_INTFLAG_COMP1 (1 << AC_INTFLAG_COMP1_Pos) |
AnnaBridge | 171:3a7713b1edbc | 265 | #define AC_INTFLAG_COMP_Pos 0 /**< \brief (AC_INTFLAG) Comparator x */ |
AnnaBridge | 171:3a7713b1edbc | 266 | #define AC_INTFLAG_COMP_Msk (0x3ul << AC_INTFLAG_COMP_Pos) |
AnnaBridge | 171:3a7713b1edbc | 267 | #define AC_INTFLAG_COMP(value) ((AC_INTFLAG_COMP_Msk & ((value) << AC_INTFLAG_COMP_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 268 | #define AC_INTFLAG_WIN0_Pos 4 /**< \brief (AC_INTFLAG) Window 0 */ |
AnnaBridge | 171:3a7713b1edbc | 269 | #define AC_INTFLAG_WIN0 (1 << AC_INTFLAG_WIN0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 270 | #define AC_INTFLAG_WIN_Pos 4 /**< \brief (AC_INTFLAG) Window x */ |
AnnaBridge | 171:3a7713b1edbc | 271 | #define AC_INTFLAG_WIN_Msk (0x1ul << AC_INTFLAG_WIN_Pos) |
AnnaBridge | 171:3a7713b1edbc | 272 | #define AC_INTFLAG_WIN(value) ((AC_INTFLAG_WIN_Msk & ((value) << AC_INTFLAG_WIN_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 273 | #define AC_INTFLAG_MASK 0x13ul /**< \brief (AC_INTFLAG) MASK Register */ |
AnnaBridge | 171:3a7713b1edbc | 274 | |
AnnaBridge | 171:3a7713b1edbc | 275 | /* -------- AC_STATUSA : (AC Offset: 0x08) (R/ 8) Status A -------- */ |
AnnaBridge | 171:3a7713b1edbc | 276 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
AnnaBridge | 171:3a7713b1edbc | 277 | typedef union { |
AnnaBridge | 171:3a7713b1edbc | 278 | struct { |
AnnaBridge | 171:3a7713b1edbc | 279 | uint8_t STATE0:1; /*!< bit: 0 Comparator 0 Current State */ |
AnnaBridge | 171:3a7713b1edbc | 280 | uint8_t STATE1:1; /*!< bit: 1 Comparator 1 Current State */ |
AnnaBridge | 171:3a7713b1edbc | 281 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 282 | uint8_t WSTATE0:2; /*!< bit: 4.. 5 Window 0 Current State */ |
AnnaBridge | 171:3a7713b1edbc | 283 | uint8_t :2; /*!< bit: 6.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 284 | } bit; /*!< Structure used for bit access */ |
AnnaBridge | 171:3a7713b1edbc | 285 | struct { |
AnnaBridge | 171:3a7713b1edbc | 286 | uint8_t STATE:2; /*!< bit: 0.. 1 Comparator x Current State */ |
AnnaBridge | 171:3a7713b1edbc | 287 | uint8_t :6; /*!< bit: 2.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 288 | } vec; /*!< Structure used for vec access */ |
AnnaBridge | 171:3a7713b1edbc | 289 | uint8_t reg; /*!< Type used for register access */ |
AnnaBridge | 171:3a7713b1edbc | 290 | } AC_STATUSA_Type; |
AnnaBridge | 171:3a7713b1edbc | 291 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
AnnaBridge | 171:3a7713b1edbc | 292 | |
AnnaBridge | 171:3a7713b1edbc | 293 | #define AC_STATUSA_OFFSET 0x08 /**< \brief (AC_STATUSA offset) Status A */ |
AnnaBridge | 171:3a7713b1edbc | 294 | #define AC_STATUSA_RESETVALUE 0x00ul /**< \brief (AC_STATUSA reset_value) Status A */ |
AnnaBridge | 171:3a7713b1edbc | 295 | |
AnnaBridge | 171:3a7713b1edbc | 296 | #define AC_STATUSA_STATE0_Pos 0 /**< \brief (AC_STATUSA) Comparator 0 Current State */ |
AnnaBridge | 171:3a7713b1edbc | 297 | #define AC_STATUSA_STATE0 (1 << AC_STATUSA_STATE0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 298 | #define AC_STATUSA_STATE1_Pos 1 /**< \brief (AC_STATUSA) Comparator 1 Current State */ |
AnnaBridge | 171:3a7713b1edbc | 299 | #define AC_STATUSA_STATE1 (1 << AC_STATUSA_STATE1_Pos) |
AnnaBridge | 171:3a7713b1edbc | 300 | #define AC_STATUSA_STATE_Pos 0 /**< \brief (AC_STATUSA) Comparator x Current State */ |
AnnaBridge | 171:3a7713b1edbc | 301 | #define AC_STATUSA_STATE_Msk (0x3ul << AC_STATUSA_STATE_Pos) |
AnnaBridge | 171:3a7713b1edbc | 302 | #define AC_STATUSA_STATE(value) ((AC_STATUSA_STATE_Msk & ((value) << AC_STATUSA_STATE_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 303 | #define AC_STATUSA_WSTATE0_Pos 4 /**< \brief (AC_STATUSA) Window 0 Current State */ |
AnnaBridge | 171:3a7713b1edbc | 304 | #define AC_STATUSA_WSTATE0_Msk (0x3ul << AC_STATUSA_WSTATE0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 305 | #define AC_STATUSA_WSTATE0(value) ((AC_STATUSA_WSTATE0_Msk & ((value) << AC_STATUSA_WSTATE0_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 306 | #define AC_STATUSA_WSTATE0_ABOVE_Val 0x0ul /**< \brief (AC_STATUSA) Signal is above window */ |
AnnaBridge | 171:3a7713b1edbc | 307 | #define AC_STATUSA_WSTATE0_INSIDE_Val 0x1ul /**< \brief (AC_STATUSA) Signal is inside window */ |
AnnaBridge | 171:3a7713b1edbc | 308 | #define AC_STATUSA_WSTATE0_BELOW_Val 0x2ul /**< \brief (AC_STATUSA) Signal is below window */ |
AnnaBridge | 171:3a7713b1edbc | 309 | #define AC_STATUSA_WSTATE0_ABOVE (AC_STATUSA_WSTATE0_ABOVE_Val << AC_STATUSA_WSTATE0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 310 | #define AC_STATUSA_WSTATE0_INSIDE (AC_STATUSA_WSTATE0_INSIDE_Val << AC_STATUSA_WSTATE0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 311 | #define AC_STATUSA_WSTATE0_BELOW (AC_STATUSA_WSTATE0_BELOW_Val << AC_STATUSA_WSTATE0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 312 | #define AC_STATUSA_MASK 0x33ul /**< \brief (AC_STATUSA) MASK Register */ |
AnnaBridge | 171:3a7713b1edbc | 313 | |
AnnaBridge | 171:3a7713b1edbc | 314 | /* -------- AC_STATUSB : (AC Offset: 0x09) (R/ 8) Status B -------- */ |
AnnaBridge | 171:3a7713b1edbc | 315 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
AnnaBridge | 171:3a7713b1edbc | 316 | typedef union { |
AnnaBridge | 171:3a7713b1edbc | 317 | struct { |
AnnaBridge | 171:3a7713b1edbc | 318 | uint8_t READY0:1; /*!< bit: 0 Comparator 0 Ready */ |
AnnaBridge | 171:3a7713b1edbc | 319 | uint8_t READY1:1; /*!< bit: 1 Comparator 1 Ready */ |
AnnaBridge | 171:3a7713b1edbc | 320 | uint8_t :5; /*!< bit: 2.. 6 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 321 | uint8_t SYNCBUSY:1; /*!< bit: 7 Synchronization Busy */ |
AnnaBridge | 171:3a7713b1edbc | 322 | } bit; /*!< Structure used for bit access */ |
AnnaBridge | 171:3a7713b1edbc | 323 | struct { |
AnnaBridge | 171:3a7713b1edbc | 324 | uint8_t READY:2; /*!< bit: 0.. 1 Comparator x Ready */ |
AnnaBridge | 171:3a7713b1edbc | 325 | uint8_t :6; /*!< bit: 2.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 326 | } vec; /*!< Structure used for vec access */ |
AnnaBridge | 171:3a7713b1edbc | 327 | uint8_t reg; /*!< Type used for register access */ |
AnnaBridge | 171:3a7713b1edbc | 328 | } AC_STATUSB_Type; |
AnnaBridge | 171:3a7713b1edbc | 329 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
AnnaBridge | 171:3a7713b1edbc | 330 | |
AnnaBridge | 171:3a7713b1edbc | 331 | #define AC_STATUSB_OFFSET 0x09 /**< \brief (AC_STATUSB offset) Status B */ |
AnnaBridge | 171:3a7713b1edbc | 332 | #define AC_STATUSB_RESETVALUE 0x00ul /**< \brief (AC_STATUSB reset_value) Status B */ |
AnnaBridge | 171:3a7713b1edbc | 333 | |
AnnaBridge | 171:3a7713b1edbc | 334 | #define AC_STATUSB_READY0_Pos 0 /**< \brief (AC_STATUSB) Comparator 0 Ready */ |
AnnaBridge | 171:3a7713b1edbc | 335 | #define AC_STATUSB_READY0 (1 << AC_STATUSB_READY0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 336 | #define AC_STATUSB_READY1_Pos 1 /**< \brief (AC_STATUSB) Comparator 1 Ready */ |
AnnaBridge | 171:3a7713b1edbc | 337 | #define AC_STATUSB_READY1 (1 << AC_STATUSB_READY1_Pos) |
AnnaBridge | 171:3a7713b1edbc | 338 | #define AC_STATUSB_READY_Pos 0 /**< \brief (AC_STATUSB) Comparator x Ready */ |
AnnaBridge | 171:3a7713b1edbc | 339 | #define AC_STATUSB_READY_Msk (0x3ul << AC_STATUSB_READY_Pos) |
AnnaBridge | 171:3a7713b1edbc | 340 | #define AC_STATUSB_READY(value) ((AC_STATUSB_READY_Msk & ((value) << AC_STATUSB_READY_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 341 | #define AC_STATUSB_SYNCBUSY_Pos 7 /**< \brief (AC_STATUSB) Synchronization Busy */ |
AnnaBridge | 171:3a7713b1edbc | 342 | #define AC_STATUSB_SYNCBUSY (0x1ul << AC_STATUSB_SYNCBUSY_Pos) |
AnnaBridge | 171:3a7713b1edbc | 343 | #define AC_STATUSB_MASK 0x83ul /**< \brief (AC_STATUSB) MASK Register */ |
AnnaBridge | 171:3a7713b1edbc | 344 | |
AnnaBridge | 171:3a7713b1edbc | 345 | /* -------- AC_STATUSC : (AC Offset: 0x0A) (R/ 8) Status C -------- */ |
AnnaBridge | 171:3a7713b1edbc | 346 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
AnnaBridge | 171:3a7713b1edbc | 347 | typedef union { |
AnnaBridge | 171:3a7713b1edbc | 348 | struct { |
AnnaBridge | 171:3a7713b1edbc | 349 | uint8_t STATE0:1; /*!< bit: 0 Comparator 0 Current State */ |
AnnaBridge | 171:3a7713b1edbc | 350 | uint8_t STATE1:1; /*!< bit: 1 Comparator 1 Current State */ |
AnnaBridge | 171:3a7713b1edbc | 351 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 352 | uint8_t WSTATE0:2; /*!< bit: 4.. 5 Window 0 Current State */ |
AnnaBridge | 171:3a7713b1edbc | 353 | uint8_t :2; /*!< bit: 6.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 354 | } bit; /*!< Structure used for bit access */ |
AnnaBridge | 171:3a7713b1edbc | 355 | struct { |
AnnaBridge | 171:3a7713b1edbc | 356 | uint8_t STATE:2; /*!< bit: 0.. 1 Comparator x Current State */ |
AnnaBridge | 171:3a7713b1edbc | 357 | uint8_t :6; /*!< bit: 2.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 358 | } vec; /*!< Structure used for vec access */ |
AnnaBridge | 171:3a7713b1edbc | 359 | uint8_t reg; /*!< Type used for register access */ |
AnnaBridge | 171:3a7713b1edbc | 360 | } AC_STATUSC_Type; |
AnnaBridge | 171:3a7713b1edbc | 361 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
AnnaBridge | 171:3a7713b1edbc | 362 | |
AnnaBridge | 171:3a7713b1edbc | 363 | #define AC_STATUSC_OFFSET 0x0A /**< \brief (AC_STATUSC offset) Status C */ |
AnnaBridge | 171:3a7713b1edbc | 364 | #define AC_STATUSC_RESETVALUE 0x00ul /**< \brief (AC_STATUSC reset_value) Status C */ |
AnnaBridge | 171:3a7713b1edbc | 365 | |
AnnaBridge | 171:3a7713b1edbc | 366 | #define AC_STATUSC_STATE0_Pos 0 /**< \brief (AC_STATUSC) Comparator 0 Current State */ |
AnnaBridge | 171:3a7713b1edbc | 367 | #define AC_STATUSC_STATE0 (1 << AC_STATUSC_STATE0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 368 | #define AC_STATUSC_STATE1_Pos 1 /**< \brief (AC_STATUSC) Comparator 1 Current State */ |
AnnaBridge | 171:3a7713b1edbc | 369 | #define AC_STATUSC_STATE1 (1 << AC_STATUSC_STATE1_Pos) |
AnnaBridge | 171:3a7713b1edbc | 370 | #define AC_STATUSC_STATE_Pos 0 /**< \brief (AC_STATUSC) Comparator x Current State */ |
AnnaBridge | 171:3a7713b1edbc | 371 | #define AC_STATUSC_STATE_Msk (0x3ul << AC_STATUSC_STATE_Pos) |
AnnaBridge | 171:3a7713b1edbc | 372 | #define AC_STATUSC_STATE(value) ((AC_STATUSC_STATE_Msk & ((value) << AC_STATUSC_STATE_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 373 | #define AC_STATUSC_WSTATE0_Pos 4 /**< \brief (AC_STATUSC) Window 0 Current State */ |
AnnaBridge | 171:3a7713b1edbc | 374 | #define AC_STATUSC_WSTATE0_Msk (0x3ul << AC_STATUSC_WSTATE0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 375 | #define AC_STATUSC_WSTATE0(value) ((AC_STATUSC_WSTATE0_Msk & ((value) << AC_STATUSC_WSTATE0_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 376 | #define AC_STATUSC_WSTATE0_ABOVE_Val 0x0ul /**< \brief (AC_STATUSC) Signal is above window */ |
AnnaBridge | 171:3a7713b1edbc | 377 | #define AC_STATUSC_WSTATE0_INSIDE_Val 0x1ul /**< \brief (AC_STATUSC) Signal is inside window */ |
AnnaBridge | 171:3a7713b1edbc | 378 | #define AC_STATUSC_WSTATE0_BELOW_Val 0x2ul /**< \brief (AC_STATUSC) Signal is below window */ |
AnnaBridge | 171:3a7713b1edbc | 379 | #define AC_STATUSC_WSTATE0_ABOVE (AC_STATUSC_WSTATE0_ABOVE_Val << AC_STATUSC_WSTATE0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 380 | #define AC_STATUSC_WSTATE0_INSIDE (AC_STATUSC_WSTATE0_INSIDE_Val << AC_STATUSC_WSTATE0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 381 | #define AC_STATUSC_WSTATE0_BELOW (AC_STATUSC_WSTATE0_BELOW_Val << AC_STATUSC_WSTATE0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 382 | #define AC_STATUSC_MASK 0x33ul /**< \brief (AC_STATUSC) MASK Register */ |
AnnaBridge | 171:3a7713b1edbc | 383 | |
AnnaBridge | 171:3a7713b1edbc | 384 | /* -------- AC_WINCTRL : (AC Offset: 0x0C) (R/W 8) Window Control -------- */ |
AnnaBridge | 171:3a7713b1edbc | 385 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
AnnaBridge | 171:3a7713b1edbc | 386 | typedef union { |
AnnaBridge | 171:3a7713b1edbc | 387 | struct { |
AnnaBridge | 171:3a7713b1edbc | 388 | uint8_t WEN0:1; /*!< bit: 0 Window 0 Mode Enable */ |
AnnaBridge | 171:3a7713b1edbc | 389 | uint8_t WINTSEL0:2; /*!< bit: 1.. 2 Window 0 Interrupt Selection */ |
AnnaBridge | 171:3a7713b1edbc | 390 | uint8_t :5; /*!< bit: 3.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 391 | } bit; /*!< Structure used for bit access */ |
AnnaBridge | 171:3a7713b1edbc | 392 | uint8_t reg; /*!< Type used for register access */ |
AnnaBridge | 171:3a7713b1edbc | 393 | } AC_WINCTRL_Type; |
AnnaBridge | 171:3a7713b1edbc | 394 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
AnnaBridge | 171:3a7713b1edbc | 395 | |
AnnaBridge | 171:3a7713b1edbc | 396 | #define AC_WINCTRL_OFFSET 0x0C /**< \brief (AC_WINCTRL offset) Window Control */ |
AnnaBridge | 171:3a7713b1edbc | 397 | #define AC_WINCTRL_RESETVALUE 0x00ul /**< \brief (AC_WINCTRL reset_value) Window Control */ |
AnnaBridge | 171:3a7713b1edbc | 398 | |
AnnaBridge | 171:3a7713b1edbc | 399 | #define AC_WINCTRL_WEN0_Pos 0 /**< \brief (AC_WINCTRL) Window 0 Mode Enable */ |
AnnaBridge | 171:3a7713b1edbc | 400 | #define AC_WINCTRL_WEN0 (0x1ul << AC_WINCTRL_WEN0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 401 | #define AC_WINCTRL_WINTSEL0_Pos 1 /**< \brief (AC_WINCTRL) Window 0 Interrupt Selection */ |
AnnaBridge | 171:3a7713b1edbc | 402 | #define AC_WINCTRL_WINTSEL0_Msk (0x3ul << AC_WINCTRL_WINTSEL0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 403 | #define AC_WINCTRL_WINTSEL0(value) ((AC_WINCTRL_WINTSEL0_Msk & ((value) << AC_WINCTRL_WINTSEL0_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 404 | #define AC_WINCTRL_WINTSEL0_ABOVE_Val 0x0ul /**< \brief (AC_WINCTRL) Interrupt on signal above window */ |
AnnaBridge | 171:3a7713b1edbc | 405 | #define AC_WINCTRL_WINTSEL0_INSIDE_Val 0x1ul /**< \brief (AC_WINCTRL) Interrupt on signal inside window */ |
AnnaBridge | 171:3a7713b1edbc | 406 | #define AC_WINCTRL_WINTSEL0_BELOW_Val 0x2ul /**< \brief (AC_WINCTRL) Interrupt on signal below window */ |
AnnaBridge | 171:3a7713b1edbc | 407 | #define AC_WINCTRL_WINTSEL0_OUTSIDE_Val 0x3ul /**< \brief (AC_WINCTRL) Interrupt on signal outside window */ |
AnnaBridge | 171:3a7713b1edbc | 408 | #define AC_WINCTRL_WINTSEL0_ABOVE (AC_WINCTRL_WINTSEL0_ABOVE_Val << AC_WINCTRL_WINTSEL0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 409 | #define AC_WINCTRL_WINTSEL0_INSIDE (AC_WINCTRL_WINTSEL0_INSIDE_Val << AC_WINCTRL_WINTSEL0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 410 | #define AC_WINCTRL_WINTSEL0_BELOW (AC_WINCTRL_WINTSEL0_BELOW_Val << AC_WINCTRL_WINTSEL0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 411 | #define AC_WINCTRL_WINTSEL0_OUTSIDE (AC_WINCTRL_WINTSEL0_OUTSIDE_Val << AC_WINCTRL_WINTSEL0_Pos) |
AnnaBridge | 171:3a7713b1edbc | 412 | #define AC_WINCTRL_MASK 0x07ul /**< \brief (AC_WINCTRL) MASK Register */ |
AnnaBridge | 171:3a7713b1edbc | 413 | |
AnnaBridge | 171:3a7713b1edbc | 414 | /* -------- AC_COMPCTRL : (AC Offset: 0x10) (R/W 32) Comparator Control n -------- */ |
AnnaBridge | 171:3a7713b1edbc | 415 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
AnnaBridge | 171:3a7713b1edbc | 416 | typedef union { |
AnnaBridge | 171:3a7713b1edbc | 417 | struct { |
AnnaBridge | 171:3a7713b1edbc | 418 | uint32_t ENABLE:1; /*!< bit: 0 Enable */ |
AnnaBridge | 171:3a7713b1edbc | 419 | uint32_t SINGLE:1; /*!< bit: 1 Single-Shot Mode */ |
AnnaBridge | 171:3a7713b1edbc | 420 | uint32_t SPEED:2; /*!< bit: 2.. 3 Speed Selection */ |
AnnaBridge | 171:3a7713b1edbc | 421 | uint32_t :1; /*!< bit: 4 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 422 | uint32_t INTSEL:2; /*!< bit: 5.. 6 Interrupt Selection */ |
AnnaBridge | 171:3a7713b1edbc | 423 | uint32_t :1; /*!< bit: 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 424 | uint32_t MUXNEG:3; /*!< bit: 8..10 Negative Input Mux Selection */ |
AnnaBridge | 171:3a7713b1edbc | 425 | uint32_t :1; /*!< bit: 11 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 426 | uint32_t MUXPOS:2; /*!< bit: 12..13 Positive Input Mux Selection */ |
AnnaBridge | 171:3a7713b1edbc | 427 | uint32_t :1; /*!< bit: 14 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 428 | uint32_t SWAP:1; /*!< bit: 15 Swap Inputs and Invert */ |
AnnaBridge | 171:3a7713b1edbc | 429 | uint32_t OUT:2; /*!< bit: 16..17 Output */ |
AnnaBridge | 171:3a7713b1edbc | 430 | uint32_t :1; /*!< bit: 18 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 431 | uint32_t HYST:1; /*!< bit: 19 Hysteresis Enable */ |
AnnaBridge | 171:3a7713b1edbc | 432 | uint32_t :4; /*!< bit: 20..23 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 433 | uint32_t FLEN:3; /*!< bit: 24..26 Filter Length */ |
AnnaBridge | 171:3a7713b1edbc | 434 | uint32_t :5; /*!< bit: 27..31 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 435 | } bit; /*!< Structure used for bit access */ |
AnnaBridge | 171:3a7713b1edbc | 436 | uint32_t reg; /*!< Type used for register access */ |
AnnaBridge | 171:3a7713b1edbc | 437 | } AC_COMPCTRL_Type; |
AnnaBridge | 171:3a7713b1edbc | 438 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
AnnaBridge | 171:3a7713b1edbc | 439 | |
AnnaBridge | 171:3a7713b1edbc | 440 | #define AC_COMPCTRL_OFFSET 0x10 /**< \brief (AC_COMPCTRL offset) Comparator Control n */ |
AnnaBridge | 171:3a7713b1edbc | 441 | #define AC_COMPCTRL_RESETVALUE 0x00000000ul /**< \brief (AC_COMPCTRL reset_value) Comparator Control n */ |
AnnaBridge | 171:3a7713b1edbc | 442 | |
AnnaBridge | 171:3a7713b1edbc | 443 | #define AC_COMPCTRL_ENABLE_Pos 0 /**< \brief (AC_COMPCTRL) Enable */ |
AnnaBridge | 171:3a7713b1edbc | 444 | #define AC_COMPCTRL_ENABLE (0x1ul << AC_COMPCTRL_ENABLE_Pos) |
AnnaBridge | 171:3a7713b1edbc | 445 | #define AC_COMPCTRL_SINGLE_Pos 1 /**< \brief (AC_COMPCTRL) Single-Shot Mode */ |
AnnaBridge | 171:3a7713b1edbc | 446 | #define AC_COMPCTRL_SINGLE (0x1ul << AC_COMPCTRL_SINGLE_Pos) |
AnnaBridge | 171:3a7713b1edbc | 447 | #define AC_COMPCTRL_SPEED_Pos 2 /**< \brief (AC_COMPCTRL) Speed Selection */ |
AnnaBridge | 171:3a7713b1edbc | 448 | #define AC_COMPCTRL_SPEED_Msk (0x3ul << AC_COMPCTRL_SPEED_Pos) |
AnnaBridge | 171:3a7713b1edbc | 449 | #define AC_COMPCTRL_SPEED(value) ((AC_COMPCTRL_SPEED_Msk & ((value) << AC_COMPCTRL_SPEED_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 450 | #define AC_COMPCTRL_SPEED_LOW_Val 0x0ul /**< \brief (AC_COMPCTRL) Low speed */ |
AnnaBridge | 171:3a7713b1edbc | 451 | #define AC_COMPCTRL_SPEED_HIGH_Val 0x1ul /**< \brief (AC_COMPCTRL) High speed */ |
AnnaBridge | 171:3a7713b1edbc | 452 | #define AC_COMPCTRL_SPEED_LOW (AC_COMPCTRL_SPEED_LOW_Val << AC_COMPCTRL_SPEED_Pos) |
AnnaBridge | 171:3a7713b1edbc | 453 | #define AC_COMPCTRL_SPEED_HIGH (AC_COMPCTRL_SPEED_HIGH_Val << AC_COMPCTRL_SPEED_Pos) |
AnnaBridge | 171:3a7713b1edbc | 454 | #define AC_COMPCTRL_INTSEL_Pos 5 /**< \brief (AC_COMPCTRL) Interrupt Selection */ |
AnnaBridge | 171:3a7713b1edbc | 455 | #define AC_COMPCTRL_INTSEL_Msk (0x3ul << AC_COMPCTRL_INTSEL_Pos) |
AnnaBridge | 171:3a7713b1edbc | 456 | #define AC_COMPCTRL_INTSEL(value) ((AC_COMPCTRL_INTSEL_Msk & ((value) << AC_COMPCTRL_INTSEL_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 457 | #define AC_COMPCTRL_INTSEL_TOGGLE_Val 0x0ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output toggle */ |
AnnaBridge | 171:3a7713b1edbc | 458 | #define AC_COMPCTRL_INTSEL_RISING_Val 0x1ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output rising */ |
AnnaBridge | 171:3a7713b1edbc | 459 | #define AC_COMPCTRL_INTSEL_FALLING_Val 0x2ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output falling */ |
AnnaBridge | 171:3a7713b1edbc | 460 | #define AC_COMPCTRL_INTSEL_EOC_Val 0x3ul /**< \brief (AC_COMPCTRL) Interrupt on end of comparison (single-shot mode only) */ |
AnnaBridge | 171:3a7713b1edbc | 461 | #define AC_COMPCTRL_INTSEL_TOGGLE (AC_COMPCTRL_INTSEL_TOGGLE_Val << AC_COMPCTRL_INTSEL_Pos) |
AnnaBridge | 171:3a7713b1edbc | 462 | #define AC_COMPCTRL_INTSEL_RISING (AC_COMPCTRL_INTSEL_RISING_Val << AC_COMPCTRL_INTSEL_Pos) |
AnnaBridge | 171:3a7713b1edbc | 463 | #define AC_COMPCTRL_INTSEL_FALLING (AC_COMPCTRL_INTSEL_FALLING_Val << AC_COMPCTRL_INTSEL_Pos) |
AnnaBridge | 171:3a7713b1edbc | 464 | #define AC_COMPCTRL_INTSEL_EOC (AC_COMPCTRL_INTSEL_EOC_Val << AC_COMPCTRL_INTSEL_Pos) |
AnnaBridge | 171:3a7713b1edbc | 465 | #define AC_COMPCTRL_MUXNEG_Pos 8 /**< \brief (AC_COMPCTRL) Negative Input Mux Selection */ |
AnnaBridge | 171:3a7713b1edbc | 466 | #define AC_COMPCTRL_MUXNEG_Msk (0x7ul << AC_COMPCTRL_MUXNEG_Pos) |
AnnaBridge | 171:3a7713b1edbc | 467 | #define AC_COMPCTRL_MUXNEG(value) ((AC_COMPCTRL_MUXNEG_Msk & ((value) << AC_COMPCTRL_MUXNEG_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 468 | #define AC_COMPCTRL_MUXNEG_PIN0_Val 0x0ul /**< \brief (AC_COMPCTRL) I/O pin 0 */ |
AnnaBridge | 171:3a7713b1edbc | 469 | #define AC_COMPCTRL_MUXNEG_PIN1_Val 0x1ul /**< \brief (AC_COMPCTRL) I/O pin 1 */ |
AnnaBridge | 171:3a7713b1edbc | 470 | #define AC_COMPCTRL_MUXNEG_PIN2_Val 0x2ul /**< \brief (AC_COMPCTRL) I/O pin 2 */ |
AnnaBridge | 171:3a7713b1edbc | 471 | #define AC_COMPCTRL_MUXNEG_PIN3_Val 0x3ul /**< \brief (AC_COMPCTRL) I/O pin 3 */ |
AnnaBridge | 171:3a7713b1edbc | 472 | #define AC_COMPCTRL_MUXNEG_GND_Val 0x4ul /**< \brief (AC_COMPCTRL) Ground */ |
AnnaBridge | 171:3a7713b1edbc | 473 | #define AC_COMPCTRL_MUXNEG_VSCALE_Val 0x5ul /**< \brief (AC_COMPCTRL) VDD scaler */ |
AnnaBridge | 171:3a7713b1edbc | 474 | #define AC_COMPCTRL_MUXNEG_BANDGAP_Val 0x6ul /**< \brief (AC_COMPCTRL) Internal bandgap voltage */ |
AnnaBridge | 171:3a7713b1edbc | 475 | #define AC_COMPCTRL_MUXNEG_DAC_Val 0x7ul /**< \brief (AC_COMPCTRL) DAC output */ |
AnnaBridge | 171:3a7713b1edbc | 476 | #define AC_COMPCTRL_MUXNEG_PIN0 (AC_COMPCTRL_MUXNEG_PIN0_Val << AC_COMPCTRL_MUXNEG_Pos) |
AnnaBridge | 171:3a7713b1edbc | 477 | #define AC_COMPCTRL_MUXNEG_PIN1 (AC_COMPCTRL_MUXNEG_PIN1_Val << AC_COMPCTRL_MUXNEG_Pos) |
AnnaBridge | 171:3a7713b1edbc | 478 | #define AC_COMPCTRL_MUXNEG_PIN2 (AC_COMPCTRL_MUXNEG_PIN2_Val << AC_COMPCTRL_MUXNEG_Pos) |
AnnaBridge | 171:3a7713b1edbc | 479 | #define AC_COMPCTRL_MUXNEG_PIN3 (AC_COMPCTRL_MUXNEG_PIN3_Val << AC_COMPCTRL_MUXNEG_Pos) |
AnnaBridge | 171:3a7713b1edbc | 480 | #define AC_COMPCTRL_MUXNEG_GND (AC_COMPCTRL_MUXNEG_GND_Val << AC_COMPCTRL_MUXNEG_Pos) |
AnnaBridge | 171:3a7713b1edbc | 481 | #define AC_COMPCTRL_MUXNEG_VSCALE (AC_COMPCTRL_MUXNEG_VSCALE_Val << AC_COMPCTRL_MUXNEG_Pos) |
AnnaBridge | 171:3a7713b1edbc | 482 | #define AC_COMPCTRL_MUXNEG_BANDGAP (AC_COMPCTRL_MUXNEG_BANDGAP_Val << AC_COMPCTRL_MUXNEG_Pos) |
AnnaBridge | 171:3a7713b1edbc | 483 | #define AC_COMPCTRL_MUXNEG_DAC (AC_COMPCTRL_MUXNEG_DAC_Val << AC_COMPCTRL_MUXNEG_Pos) |
AnnaBridge | 171:3a7713b1edbc | 484 | #define AC_COMPCTRL_MUXPOS_Pos 12 /**< \brief (AC_COMPCTRL) Positive Input Mux Selection */ |
AnnaBridge | 171:3a7713b1edbc | 485 | #define AC_COMPCTRL_MUXPOS_Msk (0x3ul << AC_COMPCTRL_MUXPOS_Pos) |
AnnaBridge | 171:3a7713b1edbc | 486 | #define AC_COMPCTRL_MUXPOS(value) ((AC_COMPCTRL_MUXPOS_Msk & ((value) << AC_COMPCTRL_MUXPOS_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 487 | #define AC_COMPCTRL_MUXPOS_PIN0_Val 0x0ul /**< \brief (AC_COMPCTRL) I/O pin 0 */ |
AnnaBridge | 171:3a7713b1edbc | 488 | #define AC_COMPCTRL_MUXPOS_PIN1_Val 0x1ul /**< \brief (AC_COMPCTRL) I/O pin 1 */ |
AnnaBridge | 171:3a7713b1edbc | 489 | #define AC_COMPCTRL_MUXPOS_PIN2_Val 0x2ul /**< \brief (AC_COMPCTRL) I/O pin 2 */ |
AnnaBridge | 171:3a7713b1edbc | 490 | #define AC_COMPCTRL_MUXPOS_PIN3_Val 0x3ul /**< \brief (AC_COMPCTRL) I/O pin 3 */ |
AnnaBridge | 171:3a7713b1edbc | 491 | #define AC_COMPCTRL_MUXPOS_PIN0 (AC_COMPCTRL_MUXPOS_PIN0_Val << AC_COMPCTRL_MUXPOS_Pos) |
AnnaBridge | 171:3a7713b1edbc | 492 | #define AC_COMPCTRL_MUXPOS_PIN1 (AC_COMPCTRL_MUXPOS_PIN1_Val << AC_COMPCTRL_MUXPOS_Pos) |
AnnaBridge | 171:3a7713b1edbc | 493 | #define AC_COMPCTRL_MUXPOS_PIN2 (AC_COMPCTRL_MUXPOS_PIN2_Val << AC_COMPCTRL_MUXPOS_Pos) |
AnnaBridge | 171:3a7713b1edbc | 494 | #define AC_COMPCTRL_MUXPOS_PIN3 (AC_COMPCTRL_MUXPOS_PIN3_Val << AC_COMPCTRL_MUXPOS_Pos) |
AnnaBridge | 171:3a7713b1edbc | 495 | #define AC_COMPCTRL_SWAP_Pos 15 /**< \brief (AC_COMPCTRL) Swap Inputs and Invert */ |
AnnaBridge | 171:3a7713b1edbc | 496 | #define AC_COMPCTRL_SWAP (0x1ul << AC_COMPCTRL_SWAP_Pos) |
AnnaBridge | 171:3a7713b1edbc | 497 | #define AC_COMPCTRL_OUT_Pos 16 /**< \brief (AC_COMPCTRL) Output */ |
AnnaBridge | 171:3a7713b1edbc | 498 | #define AC_COMPCTRL_OUT_Msk (0x3ul << AC_COMPCTRL_OUT_Pos) |
AnnaBridge | 171:3a7713b1edbc | 499 | #define AC_COMPCTRL_OUT(value) ((AC_COMPCTRL_OUT_Msk & ((value) << AC_COMPCTRL_OUT_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 500 | #define AC_COMPCTRL_OUT_OFF_Val 0x0ul /**< \brief (AC_COMPCTRL) The output of COMPn is not routed to the COMPn I/O port */ |
AnnaBridge | 171:3a7713b1edbc | 501 | #define AC_COMPCTRL_OUT_ASYNC_Val 0x1ul /**< \brief (AC_COMPCTRL) The asynchronous output of COMPn is routed to the COMPn I/O port */ |
AnnaBridge | 171:3a7713b1edbc | 502 | #define AC_COMPCTRL_OUT_SYNC_Val 0x2ul /**< \brief (AC_COMPCTRL) The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port */ |
AnnaBridge | 171:3a7713b1edbc | 503 | #define AC_COMPCTRL_OUT_OFF (AC_COMPCTRL_OUT_OFF_Val << AC_COMPCTRL_OUT_Pos) |
AnnaBridge | 171:3a7713b1edbc | 504 | #define AC_COMPCTRL_OUT_ASYNC (AC_COMPCTRL_OUT_ASYNC_Val << AC_COMPCTRL_OUT_Pos) |
AnnaBridge | 171:3a7713b1edbc | 505 | #define AC_COMPCTRL_OUT_SYNC (AC_COMPCTRL_OUT_SYNC_Val << AC_COMPCTRL_OUT_Pos) |
AnnaBridge | 171:3a7713b1edbc | 506 | #define AC_COMPCTRL_HYST_Pos 19 /**< \brief (AC_COMPCTRL) Hysteresis Enable */ |
AnnaBridge | 171:3a7713b1edbc | 507 | #define AC_COMPCTRL_HYST (0x1ul << AC_COMPCTRL_HYST_Pos) |
AnnaBridge | 171:3a7713b1edbc | 508 | #define AC_COMPCTRL_FLEN_Pos 24 /**< \brief (AC_COMPCTRL) Filter Length */ |
AnnaBridge | 171:3a7713b1edbc | 509 | #define AC_COMPCTRL_FLEN_Msk (0x7ul << AC_COMPCTRL_FLEN_Pos) |
AnnaBridge | 171:3a7713b1edbc | 510 | #define AC_COMPCTRL_FLEN(value) ((AC_COMPCTRL_FLEN_Msk & ((value) << AC_COMPCTRL_FLEN_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 511 | #define AC_COMPCTRL_FLEN_OFF_Val 0x0ul /**< \brief (AC_COMPCTRL) No filtering */ |
AnnaBridge | 171:3a7713b1edbc | 512 | #define AC_COMPCTRL_FLEN_MAJ3_Val 0x1ul /**< \brief (AC_COMPCTRL) 3-bit majority function (2 of 3) */ |
AnnaBridge | 171:3a7713b1edbc | 513 | #define AC_COMPCTRL_FLEN_MAJ5_Val 0x2ul /**< \brief (AC_COMPCTRL) 5-bit majority function (3 of 5) */ |
AnnaBridge | 171:3a7713b1edbc | 514 | #define AC_COMPCTRL_FLEN_OFF (AC_COMPCTRL_FLEN_OFF_Val << AC_COMPCTRL_FLEN_Pos) |
AnnaBridge | 171:3a7713b1edbc | 515 | #define AC_COMPCTRL_FLEN_MAJ3 (AC_COMPCTRL_FLEN_MAJ3_Val << AC_COMPCTRL_FLEN_Pos) |
AnnaBridge | 171:3a7713b1edbc | 516 | #define AC_COMPCTRL_FLEN_MAJ5 (AC_COMPCTRL_FLEN_MAJ5_Val << AC_COMPCTRL_FLEN_Pos) |
AnnaBridge | 171:3a7713b1edbc | 517 | #define AC_COMPCTRL_MASK 0x070BB76Ful /**< \brief (AC_COMPCTRL) MASK Register */ |
AnnaBridge | 171:3a7713b1edbc | 518 | |
AnnaBridge | 171:3a7713b1edbc | 519 | /* -------- AC_SCALER : (AC Offset: 0x20) (R/W 8) Scaler n -------- */ |
AnnaBridge | 171:3a7713b1edbc | 520 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
AnnaBridge | 171:3a7713b1edbc | 521 | typedef union { |
AnnaBridge | 171:3a7713b1edbc | 522 | struct { |
AnnaBridge | 171:3a7713b1edbc | 523 | uint8_t VALUE:6; /*!< bit: 0.. 5 Scaler Value */ |
AnnaBridge | 171:3a7713b1edbc | 524 | uint8_t :2; /*!< bit: 6.. 7 Reserved */ |
AnnaBridge | 171:3a7713b1edbc | 525 | } bit; /*!< Structure used for bit access */ |
AnnaBridge | 171:3a7713b1edbc | 526 | uint8_t reg; /*!< Type used for register access */ |
AnnaBridge | 171:3a7713b1edbc | 527 | } AC_SCALER_Type; |
AnnaBridge | 171:3a7713b1edbc | 528 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
AnnaBridge | 171:3a7713b1edbc | 529 | |
AnnaBridge | 171:3a7713b1edbc | 530 | #define AC_SCALER_OFFSET 0x20 /**< \brief (AC_SCALER offset) Scaler n */ |
AnnaBridge | 171:3a7713b1edbc | 531 | #define AC_SCALER_RESETVALUE 0x00ul /**< \brief (AC_SCALER reset_value) Scaler n */ |
AnnaBridge | 171:3a7713b1edbc | 532 | |
AnnaBridge | 171:3a7713b1edbc | 533 | #define AC_SCALER_VALUE_Pos 0 /**< \brief (AC_SCALER) Scaler Value */ |
AnnaBridge | 171:3a7713b1edbc | 534 | #define AC_SCALER_VALUE_Msk (0x3Ful << AC_SCALER_VALUE_Pos) |
AnnaBridge | 171:3a7713b1edbc | 535 | #define AC_SCALER_VALUE(value) ((AC_SCALER_VALUE_Msk & ((value) << AC_SCALER_VALUE_Pos))) |
AnnaBridge | 171:3a7713b1edbc | 536 | #define AC_SCALER_MASK 0x3Ful /**< \brief (AC_SCALER) MASK Register */ |
AnnaBridge | 171:3a7713b1edbc | 537 | |
AnnaBridge | 171:3a7713b1edbc | 538 | /** \brief AC hardware registers */ |
AnnaBridge | 171:3a7713b1edbc | 539 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
AnnaBridge | 171:3a7713b1edbc | 540 | typedef struct { |
AnnaBridge | 171:3a7713b1edbc | 541 | __IO AC_CTRLA_Type CTRLA; /**< \brief Offset: 0x00 (R/W 8) Control A */ |
AnnaBridge | 171:3a7713b1edbc | 542 | __O AC_CTRLB_Type CTRLB; /**< \brief Offset: 0x01 ( /W 8) Control B */ |
AnnaBridge | 171:3a7713b1edbc | 543 | __IO AC_EVCTRL_Type EVCTRL; /**< \brief Offset: 0x02 (R/W 16) Event Control */ |
AnnaBridge | 171:3a7713b1edbc | 544 | __IO AC_INTENCLR_Type INTENCLR; /**< \brief Offset: 0x04 (R/W 8) Interrupt Enable Clear */ |
AnnaBridge | 171:3a7713b1edbc | 545 | __IO AC_INTENSET_Type INTENSET; /**< \brief Offset: 0x05 (R/W 8) Interrupt Enable Set */ |
AnnaBridge | 171:3a7713b1edbc | 546 | __IO AC_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x06 (R/W 8) Interrupt Flag Status and Clear */ |
AnnaBridge | 171:3a7713b1edbc | 547 | RoReg8 Reserved1[0x1]; |
AnnaBridge | 171:3a7713b1edbc | 548 | __I AC_STATUSA_Type STATUSA; /**< \brief Offset: 0x08 (R/ 8) Status A */ |
AnnaBridge | 171:3a7713b1edbc | 549 | __I AC_STATUSB_Type STATUSB; /**< \brief Offset: 0x09 (R/ 8) Status B */ |
AnnaBridge | 171:3a7713b1edbc | 550 | __I AC_STATUSC_Type STATUSC; /**< \brief Offset: 0x0A (R/ 8) Status C */ |
AnnaBridge | 171:3a7713b1edbc | 551 | RoReg8 Reserved2[0x1]; |
AnnaBridge | 171:3a7713b1edbc | 552 | __IO AC_WINCTRL_Type WINCTRL; /**< \brief Offset: 0x0C (R/W 8) Window Control */ |
AnnaBridge | 171:3a7713b1edbc | 553 | RoReg8 Reserved3[0x3]; |
AnnaBridge | 171:3a7713b1edbc | 554 | __IO AC_COMPCTRL_Type COMPCTRL[2]; /**< \brief Offset: 0x10 (R/W 32) Comparator Control n */ |
AnnaBridge | 171:3a7713b1edbc | 555 | RoReg8 Reserved4[0x8]; |
AnnaBridge | 171:3a7713b1edbc | 556 | __IO AC_SCALER_Type SCALER[2]; /**< \brief Offset: 0x20 (R/W 8) Scaler n */ |
AnnaBridge | 171:3a7713b1edbc | 557 | } Ac; |
AnnaBridge | 171:3a7713b1edbc | 558 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
AnnaBridge | 171:3a7713b1edbc | 559 | |
AnnaBridge | 171:3a7713b1edbc | 560 | /*@}*/ |
AnnaBridge | 171:3a7713b1edbc | 561 | |
AnnaBridge | 171:3a7713b1edbc | 562 | #endif /* _SAMD21_AC_COMPONENT_ */ |