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TARGET_NUCLEO_L496ZG_P/TOOLCHAIN_ARM_STD/stm32l4xx_hal_sram.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 145:64910690c574 | 1 | /** |
AnnaBridge | 145:64910690c574 | 2 | ****************************************************************************** |
AnnaBridge | 145:64910690c574 | 3 | * @file stm32l4xx_hal_sram.h |
AnnaBridge | 145:64910690c574 | 4 | * @author MCD Application Team |
AnnaBridge | 145:64910690c574 | 5 | * @brief Header file of SRAM HAL module. |
AnnaBridge | 145:64910690c574 | 6 | ****************************************************************************** |
AnnaBridge | 145:64910690c574 | 7 | * @attention |
AnnaBridge | 145:64910690c574 | 8 | * |
AnnaBridge | 145:64910690c574 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
AnnaBridge | 145:64910690c574 | 10 | * |
AnnaBridge | 145:64910690c574 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 145:64910690c574 | 12 | * are permitted provided that the following conditions are met: |
AnnaBridge | 145:64910690c574 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 145:64910690c574 | 14 | * this list of conditions and the following disclaimer. |
AnnaBridge | 145:64910690c574 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 145:64910690c574 | 16 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 145:64910690c574 | 17 | * and/or other materials provided with the distribution. |
AnnaBridge | 145:64910690c574 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
AnnaBridge | 145:64910690c574 | 19 | * may be used to endorse or promote products derived from this software |
AnnaBridge | 145:64910690c574 | 20 | * without specific prior written permission. |
AnnaBridge | 145:64910690c574 | 21 | * |
AnnaBridge | 145:64910690c574 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
AnnaBridge | 145:64910690c574 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
AnnaBridge | 145:64910690c574 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 145:64910690c574 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 145:64910690c574 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
AnnaBridge | 145:64910690c574 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
AnnaBridge | 145:64910690c574 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
AnnaBridge | 145:64910690c574 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
AnnaBridge | 145:64910690c574 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
AnnaBridge | 145:64910690c574 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 145:64910690c574 | 32 | * |
AnnaBridge | 145:64910690c574 | 33 | ****************************************************************************** |
AnnaBridge | 145:64910690c574 | 34 | */ |
AnnaBridge | 145:64910690c574 | 35 | |
AnnaBridge | 145:64910690c574 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 37 | #ifndef __STM32L4xx_HAL_SRAM_H |
AnnaBridge | 145:64910690c574 | 38 | #define __STM32L4xx_HAL_SRAM_H |
AnnaBridge | 145:64910690c574 | 39 | |
AnnaBridge | 145:64910690c574 | 40 | #ifdef __cplusplus |
AnnaBridge | 145:64910690c574 | 41 | extern "C" { |
AnnaBridge | 145:64910690c574 | 42 | #endif |
AnnaBridge | 145:64910690c574 | 43 | |
AnnaBridge | 145:64910690c574 | 44 | #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ |
AnnaBridge | 161:aa5281ff4a02 | 45 | defined(STM32L496xx) || defined(STM32L4A6xx) || \ |
AnnaBridge | 161:aa5281ff4a02 | 46 | defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) |
AnnaBridge | 145:64910690c574 | 47 | |
AnnaBridge | 145:64910690c574 | 48 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 49 | #include "stm32l4xx_ll_fmc.h" |
AnnaBridge | 145:64910690c574 | 50 | |
AnnaBridge | 145:64910690c574 | 51 | /** @addtogroup STM32L4xx_HAL_Driver |
AnnaBridge | 145:64910690c574 | 52 | * @{ |
AnnaBridge | 145:64910690c574 | 53 | */ |
AnnaBridge | 145:64910690c574 | 54 | |
AnnaBridge | 145:64910690c574 | 55 | /** @addtogroup SRAM |
AnnaBridge | 145:64910690c574 | 56 | * @{ |
AnnaBridge | 145:64910690c574 | 57 | */ |
AnnaBridge | 145:64910690c574 | 58 | |
AnnaBridge | 145:64910690c574 | 59 | /* Exported typedef ----------------------------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 60 | |
AnnaBridge | 145:64910690c574 | 61 | /** @defgroup SRAM_Exported_Types SRAM Exported Types |
AnnaBridge | 145:64910690c574 | 62 | * @{ |
AnnaBridge | 145:64910690c574 | 63 | */ |
AnnaBridge | 145:64910690c574 | 64 | /** |
AnnaBridge | 145:64910690c574 | 65 | * @brief HAL SRAM State structures definition |
AnnaBridge | 145:64910690c574 | 66 | */ |
AnnaBridge | 145:64910690c574 | 67 | typedef enum |
AnnaBridge | 145:64910690c574 | 68 | { |
AnnaBridge | 145:64910690c574 | 69 | HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */ |
AnnaBridge | 145:64910690c574 | 70 | HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */ |
AnnaBridge | 145:64910690c574 | 71 | HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */ |
AnnaBridge | 145:64910690c574 | 72 | HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */ |
AnnaBridge | 145:64910690c574 | 73 | HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */ |
AnnaBridge | 145:64910690c574 | 74 | |
AnnaBridge | 145:64910690c574 | 75 | }HAL_SRAM_StateTypeDef; |
AnnaBridge | 145:64910690c574 | 76 | |
AnnaBridge | 145:64910690c574 | 77 | /** |
AnnaBridge | 145:64910690c574 | 78 | * @brief SRAM handle Structure definition |
AnnaBridge | 145:64910690c574 | 79 | */ |
AnnaBridge | 145:64910690c574 | 80 | typedef struct |
AnnaBridge | 145:64910690c574 | 81 | { |
AnnaBridge | 145:64910690c574 | 82 | FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ |
AnnaBridge | 145:64910690c574 | 83 | |
AnnaBridge | 145:64910690c574 | 84 | FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ |
AnnaBridge | 145:64910690c574 | 85 | |
AnnaBridge | 145:64910690c574 | 86 | FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */ |
AnnaBridge | 145:64910690c574 | 87 | |
AnnaBridge | 145:64910690c574 | 88 | HAL_LockTypeDef Lock; /*!< SRAM locking object */ |
AnnaBridge | 145:64910690c574 | 89 | |
AnnaBridge | 145:64910690c574 | 90 | __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */ |
AnnaBridge | 145:64910690c574 | 91 | |
AnnaBridge | 145:64910690c574 | 92 | DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ |
AnnaBridge | 145:64910690c574 | 93 | |
AnnaBridge | 145:64910690c574 | 94 | }SRAM_HandleTypeDef; |
AnnaBridge | 145:64910690c574 | 95 | |
AnnaBridge | 145:64910690c574 | 96 | /** |
AnnaBridge | 145:64910690c574 | 97 | * @} |
AnnaBridge | 145:64910690c574 | 98 | */ |
AnnaBridge | 145:64910690c574 | 99 | |
AnnaBridge | 145:64910690c574 | 100 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 101 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 102 | |
AnnaBridge | 145:64910690c574 | 103 | /** @defgroup SRAM_Exported_Macros SRAM Exported Macros |
AnnaBridge | 145:64910690c574 | 104 | * @{ |
AnnaBridge | 145:64910690c574 | 105 | */ |
AnnaBridge | 145:64910690c574 | 106 | |
AnnaBridge | 145:64910690c574 | 107 | /** @brief Reset SRAM handle state. |
AnnaBridge | 145:64910690c574 | 108 | * @param __HANDLE__: SRAM handle |
AnnaBridge | 145:64910690c574 | 109 | * @retval None |
AnnaBridge | 145:64910690c574 | 110 | */ |
AnnaBridge | 145:64910690c574 | 111 | #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET) |
AnnaBridge | 145:64910690c574 | 112 | |
AnnaBridge | 145:64910690c574 | 113 | /** |
AnnaBridge | 145:64910690c574 | 114 | * @} |
AnnaBridge | 145:64910690c574 | 115 | */ |
AnnaBridge | 145:64910690c574 | 116 | |
AnnaBridge | 145:64910690c574 | 117 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 145:64910690c574 | 118 | /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions |
AnnaBridge | 145:64910690c574 | 119 | * @{ |
AnnaBridge | 145:64910690c574 | 120 | */ |
AnnaBridge | 145:64910690c574 | 121 | |
AnnaBridge | 145:64910690c574 | 122 | /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions |
AnnaBridge | 145:64910690c574 | 123 | * @{ |
AnnaBridge | 145:64910690c574 | 124 | */ |
AnnaBridge | 145:64910690c574 | 125 | |
AnnaBridge | 145:64910690c574 | 126 | /* Initialization/de-initialization functions ********************************/ |
AnnaBridge | 145:64910690c574 | 127 | HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming); |
AnnaBridge | 145:64910690c574 | 128 | HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram); |
AnnaBridge | 145:64910690c574 | 129 | void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram); |
AnnaBridge | 145:64910690c574 | 130 | void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram); |
AnnaBridge | 145:64910690c574 | 131 | |
AnnaBridge | 145:64910690c574 | 132 | void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); |
AnnaBridge | 145:64910690c574 | 133 | void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); |
AnnaBridge | 145:64910690c574 | 134 | |
AnnaBridge | 145:64910690c574 | 135 | /** |
AnnaBridge | 145:64910690c574 | 136 | * @} |
AnnaBridge | 145:64910690c574 | 137 | */ |
AnnaBridge | 145:64910690c574 | 138 | |
AnnaBridge | 145:64910690c574 | 139 | /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions |
AnnaBridge | 145:64910690c574 | 140 | * @{ |
AnnaBridge | 145:64910690c574 | 141 | */ |
AnnaBridge | 145:64910690c574 | 142 | |
AnnaBridge | 145:64910690c574 | 143 | /* I/O operation functions ***************************************************/ |
AnnaBridge | 145:64910690c574 | 144 | HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize); |
AnnaBridge | 145:64910690c574 | 145 | HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize); |
AnnaBridge | 145:64910690c574 | 146 | HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize); |
AnnaBridge | 145:64910690c574 | 147 | HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize); |
AnnaBridge | 145:64910690c574 | 148 | HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); |
AnnaBridge | 145:64910690c574 | 149 | HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); |
AnnaBridge | 145:64910690c574 | 150 | HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); |
AnnaBridge | 145:64910690c574 | 151 | HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); |
AnnaBridge | 145:64910690c574 | 152 | |
AnnaBridge | 145:64910690c574 | 153 | /** |
AnnaBridge | 145:64910690c574 | 154 | * @} |
AnnaBridge | 145:64910690c574 | 155 | */ |
AnnaBridge | 145:64910690c574 | 156 | |
AnnaBridge | 145:64910690c574 | 157 | /** @addtogroup SRAM_Exported_Functions_Group3 Control functions |
AnnaBridge | 145:64910690c574 | 158 | * @{ |
AnnaBridge | 145:64910690c574 | 159 | */ |
AnnaBridge | 145:64910690c574 | 160 | |
AnnaBridge | 145:64910690c574 | 161 | /* SRAM Control functions ****************************************************/ |
AnnaBridge | 145:64910690c574 | 162 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram); |
AnnaBridge | 145:64910690c574 | 163 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram); |
AnnaBridge | 145:64910690c574 | 164 | |
AnnaBridge | 145:64910690c574 | 165 | /** |
AnnaBridge | 145:64910690c574 | 166 | * @} |
AnnaBridge | 145:64910690c574 | 167 | */ |
AnnaBridge | 145:64910690c574 | 168 | |
AnnaBridge | 145:64910690c574 | 169 | /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions |
AnnaBridge | 145:64910690c574 | 170 | * @{ |
AnnaBridge | 145:64910690c574 | 171 | */ |
AnnaBridge | 145:64910690c574 | 172 | |
AnnaBridge | 145:64910690c574 | 173 | /* SRAM Peripheral State functions ********************************************/ |
AnnaBridge | 145:64910690c574 | 174 | HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram); |
AnnaBridge | 145:64910690c574 | 175 | |
AnnaBridge | 145:64910690c574 | 176 | /** |
AnnaBridge | 145:64910690c574 | 177 | * @} |
AnnaBridge | 145:64910690c574 | 178 | */ |
AnnaBridge | 145:64910690c574 | 179 | |
AnnaBridge | 145:64910690c574 | 180 | /** |
AnnaBridge | 145:64910690c574 | 181 | * @} |
AnnaBridge | 145:64910690c574 | 182 | */ |
AnnaBridge | 145:64910690c574 | 183 | |
AnnaBridge | 145:64910690c574 | 184 | /** |
AnnaBridge | 145:64910690c574 | 185 | * @} |
AnnaBridge | 145:64910690c574 | 186 | */ |
AnnaBridge | 145:64910690c574 | 187 | |
AnnaBridge | 145:64910690c574 | 188 | /** |
AnnaBridge | 145:64910690c574 | 189 | * @} |
AnnaBridge | 145:64910690c574 | 190 | */ |
AnnaBridge | 145:64910690c574 | 191 | |
AnnaBridge | 145:64910690c574 | 192 | #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ |
AnnaBridge | 145:64910690c574 | 193 | /* STM32L496xx || STM32L4A6xx || */ |
AnnaBridge | 161:aa5281ff4a02 | 194 | /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ |
AnnaBridge | 145:64910690c574 | 195 | |
AnnaBridge | 145:64910690c574 | 196 | #ifdef __cplusplus |
AnnaBridge | 145:64910690c574 | 197 | } |
AnnaBridge | 145:64910690c574 | 198 | #endif |
AnnaBridge | 145:64910690c574 | 199 | |
AnnaBridge | 145:64910690c574 | 200 | #endif /* __STM32L4xx_HAL_SRAM_H */ |
AnnaBridge | 145:64910690c574 | 201 | |
AnnaBridge | 145:64910690c574 | 202 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |