The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:84c0a372a020 1 /*******************************************************************************
AnnaBridge 167:84c0a372a020 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
AnnaBridge 167:84c0a372a020 3 *
AnnaBridge 167:84c0a372a020 4 * Permission is hereby granted, free of charge, to any person obtaining a
AnnaBridge 167:84c0a372a020 5 * copy of this software and associated documentation files (the "Software"),
AnnaBridge 167:84c0a372a020 6 * to deal in the Software without restriction, including without limitation
AnnaBridge 167:84c0a372a020 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
AnnaBridge 167:84c0a372a020 8 * and/or sell copies of the Software, and to permit persons to whom the
AnnaBridge 167:84c0a372a020 9 * Software is furnished to do so, subject to the following conditions:
AnnaBridge 167:84c0a372a020 10 *
AnnaBridge 167:84c0a372a020 11 * The above copyright notice and this permission notice shall be included
AnnaBridge 167:84c0a372a020 12 * in all copies or substantial portions of the Software.
AnnaBridge 167:84c0a372a020 13 *
AnnaBridge 167:84c0a372a020 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
AnnaBridge 167:84c0a372a020 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
AnnaBridge 167:84c0a372a020 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
AnnaBridge 167:84c0a372a020 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
AnnaBridge 167:84c0a372a020 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
AnnaBridge 167:84c0a372a020 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
AnnaBridge 167:84c0a372a020 20 * OTHER DEALINGS IN THE SOFTWARE.
AnnaBridge 167:84c0a372a020 21 *
AnnaBridge 167:84c0a372a020 22 * Except as contained in this notice, the name of Maxim Integrated
AnnaBridge 167:84c0a372a020 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
AnnaBridge 167:84c0a372a020 24 * Products, Inc. Branding Policy.
AnnaBridge 167:84c0a372a020 25 *
AnnaBridge 167:84c0a372a020 26 * The mere transfer of this software does not imply any licenses
AnnaBridge 167:84c0a372a020 27 * of trade secrets, proprietary technology, copyrights, patents,
AnnaBridge 167:84c0a372a020 28 * trademarks, maskwork rights, or any other form of intellectual
AnnaBridge 167:84c0a372a020 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
AnnaBridge 167:84c0a372a020 30 * ownership rights.
AnnaBridge 167:84c0a372a020 31 *
AnnaBridge 167:84c0a372a020 32 * $Date: 2016-04-06 08:18:01 -0500 (Wed, 06 Apr 2016) $
AnnaBridge 167:84c0a372a020 33 * $Revision: 22236 $
AnnaBridge 167:84c0a372a020 34 *
AnnaBridge 167:84c0a372a020 35 ******************************************************************************/
AnnaBridge 167:84c0a372a020 36
AnnaBridge 167:84c0a372a020 37 #ifndef _MXC_OWM_REGS_H_
AnnaBridge 167:84c0a372a020 38 #define _MXC_OWM_REGS_H_
AnnaBridge 167:84c0a372a020 39
AnnaBridge 167:84c0a372a020 40 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 41 extern "C" {
AnnaBridge 167:84c0a372a020 42 #endif
AnnaBridge 167:84c0a372a020 43
AnnaBridge 167:84c0a372a020 44 #include <stdint.h>
AnnaBridge 167:84c0a372a020 45
AnnaBridge 167:84c0a372a020 46 /*
AnnaBridge 167:84c0a372a020 47 If types are not defined elsewhere (CMSIS) define them here
AnnaBridge 167:84c0a372a020 48 */
AnnaBridge 167:84c0a372a020 49 #ifndef __IO
AnnaBridge 167:84c0a372a020 50 #define __IO volatile
AnnaBridge 167:84c0a372a020 51 #endif
AnnaBridge 167:84c0a372a020 52 #ifndef __I
AnnaBridge 167:84c0a372a020 53 #define __I volatile const
AnnaBridge 167:84c0a372a020 54 #endif
AnnaBridge 167:84c0a372a020 55 #ifndef __O
AnnaBridge 167:84c0a372a020 56 #define __O volatile
AnnaBridge 167:84c0a372a020 57 #endif
AnnaBridge 167:84c0a372a020 58 #ifndef __RO
AnnaBridge 167:84c0a372a020 59 #define __RO volatile const
AnnaBridge 167:84c0a372a020 60 #endif
AnnaBridge 167:84c0a372a020 61
AnnaBridge 167:84c0a372a020 62
AnnaBridge 167:84c0a372a020 63 /*
AnnaBridge 167:84c0a372a020 64 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
AnnaBridge 167:84c0a372a020 65 access to each register in module.
AnnaBridge 167:84c0a372a020 66 */
AnnaBridge 167:84c0a372a020 67
AnnaBridge 167:84c0a372a020 68 /* Offset Register Description
AnnaBridge 167:84c0a372a020 69 ============= ============================================================================ */
AnnaBridge 167:84c0a372a020 70 typedef struct {
AnnaBridge 167:84c0a372a020 71 __IO uint32_t cfg; /* 0x0000 1-Wire Master Configuration */
AnnaBridge 167:84c0a372a020 72 __IO uint32_t clk_div_1us; /* 0x0004 1-Wire Master Clock Divisor */
AnnaBridge 167:84c0a372a020 73 __IO uint32_t ctrl_stat; /* 0x0008 1-Wire Master Control/Status */
AnnaBridge 167:84c0a372a020 74 __IO uint32_t data; /* 0x000C 1-Wire Master Data Buffer */
AnnaBridge 167:84c0a372a020 75 __IO uint32_t intfl; /* 0x0010 1-Wire Master Interrupt Flags */
AnnaBridge 167:84c0a372a020 76 __IO uint32_t inten; /* 0x0014 1-Wire Master Interrupt Enables */
AnnaBridge 167:84c0a372a020 77 } mxc_owm_regs_t;
AnnaBridge 167:84c0a372a020 78
AnnaBridge 167:84c0a372a020 79
AnnaBridge 167:84c0a372a020 80 /*
AnnaBridge 167:84c0a372a020 81 Register offsets for module OWM.
AnnaBridge 167:84c0a372a020 82 */
AnnaBridge 167:84c0a372a020 83
AnnaBridge 167:84c0a372a020 84 #define MXC_R_OWM_OFFS_CFG ((uint32_t)0x00000000UL)
AnnaBridge 167:84c0a372a020 85 #define MXC_R_OWM_OFFS_CLK_DIV_1US ((uint32_t)0x00000004UL)
AnnaBridge 167:84c0a372a020 86 #define MXC_R_OWM_OFFS_CTRL_STAT ((uint32_t)0x00000008UL)
AnnaBridge 167:84c0a372a020 87 #define MXC_R_OWM_OFFS_DATA ((uint32_t)0x0000000CUL)
AnnaBridge 167:84c0a372a020 88 #define MXC_R_OWM_OFFS_INTFL ((uint32_t)0x00000010UL)
AnnaBridge 167:84c0a372a020 89 #define MXC_R_OWM_OFFS_INTEN ((uint32_t)0x00000014UL)
AnnaBridge 167:84c0a372a020 90
AnnaBridge 167:84c0a372a020 91
AnnaBridge 167:84c0a372a020 92 /*
AnnaBridge 167:84c0a372a020 93 Field positions and masks for module OWM.
AnnaBridge 167:84c0a372a020 94 */
AnnaBridge 167:84c0a372a020 95
AnnaBridge 167:84c0a372a020 96 #define MXC_F_OWM_CFG_LONG_LINE_MODE_POS 0
AnnaBridge 167:84c0a372a020 97 #define MXC_F_OWM_CFG_LONG_LINE_MODE ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_LONG_LINE_MODE_POS))
AnnaBridge 167:84c0a372a020 98 #define MXC_F_OWM_CFG_FORCE_PRES_DET_POS 1
AnnaBridge 167:84c0a372a020 99 #define MXC_F_OWM_CFG_FORCE_PRES_DET ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_FORCE_PRES_DET_POS))
AnnaBridge 167:84c0a372a020 100 #define MXC_F_OWM_CFG_BIT_BANG_EN_POS 2
AnnaBridge 167:84c0a372a020 101 #define MXC_F_OWM_CFG_BIT_BANG_EN ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_BIT_BANG_EN_POS))
AnnaBridge 167:84c0a372a020 102 #define MXC_F_OWM_CFG_EXT_PULLUP_MODE_POS 3
AnnaBridge 167:84c0a372a020 103 #define MXC_F_OWM_CFG_EXT_PULLUP_MODE ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_EXT_PULLUP_MODE_POS))
AnnaBridge 167:84c0a372a020 104 #define MXC_F_OWM_CFG_EXT_PULLUP_ENABLE_POS 4
AnnaBridge 167:84c0a372a020 105 #define MXC_F_OWM_CFG_EXT_PULLUP_ENABLE ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_EXT_PULLUP_ENABLE_POS))
AnnaBridge 167:84c0a372a020 106 #define MXC_F_OWM_CFG_SINGLE_BIT_MODE_POS 5
AnnaBridge 167:84c0a372a020 107 #define MXC_F_OWM_CFG_SINGLE_BIT_MODE ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_SINGLE_BIT_MODE_POS))
AnnaBridge 167:84c0a372a020 108 #define MXC_F_OWM_CFG_OVERDRIVE_POS 6
AnnaBridge 167:84c0a372a020 109 #define MXC_F_OWM_CFG_OVERDRIVE ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_OVERDRIVE_POS))
AnnaBridge 167:84c0a372a020 110 #define MXC_F_OWM_CFG_INT_PULLUP_ENABLE_POS 7
AnnaBridge 167:84c0a372a020 111 #define MXC_F_OWM_CFG_INT_PULLUP_ENABLE ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_INT_PULLUP_ENABLE_POS))
AnnaBridge 167:84c0a372a020 112
AnnaBridge 167:84c0a372a020 113 #define MXC_F_OWM_CLK_DIV_1US_DIVISOR_POS 0
AnnaBridge 167:84c0a372a020 114 #define MXC_F_OWM_CLK_DIV_1US_DIVISOR ((uint32_t)(0x000000FFUL << MXC_F_OWM_CLK_DIV_1US_DIVISOR_POS))
AnnaBridge 167:84c0a372a020 115
AnnaBridge 167:84c0a372a020 116 #define MXC_F_OWM_CTRL_STAT_START_OW_RESET_POS 0
AnnaBridge 167:84c0a372a020 117 #define MXC_F_OWM_CTRL_STAT_START_OW_RESET ((uint32_t)(0x00000001UL << MXC_F_OWM_CTRL_STAT_START_OW_RESET_POS))
AnnaBridge 167:84c0a372a020 118 #define MXC_F_OWM_CTRL_STAT_SRA_MODE_POS 1
AnnaBridge 167:84c0a372a020 119 #define MXC_F_OWM_CTRL_STAT_SRA_MODE ((uint32_t)(0x00000001UL << MXC_F_OWM_CTRL_STAT_SRA_MODE_POS))
AnnaBridge 167:84c0a372a020 120 #define MXC_F_OWM_CTRL_STAT_BIT_BANG_OE_POS 2
AnnaBridge 167:84c0a372a020 121 #define MXC_F_OWM_CTRL_STAT_BIT_BANG_OE ((uint32_t)(0x00000001UL << MXC_F_OWM_CTRL_STAT_BIT_BANG_OE_POS))
AnnaBridge 167:84c0a372a020 122 #define MXC_F_OWM_CTRL_STAT_OW_INPUT_POS 3
AnnaBridge 167:84c0a372a020 123 #define MXC_F_OWM_CTRL_STAT_OW_INPUT ((uint32_t)(0x00000001UL << MXC_F_OWM_CTRL_STAT_OW_INPUT_POS))
AnnaBridge 167:84c0a372a020 124 #define MXC_F_OWM_CTRL_STAT_OD_SPEC_MODE_POS 4
AnnaBridge 167:84c0a372a020 125 #define MXC_F_OWM_CTRL_STAT_OD_SPEC_MODE ((uint32_t)(0x00000001UL << MXC_F_OWM_CTRL_STAT_OD_SPEC_MODE_POS))
AnnaBridge 167:84c0a372a020 126 #define MXC_F_OWM_CTRL_STAT_EXT_PULLUP_POL_POS 5
AnnaBridge 167:84c0a372a020 127 #define MXC_F_OWM_CTRL_STAT_EXT_PULLUP_POL ((uint32_t)(0x00000001UL << MXC_F_OWM_CTRL_STAT_EXT_PULLUP_POL_POS))
AnnaBridge 167:84c0a372a020 128 #define MXC_F_OWM_CTRL_STAT_PRESENCE_DETECT_POS 7
AnnaBridge 167:84c0a372a020 129 #define MXC_F_OWM_CTRL_STAT_PRESENCE_DETECT ((uint32_t)(0x00000001UL << MXC_F_OWM_CTRL_STAT_PRESENCE_DETECT_POS))
AnnaBridge 167:84c0a372a020 130
AnnaBridge 167:84c0a372a020 131 #define MXC_F_OWM_DATA_TX_RX_POS 0
AnnaBridge 167:84c0a372a020 132 #define MXC_F_OWM_DATA_TX_RX ((uint32_t)(0x000000FFUL << MXC_F_OWM_DATA_TX_RX_POS))
AnnaBridge 167:84c0a372a020 133
AnnaBridge 167:84c0a372a020 134 #define MXC_F_OWM_INTFL_OW_RESET_DONE_POS 0
AnnaBridge 167:84c0a372a020 135 #define MXC_F_OWM_INTFL_OW_RESET_DONE ((uint32_t)(0x00000001UL << MXC_F_OWM_INTFL_OW_RESET_DONE_POS))
AnnaBridge 167:84c0a372a020 136 #define MXC_F_OWM_INTFL_TX_DATA_EMPTY_POS 1
AnnaBridge 167:84c0a372a020 137 #define MXC_F_OWM_INTFL_TX_DATA_EMPTY ((uint32_t)(0x00000001UL << MXC_F_OWM_INTFL_TX_DATA_EMPTY_POS))
AnnaBridge 167:84c0a372a020 138 #define MXC_F_OWM_INTFL_RX_DATA_READY_POS 2
AnnaBridge 167:84c0a372a020 139 #define MXC_F_OWM_INTFL_RX_DATA_READY ((uint32_t)(0x00000001UL << MXC_F_OWM_INTFL_RX_DATA_READY_POS))
AnnaBridge 167:84c0a372a020 140 #define MXC_F_OWM_INTFL_LINE_SHORT_POS 3
AnnaBridge 167:84c0a372a020 141 #define MXC_F_OWM_INTFL_LINE_SHORT ((uint32_t)(0x00000001UL << MXC_F_OWM_INTFL_LINE_SHORT_POS))
AnnaBridge 167:84c0a372a020 142 #define MXC_F_OWM_INTFL_LINE_LOW_POS 4
AnnaBridge 167:84c0a372a020 143 #define MXC_F_OWM_INTFL_LINE_LOW ((uint32_t)(0x00000001UL << MXC_F_OWM_INTFL_LINE_LOW_POS))
AnnaBridge 167:84c0a372a020 144
AnnaBridge 167:84c0a372a020 145 #define MXC_F_OWM_INTEN_OW_RESET_DONE_POS 0
AnnaBridge 167:84c0a372a020 146 #define MXC_F_OWM_INTEN_OW_RESET_DONE ((uint32_t)(0x00000001UL << MXC_F_OWM_INTEN_OW_RESET_DONE_POS))
AnnaBridge 167:84c0a372a020 147 #define MXC_F_OWM_INTEN_TX_DATA_EMPTY_POS 1
AnnaBridge 167:84c0a372a020 148 #define MXC_F_OWM_INTEN_TX_DATA_EMPTY ((uint32_t)(0x00000001UL << MXC_F_OWM_INTEN_TX_DATA_EMPTY_POS))
AnnaBridge 167:84c0a372a020 149 #define MXC_F_OWM_INTEN_RX_DATA_READY_POS 2
AnnaBridge 167:84c0a372a020 150 #define MXC_F_OWM_INTEN_RX_DATA_READY ((uint32_t)(0x00000001UL << MXC_F_OWM_INTEN_RX_DATA_READY_POS))
AnnaBridge 167:84c0a372a020 151 #define MXC_F_OWM_INTEN_LINE_SHORT_POS 3
AnnaBridge 167:84c0a372a020 152 #define MXC_F_OWM_INTEN_LINE_SHORT ((uint32_t)(0x00000001UL << MXC_F_OWM_INTEN_LINE_SHORT_POS))
AnnaBridge 167:84c0a372a020 153 #define MXC_F_OWM_INTEN_LINE_LOW_POS 4
AnnaBridge 167:84c0a372a020 154 #define MXC_F_OWM_INTEN_LINE_LOW ((uint32_t)(0x00000001UL << MXC_F_OWM_INTEN_LINE_LOW_POS))
AnnaBridge 167:84c0a372a020 155
AnnaBridge 167:84c0a372a020 156 #define MXC_V_OWM_CFG_EXT_PULLUP_MODE_UNUSED ((uint32_t)(0x00000000UL))
AnnaBridge 167:84c0a372a020 157 #define MXC_V_OWM_CFG_EXT_PULLUP_MODE_USED ((uint32_t)(0x00000001UL))
AnnaBridge 167:84c0a372a020 158
AnnaBridge 167:84c0a372a020 159 #define MXC_V_OWM_CTRL_STAT_OD_SPEC_MODE_12US ((uint32_t)(0x00000000UL))
AnnaBridge 167:84c0a372a020 160 #define MXC_V_OWM_CTRL_STAT_OD_SPEC_MODE_10US ((uint32_t)(0x00000001UL))
AnnaBridge 167:84c0a372a020 161
AnnaBridge 167:84c0a372a020 162 #define MXC_V_OWM_CTRL_STAT_EXT_PULLUP_POL_ACT_HIGH ((uint32_t)(0x00000000UL))
AnnaBridge 167:84c0a372a020 163 #define MXC_V_OWM_CTRL_STAT_EXT_PULLUP_POL_ACT_LOW ((uint32_t)(0x00000001UL))
AnnaBridge 167:84c0a372a020 164
AnnaBridge 167:84c0a372a020 165
AnnaBridge 167:84c0a372a020 166 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 167 }
AnnaBridge 167:84c0a372a020 168 #endif
AnnaBridge 167:84c0a372a020 169
AnnaBridge 167:84c0a372a020 170 #endif /* _MXC_OWM_REGS_H_ */
AnnaBridge 167:84c0a372a020 171