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TARGET_KW24D/TOOLCHAIN_IAR/fsl_ftm.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 3 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 4 *
AnnaBridge 171:3a7713b1edbc 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 6 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 9 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 13 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 14 *
AnnaBridge 171:3a7713b1edbc 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
AnnaBridge 171:3a7713b1edbc 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 17 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 18 *
AnnaBridge 171:3a7713b1edbc 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 29 */
AnnaBridge 171:3a7713b1edbc 30 #ifndef _FSL_FTM_H_
AnnaBridge 171:3a7713b1edbc 31 #define _FSL_FTM_H_
AnnaBridge 171:3a7713b1edbc 32
AnnaBridge 171:3a7713b1edbc 33 #include "fsl_common.h"
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 /*!
AnnaBridge 171:3a7713b1edbc 36 * @addtogroup ftm
AnnaBridge 171:3a7713b1edbc 37 * @{
AnnaBridge 171:3a7713b1edbc 38 */
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 42 * Definitions
AnnaBridge 171:3a7713b1edbc 43 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 44
AnnaBridge 171:3a7713b1edbc 45 /*! @name Driver version */
AnnaBridge 171:3a7713b1edbc 46 /*@{*/
AnnaBridge 171:3a7713b1edbc 47 #define FSL_FTM_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0 */
AnnaBridge 171:3a7713b1edbc 48 /*@}*/
AnnaBridge 171:3a7713b1edbc 49
AnnaBridge 171:3a7713b1edbc 50 /*!
AnnaBridge 171:3a7713b1edbc 51 * @brief List of FTM channels
AnnaBridge 171:3a7713b1edbc 52 * @note Actual number of available channels is SoC dependent
AnnaBridge 171:3a7713b1edbc 53 */
AnnaBridge 171:3a7713b1edbc 54 typedef enum _ftm_chnl
AnnaBridge 171:3a7713b1edbc 55 {
AnnaBridge 171:3a7713b1edbc 56 kFTM_Chnl_0 = 0U, /*!< FTM channel number 0*/
AnnaBridge 171:3a7713b1edbc 57 kFTM_Chnl_1, /*!< FTM channel number 1 */
AnnaBridge 171:3a7713b1edbc 58 kFTM_Chnl_2, /*!< FTM channel number 2 */
AnnaBridge 171:3a7713b1edbc 59 kFTM_Chnl_3, /*!< FTM channel number 3 */
AnnaBridge 171:3a7713b1edbc 60 kFTM_Chnl_4, /*!< FTM channel number 4 */
AnnaBridge 171:3a7713b1edbc 61 kFTM_Chnl_5, /*!< FTM channel number 5 */
AnnaBridge 171:3a7713b1edbc 62 kFTM_Chnl_6, /*!< FTM channel number 6 */
AnnaBridge 171:3a7713b1edbc 63 kFTM_Chnl_7 /*!< FTM channel number 7 */
AnnaBridge 171:3a7713b1edbc 64 } ftm_chnl_t;
AnnaBridge 171:3a7713b1edbc 65
AnnaBridge 171:3a7713b1edbc 66 /*! @brief List of FTM faults */
AnnaBridge 171:3a7713b1edbc 67 typedef enum _ftm_fault_input
AnnaBridge 171:3a7713b1edbc 68 {
AnnaBridge 171:3a7713b1edbc 69 kFTM_Fault_0 = 0U, /*!< FTM fault 0 input pin */
AnnaBridge 171:3a7713b1edbc 70 kFTM_Fault_1, /*!< FTM fault 1 input pin */
AnnaBridge 171:3a7713b1edbc 71 kFTM_Fault_2, /*!< FTM fault 2 input pin */
AnnaBridge 171:3a7713b1edbc 72 kFTM_Fault_3 /*!< FTM fault 3 input pin */
AnnaBridge 171:3a7713b1edbc 73 } ftm_fault_input_t;
AnnaBridge 171:3a7713b1edbc 74
AnnaBridge 171:3a7713b1edbc 75 /*! @brief FTM PWM operation modes */
AnnaBridge 171:3a7713b1edbc 76 typedef enum _ftm_pwm_mode
AnnaBridge 171:3a7713b1edbc 77 {
AnnaBridge 171:3a7713b1edbc 78 kFTM_EdgeAlignedPwm = 0U, /*!< Edge-aligned PWM */
AnnaBridge 171:3a7713b1edbc 79 kFTM_CenterAlignedPwm, /*!< Center-aligned PWM */
AnnaBridge 171:3a7713b1edbc 80 kFTM_CombinedPwm /*!< Combined PWM */
AnnaBridge 171:3a7713b1edbc 81 } ftm_pwm_mode_t;
AnnaBridge 171:3a7713b1edbc 82
AnnaBridge 171:3a7713b1edbc 83 /*! @brief FTM PWM output pulse mode: high-true, low-true or no output */
AnnaBridge 171:3a7713b1edbc 84 typedef enum _ftm_pwm_level_select
AnnaBridge 171:3a7713b1edbc 85 {
AnnaBridge 171:3a7713b1edbc 86 kFTM_NoPwmSignal = 0U, /*!< No PWM output on pin */
AnnaBridge 171:3a7713b1edbc 87 kFTM_LowTrue, /*!< Low true pulses */
AnnaBridge 171:3a7713b1edbc 88 kFTM_HighTrue /*!< High true pulses */
AnnaBridge 171:3a7713b1edbc 89 } ftm_pwm_level_select_t;
AnnaBridge 171:3a7713b1edbc 90
AnnaBridge 171:3a7713b1edbc 91 /*! @brief Options to configure a FTM channel's PWM signal */
AnnaBridge 171:3a7713b1edbc 92 typedef struct _ftm_chnl_pwm_signal_param
AnnaBridge 171:3a7713b1edbc 93 {
AnnaBridge 171:3a7713b1edbc 94 ftm_chnl_t chnlNumber; /*!< The channel/channel pair number.
AnnaBridge 171:3a7713b1edbc 95 In combined mode, this represents the channel pair number. */
AnnaBridge 171:3a7713b1edbc 96 ftm_pwm_level_select_t level; /*!< PWM output active level select. */
AnnaBridge 171:3a7713b1edbc 97 uint8_t dutyCyclePercent; /*!< PWM pulse width, value should be between 0 to 100
AnnaBridge 171:3a7713b1edbc 98 0 = inactive signal(0% duty cycle)...
AnnaBridge 171:3a7713b1edbc 99 100 = always active signal (100% duty cycle).*/
AnnaBridge 171:3a7713b1edbc 100 uint8_t firstEdgeDelayPercent; /*!< Used only in combined PWM mode to generate an asymmetrical PWM.
AnnaBridge 171:3a7713b1edbc 101 Specifies the delay to the first edge in a PWM period.
AnnaBridge 171:3a7713b1edbc 102 If unsure leave as 0; Should be specified as a
AnnaBridge 171:3a7713b1edbc 103 percentage of the PWM period */
AnnaBridge 171:3a7713b1edbc 104 } ftm_chnl_pwm_signal_param_t;
AnnaBridge 171:3a7713b1edbc 105
AnnaBridge 171:3a7713b1edbc 106 /*! @brief FlexTimer output compare mode */
AnnaBridge 171:3a7713b1edbc 107 typedef enum _ftm_output_compare_mode
AnnaBridge 171:3a7713b1edbc 108 {
AnnaBridge 171:3a7713b1edbc 109 kFTM_NoOutputSignal = (1U << FTM_CnSC_MSA_SHIFT), /*!< No channel output when counter reaches CnV */
AnnaBridge 171:3a7713b1edbc 110 kFTM_ToggleOnMatch = ((1U << FTM_CnSC_MSA_SHIFT) | (1U << FTM_CnSC_ELSA_SHIFT)), /*!< Toggle output */
AnnaBridge 171:3a7713b1edbc 111 kFTM_ClearOnMatch = ((1U << FTM_CnSC_MSA_SHIFT) | (2U << FTM_CnSC_ELSA_SHIFT)), /*!< Clear output */
AnnaBridge 171:3a7713b1edbc 112 kFTM_SetOnMatch = ((1U << FTM_CnSC_MSA_SHIFT) | (3U << FTM_CnSC_ELSA_SHIFT)) /*!< Set output */
AnnaBridge 171:3a7713b1edbc 113 } ftm_output_compare_mode_t;
AnnaBridge 171:3a7713b1edbc 114
AnnaBridge 171:3a7713b1edbc 115 /*! @brief FlexTimer input capture edge */
AnnaBridge 171:3a7713b1edbc 116 typedef enum _ftm_input_capture_edge
AnnaBridge 171:3a7713b1edbc 117 {
AnnaBridge 171:3a7713b1edbc 118 kFTM_RisingEdge = (1U << FTM_CnSC_ELSA_SHIFT), /*!< Capture on rising edge only*/
AnnaBridge 171:3a7713b1edbc 119 kFTM_FallingEdge = (2U << FTM_CnSC_ELSA_SHIFT), /*!< Capture on falling edge only*/
AnnaBridge 171:3a7713b1edbc 120 kFTM_RiseAndFallEdge = (3U << FTM_CnSC_ELSA_SHIFT) /*!< Capture on rising or falling edge */
AnnaBridge 171:3a7713b1edbc 121 } ftm_input_capture_edge_t;
AnnaBridge 171:3a7713b1edbc 122
AnnaBridge 171:3a7713b1edbc 123 /*! @brief FlexTimer dual edge capture modes */
AnnaBridge 171:3a7713b1edbc 124 typedef enum _ftm_dual_edge_capture_mode
AnnaBridge 171:3a7713b1edbc 125 {
AnnaBridge 171:3a7713b1edbc 126 kFTM_OneShot = 0U, /*!< One-shot capture mode */
AnnaBridge 171:3a7713b1edbc 127 kFTM_Continuous = (1U << FTM_CnSC_MSA_SHIFT) /*!< Continuous capture mode */
AnnaBridge 171:3a7713b1edbc 128 } ftm_dual_edge_capture_mode_t;
AnnaBridge 171:3a7713b1edbc 129
AnnaBridge 171:3a7713b1edbc 130 /*! @brief FlexTimer dual edge capture parameters */
AnnaBridge 171:3a7713b1edbc 131 typedef struct _ftm_dual_edge_capture_param
AnnaBridge 171:3a7713b1edbc 132 {
AnnaBridge 171:3a7713b1edbc 133 ftm_dual_edge_capture_mode_t mode; /*!< Dual Edge Capture mode */
AnnaBridge 171:3a7713b1edbc 134 ftm_input_capture_edge_t currChanEdgeMode; /*!< Input capture edge select for channel n */
AnnaBridge 171:3a7713b1edbc 135 ftm_input_capture_edge_t nextChanEdgeMode; /*!< Input capture edge select for channel n+1 */
AnnaBridge 171:3a7713b1edbc 136 } ftm_dual_edge_capture_param_t;
AnnaBridge 171:3a7713b1edbc 137
AnnaBridge 171:3a7713b1edbc 138 /*! @brief FlexTimer quadrature decode modes */
AnnaBridge 171:3a7713b1edbc 139 typedef enum _ftm_quad_decode_mode
AnnaBridge 171:3a7713b1edbc 140 {
AnnaBridge 171:3a7713b1edbc 141 kFTM_QuadPhaseEncode = 0U, /*!< Phase A and Phase B encoding mode */
AnnaBridge 171:3a7713b1edbc 142 kFTM_QuadCountAndDir /*!< Count and direction encoding mode */
AnnaBridge 171:3a7713b1edbc 143 } ftm_quad_decode_mode_t;
AnnaBridge 171:3a7713b1edbc 144
AnnaBridge 171:3a7713b1edbc 145 /*! @brief FlexTimer quadrature phase polarities */
AnnaBridge 171:3a7713b1edbc 146 typedef enum _ftm_phase_polarity
AnnaBridge 171:3a7713b1edbc 147 {
AnnaBridge 171:3a7713b1edbc 148 kFTM_QuadPhaseNormal = 0U, /*!< Phase input signal is not inverted */
AnnaBridge 171:3a7713b1edbc 149 kFTM_QuadPhaseInvert /*!< Phase input signal is inverted */
AnnaBridge 171:3a7713b1edbc 150 } ftm_phase_polarity_t;
AnnaBridge 171:3a7713b1edbc 151
AnnaBridge 171:3a7713b1edbc 152 /*! @brief FlexTimer quadrature decode phase parameters */
AnnaBridge 171:3a7713b1edbc 153 typedef struct _ftm_phase_param
AnnaBridge 171:3a7713b1edbc 154 {
AnnaBridge 171:3a7713b1edbc 155 bool enablePhaseFilter; /*!< True: enable phase filter; false: disable filter */
AnnaBridge 171:3a7713b1edbc 156 uint32_t phaseFilterVal; /*!< Filter value, used only if phase filter is enabled */
AnnaBridge 171:3a7713b1edbc 157 ftm_phase_polarity_t phasePolarity; /*!< Phase polarity */
AnnaBridge 171:3a7713b1edbc 158 } ftm_phase_params_t;
AnnaBridge 171:3a7713b1edbc 159
AnnaBridge 171:3a7713b1edbc 160 /*! @brief Structure is used to hold the parameters to configure a FTM fault */
AnnaBridge 171:3a7713b1edbc 161 typedef struct _ftm_fault_param
AnnaBridge 171:3a7713b1edbc 162 {
AnnaBridge 171:3a7713b1edbc 163 bool enableFaultInput; /*!< True: Fault input is enabled; false: Fault input is disabled */
AnnaBridge 171:3a7713b1edbc 164 bool faultLevel; /*!< True: Fault polarity is active low i.e., '0' indicates a fault;
AnnaBridge 171:3a7713b1edbc 165 False: Fault polarity is active high */
AnnaBridge 171:3a7713b1edbc 166 bool useFaultFilter; /*!< True: Use the filtered fault signal;
AnnaBridge 171:3a7713b1edbc 167 False: Use the direct path from fault input */
AnnaBridge 171:3a7713b1edbc 168 } ftm_fault_param_t;
AnnaBridge 171:3a7713b1edbc 169
AnnaBridge 171:3a7713b1edbc 170 /*! @brief FlexTimer pre-scaler factor for the dead time insertion*/
AnnaBridge 171:3a7713b1edbc 171 typedef enum _ftm_deadtime_prescale
AnnaBridge 171:3a7713b1edbc 172 {
AnnaBridge 171:3a7713b1edbc 173 kFTM_Deadtime_Prescale_1 = 1U, /*!< Divide by 1 */
AnnaBridge 171:3a7713b1edbc 174 kFTM_Deadtime_Prescale_4, /*!< Divide by 4 */
AnnaBridge 171:3a7713b1edbc 175 kFTM_Deadtime_Prescale_16 /*!< Divide by 16 */
AnnaBridge 171:3a7713b1edbc 176 } ftm_deadtime_prescale_t;
AnnaBridge 171:3a7713b1edbc 177
AnnaBridge 171:3a7713b1edbc 178 /*! @brief FlexTimer clock source selection*/
AnnaBridge 171:3a7713b1edbc 179 typedef enum _ftm_clock_source
AnnaBridge 171:3a7713b1edbc 180 {
AnnaBridge 171:3a7713b1edbc 181 kFTM_SystemClock = 1U, /*!< System clock selected */
AnnaBridge 171:3a7713b1edbc 182 kFTM_FixedClock, /*!< Fixed frequency clock */
AnnaBridge 171:3a7713b1edbc 183 kFTM_ExternalClock /*!< External clock */
AnnaBridge 171:3a7713b1edbc 184 } ftm_clock_source_t;
AnnaBridge 171:3a7713b1edbc 185
AnnaBridge 171:3a7713b1edbc 186 /*! @brief FlexTimer pre-scaler factor selection for the clock source*/
AnnaBridge 171:3a7713b1edbc 187 typedef enum _ftm_clock_prescale
AnnaBridge 171:3a7713b1edbc 188 {
AnnaBridge 171:3a7713b1edbc 189 kFTM_Prescale_Divide_1 = 0U, /*!< Divide by 1 */
AnnaBridge 171:3a7713b1edbc 190 kFTM_Prescale_Divide_2, /*!< Divide by 2 */
AnnaBridge 171:3a7713b1edbc 191 kFTM_Prescale_Divide_4, /*!< Divide by 4 */
AnnaBridge 171:3a7713b1edbc 192 kFTM_Prescale_Divide_8, /*!< Divide by 8 */
AnnaBridge 171:3a7713b1edbc 193 kFTM_Prescale_Divide_16, /*!< Divide by 16 */
AnnaBridge 171:3a7713b1edbc 194 kFTM_Prescale_Divide_32, /*!< Divide by 32 */
AnnaBridge 171:3a7713b1edbc 195 kFTM_Prescale_Divide_64, /*!< Divide by 64 */
AnnaBridge 171:3a7713b1edbc 196 kFTM_Prescale_Divide_128 /*!< Divide by 128 */
AnnaBridge 171:3a7713b1edbc 197 } ftm_clock_prescale_t;
AnnaBridge 171:3a7713b1edbc 198
AnnaBridge 171:3a7713b1edbc 199 /*! @brief Options for the FlexTimer behaviour in BDM Mode */
AnnaBridge 171:3a7713b1edbc 200 typedef enum _ftm_bdm_mode
AnnaBridge 171:3a7713b1edbc 201 {
AnnaBridge 171:3a7713b1edbc 202 kFTM_BdmMode_0 = 0U,
AnnaBridge 171:3a7713b1edbc 203 /*!< FTM counter stopped, CH(n)F bit can be set, FTM channels in functional mode, writes to MOD,CNTIN and C(n)V
AnnaBridge 171:3a7713b1edbc 204 registers bypass the register buffers */
AnnaBridge 171:3a7713b1edbc 205 kFTM_BdmMode_1,
AnnaBridge 171:3a7713b1edbc 206 /*!< FTM counter stopped, CH(n)F bit is not set, FTM channels outputs are forced to their safe value , writes to
AnnaBridge 171:3a7713b1edbc 207 MOD,CNTIN and C(n)V registers bypass the register buffers */
AnnaBridge 171:3a7713b1edbc 208 kFTM_BdmMode_2,
AnnaBridge 171:3a7713b1edbc 209 /*!< FTM counter stopped, CH(n)F bit is not set, FTM channels outputs are frozen when chip enters in BDM mode,
AnnaBridge 171:3a7713b1edbc 210 writes to MOD,CNTIN and C(n)V registers bypass the register buffers */
AnnaBridge 171:3a7713b1edbc 211 kFTM_BdmMode_3
AnnaBridge 171:3a7713b1edbc 212 /*!< FTM counter in functional mode, CH(n)F bit can be set, FTM channels in functional mode, writes to MOD,CNTIN and
AnnaBridge 171:3a7713b1edbc 213 C(n)V registers is in fully functional mode */
AnnaBridge 171:3a7713b1edbc 214 } ftm_bdm_mode_t;
AnnaBridge 171:3a7713b1edbc 215
AnnaBridge 171:3a7713b1edbc 216 /*! @brief Options for the FTM fault control mode */
AnnaBridge 171:3a7713b1edbc 217 typedef enum _ftm_fault_mode
AnnaBridge 171:3a7713b1edbc 218 {
AnnaBridge 171:3a7713b1edbc 219 kFTM_Fault_Disable = 0U, /*!< Fault control is disabled for all channels */
AnnaBridge 171:3a7713b1edbc 220 kFTM_Fault_EvenChnls, /*!< Enabled for even channels only(0,2,4,6) with manual fault clearing */
AnnaBridge 171:3a7713b1edbc 221 kFTM_Fault_AllChnlsMan, /*!< Enabled for all channels with manual fault clearing */
AnnaBridge 171:3a7713b1edbc 222 kFTM_Fault_AllChnlsAuto /*!< Enabled for all channels with automatic fault clearing */
AnnaBridge 171:3a7713b1edbc 223 } ftm_fault_mode_t;
AnnaBridge 171:3a7713b1edbc 224
AnnaBridge 171:3a7713b1edbc 225 /*!
AnnaBridge 171:3a7713b1edbc 226 * @brief FTM external trigger options
AnnaBridge 171:3a7713b1edbc 227 * @note Actual available external trigger sources are SoC-specific
AnnaBridge 171:3a7713b1edbc 228 */
AnnaBridge 171:3a7713b1edbc 229 typedef enum _ftm_external_trigger
AnnaBridge 171:3a7713b1edbc 230 {
AnnaBridge 171:3a7713b1edbc 231 kFTM_Chnl0Trigger = (1U << 4), /*!< Generate trigger when counter equals chnl 0 CnV reg */
AnnaBridge 171:3a7713b1edbc 232 kFTM_Chnl1Trigger = (1U << 5), /*!< Generate trigger when counter equals chnl 1 CnV reg */
AnnaBridge 171:3a7713b1edbc 233 kFTM_Chnl2Trigger = (1U << 0), /*!< Generate trigger when counter equals chnl 2 CnV reg */
AnnaBridge 171:3a7713b1edbc 234 kFTM_Chnl3Trigger = (1U << 1), /*!< Generate trigger when counter equals chnl 3 CnV reg */
AnnaBridge 171:3a7713b1edbc 235 kFTM_Chnl4Trigger = (1U << 2), /*!< Generate trigger when counter equals chnl 4 CnV reg */
AnnaBridge 171:3a7713b1edbc 236 kFTM_Chnl5Trigger = (1U << 3), /*!< Generate trigger when counter equals chnl 5 CnV reg */
AnnaBridge 171:3a7713b1edbc 237 kFTM_Chnl6Trigger =
AnnaBridge 171:3a7713b1edbc 238 (1U << 8), /*!< Available on certain SoC's, generate trigger when counter equals chnl 6 CnV reg */
AnnaBridge 171:3a7713b1edbc 239 kFTM_Chnl7Trigger =
AnnaBridge 171:3a7713b1edbc 240 (1U << 9), /*!< Available on certain SoC's, generate trigger when counter equals chnl 7 CnV reg */
AnnaBridge 171:3a7713b1edbc 241 kFTM_InitTrigger = (1U << 6), /*!< Generate Trigger when counter is updated with CNTIN */
AnnaBridge 171:3a7713b1edbc 242 kFTM_ReloadInitTrigger = (1U << 7) /*!< Available on certain SoC's, trigger on reload point */
AnnaBridge 171:3a7713b1edbc 243 } ftm_external_trigger_t;
AnnaBridge 171:3a7713b1edbc 244
AnnaBridge 171:3a7713b1edbc 245 /*! @brief FlexTimer PWM sync options to update registers with buffer */
AnnaBridge 171:3a7713b1edbc 246 typedef enum _ftm_pwm_sync_method
AnnaBridge 171:3a7713b1edbc 247 {
AnnaBridge 171:3a7713b1edbc 248 kFTM_SoftwareTrigger = FTM_SYNC_SWSYNC_MASK, /*!< Software triggers PWM sync */
AnnaBridge 171:3a7713b1edbc 249 kFTM_HardwareTrigger_0 = FTM_SYNC_TRIG0_MASK, /*!< Hardware trigger 0 causes PWM sync */
AnnaBridge 171:3a7713b1edbc 250 kFTM_HardwareTrigger_1 = FTM_SYNC_TRIG1_MASK, /*!< Hardware trigger 1 causes PWM sync */
AnnaBridge 171:3a7713b1edbc 251 kFTM_HardwareTrigger_2 = FTM_SYNC_TRIG2_MASK /*!< Hardware trigger 2 causes PWM sync */
AnnaBridge 171:3a7713b1edbc 252 } ftm_pwm_sync_method_t;
AnnaBridge 171:3a7713b1edbc 253
AnnaBridge 171:3a7713b1edbc 254 /*!
AnnaBridge 171:3a7713b1edbc 255 * @brief FTM options available as loading point for register reload
AnnaBridge 171:3a7713b1edbc 256 * @note Actual available reload points are SoC-specific
AnnaBridge 171:3a7713b1edbc 257 */
AnnaBridge 171:3a7713b1edbc 258 typedef enum _ftm_reload_point
AnnaBridge 171:3a7713b1edbc 259 {
AnnaBridge 171:3a7713b1edbc 260 kFTM_Chnl0Match = (1U << 0), /*!< Channel 0 match included as a reload point */
AnnaBridge 171:3a7713b1edbc 261 kFTM_Chnl1Match = (1U << 1), /*!< Channel 1 match included as a reload point */
AnnaBridge 171:3a7713b1edbc 262 kFTM_Chnl2Match = (1U << 2), /*!< Channel 2 match included as a reload point */
AnnaBridge 171:3a7713b1edbc 263 kFTM_Chnl3Match = (1U << 3), /*!< Channel 3 match included as a reload point */
AnnaBridge 171:3a7713b1edbc 264 kFTM_Chnl4Match = (1U << 4), /*!< Channel 4 match included as a reload point */
AnnaBridge 171:3a7713b1edbc 265 kFTM_Chnl5Match = (1U << 5), /*!< Channel 5 match included as a reload point */
AnnaBridge 171:3a7713b1edbc 266 kFTM_Chnl6Match = (1U << 6), /*!< Channel 6 match included as a reload point */
AnnaBridge 171:3a7713b1edbc 267 kFTM_Chnl7Match = (1U << 7), /*!< Channel 7 match included as a reload point */
AnnaBridge 171:3a7713b1edbc 268 kFTM_CntMax = (1U << 8), /*!< Use in up-down count mode only, reload when counter reaches the maximum value */
AnnaBridge 171:3a7713b1edbc 269 kFTM_CntMin = (1U << 9), /*!< Use in up-down count mode only, reload when counter reaches the minimum value */
AnnaBridge 171:3a7713b1edbc 270 kFTM_HalfCycMatch = (1U << 10) /*!< Available on certain SoC's, half cycle match reload point */
AnnaBridge 171:3a7713b1edbc 271 } ftm_reload_point_t;
AnnaBridge 171:3a7713b1edbc 272
AnnaBridge 171:3a7713b1edbc 273 /*!
AnnaBridge 171:3a7713b1edbc 274 * @brief List of FTM interrupts
AnnaBridge 171:3a7713b1edbc 275 * @note Actual available interrupts are SoC-specific
AnnaBridge 171:3a7713b1edbc 276 */
AnnaBridge 171:3a7713b1edbc 277 typedef enum _ftm_interrupt_enable
AnnaBridge 171:3a7713b1edbc 278 {
AnnaBridge 171:3a7713b1edbc 279 kFTM_Chnl0InterruptEnable = (1U << 0), /*!< Channel 0 interrupt */
AnnaBridge 171:3a7713b1edbc 280 kFTM_Chnl1InterruptEnable = (1U << 1), /*!< Channel 1 interrupt */
AnnaBridge 171:3a7713b1edbc 281 kFTM_Chnl2InterruptEnable = (1U << 2), /*!< Channel 2 interrupt */
AnnaBridge 171:3a7713b1edbc 282 kFTM_Chnl3InterruptEnable = (1U << 3), /*!< Channel 3 interrupt */
AnnaBridge 171:3a7713b1edbc 283 kFTM_Chnl4InterruptEnable = (1U << 4), /*!< Channel 4 interrupt */
AnnaBridge 171:3a7713b1edbc 284 kFTM_Chnl5InterruptEnable = (1U << 5), /*!< Channel 5 interrupt */
AnnaBridge 171:3a7713b1edbc 285 kFTM_Chnl6InterruptEnable = (1U << 6), /*!< Channel 6 interrupt */
AnnaBridge 171:3a7713b1edbc 286 kFTM_Chnl7InterruptEnable = (1U << 7), /*!< Channel 7 interrupt */
AnnaBridge 171:3a7713b1edbc 287 kFTM_FaultInterruptEnable = (1U << 8), /*!< Fault interrupt */
AnnaBridge 171:3a7713b1edbc 288 kFTM_TimeOverflowInterruptEnable = (1U << 9), /*!< Time overflow interrupt */
AnnaBridge 171:3a7713b1edbc 289 kFTM_ReloadInterruptEnable = (1U << 10) /*!< Reload interrupt; Available only on certain SoC's */
AnnaBridge 171:3a7713b1edbc 290 } ftm_interrupt_enable_t;
AnnaBridge 171:3a7713b1edbc 291
AnnaBridge 171:3a7713b1edbc 292 /*!
AnnaBridge 171:3a7713b1edbc 293 * @brief List of FTM flags
AnnaBridge 171:3a7713b1edbc 294 * @note Actual available flags are SoC-specific
AnnaBridge 171:3a7713b1edbc 295 */
AnnaBridge 171:3a7713b1edbc 296 typedef enum _ftm_status_flags
AnnaBridge 171:3a7713b1edbc 297 {
AnnaBridge 171:3a7713b1edbc 298 kFTM_Chnl0Flag = (1U << 0), /*!< Channel 0 Flag */
AnnaBridge 171:3a7713b1edbc 299 kFTM_Chnl1Flag = (1U << 1), /*!< Channel 1 Flag */
AnnaBridge 171:3a7713b1edbc 300 kFTM_Chnl2Flag = (1U << 2), /*!< Channel 2 Flag */
AnnaBridge 171:3a7713b1edbc 301 kFTM_Chnl3Flag = (1U << 3), /*!< Channel 3 Flag */
AnnaBridge 171:3a7713b1edbc 302 kFTM_Chnl4Flag = (1U << 4), /*!< Channel 4 Flag */
AnnaBridge 171:3a7713b1edbc 303 kFTM_Chnl5Flag = (1U << 5), /*!< Channel 5 Flag */
AnnaBridge 171:3a7713b1edbc 304 kFTM_Chnl6Flag = (1U << 6), /*!< Channel 6 Flag */
AnnaBridge 171:3a7713b1edbc 305 kFTM_Chnl7Flag = (1U << 7), /*!< Channel 7 Flag */
AnnaBridge 171:3a7713b1edbc 306 kFTM_FaultFlag = (1U << 8), /*!< Fault Flag */
AnnaBridge 171:3a7713b1edbc 307 kFTM_TimeOverflowFlag = (1U << 9), /*!< Time overflow Flag */
AnnaBridge 171:3a7713b1edbc 308 kFTM_ChnlTriggerFlag = (1U << 10), /*!< Channel trigger Flag */
AnnaBridge 171:3a7713b1edbc 309 kFTM_ReloadFlag = (1U << 11) /*!< Reload Flag; Available only on certain SoC's */
AnnaBridge 171:3a7713b1edbc 310 } ftm_status_flags_t;
AnnaBridge 171:3a7713b1edbc 311
AnnaBridge 171:3a7713b1edbc 312 /*!
AnnaBridge 171:3a7713b1edbc 313 * @brief FTM configuration structure
AnnaBridge 171:3a7713b1edbc 314 *
AnnaBridge 171:3a7713b1edbc 315 * This structure holds the configuration settings for the FTM peripheral. To initialize this
AnnaBridge 171:3a7713b1edbc 316 * structure to reasonable defaults, call the FTM_GetDefaultConfig() function and pass a
AnnaBridge 171:3a7713b1edbc 317 * pointer to the configuration structure instance.
AnnaBridge 171:3a7713b1edbc 318 *
AnnaBridge 171:3a7713b1edbc 319 * The configuration structure can be made constant so as to reside in flash.
AnnaBridge 171:3a7713b1edbc 320 */
AnnaBridge 171:3a7713b1edbc 321 typedef struct _ftm_config
AnnaBridge 171:3a7713b1edbc 322 {
AnnaBridge 171:3a7713b1edbc 323 ftm_clock_prescale_t prescale; /*!< FTM clock prescale value */
AnnaBridge 171:3a7713b1edbc 324 ftm_bdm_mode_t bdmMode; /*!< FTM behavior in BDM mode */
AnnaBridge 171:3a7713b1edbc 325 uint32_t pwmSyncMode; /*!< Synchronization methods to use to update buffered registers; Multiple
AnnaBridge 171:3a7713b1edbc 326 update modes can be used by providing an OR'ed list of options
AnnaBridge 171:3a7713b1edbc 327 available in enumeration ::ftm_pwm_sync_method_t. */
AnnaBridge 171:3a7713b1edbc 328 uint32_t reloadPoints; /*!< FTM reload points; When using this, the PWM
AnnaBridge 171:3a7713b1edbc 329 synchronization is not required. Multiple reload points can be used by providing
AnnaBridge 171:3a7713b1edbc 330 an OR'ed list of options available in
AnnaBridge 171:3a7713b1edbc 331 enumeration ::ftm_reload_point_t. */
AnnaBridge 171:3a7713b1edbc 332 ftm_fault_mode_t faultMode; /*!< FTM fault control mode */
AnnaBridge 171:3a7713b1edbc 333 uint8_t faultFilterValue; /*!< Fault input filter value */
AnnaBridge 171:3a7713b1edbc 334 ftm_deadtime_prescale_t deadTimePrescale; /*!< The dead time prescalar value */
AnnaBridge 171:3a7713b1edbc 335 uint8_t deadTimeValue; /*!< The dead time value */
AnnaBridge 171:3a7713b1edbc 336 uint32_t extTriggers; /*!< External triggers to enable. Multiple trigger sources can be
AnnaBridge 171:3a7713b1edbc 337 enabled by providing an OR'ed list of options available in
AnnaBridge 171:3a7713b1edbc 338 enumeration ::ftm_external_trigger_t. */
AnnaBridge 171:3a7713b1edbc 339 uint8_t chnlInitState; /*!< Defines the initialization value of the channels in OUTINT register */
AnnaBridge 171:3a7713b1edbc 340 uint8_t chnlPolarity; /*!< Defines the output polarity of the channels in POL register */
AnnaBridge 171:3a7713b1edbc 341 bool useGlobalTimeBase; /*!< True: Use of an external global time base is enabled;
AnnaBridge 171:3a7713b1edbc 342 False: disabled */
AnnaBridge 171:3a7713b1edbc 343 } ftm_config_t;
AnnaBridge 171:3a7713b1edbc 344
AnnaBridge 171:3a7713b1edbc 345 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 346 * API
AnnaBridge 171:3a7713b1edbc 347 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 348
AnnaBridge 171:3a7713b1edbc 349 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 350 extern "C" {
AnnaBridge 171:3a7713b1edbc 351 #endif
AnnaBridge 171:3a7713b1edbc 352
AnnaBridge 171:3a7713b1edbc 353 /*!
AnnaBridge 171:3a7713b1edbc 354 * @name Initialization and deinitialization
AnnaBridge 171:3a7713b1edbc 355 * @{
AnnaBridge 171:3a7713b1edbc 356 */
AnnaBridge 171:3a7713b1edbc 357
AnnaBridge 171:3a7713b1edbc 358 /*!
AnnaBridge 171:3a7713b1edbc 359 * @brief Ungates the FTM clock and configures the peripheral for basic operation.
AnnaBridge 171:3a7713b1edbc 360 *
AnnaBridge 171:3a7713b1edbc 361 * @note This API should be called at the beginning of the application using the FTM driver.
AnnaBridge 171:3a7713b1edbc 362 *
AnnaBridge 171:3a7713b1edbc 363 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 364 * @param config Pointer to the user configuration structure.
AnnaBridge 171:3a7713b1edbc 365 *
AnnaBridge 171:3a7713b1edbc 366 * @return kStatus_Success indicates success; Else indicates failure.
AnnaBridge 171:3a7713b1edbc 367 */
AnnaBridge 171:3a7713b1edbc 368 status_t FTM_Init(FTM_Type *base, const ftm_config_t *config);
AnnaBridge 171:3a7713b1edbc 369
AnnaBridge 171:3a7713b1edbc 370 /*!
AnnaBridge 171:3a7713b1edbc 371 * @brief Gates the FTM clock.
AnnaBridge 171:3a7713b1edbc 372 *
AnnaBridge 171:3a7713b1edbc 373 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 374 */
AnnaBridge 171:3a7713b1edbc 375 void FTM_Deinit(FTM_Type *base);
AnnaBridge 171:3a7713b1edbc 376
AnnaBridge 171:3a7713b1edbc 377 /*!
AnnaBridge 171:3a7713b1edbc 378 * @brief Fills in the FTM configuration structure with the default settings.
AnnaBridge 171:3a7713b1edbc 379 *
AnnaBridge 171:3a7713b1edbc 380 * The default values are:
AnnaBridge 171:3a7713b1edbc 381 * @code
AnnaBridge 171:3a7713b1edbc 382 * config->prescale = kFTM_Prescale_Divide_1;
AnnaBridge 171:3a7713b1edbc 383 * config->bdmMode = kFTM_BdmMode_0;
AnnaBridge 171:3a7713b1edbc 384 * config->pwmSyncMode = kFTM_SoftwareTrigger;
AnnaBridge 171:3a7713b1edbc 385 * config->reloadPoints = 0;
AnnaBridge 171:3a7713b1edbc 386 * config->faultMode = kFTM_Fault_Disable;
AnnaBridge 171:3a7713b1edbc 387 * config->faultFilterValue = 0;
AnnaBridge 171:3a7713b1edbc 388 * config->deadTimePrescale = kFTM_Deadtime_Prescale_1;
AnnaBridge 171:3a7713b1edbc 389 * config->deadTimeValue = 0;
AnnaBridge 171:3a7713b1edbc 390 * config->extTriggers = 0;
AnnaBridge 171:3a7713b1edbc 391 * config->chnlInitState = 0;
AnnaBridge 171:3a7713b1edbc 392 * config->chnlPolarity = 0;
AnnaBridge 171:3a7713b1edbc 393 * config->useGlobalTimeBase = false;
AnnaBridge 171:3a7713b1edbc 394 * @endcode
AnnaBridge 171:3a7713b1edbc 395 * @param config Pointer to the user configuration structure.
AnnaBridge 171:3a7713b1edbc 396 */
AnnaBridge 171:3a7713b1edbc 397 void FTM_GetDefaultConfig(ftm_config_t *config);
AnnaBridge 171:3a7713b1edbc 398
AnnaBridge 171:3a7713b1edbc 399 /*! @}*/
AnnaBridge 171:3a7713b1edbc 400
AnnaBridge 171:3a7713b1edbc 401 /*!
AnnaBridge 171:3a7713b1edbc 402 * @name Channel mode operations
AnnaBridge 171:3a7713b1edbc 403 * @{
AnnaBridge 171:3a7713b1edbc 404 */
AnnaBridge 171:3a7713b1edbc 405
AnnaBridge 171:3a7713b1edbc 406 /*!
AnnaBridge 171:3a7713b1edbc 407 * @brief Configures the PWM signal parameters.
AnnaBridge 171:3a7713b1edbc 408 *
AnnaBridge 171:3a7713b1edbc 409 * Call this function to configure the PWM signal period, mode, duty cycle, and edge. Use this
AnnaBridge 171:3a7713b1edbc 410 * function to configure all FTM channels that are used to output a PWM signal.
AnnaBridge 171:3a7713b1edbc 411 *
AnnaBridge 171:3a7713b1edbc 412 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 413 * @param chnlParams Array of PWM channel parameters to configure the channel(s)
AnnaBridge 171:3a7713b1edbc 414 * @param numOfChnls Number of channels to configure; This should be the size of the array passed in
AnnaBridge 171:3a7713b1edbc 415 * @param mode PWM operation mode, options available in enumeration ::ftm_pwm_mode_t
AnnaBridge 171:3a7713b1edbc 416 * @param pwmFreq_Hz PWM signal frequency in Hz
AnnaBridge 171:3a7713b1edbc 417 * @param srcClock_Hz FTM counter clock in Hz
AnnaBridge 171:3a7713b1edbc 418 *
AnnaBridge 171:3a7713b1edbc 419 * @return kStatus_Success if the PWM setup was successful
AnnaBridge 171:3a7713b1edbc 420 * kStatus_Error on failure
AnnaBridge 171:3a7713b1edbc 421 */
AnnaBridge 171:3a7713b1edbc 422 status_t FTM_SetupPwm(FTM_Type *base,
AnnaBridge 171:3a7713b1edbc 423 const ftm_chnl_pwm_signal_param_t *chnlParams,
AnnaBridge 171:3a7713b1edbc 424 uint8_t numOfChnls,
AnnaBridge 171:3a7713b1edbc 425 ftm_pwm_mode_t mode,
AnnaBridge 171:3a7713b1edbc 426 uint32_t pwmFreq_Hz,
AnnaBridge 171:3a7713b1edbc 427 uint32_t srcClock_Hz);
AnnaBridge 171:3a7713b1edbc 428
AnnaBridge 171:3a7713b1edbc 429 /*!
AnnaBridge 171:3a7713b1edbc 430 * @brief Updates the duty cycle of an active PWM signal.
AnnaBridge 171:3a7713b1edbc 431 *
AnnaBridge 171:3a7713b1edbc 432 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 433 * @param chnlNumber The channel/channel pair number. In combined mode, this represents
AnnaBridge 171:3a7713b1edbc 434 * the channel pair number
AnnaBridge 171:3a7713b1edbc 435 * @param currentPwmMode The current PWM mode set during PWM setup
AnnaBridge 171:3a7713b1edbc 436 * @param dutyCyclePercent New PWM pulse width; The value should be between 0 to 100
AnnaBridge 171:3a7713b1edbc 437 * 0=inactive signal(0% duty cycle)...
AnnaBridge 171:3a7713b1edbc 438 * 100=active signal (100% duty cycle)
AnnaBridge 171:3a7713b1edbc 439 */
AnnaBridge 171:3a7713b1edbc 440 void FTM_UpdatePwmDutycycle(FTM_Type *base,
AnnaBridge 171:3a7713b1edbc 441 ftm_chnl_t chnlNumber,
AnnaBridge 171:3a7713b1edbc 442 ftm_pwm_mode_t currentPwmMode,
AnnaBridge 171:3a7713b1edbc 443 uint8_t dutyCyclePercent);
AnnaBridge 171:3a7713b1edbc 444
AnnaBridge 171:3a7713b1edbc 445 /*!
AnnaBridge 171:3a7713b1edbc 446 * @brief Updates the edge level selection for a channel.
AnnaBridge 171:3a7713b1edbc 447 *
AnnaBridge 171:3a7713b1edbc 448 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 449 * @param chnlNumber The channel number
AnnaBridge 171:3a7713b1edbc 450 * @param level The level to be set to the ELSnB:ELSnA field; Valid values are 00, 01, 10, 11.
AnnaBridge 171:3a7713b1edbc 451 * See the Kinetis SoC reference manual for details about this field.
AnnaBridge 171:3a7713b1edbc 452 */
AnnaBridge 171:3a7713b1edbc 453 void FTM_UpdateChnlEdgeLevelSelect(FTM_Type *base, ftm_chnl_t chnlNumber, uint8_t level);
AnnaBridge 171:3a7713b1edbc 454
AnnaBridge 171:3a7713b1edbc 455 /*!
AnnaBridge 171:3a7713b1edbc 456 * @brief Enables capturing an input signal on the channel using the function parameters.
AnnaBridge 171:3a7713b1edbc 457 *
AnnaBridge 171:3a7713b1edbc 458 * When the edge specified in the captureMode argument occurs on the channel, the FTM counter is
AnnaBridge 171:3a7713b1edbc 459 * captured into the CnV register. The user has to read the CnV register separately to get this
AnnaBridge 171:3a7713b1edbc 460 * value. The filter function is disabled if the filterVal argument passed in is 0. The filter
AnnaBridge 171:3a7713b1edbc 461 * function is available only for channels 0, 1, 2, 3.
AnnaBridge 171:3a7713b1edbc 462 *
AnnaBridge 171:3a7713b1edbc 463 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 464 * @param chnlNumber The channel number
AnnaBridge 171:3a7713b1edbc 465 * @param captureMode Specifies which edge to capture
AnnaBridge 171:3a7713b1edbc 466 * @param filterValue Filter value, specify 0 to disable filter. Available only for channels 0-3.
AnnaBridge 171:3a7713b1edbc 467 */
AnnaBridge 171:3a7713b1edbc 468 void FTM_SetupInputCapture(FTM_Type *base,
AnnaBridge 171:3a7713b1edbc 469 ftm_chnl_t chnlNumber,
AnnaBridge 171:3a7713b1edbc 470 ftm_input_capture_edge_t captureMode,
AnnaBridge 171:3a7713b1edbc 471 uint32_t filterValue);
AnnaBridge 171:3a7713b1edbc 472
AnnaBridge 171:3a7713b1edbc 473 /*!
AnnaBridge 171:3a7713b1edbc 474 * @brief Configures the FTM to generate timed pulses.
AnnaBridge 171:3a7713b1edbc 475 *
AnnaBridge 171:3a7713b1edbc 476 * When the FTM counter matches the value of compareVal argument (this is written into CnV reg),
AnnaBridge 171:3a7713b1edbc 477 * the channel output is changed based on what is specified in the compareMode argument.
AnnaBridge 171:3a7713b1edbc 478 *
AnnaBridge 171:3a7713b1edbc 479 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 480 * @param chnlNumber The channel number
AnnaBridge 171:3a7713b1edbc 481 * @param compareMode Action to take on the channel output when the compare condition is met
AnnaBridge 171:3a7713b1edbc 482 * @param compareValue Value to be programmed in the CnV register.
AnnaBridge 171:3a7713b1edbc 483 */
AnnaBridge 171:3a7713b1edbc 484 void FTM_SetupOutputCompare(FTM_Type *base,
AnnaBridge 171:3a7713b1edbc 485 ftm_chnl_t chnlNumber,
AnnaBridge 171:3a7713b1edbc 486 ftm_output_compare_mode_t compareMode,
AnnaBridge 171:3a7713b1edbc 487 uint32_t compareValue);
AnnaBridge 171:3a7713b1edbc 488
AnnaBridge 171:3a7713b1edbc 489 /*!
AnnaBridge 171:3a7713b1edbc 490 * @brief Configures the dual edge capture mode of the FTM.
AnnaBridge 171:3a7713b1edbc 491 *
AnnaBridge 171:3a7713b1edbc 492 * This function sets up the dual edge capture mode on a channel pair. The capture edge for the
AnnaBridge 171:3a7713b1edbc 493 * channel pair and the capture mode (one-shot or continuous) is specified in the parameter
AnnaBridge 171:3a7713b1edbc 494 * argument. The filter function is disabled if the filterVal argument passed is zero. The filter
AnnaBridge 171:3a7713b1edbc 495 * function is available only on channels 0 and 2. The user has to read the channel CnV registers
AnnaBridge 171:3a7713b1edbc 496 * separately to get the capture values.
AnnaBridge 171:3a7713b1edbc 497 *
AnnaBridge 171:3a7713b1edbc 498 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 499 * @param chnlPairNumber The FTM channel pair number; options are 0, 1, 2, 3
AnnaBridge 171:3a7713b1edbc 500 * @param edgeParam Sets up the dual edge capture function
AnnaBridge 171:3a7713b1edbc 501 * @param filterValue Filter value, specify 0 to disable filter. Available only for channel pair 0 and 1.
AnnaBridge 171:3a7713b1edbc 502 */
AnnaBridge 171:3a7713b1edbc 503 void FTM_SetupDualEdgeCapture(FTM_Type *base,
AnnaBridge 171:3a7713b1edbc 504 ftm_chnl_t chnlPairNumber,
AnnaBridge 171:3a7713b1edbc 505 const ftm_dual_edge_capture_param_t *edgeParam,
AnnaBridge 171:3a7713b1edbc 506 uint32_t filterValue);
AnnaBridge 171:3a7713b1edbc 507
AnnaBridge 171:3a7713b1edbc 508 /*! @}*/
AnnaBridge 171:3a7713b1edbc 509
AnnaBridge 171:3a7713b1edbc 510 /*!
AnnaBridge 171:3a7713b1edbc 511 * @brief Configures the parameters and activates the quadrature decoder mode.
AnnaBridge 171:3a7713b1edbc 512 *
AnnaBridge 171:3a7713b1edbc 513 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 514 * @param phaseAParams Phase A configuration parameters
AnnaBridge 171:3a7713b1edbc 515 * @param phaseBParams Phase B configuration parameters
AnnaBridge 171:3a7713b1edbc 516 * @param quadMode Selects encoding mode used in quadrature decoder mode
AnnaBridge 171:3a7713b1edbc 517 */
AnnaBridge 171:3a7713b1edbc 518 void FTM_SetupQuadDecode(FTM_Type *base,
AnnaBridge 171:3a7713b1edbc 519 const ftm_phase_params_t *phaseAParams,
AnnaBridge 171:3a7713b1edbc 520 const ftm_phase_params_t *phaseBParams,
AnnaBridge 171:3a7713b1edbc 521 ftm_quad_decode_mode_t quadMode);
AnnaBridge 171:3a7713b1edbc 522
AnnaBridge 171:3a7713b1edbc 523 /*!
AnnaBridge 171:3a7713b1edbc 524 * @brief Sets up the working of the FTM fault protection.
AnnaBridge 171:3a7713b1edbc 525 *
AnnaBridge 171:3a7713b1edbc 526 * FTM can have up to 4 fault inputs. This function sets up fault parameters, fault level, and a filter.
AnnaBridge 171:3a7713b1edbc 527 *
AnnaBridge 171:3a7713b1edbc 528 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 529 * @param faultNumber FTM fault to configure.
AnnaBridge 171:3a7713b1edbc 530 * @param faultParams Parameters passed in to set up the fault
AnnaBridge 171:3a7713b1edbc 531 */
AnnaBridge 171:3a7713b1edbc 532 void FTM_SetupFault(FTM_Type *base, ftm_fault_input_t faultNumber, const ftm_fault_param_t *faultParams);
AnnaBridge 171:3a7713b1edbc 533
AnnaBridge 171:3a7713b1edbc 534 /*!
AnnaBridge 171:3a7713b1edbc 535 * @name Interrupt Interface
AnnaBridge 171:3a7713b1edbc 536 * @{
AnnaBridge 171:3a7713b1edbc 537 */
AnnaBridge 171:3a7713b1edbc 538
AnnaBridge 171:3a7713b1edbc 539 /*!
AnnaBridge 171:3a7713b1edbc 540 * @brief Enables the selected FTM interrupts.
AnnaBridge 171:3a7713b1edbc 541 *
AnnaBridge 171:3a7713b1edbc 542 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 543 * @param mask The interrupts to enable. This is a logical OR of members of the
AnnaBridge 171:3a7713b1edbc 544 * enumeration ::ftm_interrupt_enable_t
AnnaBridge 171:3a7713b1edbc 545 */
AnnaBridge 171:3a7713b1edbc 546 void FTM_EnableInterrupts(FTM_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 547
AnnaBridge 171:3a7713b1edbc 548 /*!
AnnaBridge 171:3a7713b1edbc 549 * @brief Disables the selected FTM interrupts.
AnnaBridge 171:3a7713b1edbc 550 *
AnnaBridge 171:3a7713b1edbc 551 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 552 * @param mask The interrupts to enable. This is a logical OR of members of the
AnnaBridge 171:3a7713b1edbc 553 * enumeration ::ftm_interrupt_enable_t
AnnaBridge 171:3a7713b1edbc 554 */
AnnaBridge 171:3a7713b1edbc 555 void FTM_DisableInterrupts(FTM_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 556
AnnaBridge 171:3a7713b1edbc 557 /*!
AnnaBridge 171:3a7713b1edbc 558 * @brief Gets the enabled FTM interrupts.
AnnaBridge 171:3a7713b1edbc 559 *
AnnaBridge 171:3a7713b1edbc 560 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 561 *
AnnaBridge 171:3a7713b1edbc 562 * @return The enabled interrupts. This is the logical OR of members of the
AnnaBridge 171:3a7713b1edbc 563 * enumeration ::ftm_interrupt_enable_t
AnnaBridge 171:3a7713b1edbc 564 */
AnnaBridge 171:3a7713b1edbc 565 uint32_t FTM_GetEnabledInterrupts(FTM_Type *base);
AnnaBridge 171:3a7713b1edbc 566
AnnaBridge 171:3a7713b1edbc 567 /*! @}*/
AnnaBridge 171:3a7713b1edbc 568
AnnaBridge 171:3a7713b1edbc 569 /*!
AnnaBridge 171:3a7713b1edbc 570 * @name Status Interface
AnnaBridge 171:3a7713b1edbc 571 * @{
AnnaBridge 171:3a7713b1edbc 572 */
AnnaBridge 171:3a7713b1edbc 573
AnnaBridge 171:3a7713b1edbc 574 /*!
AnnaBridge 171:3a7713b1edbc 575 * @brief Gets the FTM status flags.
AnnaBridge 171:3a7713b1edbc 576 *
AnnaBridge 171:3a7713b1edbc 577 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 578 *
AnnaBridge 171:3a7713b1edbc 579 * @return The status flags. This is the logical OR of members of the
AnnaBridge 171:3a7713b1edbc 580 * enumeration ::ftm_status_flags_t
AnnaBridge 171:3a7713b1edbc 581 */
AnnaBridge 171:3a7713b1edbc 582 uint32_t FTM_GetStatusFlags(FTM_Type *base);
AnnaBridge 171:3a7713b1edbc 583
AnnaBridge 171:3a7713b1edbc 584 /*!
AnnaBridge 171:3a7713b1edbc 585 * @brief Clears the FTM status flags.
AnnaBridge 171:3a7713b1edbc 586 *
AnnaBridge 171:3a7713b1edbc 587 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 588 * @param mask The status flags to clear. This is a logical OR of members of the
AnnaBridge 171:3a7713b1edbc 589 * enumeration ::ftm_status_flags_t
AnnaBridge 171:3a7713b1edbc 590 */
AnnaBridge 171:3a7713b1edbc 591 void FTM_ClearStatusFlags(FTM_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 592
AnnaBridge 171:3a7713b1edbc 593 /*! @}*/
AnnaBridge 171:3a7713b1edbc 594
AnnaBridge 171:3a7713b1edbc 595 /*!
AnnaBridge 171:3a7713b1edbc 596 * @name Timer Start and Stop
AnnaBridge 171:3a7713b1edbc 597 * @{
AnnaBridge 171:3a7713b1edbc 598 */
AnnaBridge 171:3a7713b1edbc 599
AnnaBridge 171:3a7713b1edbc 600 /*!
AnnaBridge 171:3a7713b1edbc 601 * @brief Starts the FTM counter.
AnnaBridge 171:3a7713b1edbc 602 *
AnnaBridge 171:3a7713b1edbc 603 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 604 * @param clockSource FTM clock source; After the clock source is set, the counter starts running.
AnnaBridge 171:3a7713b1edbc 605 */
AnnaBridge 171:3a7713b1edbc 606 static inline void FTM_StartTimer(FTM_Type *base, ftm_clock_source_t clockSource)
AnnaBridge 171:3a7713b1edbc 607 {
AnnaBridge 171:3a7713b1edbc 608 uint32_t reg = base->SC;
AnnaBridge 171:3a7713b1edbc 609
AnnaBridge 171:3a7713b1edbc 610 reg &= ~(FTM_SC_CLKS_MASK);
AnnaBridge 171:3a7713b1edbc 611 reg |= FTM_SC_CLKS(clockSource);
AnnaBridge 171:3a7713b1edbc 612 base->SC = reg;
AnnaBridge 171:3a7713b1edbc 613 }
AnnaBridge 171:3a7713b1edbc 614
AnnaBridge 171:3a7713b1edbc 615 /*!
AnnaBridge 171:3a7713b1edbc 616 * @brief Stops the FTM counter.
AnnaBridge 171:3a7713b1edbc 617 *
AnnaBridge 171:3a7713b1edbc 618 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 619 */
AnnaBridge 171:3a7713b1edbc 620 static inline void FTM_StopTimer(FTM_Type *base)
AnnaBridge 171:3a7713b1edbc 621 {
AnnaBridge 171:3a7713b1edbc 622 /* Set clock source to none to disable counter */
AnnaBridge 171:3a7713b1edbc 623 base->SC &= ~(FTM_SC_CLKS_MASK);
AnnaBridge 171:3a7713b1edbc 624 }
AnnaBridge 171:3a7713b1edbc 625
AnnaBridge 171:3a7713b1edbc 626 /*! @}*/
AnnaBridge 171:3a7713b1edbc 627
AnnaBridge 171:3a7713b1edbc 628 /*!
AnnaBridge 171:3a7713b1edbc 629 * @name Software output control
AnnaBridge 171:3a7713b1edbc 630 * @{
AnnaBridge 171:3a7713b1edbc 631 */
AnnaBridge 171:3a7713b1edbc 632
AnnaBridge 171:3a7713b1edbc 633 /*!
AnnaBridge 171:3a7713b1edbc 634 * @brief Enables or disables the channel software output control.
AnnaBridge 171:3a7713b1edbc 635 *
AnnaBridge 171:3a7713b1edbc 636 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 637 * @param chnlNumber Channel to be enabled or disabled
AnnaBridge 171:3a7713b1edbc 638 * @param value true: channel output is affected by software output control
AnnaBridge 171:3a7713b1edbc 639 false: channel output is unaffected by software output control
AnnaBridge 171:3a7713b1edbc 640 */
AnnaBridge 171:3a7713b1edbc 641 static inline void FTM_SetSoftwareCtrlEnable(FTM_Type *base, ftm_chnl_t chnlNumber, bool value)
AnnaBridge 171:3a7713b1edbc 642 {
AnnaBridge 171:3a7713b1edbc 643 if (value)
AnnaBridge 171:3a7713b1edbc 644 {
AnnaBridge 171:3a7713b1edbc 645 base->SWOCTRL |= (1U << chnlNumber);
AnnaBridge 171:3a7713b1edbc 646 }
AnnaBridge 171:3a7713b1edbc 647 else
AnnaBridge 171:3a7713b1edbc 648 {
AnnaBridge 171:3a7713b1edbc 649 base->SWOCTRL &= ~(1U << chnlNumber);
AnnaBridge 171:3a7713b1edbc 650 }
AnnaBridge 171:3a7713b1edbc 651 }
AnnaBridge 171:3a7713b1edbc 652
AnnaBridge 171:3a7713b1edbc 653 /*!
AnnaBridge 171:3a7713b1edbc 654 * @brief Sets the channel software output control value.
AnnaBridge 171:3a7713b1edbc 655 *
AnnaBridge 171:3a7713b1edbc 656 * @param base FTM peripheral base address.
AnnaBridge 171:3a7713b1edbc 657 * @param chnlNumber Channel to be configured
AnnaBridge 171:3a7713b1edbc 658 * @param value true to set 1, false to set 0
AnnaBridge 171:3a7713b1edbc 659 */
AnnaBridge 171:3a7713b1edbc 660 static inline void FTM_SetSoftwareCtrlVal(FTM_Type *base, ftm_chnl_t chnlNumber, bool value)
AnnaBridge 171:3a7713b1edbc 661 {
AnnaBridge 171:3a7713b1edbc 662 if (value)
AnnaBridge 171:3a7713b1edbc 663 {
AnnaBridge 171:3a7713b1edbc 664 base->SWOCTRL |= (1U << (chnlNumber + FTM_SWOCTRL_CH0OCV_SHIFT));
AnnaBridge 171:3a7713b1edbc 665 }
AnnaBridge 171:3a7713b1edbc 666 else
AnnaBridge 171:3a7713b1edbc 667 {
AnnaBridge 171:3a7713b1edbc 668 base->SWOCTRL &= ~(1U << (chnlNumber + FTM_SWOCTRL_CH0OCV_SHIFT));
AnnaBridge 171:3a7713b1edbc 669 }
AnnaBridge 171:3a7713b1edbc 670 }
AnnaBridge 171:3a7713b1edbc 671
AnnaBridge 171:3a7713b1edbc 672 /*! @}*/
AnnaBridge 171:3a7713b1edbc 673
AnnaBridge 171:3a7713b1edbc 674 /*!
AnnaBridge 171:3a7713b1edbc 675 * @brief Enables or disables the FTM global time base signal generation to other FTMs.
AnnaBridge 171:3a7713b1edbc 676 *
AnnaBridge 171:3a7713b1edbc 677 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 678 * @param enable true to enable, false to disable
AnnaBridge 171:3a7713b1edbc 679 */
AnnaBridge 171:3a7713b1edbc 680 static inline void FTM_SetGlobalTimeBaseOutputEnable(FTM_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 681 {
AnnaBridge 171:3a7713b1edbc 682 if (enable)
AnnaBridge 171:3a7713b1edbc 683 {
AnnaBridge 171:3a7713b1edbc 684 base->CONF |= FTM_CONF_GTBEOUT_MASK;
AnnaBridge 171:3a7713b1edbc 685 }
AnnaBridge 171:3a7713b1edbc 686 else
AnnaBridge 171:3a7713b1edbc 687 {
AnnaBridge 171:3a7713b1edbc 688 base->CONF &= ~FTM_CONF_GTBEOUT_MASK;
AnnaBridge 171:3a7713b1edbc 689 }
AnnaBridge 171:3a7713b1edbc 690 }
AnnaBridge 171:3a7713b1edbc 691
AnnaBridge 171:3a7713b1edbc 692 /*!
AnnaBridge 171:3a7713b1edbc 693 * @brief Sets the FTM peripheral timer channel output mask.
AnnaBridge 171:3a7713b1edbc 694 *
AnnaBridge 171:3a7713b1edbc 695 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 696 * @param chnlNumber Channel to be configured
AnnaBridge 171:3a7713b1edbc 697 * @param mask true: masked, channel is forced to its inactive state; false: unmasked
AnnaBridge 171:3a7713b1edbc 698 */
AnnaBridge 171:3a7713b1edbc 699 static inline void FTM_SetOutputMask(FTM_Type *base, ftm_chnl_t chnlNumber, bool mask)
AnnaBridge 171:3a7713b1edbc 700 {
AnnaBridge 171:3a7713b1edbc 701 if (mask)
AnnaBridge 171:3a7713b1edbc 702 {
AnnaBridge 171:3a7713b1edbc 703 base->OUTMASK |= (1U << chnlNumber);
AnnaBridge 171:3a7713b1edbc 704 }
AnnaBridge 171:3a7713b1edbc 705 else
AnnaBridge 171:3a7713b1edbc 706 {
AnnaBridge 171:3a7713b1edbc 707 base->OUTMASK &= ~(1U << chnlNumber);
AnnaBridge 171:3a7713b1edbc 708 }
AnnaBridge 171:3a7713b1edbc 709 }
AnnaBridge 171:3a7713b1edbc 710
AnnaBridge 171:3a7713b1edbc 711 #if defined(FSL_FEATURE_FTM_HAS_ENABLE_PWM_OUTPUT) && (FSL_FEATURE_FTM_HAS_ENABLE_PWM_OUTPUT)
AnnaBridge 171:3a7713b1edbc 712 /*!
AnnaBridge 171:3a7713b1edbc 713 * @brief Allows user to enable an output on an FTM channel.
AnnaBridge 171:3a7713b1edbc 714 *
AnnaBridge 171:3a7713b1edbc 715 * To enable the PWM channel output call this function with val=true. For input mode,
AnnaBridge 171:3a7713b1edbc 716 * call this function with val=false.
AnnaBridge 171:3a7713b1edbc 717 *
AnnaBridge 171:3a7713b1edbc 718 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 719 * @param chnlNumber Channel to be configured
AnnaBridge 171:3a7713b1edbc 720 * @param value true: enable output; false: output is disabled, used in input mode
AnnaBridge 171:3a7713b1edbc 721 */
AnnaBridge 171:3a7713b1edbc 722 static inline void FTM_SetPwmOutputEnable(FTM_Type *base, ftm_chnl_t chnlNumber, bool value)
AnnaBridge 171:3a7713b1edbc 723 {
AnnaBridge 171:3a7713b1edbc 724 if (value)
AnnaBridge 171:3a7713b1edbc 725 {
AnnaBridge 171:3a7713b1edbc 726 base->SC |= (1U << (chnlNumber + FTM_SC_PWMEN0_SHIFT));
AnnaBridge 171:3a7713b1edbc 727 }
AnnaBridge 171:3a7713b1edbc 728 else
AnnaBridge 171:3a7713b1edbc 729 {
AnnaBridge 171:3a7713b1edbc 730 base->SC &= ~(1U << (chnlNumber + FTM_SC_PWMEN0_SHIFT));
AnnaBridge 171:3a7713b1edbc 731 }
AnnaBridge 171:3a7713b1edbc 732 }
AnnaBridge 171:3a7713b1edbc 733 #endif
AnnaBridge 171:3a7713b1edbc 734
AnnaBridge 171:3a7713b1edbc 735 /*!
AnnaBridge 171:3a7713b1edbc 736 * @name Channel pair operations
AnnaBridge 171:3a7713b1edbc 737 * @{
AnnaBridge 171:3a7713b1edbc 738 */
AnnaBridge 171:3a7713b1edbc 739
AnnaBridge 171:3a7713b1edbc 740 /*!
AnnaBridge 171:3a7713b1edbc 741 * @brief This function enables/disables the fault control in a channel pair.
AnnaBridge 171:3a7713b1edbc 742 *
AnnaBridge 171:3a7713b1edbc 743 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 744 * @param chnlPairNumber The FTM channel pair number; options are 0, 1, 2, 3
AnnaBridge 171:3a7713b1edbc 745 * @param value true: Enable fault control for this channel pair; false: No fault control
AnnaBridge 171:3a7713b1edbc 746 */
AnnaBridge 171:3a7713b1edbc 747 static inline void FTM_SetFaultControlEnable(FTM_Type *base, ftm_chnl_t chnlPairNumber, bool value)
AnnaBridge 171:3a7713b1edbc 748 {
AnnaBridge 171:3a7713b1edbc 749 if (value)
AnnaBridge 171:3a7713b1edbc 750 {
AnnaBridge 171:3a7713b1edbc 751 base->COMBINE |= (1U << (FTM_COMBINE_FAULTEN0_SHIFT + (FTM_COMBINE_COMBINE1_SHIFT * chnlPairNumber)));
AnnaBridge 171:3a7713b1edbc 752 }
AnnaBridge 171:3a7713b1edbc 753 else
AnnaBridge 171:3a7713b1edbc 754 {
AnnaBridge 171:3a7713b1edbc 755 base->COMBINE &= ~(1U << (FTM_COMBINE_FAULTEN0_SHIFT + (FTM_COMBINE_COMBINE1_SHIFT * chnlPairNumber)));
AnnaBridge 171:3a7713b1edbc 756 }
AnnaBridge 171:3a7713b1edbc 757 }
AnnaBridge 171:3a7713b1edbc 758
AnnaBridge 171:3a7713b1edbc 759 /*!
AnnaBridge 171:3a7713b1edbc 760 * @brief This function enables/disables the dead time insertion in a channel pair.
AnnaBridge 171:3a7713b1edbc 761 *
AnnaBridge 171:3a7713b1edbc 762 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 763 * @param chnlPairNumber The FTM channel pair number; options are 0, 1, 2, 3
AnnaBridge 171:3a7713b1edbc 764 * @param value true: Insert dead time in this channel pair; false: No dead time inserted
AnnaBridge 171:3a7713b1edbc 765 */
AnnaBridge 171:3a7713b1edbc 766 static inline void FTM_SetDeadTimeEnable(FTM_Type *base, ftm_chnl_t chnlPairNumber, bool value)
AnnaBridge 171:3a7713b1edbc 767 {
AnnaBridge 171:3a7713b1edbc 768 if (value)
AnnaBridge 171:3a7713b1edbc 769 {
AnnaBridge 171:3a7713b1edbc 770 base->COMBINE |= (1U << (FTM_COMBINE_DTEN0_SHIFT + (FTM_COMBINE_COMBINE1_SHIFT * chnlPairNumber)));
AnnaBridge 171:3a7713b1edbc 771 }
AnnaBridge 171:3a7713b1edbc 772 else
AnnaBridge 171:3a7713b1edbc 773 {
AnnaBridge 171:3a7713b1edbc 774 base->COMBINE &= ~(1U << (FTM_COMBINE_DTEN0_SHIFT + (FTM_COMBINE_COMBINE1_SHIFT * chnlPairNumber)));
AnnaBridge 171:3a7713b1edbc 775 }
AnnaBridge 171:3a7713b1edbc 776 }
AnnaBridge 171:3a7713b1edbc 777
AnnaBridge 171:3a7713b1edbc 778 /*!
AnnaBridge 171:3a7713b1edbc 779 * @brief This function enables/disables complementary mode in a channel pair.
AnnaBridge 171:3a7713b1edbc 780 *
AnnaBridge 171:3a7713b1edbc 781 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 782 * @param chnlPairNumber The FTM channel pair number; options are 0, 1, 2, 3
AnnaBridge 171:3a7713b1edbc 783 * @param value true: enable complementary mode; false: disable complementary mode
AnnaBridge 171:3a7713b1edbc 784 */
AnnaBridge 171:3a7713b1edbc 785 static inline void FTM_SetComplementaryEnable(FTM_Type *base, ftm_chnl_t chnlPairNumber, bool value)
AnnaBridge 171:3a7713b1edbc 786 {
AnnaBridge 171:3a7713b1edbc 787 if (value)
AnnaBridge 171:3a7713b1edbc 788 {
AnnaBridge 171:3a7713b1edbc 789 base->COMBINE |= (1U << (FTM_COMBINE_COMP0_SHIFT + (FTM_COMBINE_COMBINE1_SHIFT * chnlPairNumber)));
AnnaBridge 171:3a7713b1edbc 790 }
AnnaBridge 171:3a7713b1edbc 791 else
AnnaBridge 171:3a7713b1edbc 792 {
AnnaBridge 171:3a7713b1edbc 793 base->COMBINE &= ~(1U << (FTM_COMBINE_COMP0_SHIFT + (FTM_COMBINE_COMBINE1_SHIFT * chnlPairNumber)));
AnnaBridge 171:3a7713b1edbc 794 }
AnnaBridge 171:3a7713b1edbc 795 }
AnnaBridge 171:3a7713b1edbc 796
AnnaBridge 171:3a7713b1edbc 797 /*!
AnnaBridge 171:3a7713b1edbc 798 * @brief This function enables/disables inverting control in a channel pair.
AnnaBridge 171:3a7713b1edbc 799 *
AnnaBridge 171:3a7713b1edbc 800 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 801 * @param chnlPairNumber The FTM channel pair number; options are 0, 1, 2, 3
AnnaBridge 171:3a7713b1edbc 802 * @param value true: enable inverting; false: disable inverting
AnnaBridge 171:3a7713b1edbc 803 */
AnnaBridge 171:3a7713b1edbc 804 static inline void FTM_SetInvertEnable(FTM_Type *base, ftm_chnl_t chnlPairNumber, bool value)
AnnaBridge 171:3a7713b1edbc 805 {
AnnaBridge 171:3a7713b1edbc 806 if (value)
AnnaBridge 171:3a7713b1edbc 807 {
AnnaBridge 171:3a7713b1edbc 808 base->INVCTRL |= (1U << chnlPairNumber);
AnnaBridge 171:3a7713b1edbc 809 }
AnnaBridge 171:3a7713b1edbc 810 else
AnnaBridge 171:3a7713b1edbc 811 {
AnnaBridge 171:3a7713b1edbc 812 base->INVCTRL &= ~(1U << chnlPairNumber);
AnnaBridge 171:3a7713b1edbc 813 }
AnnaBridge 171:3a7713b1edbc 814 }
AnnaBridge 171:3a7713b1edbc 815
AnnaBridge 171:3a7713b1edbc 816 /*! @}*/
AnnaBridge 171:3a7713b1edbc 817
AnnaBridge 171:3a7713b1edbc 818 /*!
AnnaBridge 171:3a7713b1edbc 819 * @brief Enables or disables the FTM software trigger for PWM synchronization.
AnnaBridge 171:3a7713b1edbc 820 *
AnnaBridge 171:3a7713b1edbc 821 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 822 * @param enable true: software trigger is selected, false: software trigger is not selected
AnnaBridge 171:3a7713b1edbc 823 */
AnnaBridge 171:3a7713b1edbc 824 static inline void FTM_SetSoftwareTrigger(FTM_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 825 {
AnnaBridge 171:3a7713b1edbc 826 if (enable)
AnnaBridge 171:3a7713b1edbc 827 {
AnnaBridge 171:3a7713b1edbc 828 base->SYNC |= FTM_SYNC_SWSYNC_MASK;
AnnaBridge 171:3a7713b1edbc 829 }
AnnaBridge 171:3a7713b1edbc 830 else
AnnaBridge 171:3a7713b1edbc 831 {
AnnaBridge 171:3a7713b1edbc 832 base->SYNC &= ~FTM_SYNC_SWSYNC_MASK;
AnnaBridge 171:3a7713b1edbc 833 }
AnnaBridge 171:3a7713b1edbc 834 }
AnnaBridge 171:3a7713b1edbc 835
AnnaBridge 171:3a7713b1edbc 836 /*!
AnnaBridge 171:3a7713b1edbc 837 * @brief Enables or disables the FTM write protection.
AnnaBridge 171:3a7713b1edbc 838 *
AnnaBridge 171:3a7713b1edbc 839 * @param base FTM peripheral base address
AnnaBridge 171:3a7713b1edbc 840 * @param enable true: Write-protection is enabled, false: Write-protection is disabled
AnnaBridge 171:3a7713b1edbc 841 */
AnnaBridge 171:3a7713b1edbc 842 static inline void FTM_SetWriteProtection(FTM_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 843 {
AnnaBridge 171:3a7713b1edbc 844 /* Configure write protection */
AnnaBridge 171:3a7713b1edbc 845 if (enable)
AnnaBridge 171:3a7713b1edbc 846 {
AnnaBridge 171:3a7713b1edbc 847 base->FMS |= FTM_FMS_WPEN_MASK;
AnnaBridge 171:3a7713b1edbc 848 }
AnnaBridge 171:3a7713b1edbc 849 else
AnnaBridge 171:3a7713b1edbc 850 {
AnnaBridge 171:3a7713b1edbc 851 base->MODE |= FTM_MODE_WPDIS_MASK;
AnnaBridge 171:3a7713b1edbc 852 }
AnnaBridge 171:3a7713b1edbc 853 }
AnnaBridge 171:3a7713b1edbc 854
AnnaBridge 171:3a7713b1edbc 855 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 856 }
AnnaBridge 171:3a7713b1edbc 857 #endif
AnnaBridge 171:3a7713b1edbc 858
AnnaBridge 171:3a7713b1edbc 859 /*! @}*/
AnnaBridge 171:3a7713b1edbc 860
AnnaBridge 171:3a7713b1edbc 861 #endif /* _FSL_FTM_H_*/