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TARGET_K66F/TOOLCHAIN_IAR/fsl_lpuart.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 3 * Copyright 2016-2017 NXP
AnnaBridge 171:3a7713b1edbc 4 *
AnnaBridge 171:3a7713b1edbc 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 6 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 9 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 13 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 14 *
AnnaBridge 171:3a7713b1edbc 15 * o Neither the name of the copyright holder nor the names of its
AnnaBridge 171:3a7713b1edbc 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 17 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 18 *
AnnaBridge 171:3a7713b1edbc 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 29 */
AnnaBridge 171:3a7713b1edbc 30 #ifndef _FSL_LPUART_H_
AnnaBridge 171:3a7713b1edbc 31 #define _FSL_LPUART_H_
AnnaBridge 171:3a7713b1edbc 32
AnnaBridge 171:3a7713b1edbc 33 #include "fsl_common.h"
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 /*!
AnnaBridge 171:3a7713b1edbc 36 * @addtogroup lpuart_driver
AnnaBridge 171:3a7713b1edbc 37 * @{
AnnaBridge 171:3a7713b1edbc 38 */
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 41 * Definitions
AnnaBridge 171:3a7713b1edbc 42 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /*! @name Driver version */
AnnaBridge 171:3a7713b1edbc 45 /*@{*/
AnnaBridge 171:3a7713b1edbc 46 /*! @brief LPUART driver version 2.2.3. */
AnnaBridge 171:3a7713b1edbc 47 #define FSL_LPUART_DRIVER_VERSION (MAKE_VERSION(2, 2, 3))
AnnaBridge 171:3a7713b1edbc 48 /*@}*/
AnnaBridge 171:3a7713b1edbc 49
AnnaBridge 171:3a7713b1edbc 50 /*! @brief Error codes for the LPUART driver. */
AnnaBridge 171:3a7713b1edbc 51 enum _lpuart_status
AnnaBridge 171:3a7713b1edbc 52 {
AnnaBridge 171:3a7713b1edbc 53 kStatus_LPUART_TxBusy = MAKE_STATUS(kStatusGroup_LPUART, 0), /*!< TX busy */
AnnaBridge 171:3a7713b1edbc 54 kStatus_LPUART_RxBusy = MAKE_STATUS(kStatusGroup_LPUART, 1), /*!< RX busy */
AnnaBridge 171:3a7713b1edbc 55 kStatus_LPUART_TxIdle = MAKE_STATUS(kStatusGroup_LPUART, 2), /*!< LPUART transmitter is idle. */
AnnaBridge 171:3a7713b1edbc 56 kStatus_LPUART_RxIdle = MAKE_STATUS(kStatusGroup_LPUART, 3), /*!< LPUART receiver is idle. */
AnnaBridge 171:3a7713b1edbc 57 kStatus_LPUART_TxWatermarkTooLarge = MAKE_STATUS(kStatusGroup_LPUART, 4), /*!< TX FIFO watermark too large */
AnnaBridge 171:3a7713b1edbc 58 kStatus_LPUART_RxWatermarkTooLarge = MAKE_STATUS(kStatusGroup_LPUART, 5), /*!< RX FIFO watermark too large */
AnnaBridge 171:3a7713b1edbc 59 kStatus_LPUART_FlagCannotClearManually = MAKE_STATUS(kStatusGroup_LPUART, 6), /*!< Some flag can't manually clear */
AnnaBridge 171:3a7713b1edbc 60 kStatus_LPUART_Error = MAKE_STATUS(kStatusGroup_LPUART, 7), /*!< Error happens on LPUART. */
AnnaBridge 171:3a7713b1edbc 61 kStatus_LPUART_RxRingBufferOverrun =
AnnaBridge 171:3a7713b1edbc 62 MAKE_STATUS(kStatusGroup_LPUART, 8), /*!< LPUART RX software ring buffer overrun. */
AnnaBridge 171:3a7713b1edbc 63 kStatus_LPUART_RxHardwareOverrun = MAKE_STATUS(kStatusGroup_LPUART, 9), /*!< LPUART RX receiver overrun. */
AnnaBridge 171:3a7713b1edbc 64 kStatus_LPUART_NoiseError = MAKE_STATUS(kStatusGroup_LPUART, 10), /*!< LPUART noise error. */
AnnaBridge 171:3a7713b1edbc 65 kStatus_LPUART_FramingError = MAKE_STATUS(kStatusGroup_LPUART, 11), /*!< LPUART framing error. */
AnnaBridge 171:3a7713b1edbc 66 kStatus_LPUART_ParityError = MAKE_STATUS(kStatusGroup_LPUART, 12), /*!< LPUART parity error. */
AnnaBridge 171:3a7713b1edbc 67 kStatus_LPUART_BaudrateNotSupport =
AnnaBridge 171:3a7713b1edbc 68 MAKE_STATUS(kStatusGroup_LPUART, 13), /*!< Baudrate is not support in current clock source */
AnnaBridge 171:3a7713b1edbc 69 };
AnnaBridge 171:3a7713b1edbc 70
AnnaBridge 171:3a7713b1edbc 71 /*! @brief LPUART parity mode. */
AnnaBridge 171:3a7713b1edbc 72 typedef enum _lpuart_parity_mode
AnnaBridge 171:3a7713b1edbc 73 {
AnnaBridge 171:3a7713b1edbc 74 kLPUART_ParityDisabled = 0x0U, /*!< Parity disabled */
AnnaBridge 171:3a7713b1edbc 75 kLPUART_ParityEven = 0x2U, /*!< Parity enabled, type even, bit setting: PE|PT = 10 */
AnnaBridge 171:3a7713b1edbc 76 kLPUART_ParityOdd = 0x3U, /*!< Parity enabled, type odd, bit setting: PE|PT = 11 */
AnnaBridge 171:3a7713b1edbc 77 } lpuart_parity_mode_t;
AnnaBridge 171:3a7713b1edbc 78
AnnaBridge 171:3a7713b1edbc 79 /*! @brief LPUART data bits count. */
AnnaBridge 171:3a7713b1edbc 80 typedef enum _lpuart_data_bits
AnnaBridge 171:3a7713b1edbc 81 {
AnnaBridge 171:3a7713b1edbc 82 kLPUART_EightDataBits = 0x0U, /*!< Eight data bit */
AnnaBridge 171:3a7713b1edbc 83 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
AnnaBridge 171:3a7713b1edbc 84 kLPUART_SevenDataBits = 0x1U, /*!< Seven data bit */
AnnaBridge 171:3a7713b1edbc 85 #endif
AnnaBridge 171:3a7713b1edbc 86 } lpuart_data_bits_t;
AnnaBridge 171:3a7713b1edbc 87
AnnaBridge 171:3a7713b1edbc 88 /*! @brief LPUART stop bit count. */
AnnaBridge 171:3a7713b1edbc 89 typedef enum _lpuart_stop_bit_count
AnnaBridge 171:3a7713b1edbc 90 {
AnnaBridge 171:3a7713b1edbc 91 kLPUART_OneStopBit = 0U, /*!< One stop bit */
AnnaBridge 171:3a7713b1edbc 92 kLPUART_TwoStopBit = 1U, /*!< Two stop bits */
AnnaBridge 171:3a7713b1edbc 93 } lpuart_stop_bit_count_t;
AnnaBridge 171:3a7713b1edbc 94
AnnaBridge 171:3a7713b1edbc 95 /*!
AnnaBridge 171:3a7713b1edbc 96 * @brief LPUART interrupt configuration structure, default settings all disabled.
AnnaBridge 171:3a7713b1edbc 97 *
AnnaBridge 171:3a7713b1edbc 98 * This structure contains the settings for all LPUART interrupt configurations.
AnnaBridge 171:3a7713b1edbc 99 */
AnnaBridge 171:3a7713b1edbc 100 enum _lpuart_interrupt_enable
AnnaBridge 171:3a7713b1edbc 101 {
AnnaBridge 171:3a7713b1edbc 102 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
AnnaBridge 171:3a7713b1edbc 103 kLPUART_LinBreakInterruptEnable = (LPUART_BAUD_LBKDIE_MASK >> 8), /*!< LIN break detect. */
AnnaBridge 171:3a7713b1edbc 104 #endif
AnnaBridge 171:3a7713b1edbc 105 kLPUART_RxActiveEdgeInterruptEnable = (LPUART_BAUD_RXEDGIE_MASK >> 8), /*!< Receive Active Edge. */
AnnaBridge 171:3a7713b1edbc 106 kLPUART_TxDataRegEmptyInterruptEnable = (LPUART_CTRL_TIE_MASK), /*!< Transmit data register empty. */
AnnaBridge 171:3a7713b1edbc 107 kLPUART_TransmissionCompleteInterruptEnable = (LPUART_CTRL_TCIE_MASK), /*!< Transmission complete. */
AnnaBridge 171:3a7713b1edbc 108 kLPUART_RxDataRegFullInterruptEnable = (LPUART_CTRL_RIE_MASK), /*!< Receiver data register full. */
AnnaBridge 171:3a7713b1edbc 109 kLPUART_IdleLineInterruptEnable = (LPUART_CTRL_ILIE_MASK), /*!< Idle line. */
AnnaBridge 171:3a7713b1edbc 110 kLPUART_RxOverrunInterruptEnable = (LPUART_CTRL_ORIE_MASK), /*!< Receiver Overrun. */
AnnaBridge 171:3a7713b1edbc 111 kLPUART_NoiseErrorInterruptEnable = (LPUART_CTRL_NEIE_MASK), /*!< Noise error flag. */
AnnaBridge 171:3a7713b1edbc 112 kLPUART_FramingErrorInterruptEnable = (LPUART_CTRL_FEIE_MASK), /*!< Framing error flag. */
AnnaBridge 171:3a7713b1edbc 113 kLPUART_ParityErrorInterruptEnable = (LPUART_CTRL_PEIE_MASK), /*!< Parity error flag. */
AnnaBridge 171:3a7713b1edbc 114 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
AnnaBridge 171:3a7713b1edbc 115 kLPUART_TxFifoOverflowInterruptEnable = (LPUART_FIFO_TXOFE_MASK >> 8), /*!< Transmit FIFO Overflow. */
AnnaBridge 171:3a7713b1edbc 116 kLPUART_RxFifoUnderflowInterruptEnable = (LPUART_FIFO_RXUFE_MASK >> 8), /*!< Receive FIFO Underflow. */
AnnaBridge 171:3a7713b1edbc 117 #endif
AnnaBridge 171:3a7713b1edbc 118 };
AnnaBridge 171:3a7713b1edbc 119
AnnaBridge 171:3a7713b1edbc 120 /*!
AnnaBridge 171:3a7713b1edbc 121 * @brief LPUART status flags.
AnnaBridge 171:3a7713b1edbc 122 *
AnnaBridge 171:3a7713b1edbc 123 * This provides constants for the LPUART status flags for use in the LPUART functions.
AnnaBridge 171:3a7713b1edbc 124 */
AnnaBridge 171:3a7713b1edbc 125 enum _lpuart_flags
AnnaBridge 171:3a7713b1edbc 126 {
AnnaBridge 171:3a7713b1edbc 127 kLPUART_TxDataRegEmptyFlag =
AnnaBridge 171:3a7713b1edbc 128 (LPUART_STAT_TDRE_MASK), /*!< Transmit data register empty flag, sets when transmit buffer is empty */
AnnaBridge 171:3a7713b1edbc 129 kLPUART_TransmissionCompleteFlag =
AnnaBridge 171:3a7713b1edbc 130 (LPUART_STAT_TC_MASK), /*!< Transmission complete flag, sets when transmission activity complete */
AnnaBridge 171:3a7713b1edbc 131 kLPUART_RxDataRegFullFlag =
AnnaBridge 171:3a7713b1edbc 132 (LPUART_STAT_RDRF_MASK), /*!< Receive data register full flag, sets when the receive data buffer is full */
AnnaBridge 171:3a7713b1edbc 133 kLPUART_IdleLineFlag = (LPUART_STAT_IDLE_MASK), /*!< Idle line detect flag, sets when idle line detected */
AnnaBridge 171:3a7713b1edbc 134 kLPUART_RxOverrunFlag = (LPUART_STAT_OR_MASK), /*!< Receive Overrun, sets when new data is received before data is
AnnaBridge 171:3a7713b1edbc 135 read from receive register */
AnnaBridge 171:3a7713b1edbc 136 kLPUART_NoiseErrorFlag = (LPUART_STAT_NF_MASK), /*!< Receive takes 3 samples of each received bit. If any of these
AnnaBridge 171:3a7713b1edbc 137 samples differ, noise flag sets */
AnnaBridge 171:3a7713b1edbc 138 kLPUART_FramingErrorFlag =
AnnaBridge 171:3a7713b1edbc 139 (LPUART_STAT_FE_MASK), /*!< Frame error flag, sets if logic 0 was detected where stop bit expected */
AnnaBridge 171:3a7713b1edbc 140 kLPUART_ParityErrorFlag = (LPUART_STAT_PF_MASK), /*!< If parity enabled, sets upon parity error detection */
AnnaBridge 171:3a7713b1edbc 141 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
AnnaBridge 171:3a7713b1edbc 142 kLPUART_LinBreakFlag = (LPUART_STAT_LBKDIF_MASK), /*!< LIN break detect interrupt flag, sets when LIN break char
AnnaBridge 171:3a7713b1edbc 143 detected and LIN circuit enabled */
AnnaBridge 171:3a7713b1edbc 144 #endif
AnnaBridge 171:3a7713b1edbc 145 kLPUART_RxActiveEdgeFlag =
AnnaBridge 171:3a7713b1edbc 146 (LPUART_STAT_RXEDGIF_MASK), /*!< Receive pin active edge interrupt flag, sets when active edge detected */
AnnaBridge 171:3a7713b1edbc 147 kLPUART_RxActiveFlag =
AnnaBridge 171:3a7713b1edbc 148 (LPUART_STAT_RAF_MASK), /*!< Receiver Active Flag (RAF), sets at beginning of valid start bit */
AnnaBridge 171:3a7713b1edbc 149 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
AnnaBridge 171:3a7713b1edbc 150 kLPUART_DataMatch1Flag = LPUART_STAT_MA1F_MASK, /*!< The next character to be read from LPUART_DATA matches MA1*/
AnnaBridge 171:3a7713b1edbc 151 kLPUART_DataMatch2Flag = LPUART_STAT_MA2F_MASK, /*!< The next character to be read from LPUART_DATA matches MA2*/
AnnaBridge 171:3a7713b1edbc 152 #endif
AnnaBridge 171:3a7713b1edbc 153 #if defined(FSL_FEATURE_LPUART_HAS_EXTENDED_DATA_REGISTER_FLAGS) && FSL_FEATURE_LPUART_HAS_EXTENDED_DATA_REGISTER_FLAGS
AnnaBridge 171:3a7713b1edbc 154 kLPUART_NoiseErrorInRxDataRegFlag =
AnnaBridge 171:3a7713b1edbc 155 (LPUART_DATA_NOISY_MASK >> 10), /*!< NOISY bit, sets if noise detected in current data word */
AnnaBridge 171:3a7713b1edbc 156 kLPUART_ParityErrorInRxDataRegFlag =
AnnaBridge 171:3a7713b1edbc 157 (LPUART_DATA_PARITYE_MASK >> 10), /*!< PARITYE bit, sets if noise detected in current data word */
AnnaBridge 171:3a7713b1edbc 158 #endif
AnnaBridge 171:3a7713b1edbc 159 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
AnnaBridge 171:3a7713b1edbc 160 kLPUART_TxFifoEmptyFlag = (LPUART_FIFO_TXEMPT_MASK >> 16), /*!< TXEMPT bit, sets if transmit buffer is empty */
AnnaBridge 171:3a7713b1edbc 161 kLPUART_RxFifoEmptyFlag = (LPUART_FIFO_RXEMPT_MASK >> 16), /*!< RXEMPT bit, sets if receive buffer is empty */
AnnaBridge 171:3a7713b1edbc 162 kLPUART_TxFifoOverflowFlag =
AnnaBridge 171:3a7713b1edbc 163 (LPUART_FIFO_TXOF_MASK >> 16), /*!< TXOF bit, sets if transmit buffer overflow occurred */
AnnaBridge 171:3a7713b1edbc 164 kLPUART_RxFifoUnderflowFlag =
AnnaBridge 171:3a7713b1edbc 165 (LPUART_FIFO_RXUF_MASK >> 16), /*!< RXUF bit, sets if receive buffer underflow occurred */
AnnaBridge 171:3a7713b1edbc 166 #endif
AnnaBridge 171:3a7713b1edbc 167 };
AnnaBridge 171:3a7713b1edbc 168
AnnaBridge 171:3a7713b1edbc 169 /*! @brief LPUART configuration structure. */
AnnaBridge 171:3a7713b1edbc 170 typedef struct _lpuart_config
AnnaBridge 171:3a7713b1edbc 171 {
AnnaBridge 171:3a7713b1edbc 172 uint32_t baudRate_Bps; /*!< LPUART baud rate */
AnnaBridge 171:3a7713b1edbc 173 lpuart_parity_mode_t parityMode; /*!< Parity mode, disabled (default), even, odd */
AnnaBridge 171:3a7713b1edbc 174 lpuart_data_bits_t dataBitsCount; /*!< Data bits count, eight (default), seven */
AnnaBridge 171:3a7713b1edbc 175 bool isMsb; /*!< Data bits order, LSB (default), MSB */
AnnaBridge 171:3a7713b1edbc 176 #if defined(FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT) && FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT
AnnaBridge 171:3a7713b1edbc 177 lpuart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits */
AnnaBridge 171:3a7713b1edbc 178 #endif
AnnaBridge 171:3a7713b1edbc 179 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
AnnaBridge 171:3a7713b1edbc 180 uint8_t txFifoWatermark; /*!< TX FIFO watermark */
AnnaBridge 171:3a7713b1edbc 181 uint8_t rxFifoWatermark; /*!< RX FIFO watermark */
AnnaBridge 171:3a7713b1edbc 182 #endif
AnnaBridge 171:3a7713b1edbc 183 bool enableTx; /*!< Enable TX */
AnnaBridge 171:3a7713b1edbc 184 bool enableRx; /*!< Enable RX */
AnnaBridge 171:3a7713b1edbc 185 } lpuart_config_t;
AnnaBridge 171:3a7713b1edbc 186
AnnaBridge 171:3a7713b1edbc 187 /*! @brief LPUART transfer structure. */
AnnaBridge 171:3a7713b1edbc 188 typedef struct _lpuart_transfer
AnnaBridge 171:3a7713b1edbc 189 {
AnnaBridge 171:3a7713b1edbc 190 uint8_t *data; /*!< The buffer of data to be transfer.*/
AnnaBridge 171:3a7713b1edbc 191 size_t dataSize; /*!< The byte count to be transfer. */
AnnaBridge 171:3a7713b1edbc 192 } lpuart_transfer_t;
AnnaBridge 171:3a7713b1edbc 193
AnnaBridge 171:3a7713b1edbc 194 /* Forward declaration of the handle typedef. */
AnnaBridge 171:3a7713b1edbc 195 typedef struct _lpuart_handle lpuart_handle_t;
AnnaBridge 171:3a7713b1edbc 196
AnnaBridge 171:3a7713b1edbc 197 /*! @brief LPUART transfer callback function. */
AnnaBridge 171:3a7713b1edbc 198 typedef void (*lpuart_transfer_callback_t)(LPUART_Type *base, lpuart_handle_t *handle, status_t status, void *userData);
AnnaBridge 171:3a7713b1edbc 199
AnnaBridge 171:3a7713b1edbc 200 /*! @brief LPUART handle structure. */
AnnaBridge 171:3a7713b1edbc 201 struct _lpuart_handle
AnnaBridge 171:3a7713b1edbc 202 {
AnnaBridge 171:3a7713b1edbc 203 uint8_t *volatile txData; /*!< Address of remaining data to send. */
AnnaBridge 171:3a7713b1edbc 204 volatile size_t txDataSize; /*!< Size of the remaining data to send. */
AnnaBridge 171:3a7713b1edbc 205 size_t txDataSizeAll; /*!< Size of the data to send out. */
AnnaBridge 171:3a7713b1edbc 206 uint8_t *volatile rxData; /*!< Address of remaining data to receive. */
AnnaBridge 171:3a7713b1edbc 207 volatile size_t rxDataSize; /*!< Size of the remaining data to receive. */
AnnaBridge 171:3a7713b1edbc 208 size_t rxDataSizeAll; /*!< Size of the data to receive. */
AnnaBridge 171:3a7713b1edbc 209
AnnaBridge 171:3a7713b1edbc 210 uint8_t *rxRingBuffer; /*!< Start address of the receiver ring buffer. */
AnnaBridge 171:3a7713b1edbc 211 size_t rxRingBufferSize; /*!< Size of the ring buffer. */
AnnaBridge 171:3a7713b1edbc 212 volatile uint16_t rxRingBufferHead; /*!< Index for the driver to store received data into ring buffer. */
AnnaBridge 171:3a7713b1edbc 213 volatile uint16_t rxRingBufferTail; /*!< Index for the user to get data from the ring buffer. */
AnnaBridge 171:3a7713b1edbc 214
AnnaBridge 171:3a7713b1edbc 215 lpuart_transfer_callback_t callback; /*!< Callback function. */
AnnaBridge 171:3a7713b1edbc 216 void *userData; /*!< LPUART callback function parameter.*/
AnnaBridge 171:3a7713b1edbc 217
AnnaBridge 171:3a7713b1edbc 218 volatile uint8_t txState; /*!< TX transfer state. */
AnnaBridge 171:3a7713b1edbc 219 volatile uint8_t rxState; /*!< RX transfer state. */
AnnaBridge 171:3a7713b1edbc 220
AnnaBridge 171:3a7713b1edbc 221 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
AnnaBridge 171:3a7713b1edbc 222 bool isSevenDataBits; /*!< Seven data bits flag. */
AnnaBridge 171:3a7713b1edbc 223 #endif
AnnaBridge 171:3a7713b1edbc 224 };
AnnaBridge 171:3a7713b1edbc 225
AnnaBridge 171:3a7713b1edbc 226 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 227 * API
AnnaBridge 171:3a7713b1edbc 228 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 229
AnnaBridge 171:3a7713b1edbc 230 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 231 extern "C" {
AnnaBridge 171:3a7713b1edbc 232 #endif /* _cplusplus */
AnnaBridge 171:3a7713b1edbc 233
AnnaBridge 171:3a7713b1edbc 234 #if defined(FSL_FEATURE_LPUART_HAS_GLOBAL) && FSL_FEATURE_LPUART_HAS_GLOBAL
AnnaBridge 171:3a7713b1edbc 235
AnnaBridge 171:3a7713b1edbc 236 /*!
AnnaBridge 171:3a7713b1edbc 237 * @name Software Reset
AnnaBridge 171:3a7713b1edbc 238 * @{
AnnaBridge 171:3a7713b1edbc 239 */
AnnaBridge 171:3a7713b1edbc 240
AnnaBridge 171:3a7713b1edbc 241 /*!
AnnaBridge 171:3a7713b1edbc 242 * @brief Resets the LPUART using software.
AnnaBridge 171:3a7713b1edbc 243 *
AnnaBridge 171:3a7713b1edbc 244 * This function resets all internal logic and registers except the Global Register.
AnnaBridge 171:3a7713b1edbc 245 * Remains set until cleared by software.
AnnaBridge 171:3a7713b1edbc 246 *
AnnaBridge 171:3a7713b1edbc 247 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 248 */
AnnaBridge 171:3a7713b1edbc 249 static inline void LPUART_SoftwareReset(LPUART_Type *base)
AnnaBridge 171:3a7713b1edbc 250 {
AnnaBridge 171:3a7713b1edbc 251 base->GLOBAL |= LPUART_GLOBAL_RST_MASK;
AnnaBridge 171:3a7713b1edbc 252 base->GLOBAL &= ~LPUART_GLOBAL_RST_MASK;
AnnaBridge 171:3a7713b1edbc 253 }
AnnaBridge 171:3a7713b1edbc 254 /* @} */
AnnaBridge 171:3a7713b1edbc 255 #endif /*FSL_FEATURE_LPUART_HAS_GLOBAL*/
AnnaBridge 171:3a7713b1edbc 256
AnnaBridge 171:3a7713b1edbc 257 /*!
AnnaBridge 171:3a7713b1edbc 258 * @name Initialization and deinitialization
AnnaBridge 171:3a7713b1edbc 259 * @{
AnnaBridge 171:3a7713b1edbc 260 */
AnnaBridge 171:3a7713b1edbc 261
AnnaBridge 171:3a7713b1edbc 262 /*!
AnnaBridge 171:3a7713b1edbc 263 * @brief Initializes an LPUART instance with the user configuration structure and the peripheral clock.
AnnaBridge 171:3a7713b1edbc 264 *
AnnaBridge 171:3a7713b1edbc 265 * This function configures the LPUART module with user-defined settings. Call the LPUART_GetDefaultConfig() function
AnnaBridge 171:3a7713b1edbc 266 * to configure the configuration structure and get the default configuration.
AnnaBridge 171:3a7713b1edbc 267 * The example below shows how to use this API to configure the LPUART.
AnnaBridge 171:3a7713b1edbc 268 * @code
AnnaBridge 171:3a7713b1edbc 269 * lpuart_config_t lpuartConfig;
AnnaBridge 171:3a7713b1edbc 270 * lpuartConfig.baudRate_Bps = 115200U;
AnnaBridge 171:3a7713b1edbc 271 * lpuartConfig.parityMode = kLPUART_ParityDisabled;
AnnaBridge 171:3a7713b1edbc 272 * lpuartConfig.dataBitsCount = kLPUART_EightDataBits;
AnnaBridge 171:3a7713b1edbc 273 * lpuartConfig.isMsb = false;
AnnaBridge 171:3a7713b1edbc 274 * lpuartConfig.stopBitCount = kLPUART_OneStopBit;
AnnaBridge 171:3a7713b1edbc 275 * lpuartConfig.txFifoWatermark = 0;
AnnaBridge 171:3a7713b1edbc 276 * lpuartConfig.rxFifoWatermark = 1;
AnnaBridge 171:3a7713b1edbc 277 * LPUART_Init(LPUART1, &lpuartConfig, 20000000U);
AnnaBridge 171:3a7713b1edbc 278 * @endcode
AnnaBridge 171:3a7713b1edbc 279 *
AnnaBridge 171:3a7713b1edbc 280 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 281 * @param config Pointer to a user-defined configuration structure.
AnnaBridge 171:3a7713b1edbc 282 * @param srcClock_Hz LPUART clock source frequency in HZ.
AnnaBridge 171:3a7713b1edbc 283 * @retval kStatus_LPUART_BaudrateNotSupport Baudrate is not support in current clock source.
AnnaBridge 171:3a7713b1edbc 284 * @retval kStatus_Success LPUART initialize succeed
AnnaBridge 171:3a7713b1edbc 285 */
AnnaBridge 171:3a7713b1edbc 286 status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz);
AnnaBridge 171:3a7713b1edbc 287
AnnaBridge 171:3a7713b1edbc 288 /*!
AnnaBridge 171:3a7713b1edbc 289 * @brief Deinitializes a LPUART instance.
AnnaBridge 171:3a7713b1edbc 290 *
AnnaBridge 171:3a7713b1edbc 291 * This function waits for transmit to complete, disables TX and RX, and disables the LPUART clock.
AnnaBridge 171:3a7713b1edbc 292 *
AnnaBridge 171:3a7713b1edbc 293 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 294 */
AnnaBridge 171:3a7713b1edbc 295 void LPUART_Deinit(LPUART_Type *base);
AnnaBridge 171:3a7713b1edbc 296
AnnaBridge 171:3a7713b1edbc 297 /*!
AnnaBridge 171:3a7713b1edbc 298 * @brief Gets the default configuration structure.
AnnaBridge 171:3a7713b1edbc 299 *
AnnaBridge 171:3a7713b1edbc 300 * This function initializes the LPUART configuration structure to a default value. The default
AnnaBridge 171:3a7713b1edbc 301 * values are:
AnnaBridge 171:3a7713b1edbc 302 * lpuartConfig->baudRate_Bps = 115200U;
AnnaBridge 171:3a7713b1edbc 303 * lpuartConfig->parityMode = kLPUART_ParityDisabled;
AnnaBridge 171:3a7713b1edbc 304 * lpuartConfig->dataBitsCount = kLPUART_EightDataBits;
AnnaBridge 171:3a7713b1edbc 305 * lpuartConfig->isMsb = false;
AnnaBridge 171:3a7713b1edbc 306 * lpuartConfig->stopBitCount = kLPUART_OneStopBit;
AnnaBridge 171:3a7713b1edbc 307 * lpuartConfig->txFifoWatermark = 0;
AnnaBridge 171:3a7713b1edbc 308 * lpuartConfig->rxFifoWatermark = 1;
AnnaBridge 171:3a7713b1edbc 309 * lpuartConfig->enableTx = false;
AnnaBridge 171:3a7713b1edbc 310 * lpuartConfig->enableRx = false;
AnnaBridge 171:3a7713b1edbc 311 *
AnnaBridge 171:3a7713b1edbc 312 * @param config Pointer to a configuration structure.
AnnaBridge 171:3a7713b1edbc 313 */
AnnaBridge 171:3a7713b1edbc 314 void LPUART_GetDefaultConfig(lpuart_config_t *config);
AnnaBridge 171:3a7713b1edbc 315
AnnaBridge 171:3a7713b1edbc 316 /*!
AnnaBridge 171:3a7713b1edbc 317 * @brief Sets the LPUART instance baudrate.
AnnaBridge 171:3a7713b1edbc 318 *
AnnaBridge 171:3a7713b1edbc 319 * This function configures the LPUART module baudrate. This function is used to update
AnnaBridge 171:3a7713b1edbc 320 * the LPUART module baudrate after the LPUART module is initialized by the LPUART_Init.
AnnaBridge 171:3a7713b1edbc 321 * @code
AnnaBridge 171:3a7713b1edbc 322 * LPUART_SetBaudRate(LPUART1, 115200U, 20000000U);
AnnaBridge 171:3a7713b1edbc 323 * @endcode
AnnaBridge 171:3a7713b1edbc 324 *
AnnaBridge 171:3a7713b1edbc 325 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 326 * @param baudRate_Bps LPUART baudrate to be set.
AnnaBridge 171:3a7713b1edbc 327 * @param srcClock_Hz LPUART clock source frequency in HZ.
AnnaBridge 171:3a7713b1edbc 328 * @retval kStatus_LPUART_BaudrateNotSupport Baudrate is not supported in the current clock source.
AnnaBridge 171:3a7713b1edbc 329 * @retval kStatus_Success Set baudrate succeeded.
AnnaBridge 171:3a7713b1edbc 330 */
AnnaBridge 171:3a7713b1edbc 331 status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
AnnaBridge 171:3a7713b1edbc 332
AnnaBridge 171:3a7713b1edbc 333 /* @} */
AnnaBridge 171:3a7713b1edbc 334
AnnaBridge 171:3a7713b1edbc 335 /*!
AnnaBridge 171:3a7713b1edbc 336 * @name Status
AnnaBridge 171:3a7713b1edbc 337 * @{
AnnaBridge 171:3a7713b1edbc 338 */
AnnaBridge 171:3a7713b1edbc 339
AnnaBridge 171:3a7713b1edbc 340 /*!
AnnaBridge 171:3a7713b1edbc 341 * @brief Gets LPUART status flags.
AnnaBridge 171:3a7713b1edbc 342 *
AnnaBridge 171:3a7713b1edbc 343 * This function gets all LPUART status flags. The flags are returned as the logical
AnnaBridge 171:3a7713b1edbc 344 * OR value of the enumerators @ref _lpuart_flags. To check for a specific status,
AnnaBridge 171:3a7713b1edbc 345 * compare the return value with enumerators in the @ref _lpuart_flags.
AnnaBridge 171:3a7713b1edbc 346 * For example, to check whether the TX is empty:
AnnaBridge 171:3a7713b1edbc 347 * @code
AnnaBridge 171:3a7713b1edbc 348 * if (kLPUART_TxDataRegEmptyFlag & LPUART_GetStatusFlags(LPUART1))
AnnaBridge 171:3a7713b1edbc 349 * {
AnnaBridge 171:3a7713b1edbc 350 * ...
AnnaBridge 171:3a7713b1edbc 351 * }
AnnaBridge 171:3a7713b1edbc 352 * @endcode
AnnaBridge 171:3a7713b1edbc 353 *
AnnaBridge 171:3a7713b1edbc 354 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 355 * @return LPUART status flags which are ORed by the enumerators in the _lpuart_flags.
AnnaBridge 171:3a7713b1edbc 356 */
AnnaBridge 171:3a7713b1edbc 357 uint32_t LPUART_GetStatusFlags(LPUART_Type *base);
AnnaBridge 171:3a7713b1edbc 358
AnnaBridge 171:3a7713b1edbc 359 /*!
AnnaBridge 171:3a7713b1edbc 360 * @brief Clears status flags with a provided mask.
AnnaBridge 171:3a7713b1edbc 361 *
AnnaBridge 171:3a7713b1edbc 362 * This function clears LPUART status flags with a provided mask. Automatically cleared flags
AnnaBridge 171:3a7713b1edbc 363 * can't be cleared by this function.
AnnaBridge 171:3a7713b1edbc 364 * Flags that can only cleared or set by hardware are:
AnnaBridge 171:3a7713b1edbc 365 * kLPUART_TxDataRegEmptyFlag, kLPUART_TransmissionCompleteFlag, kLPUART_RxDataRegFullFlag,
AnnaBridge 171:3a7713b1edbc 366 * kLPUART_RxActiveFlag, kLPUART_NoiseErrorInRxDataRegFlag, kLPUART_ParityErrorInRxDataRegFlag,
AnnaBridge 171:3a7713b1edbc 367 * kLPUART_TxFifoEmptyFlag,kLPUART_RxFifoEmptyFlag
AnnaBridge 171:3a7713b1edbc 368 * Note: This API should be called when the Tx/Rx is idle, otherwise it takes no effects.
AnnaBridge 171:3a7713b1edbc 369 *
AnnaBridge 171:3a7713b1edbc 370 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 371 * @param mask the status flags to be cleared. The user can use the enumerators in the
AnnaBridge 171:3a7713b1edbc 372 * _lpuart_status_flag_t to do the OR operation and get the mask.
AnnaBridge 171:3a7713b1edbc 373 * @return 0 succeed, others failed.
AnnaBridge 171:3a7713b1edbc 374 * @retval kStatus_LPUART_FlagCannotClearManually The flag can't be cleared by this function but
AnnaBridge 171:3a7713b1edbc 375 * it is cleared automatically by hardware.
AnnaBridge 171:3a7713b1edbc 376 * @retval kStatus_Success Status in the mask are cleared.
AnnaBridge 171:3a7713b1edbc 377 */
AnnaBridge 171:3a7713b1edbc 378 status_t LPUART_ClearStatusFlags(LPUART_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 379
AnnaBridge 171:3a7713b1edbc 380 /* @} */
AnnaBridge 171:3a7713b1edbc 381
AnnaBridge 171:3a7713b1edbc 382 /*!
AnnaBridge 171:3a7713b1edbc 383 * @name Interrupts
AnnaBridge 171:3a7713b1edbc 384 * @{
AnnaBridge 171:3a7713b1edbc 385 */
AnnaBridge 171:3a7713b1edbc 386
AnnaBridge 171:3a7713b1edbc 387 /*!
AnnaBridge 171:3a7713b1edbc 388 * @brief Enables LPUART interrupts according to a provided mask.
AnnaBridge 171:3a7713b1edbc 389 *
AnnaBridge 171:3a7713b1edbc 390 * This function enables the LPUART interrupts according to a provided mask. The mask
AnnaBridge 171:3a7713b1edbc 391 * is a logical OR of enumeration members. See the @ref _lpuart_interrupt_enable.
AnnaBridge 171:3a7713b1edbc 392 * This examples shows how to enable TX empty interrupt and RX full interrupt:
AnnaBridge 171:3a7713b1edbc 393 * @code
AnnaBridge 171:3a7713b1edbc 394 * LPUART_EnableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable);
AnnaBridge 171:3a7713b1edbc 395 * @endcode
AnnaBridge 171:3a7713b1edbc 396 *
AnnaBridge 171:3a7713b1edbc 397 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 398 * @param mask The interrupts to enable. Logical OR of @ref _uart_interrupt_enable.
AnnaBridge 171:3a7713b1edbc 399 */
AnnaBridge 171:3a7713b1edbc 400 void LPUART_EnableInterrupts(LPUART_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 401
AnnaBridge 171:3a7713b1edbc 402 /*!
AnnaBridge 171:3a7713b1edbc 403 * @brief Disables LPUART interrupts according to a provided mask.
AnnaBridge 171:3a7713b1edbc 404 *
AnnaBridge 171:3a7713b1edbc 405 * This function disables the LPUART interrupts according to a provided mask. The mask
AnnaBridge 171:3a7713b1edbc 406 * is a logical OR of enumeration members. See @ref _lpuart_interrupt_enable.
AnnaBridge 171:3a7713b1edbc 407 * This example shows how to disable the TX empty interrupt and RX full interrupt:
AnnaBridge 171:3a7713b1edbc 408 * @code
AnnaBridge 171:3a7713b1edbc 409 * LPUART_DisableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable);
AnnaBridge 171:3a7713b1edbc 410 * @endcode
AnnaBridge 171:3a7713b1edbc 411 *
AnnaBridge 171:3a7713b1edbc 412 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 413 * @param mask The interrupts to disable. Logical OR of @ref _lpuart_interrupt_enable.
AnnaBridge 171:3a7713b1edbc 414 */
AnnaBridge 171:3a7713b1edbc 415 void LPUART_DisableInterrupts(LPUART_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 416
AnnaBridge 171:3a7713b1edbc 417 /*!
AnnaBridge 171:3a7713b1edbc 418 * @brief Gets enabled LPUART interrupts.
AnnaBridge 171:3a7713b1edbc 419 *
AnnaBridge 171:3a7713b1edbc 420 * This function gets the enabled LPUART interrupts. The enabled interrupts are returned
AnnaBridge 171:3a7713b1edbc 421 * as the logical OR value of the enumerators @ref _lpuart_interrupt_enable. To check
AnnaBridge 171:3a7713b1edbc 422 * a specific interrupt enable status, compare the return value with enumerators
AnnaBridge 171:3a7713b1edbc 423 * in @ref _lpuart_interrupt_enable.
AnnaBridge 171:3a7713b1edbc 424 * For example, to check whether the TX empty interrupt is enabled:
AnnaBridge 171:3a7713b1edbc 425 * @code
AnnaBridge 171:3a7713b1edbc 426 * uint32_t enabledInterrupts = LPUART_GetEnabledInterrupts(LPUART1);
AnnaBridge 171:3a7713b1edbc 427 *
AnnaBridge 171:3a7713b1edbc 428 * if (kLPUART_TxDataRegEmptyInterruptEnable & enabledInterrupts)
AnnaBridge 171:3a7713b1edbc 429 * {
AnnaBridge 171:3a7713b1edbc 430 * ...
AnnaBridge 171:3a7713b1edbc 431 * }
AnnaBridge 171:3a7713b1edbc 432 * @endcode
AnnaBridge 171:3a7713b1edbc 433 *
AnnaBridge 171:3a7713b1edbc 434 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 435 * @return LPUART interrupt flags which are logical OR of the enumerators in @ref _lpuart_interrupt_enable.
AnnaBridge 171:3a7713b1edbc 436 */
AnnaBridge 171:3a7713b1edbc 437 uint32_t LPUART_GetEnabledInterrupts(LPUART_Type *base);
AnnaBridge 171:3a7713b1edbc 438
AnnaBridge 171:3a7713b1edbc 439 #if defined(FSL_FEATURE_LPUART_HAS_DMA_ENABLE) && FSL_FEATURE_LPUART_HAS_DMA_ENABLE
AnnaBridge 171:3a7713b1edbc 440 /*!
AnnaBridge 171:3a7713b1edbc 441 * @brief Gets the LPUART data register address.
AnnaBridge 171:3a7713b1edbc 442 *
AnnaBridge 171:3a7713b1edbc 443 * This function returns the LPUART data register address, which is mainly used by the DMA/eDMA.
AnnaBridge 171:3a7713b1edbc 444 *
AnnaBridge 171:3a7713b1edbc 445 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 446 * @return LPUART data register addresses which are used both by the transmitter and receiver.
AnnaBridge 171:3a7713b1edbc 447 */
AnnaBridge 171:3a7713b1edbc 448 static inline uint32_t LPUART_GetDataRegisterAddress(LPUART_Type *base)
AnnaBridge 171:3a7713b1edbc 449 {
AnnaBridge 171:3a7713b1edbc 450 return (uint32_t) & (base->DATA);
AnnaBridge 171:3a7713b1edbc 451 }
AnnaBridge 171:3a7713b1edbc 452
AnnaBridge 171:3a7713b1edbc 453 /*!
AnnaBridge 171:3a7713b1edbc 454 * @brief Enables or disables the LPUART transmitter DMA request.
AnnaBridge 171:3a7713b1edbc 455 *
AnnaBridge 171:3a7713b1edbc 456 * This function enables or disables the transmit data register empty flag, STAT[TDRE], to generate DMA requests.
AnnaBridge 171:3a7713b1edbc 457 *
AnnaBridge 171:3a7713b1edbc 458 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 459 * @param enable True to enable, false to disable.
AnnaBridge 171:3a7713b1edbc 460 */
AnnaBridge 171:3a7713b1edbc 461 static inline void LPUART_EnableTxDMA(LPUART_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 462 {
AnnaBridge 171:3a7713b1edbc 463 if (enable)
AnnaBridge 171:3a7713b1edbc 464 {
AnnaBridge 171:3a7713b1edbc 465 base->BAUD |= LPUART_BAUD_TDMAE_MASK;
AnnaBridge 171:3a7713b1edbc 466 base->CTRL |= LPUART_CTRL_TIE_MASK;
AnnaBridge 171:3a7713b1edbc 467 }
AnnaBridge 171:3a7713b1edbc 468 else
AnnaBridge 171:3a7713b1edbc 469 {
AnnaBridge 171:3a7713b1edbc 470 base->BAUD &= ~LPUART_BAUD_TDMAE_MASK;
AnnaBridge 171:3a7713b1edbc 471 base->CTRL &= ~LPUART_CTRL_TIE_MASK;
AnnaBridge 171:3a7713b1edbc 472 }
AnnaBridge 171:3a7713b1edbc 473 }
AnnaBridge 171:3a7713b1edbc 474
AnnaBridge 171:3a7713b1edbc 475 /*!
AnnaBridge 171:3a7713b1edbc 476 * @brief Enables or disables the LPUART receiver DMA.
AnnaBridge 171:3a7713b1edbc 477 *
AnnaBridge 171:3a7713b1edbc 478 * This function enables or disables the receiver data register full flag, STAT[RDRF], to generate DMA requests.
AnnaBridge 171:3a7713b1edbc 479 *
AnnaBridge 171:3a7713b1edbc 480 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 481 * @param enable True to enable, false to disable.
AnnaBridge 171:3a7713b1edbc 482 */
AnnaBridge 171:3a7713b1edbc 483 static inline void LPUART_EnableRxDMA(LPUART_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 484 {
AnnaBridge 171:3a7713b1edbc 485 if (enable)
AnnaBridge 171:3a7713b1edbc 486 {
AnnaBridge 171:3a7713b1edbc 487 base->BAUD |= LPUART_BAUD_RDMAE_MASK;
AnnaBridge 171:3a7713b1edbc 488 base->CTRL |= LPUART_CTRL_RIE_MASK;
AnnaBridge 171:3a7713b1edbc 489 }
AnnaBridge 171:3a7713b1edbc 490 else
AnnaBridge 171:3a7713b1edbc 491 {
AnnaBridge 171:3a7713b1edbc 492 base->BAUD &= ~LPUART_BAUD_RDMAE_MASK;
AnnaBridge 171:3a7713b1edbc 493 base->CTRL &= ~LPUART_CTRL_RIE_MASK;
AnnaBridge 171:3a7713b1edbc 494 }
AnnaBridge 171:3a7713b1edbc 495 }
AnnaBridge 171:3a7713b1edbc 496
AnnaBridge 171:3a7713b1edbc 497 /* @} */
AnnaBridge 171:3a7713b1edbc 498 #endif /* FSL_FEATURE_LPUART_HAS_DMA_ENABLE */
AnnaBridge 171:3a7713b1edbc 499
AnnaBridge 171:3a7713b1edbc 500 /*!
AnnaBridge 171:3a7713b1edbc 501 * @name Bus Operations
AnnaBridge 171:3a7713b1edbc 502 * @{
AnnaBridge 171:3a7713b1edbc 503 */
AnnaBridge 171:3a7713b1edbc 504
AnnaBridge 171:3a7713b1edbc 505 /*!
AnnaBridge 171:3a7713b1edbc 506 * @brief Enables or disables the LPUART transmitter.
AnnaBridge 171:3a7713b1edbc 507 *
AnnaBridge 171:3a7713b1edbc 508 * This function enables or disables the LPUART transmitter.
AnnaBridge 171:3a7713b1edbc 509 *
AnnaBridge 171:3a7713b1edbc 510 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 511 * @param enable True to enable, false to disable.
AnnaBridge 171:3a7713b1edbc 512 */
AnnaBridge 171:3a7713b1edbc 513 static inline void LPUART_EnableTx(LPUART_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 514 {
AnnaBridge 171:3a7713b1edbc 515 if (enable)
AnnaBridge 171:3a7713b1edbc 516 {
AnnaBridge 171:3a7713b1edbc 517 base->CTRL |= LPUART_CTRL_TE_MASK;
AnnaBridge 171:3a7713b1edbc 518 }
AnnaBridge 171:3a7713b1edbc 519 else
AnnaBridge 171:3a7713b1edbc 520 {
AnnaBridge 171:3a7713b1edbc 521 base->CTRL &= ~LPUART_CTRL_TE_MASK;
AnnaBridge 171:3a7713b1edbc 522 }
AnnaBridge 171:3a7713b1edbc 523 }
AnnaBridge 171:3a7713b1edbc 524
AnnaBridge 171:3a7713b1edbc 525 /*!
AnnaBridge 171:3a7713b1edbc 526 * @brief Enables or disables the LPUART receiver.
AnnaBridge 171:3a7713b1edbc 527 *
AnnaBridge 171:3a7713b1edbc 528 * This function enables or disables the LPUART receiver.
AnnaBridge 171:3a7713b1edbc 529 *
AnnaBridge 171:3a7713b1edbc 530 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 531 * @param enable True to enable, false to disable.
AnnaBridge 171:3a7713b1edbc 532 */
AnnaBridge 171:3a7713b1edbc 533 static inline void LPUART_EnableRx(LPUART_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 534 {
AnnaBridge 171:3a7713b1edbc 535 if (enable)
AnnaBridge 171:3a7713b1edbc 536 {
AnnaBridge 171:3a7713b1edbc 537 base->CTRL |= LPUART_CTRL_RE_MASK;
AnnaBridge 171:3a7713b1edbc 538 }
AnnaBridge 171:3a7713b1edbc 539 else
AnnaBridge 171:3a7713b1edbc 540 {
AnnaBridge 171:3a7713b1edbc 541 base->CTRL &= ~LPUART_CTRL_RE_MASK;
AnnaBridge 171:3a7713b1edbc 542 }
AnnaBridge 171:3a7713b1edbc 543 }
AnnaBridge 171:3a7713b1edbc 544
AnnaBridge 171:3a7713b1edbc 545 /*!
AnnaBridge 171:3a7713b1edbc 546 * @brief Writes to the transmitter register.
AnnaBridge 171:3a7713b1edbc 547 *
AnnaBridge 171:3a7713b1edbc 548 * This function writes data to the transmitter register directly. The upper layer must
AnnaBridge 171:3a7713b1edbc 549 * ensure that the TX register is empty or that the TX FIFO has room before calling this function.
AnnaBridge 171:3a7713b1edbc 550 *
AnnaBridge 171:3a7713b1edbc 551 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 552 * @param data Data write to the TX register.
AnnaBridge 171:3a7713b1edbc 553 */
AnnaBridge 171:3a7713b1edbc 554 static inline void LPUART_WriteByte(LPUART_Type *base, uint8_t data)
AnnaBridge 171:3a7713b1edbc 555 {
AnnaBridge 171:3a7713b1edbc 556 base->DATA = data;
AnnaBridge 171:3a7713b1edbc 557 }
AnnaBridge 171:3a7713b1edbc 558
AnnaBridge 171:3a7713b1edbc 559 /*!
AnnaBridge 171:3a7713b1edbc 560 * @brief Reads the receiver register.
AnnaBridge 171:3a7713b1edbc 561 *
AnnaBridge 171:3a7713b1edbc 562 * This function reads data from the receiver register directly. The upper layer must
AnnaBridge 171:3a7713b1edbc 563 * ensure that the receiver register is full or that the RX FIFO has data before calling this function.
AnnaBridge 171:3a7713b1edbc 564 *
AnnaBridge 171:3a7713b1edbc 565 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 566 * @return Data read from data register.
AnnaBridge 171:3a7713b1edbc 567 */
AnnaBridge 171:3a7713b1edbc 568 static inline uint8_t LPUART_ReadByte(LPUART_Type *base)
AnnaBridge 171:3a7713b1edbc 569 {
AnnaBridge 171:3a7713b1edbc 570 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
AnnaBridge 171:3a7713b1edbc 571 uint32_t ctrl = base->CTRL;
AnnaBridge 171:3a7713b1edbc 572 bool isSevenDataBits =
AnnaBridge 171:3a7713b1edbc 573 ((ctrl & LPUART_CTRL_M7_MASK) ||
AnnaBridge 171:3a7713b1edbc 574 ((!(ctrl & LPUART_CTRL_M7_MASK)) && (!(ctrl & LPUART_CTRL_M_MASK)) && (ctrl & LPUART_CTRL_PE_MASK)));
AnnaBridge 171:3a7713b1edbc 575
AnnaBridge 171:3a7713b1edbc 576 if (isSevenDataBits)
AnnaBridge 171:3a7713b1edbc 577 {
AnnaBridge 171:3a7713b1edbc 578 return (base->DATA & 0x7F);
AnnaBridge 171:3a7713b1edbc 579 }
AnnaBridge 171:3a7713b1edbc 580 else
AnnaBridge 171:3a7713b1edbc 581 {
AnnaBridge 171:3a7713b1edbc 582 return base->DATA;
AnnaBridge 171:3a7713b1edbc 583 }
AnnaBridge 171:3a7713b1edbc 584 #else
AnnaBridge 171:3a7713b1edbc 585 return base->DATA;
AnnaBridge 171:3a7713b1edbc 586 #endif
AnnaBridge 171:3a7713b1edbc 587 }
AnnaBridge 171:3a7713b1edbc 588
AnnaBridge 171:3a7713b1edbc 589 /*!
AnnaBridge 171:3a7713b1edbc 590 * @brief Writes to the transmitter register using a blocking method.
AnnaBridge 171:3a7713b1edbc 591 *
AnnaBridge 171:3a7713b1edbc 592 * This function polls the transmitter register, waits for the register to be empty or for TX FIFO to have
AnnaBridge 171:3a7713b1edbc 593 * room, and writes data to the transmitter buffer.
AnnaBridge 171:3a7713b1edbc 594 *
AnnaBridge 171:3a7713b1edbc 595 * @note This function does not check whether all data has been sent out to the bus.
AnnaBridge 171:3a7713b1edbc 596 * Before disabling the transmitter, check the kLPUART_TransmissionCompleteFlag to ensure that the transmit is
AnnaBridge 171:3a7713b1edbc 597 * finished.
AnnaBridge 171:3a7713b1edbc 598 *
AnnaBridge 171:3a7713b1edbc 599 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 600 * @param data Start address of the data to write.
AnnaBridge 171:3a7713b1edbc 601 * @param length Size of the data to write.
AnnaBridge 171:3a7713b1edbc 602 */
AnnaBridge 171:3a7713b1edbc 603 void LPUART_WriteBlocking(LPUART_Type *base, const uint8_t *data, size_t length);
AnnaBridge 171:3a7713b1edbc 604
AnnaBridge 171:3a7713b1edbc 605 /*!
AnnaBridge 171:3a7713b1edbc 606 * @brief Reads the receiver data register using a blocking method.
AnnaBridge 171:3a7713b1edbc 607 *
AnnaBridge 171:3a7713b1edbc 608 * This function polls the receiver register, waits for the receiver register full or receiver FIFO
AnnaBridge 171:3a7713b1edbc 609 * has data, and reads data from the TX register.
AnnaBridge 171:3a7713b1edbc 610 *
AnnaBridge 171:3a7713b1edbc 611 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 612 * @param data Start address of the buffer to store the received data.
AnnaBridge 171:3a7713b1edbc 613 * @param length Size of the buffer.
AnnaBridge 171:3a7713b1edbc 614 * @retval kStatus_LPUART_RxHardwareOverrun Receiver overrun happened while receiving data.
AnnaBridge 171:3a7713b1edbc 615 * @retval kStatus_LPUART_NoiseError Noise error happened while receiving data.
AnnaBridge 171:3a7713b1edbc 616 * @retval kStatus_LPUART_FramingError Framing error happened while receiving data.
AnnaBridge 171:3a7713b1edbc 617 * @retval kStatus_LPUART_ParityError Parity error happened while receiving data.
AnnaBridge 171:3a7713b1edbc 618 * @retval kStatus_Success Successfully received all data.
AnnaBridge 171:3a7713b1edbc 619 */
AnnaBridge 171:3a7713b1edbc 620 status_t LPUART_ReadBlocking(LPUART_Type *base, uint8_t *data, size_t length);
AnnaBridge 171:3a7713b1edbc 621
AnnaBridge 171:3a7713b1edbc 622 /* @} */
AnnaBridge 171:3a7713b1edbc 623
AnnaBridge 171:3a7713b1edbc 624 /*!
AnnaBridge 171:3a7713b1edbc 625 * @name Transactional
AnnaBridge 171:3a7713b1edbc 626 * @{
AnnaBridge 171:3a7713b1edbc 627 */
AnnaBridge 171:3a7713b1edbc 628
AnnaBridge 171:3a7713b1edbc 629 /*!
AnnaBridge 171:3a7713b1edbc 630 * @brief Initializes the LPUART handle.
AnnaBridge 171:3a7713b1edbc 631 *
AnnaBridge 171:3a7713b1edbc 632 * This function initializes the LPUART handle, which can be used for other LPUART
AnnaBridge 171:3a7713b1edbc 633 * transactional APIs. Usually, for a specified LPUART instance,
AnnaBridge 171:3a7713b1edbc 634 * call this API once to get the initialized handle.
AnnaBridge 171:3a7713b1edbc 635 *
AnnaBridge 171:3a7713b1edbc 636 * The LPUART driver supports the "background" receiving, which means that user can set up
AnnaBridge 171:3a7713b1edbc 637 * an RX ring buffer optionally. Data received is stored into the ring buffer even when the
AnnaBridge 171:3a7713b1edbc 638 * user doesn't call the LPUART_TransferReceiveNonBlocking() API. If there is already data received
AnnaBridge 171:3a7713b1edbc 639 * in the ring buffer, the user can get the received data from the ring buffer directly.
AnnaBridge 171:3a7713b1edbc 640 * The ring buffer is disabled if passing NULL as @p ringBuffer.
AnnaBridge 171:3a7713b1edbc 641 *
AnnaBridge 171:3a7713b1edbc 642 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 643 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 644 * @param callback Callback function.
AnnaBridge 171:3a7713b1edbc 645 * @param userData User data.
AnnaBridge 171:3a7713b1edbc 646 */
AnnaBridge 171:3a7713b1edbc 647 void LPUART_TransferCreateHandle(LPUART_Type *base,
AnnaBridge 171:3a7713b1edbc 648 lpuart_handle_t *handle,
AnnaBridge 171:3a7713b1edbc 649 lpuart_transfer_callback_t callback,
AnnaBridge 171:3a7713b1edbc 650 void *userData);
AnnaBridge 171:3a7713b1edbc 651 /*!
AnnaBridge 171:3a7713b1edbc 652 * @brief Transmits a buffer of data using the interrupt method.
AnnaBridge 171:3a7713b1edbc 653 *
AnnaBridge 171:3a7713b1edbc 654 * This function send data using an interrupt method. This is a non-blocking function, which
AnnaBridge 171:3a7713b1edbc 655 * returns directly without waiting for all data written to the transmitter register. When
AnnaBridge 171:3a7713b1edbc 656 * all data is written to the TX register in the ISR, the LPUART driver calls the callback
AnnaBridge 171:3a7713b1edbc 657 * function and passes the @ref kStatus_LPUART_TxIdle as status parameter.
AnnaBridge 171:3a7713b1edbc 658 *
AnnaBridge 171:3a7713b1edbc 659 * @note The kStatus_LPUART_TxIdle is passed to the upper layer when all data are written
AnnaBridge 171:3a7713b1edbc 660 * to the TX register. However, there is no check to ensure that all the data sent out. Before disabling the TX,
AnnaBridge 171:3a7713b1edbc 661 * check the kLPUART_TransmissionCompleteFlag to ensure that the transmit is finished.
AnnaBridge 171:3a7713b1edbc 662 *
AnnaBridge 171:3a7713b1edbc 663 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 664 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 665 * @param xfer LPUART transfer structure, see #lpuart_transfer_t.
AnnaBridge 171:3a7713b1edbc 666 * @retval kStatus_Success Successfully start the data transmission.
AnnaBridge 171:3a7713b1edbc 667 * @retval kStatus_LPUART_TxBusy Previous transmission still not finished, data not all written to the TX register.
AnnaBridge 171:3a7713b1edbc 668 * @retval kStatus_InvalidArgument Invalid argument.
AnnaBridge 171:3a7713b1edbc 669 */
AnnaBridge 171:3a7713b1edbc 670 status_t LPUART_TransferSendNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer);
AnnaBridge 171:3a7713b1edbc 671
AnnaBridge 171:3a7713b1edbc 672 /*!
AnnaBridge 171:3a7713b1edbc 673 * @brief Sets up the RX ring buffer.
AnnaBridge 171:3a7713b1edbc 674 *
AnnaBridge 171:3a7713b1edbc 675 * This function sets up the RX ring buffer to a specific UART handle.
AnnaBridge 171:3a7713b1edbc 676 *
AnnaBridge 171:3a7713b1edbc 677 * When the RX ring buffer is used, data received is stored into the ring buffer even when
AnnaBridge 171:3a7713b1edbc 678 * the user doesn't call the UART_TransferReceiveNonBlocking() API. If there is already data received
AnnaBridge 171:3a7713b1edbc 679 * in the ring buffer, the user can get the received data from the ring buffer directly.
AnnaBridge 171:3a7713b1edbc 680 *
AnnaBridge 171:3a7713b1edbc 681 * @note When using RX ring buffer, one byte is reserved for internal use. In other
AnnaBridge 171:3a7713b1edbc 682 * words, if @p ringBufferSize is 32, then only 31 bytes are used for saving data.
AnnaBridge 171:3a7713b1edbc 683 *
AnnaBridge 171:3a7713b1edbc 684 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 685 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 686 * @param ringBuffer Start address of ring buffer for background receiving. Pass NULL to disable the ring buffer.
AnnaBridge 171:3a7713b1edbc 687 * @param ringBufferSize size of the ring buffer.
AnnaBridge 171:3a7713b1edbc 688 */
AnnaBridge 171:3a7713b1edbc 689 void LPUART_TransferStartRingBuffer(LPUART_Type *base,
AnnaBridge 171:3a7713b1edbc 690 lpuart_handle_t *handle,
AnnaBridge 171:3a7713b1edbc 691 uint8_t *ringBuffer,
AnnaBridge 171:3a7713b1edbc 692 size_t ringBufferSize);
AnnaBridge 171:3a7713b1edbc 693
AnnaBridge 171:3a7713b1edbc 694 /*!
AnnaBridge 171:3a7713b1edbc 695 * @brief Aborts the background transfer and uninstalls the ring buffer.
AnnaBridge 171:3a7713b1edbc 696 *
AnnaBridge 171:3a7713b1edbc 697 * This function aborts the background transfer and uninstalls the ring buffer.
AnnaBridge 171:3a7713b1edbc 698 *
AnnaBridge 171:3a7713b1edbc 699 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 700 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 701 */
AnnaBridge 171:3a7713b1edbc 702 void LPUART_TransferStopRingBuffer(LPUART_Type *base, lpuart_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 703
AnnaBridge 171:3a7713b1edbc 704 /*!
AnnaBridge 171:3a7713b1edbc 705 * @brief Aborts the interrupt-driven data transmit.
AnnaBridge 171:3a7713b1edbc 706 *
AnnaBridge 171:3a7713b1edbc 707 * This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out
AnnaBridge 171:3a7713b1edbc 708 * how many bytes are not sent out.
AnnaBridge 171:3a7713b1edbc 709 *
AnnaBridge 171:3a7713b1edbc 710 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 711 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 712 */
AnnaBridge 171:3a7713b1edbc 713 void LPUART_TransferAbortSend(LPUART_Type *base, lpuart_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 714
AnnaBridge 171:3a7713b1edbc 715 /*!
AnnaBridge 171:3a7713b1edbc 716 * @brief Gets the number of bytes that have been written to the LPUART transmitter register.
AnnaBridge 171:3a7713b1edbc 717 *
AnnaBridge 171:3a7713b1edbc 718 * This function gets the number of bytes that have been written to LPUART TX
AnnaBridge 171:3a7713b1edbc 719 * register by an interrupt method.
AnnaBridge 171:3a7713b1edbc 720 *
AnnaBridge 171:3a7713b1edbc 721 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 722 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 723 * @param count Send bytes count.
AnnaBridge 171:3a7713b1edbc 724 * @retval kStatus_NoTransferInProgress No send in progress.
AnnaBridge 171:3a7713b1edbc 725 * @retval kStatus_InvalidArgument Parameter is invalid.
AnnaBridge 171:3a7713b1edbc 726 * @retval kStatus_Success Get successfully through the parameter \p count;
AnnaBridge 171:3a7713b1edbc 727 */
AnnaBridge 171:3a7713b1edbc 728 status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count);
AnnaBridge 171:3a7713b1edbc 729
AnnaBridge 171:3a7713b1edbc 730 /*!
AnnaBridge 171:3a7713b1edbc 731 * @brief Receives a buffer of data using the interrupt method.
AnnaBridge 171:3a7713b1edbc 732 *
AnnaBridge 171:3a7713b1edbc 733 * This function receives data using an interrupt method. This is a non-blocking function
AnnaBridge 171:3a7713b1edbc 734 * which returns without waiting to ensure that all data are received.
AnnaBridge 171:3a7713b1edbc 735 * If the RX ring buffer is used and not empty, the data in the ring buffer is copied and
AnnaBridge 171:3a7713b1edbc 736 * the parameter @p receivedBytes shows how many bytes are copied from the ring buffer.
AnnaBridge 171:3a7713b1edbc 737 * After copying, if the data in the ring buffer is not enough for read, the receive
AnnaBridge 171:3a7713b1edbc 738 * request is saved by the LPUART driver. When the new data arrives, the receive request
AnnaBridge 171:3a7713b1edbc 739 * is serviced first. When all data is received, the LPUART driver notifies the upper layer
AnnaBridge 171:3a7713b1edbc 740 * through a callback function and passes a status parameter @ref kStatus_UART_RxIdle.
AnnaBridge 171:3a7713b1edbc 741 * For example, the upper layer needs 10 bytes but there are only 5 bytes in ring buffer.
AnnaBridge 171:3a7713b1edbc 742 * The 5 bytes are copied to xfer->data, which returns with the
AnnaBridge 171:3a7713b1edbc 743 * parameter @p receivedBytes set to 5. For the remaining 5 bytes, the newly arrived data is
AnnaBridge 171:3a7713b1edbc 744 * saved from xfer->data[5]. When 5 bytes are received, the LPUART driver notifies the upper layer.
AnnaBridge 171:3a7713b1edbc 745 * If the RX ring buffer is not enabled, this function enables the RX and RX interrupt
AnnaBridge 171:3a7713b1edbc 746 * to receive data to xfer->data. When all data is received, the upper layer is notified.
AnnaBridge 171:3a7713b1edbc 747 *
AnnaBridge 171:3a7713b1edbc 748 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 749 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 750 * @param xfer LPUART transfer structure, see #uart_transfer_t.
AnnaBridge 171:3a7713b1edbc 751 * @param receivedBytes Bytes received from the ring buffer directly.
AnnaBridge 171:3a7713b1edbc 752 * @retval kStatus_Success Successfully queue the transfer into the transmit queue.
AnnaBridge 171:3a7713b1edbc 753 * @retval kStatus_LPUART_RxBusy Previous receive request is not finished.
AnnaBridge 171:3a7713b1edbc 754 * @retval kStatus_InvalidArgument Invalid argument.
AnnaBridge 171:3a7713b1edbc 755 */
AnnaBridge 171:3a7713b1edbc 756 status_t LPUART_TransferReceiveNonBlocking(LPUART_Type *base,
AnnaBridge 171:3a7713b1edbc 757 lpuart_handle_t *handle,
AnnaBridge 171:3a7713b1edbc 758 lpuart_transfer_t *xfer,
AnnaBridge 171:3a7713b1edbc 759 size_t *receivedBytes);
AnnaBridge 171:3a7713b1edbc 760
AnnaBridge 171:3a7713b1edbc 761 /*!
AnnaBridge 171:3a7713b1edbc 762 * @brief Aborts the interrupt-driven data receiving.
AnnaBridge 171:3a7713b1edbc 763 *
AnnaBridge 171:3a7713b1edbc 764 * This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out
AnnaBridge 171:3a7713b1edbc 765 * how many bytes not received yet.
AnnaBridge 171:3a7713b1edbc 766 *
AnnaBridge 171:3a7713b1edbc 767 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 768 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 769 */
AnnaBridge 171:3a7713b1edbc 770 void LPUART_TransferAbortReceive(LPUART_Type *base, lpuart_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 771
AnnaBridge 171:3a7713b1edbc 772 /*!
AnnaBridge 171:3a7713b1edbc 773 * @brief Gets the number of bytes that have been received.
AnnaBridge 171:3a7713b1edbc 774 *
AnnaBridge 171:3a7713b1edbc 775 * This function gets the number of bytes that have been received.
AnnaBridge 171:3a7713b1edbc 776 *
AnnaBridge 171:3a7713b1edbc 777 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 778 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 779 * @param count Receive bytes count.
AnnaBridge 171:3a7713b1edbc 780 * @retval kStatus_NoTransferInProgress No receive in progress.
AnnaBridge 171:3a7713b1edbc 781 * @retval kStatus_InvalidArgument Parameter is invalid.
AnnaBridge 171:3a7713b1edbc 782 * @retval kStatus_Success Get successfully through the parameter \p count;
AnnaBridge 171:3a7713b1edbc 783 */
AnnaBridge 171:3a7713b1edbc 784 status_t LPUART_TransferGetReceiveCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count);
AnnaBridge 171:3a7713b1edbc 785
AnnaBridge 171:3a7713b1edbc 786 /*!
AnnaBridge 171:3a7713b1edbc 787 * @brief LPUART IRQ handle function.
AnnaBridge 171:3a7713b1edbc 788 *
AnnaBridge 171:3a7713b1edbc 789 * This function handles the LPUART transmit and receive IRQ request.
AnnaBridge 171:3a7713b1edbc 790 *
AnnaBridge 171:3a7713b1edbc 791 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 792 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 793 */
AnnaBridge 171:3a7713b1edbc 794 void LPUART_TransferHandleIRQ(LPUART_Type *base, lpuart_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 795
AnnaBridge 171:3a7713b1edbc 796 /*!
AnnaBridge 171:3a7713b1edbc 797 * @brief LPUART Error IRQ handle function.
AnnaBridge 171:3a7713b1edbc 798 *
AnnaBridge 171:3a7713b1edbc 799 * This function handles the LPUART error IRQ request.
AnnaBridge 171:3a7713b1edbc 800 *
AnnaBridge 171:3a7713b1edbc 801 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 802 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 803 */
AnnaBridge 171:3a7713b1edbc 804 void LPUART_TransferHandleErrorIRQ(LPUART_Type *base, lpuart_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 805
AnnaBridge 171:3a7713b1edbc 806 /* @} */
AnnaBridge 171:3a7713b1edbc 807
AnnaBridge 171:3a7713b1edbc 808 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 809 }
AnnaBridge 171:3a7713b1edbc 810 #endif
AnnaBridge 171:3a7713b1edbc 811
AnnaBridge 171:3a7713b1edbc 812 /*! @}*/
AnnaBridge 171:3a7713b1edbc 813
AnnaBridge 171:3a7713b1edbc 814 #endif /* _FSL_LPUART_H_ */