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TARGET_DISCO_F334C8/TOOLCHAIN_GCC_ARM/stm32f3xx_ll_system.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 163:e59c8e839560 | 1 | /** |
AnnaBridge | 163:e59c8e839560 | 2 | ****************************************************************************** |
AnnaBridge | 163:e59c8e839560 | 3 | * @file stm32f3xx_ll_system.h |
AnnaBridge | 163:e59c8e839560 | 4 | * @author MCD Application Team |
AnnaBridge | 163:e59c8e839560 | 5 | * @brief Header file of SYSTEM LL module. |
AnnaBridge | 163:e59c8e839560 | 6 | @verbatim |
AnnaBridge | 163:e59c8e839560 | 7 | ============================================================================== |
AnnaBridge | 163:e59c8e839560 | 8 | ##### How to use this driver ##### |
AnnaBridge | 163:e59c8e839560 | 9 | ============================================================================== |
AnnaBridge | 163:e59c8e839560 | 10 | [..] |
AnnaBridge | 163:e59c8e839560 | 11 | The LL SYSTEM driver contains a set of generic APIs that can be |
AnnaBridge | 163:e59c8e839560 | 12 | used by user: |
AnnaBridge | 163:e59c8e839560 | 13 | (+) Some of the FLASH features need to be handled in the SYSTEM file. |
AnnaBridge | 163:e59c8e839560 | 14 | (+) Access to DBGCMU registers |
AnnaBridge | 163:e59c8e839560 | 15 | (+) Access to SYSCFG registers |
AnnaBridge | 163:e59c8e839560 | 16 | |
AnnaBridge | 163:e59c8e839560 | 17 | @endverbatim |
AnnaBridge | 163:e59c8e839560 | 18 | ****************************************************************************** |
AnnaBridge | 163:e59c8e839560 | 19 | * @attention |
AnnaBridge | 163:e59c8e839560 | 20 | * |
AnnaBridge | 163:e59c8e839560 | 21 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
AnnaBridge | 163:e59c8e839560 | 22 | * |
AnnaBridge | 163:e59c8e839560 | 23 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 163:e59c8e839560 | 24 | * are permitted provided that the following conditions are met: |
AnnaBridge | 163:e59c8e839560 | 25 | * 1. Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 163:e59c8e839560 | 26 | * this list of conditions and the following disclaimer. |
AnnaBridge | 163:e59c8e839560 | 27 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 163:e59c8e839560 | 28 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 163:e59c8e839560 | 29 | * and/or other materials provided with the distribution. |
AnnaBridge | 163:e59c8e839560 | 30 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
AnnaBridge | 163:e59c8e839560 | 31 | * may be used to endorse or promote products derived from this software |
AnnaBridge | 163:e59c8e839560 | 32 | * without specific prior written permission. |
AnnaBridge | 163:e59c8e839560 | 33 | * |
AnnaBridge | 163:e59c8e839560 | 34 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
AnnaBridge | 163:e59c8e839560 | 35 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
AnnaBridge | 163:e59c8e839560 | 36 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 163:e59c8e839560 | 37 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 163:e59c8e839560 | 38 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
AnnaBridge | 163:e59c8e839560 | 39 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
AnnaBridge | 163:e59c8e839560 | 40 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
AnnaBridge | 163:e59c8e839560 | 41 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
AnnaBridge | 163:e59c8e839560 | 42 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
AnnaBridge | 163:e59c8e839560 | 43 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 163:e59c8e839560 | 44 | * |
AnnaBridge | 163:e59c8e839560 | 45 | ****************************************************************************** |
AnnaBridge | 163:e59c8e839560 | 46 | */ |
AnnaBridge | 163:e59c8e839560 | 47 | |
AnnaBridge | 163:e59c8e839560 | 48 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 163:e59c8e839560 | 49 | #ifndef __STM32F3xx_LL_SYSTEM_H |
AnnaBridge | 163:e59c8e839560 | 50 | #define __STM32F3xx_LL_SYSTEM_H |
AnnaBridge | 163:e59c8e839560 | 51 | |
AnnaBridge | 163:e59c8e839560 | 52 | #ifdef __cplusplus |
AnnaBridge | 163:e59c8e839560 | 53 | extern "C" { |
AnnaBridge | 163:e59c8e839560 | 54 | #endif |
AnnaBridge | 163:e59c8e839560 | 55 | |
AnnaBridge | 163:e59c8e839560 | 56 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 163:e59c8e839560 | 57 | #include "stm32f3xx.h" |
AnnaBridge | 163:e59c8e839560 | 58 | |
AnnaBridge | 163:e59c8e839560 | 59 | /** @addtogroup STM32F3xx_LL_Driver |
AnnaBridge | 163:e59c8e839560 | 60 | * @{ |
AnnaBridge | 163:e59c8e839560 | 61 | */ |
AnnaBridge | 163:e59c8e839560 | 62 | |
AnnaBridge | 163:e59c8e839560 | 63 | #if defined (FLASH) || defined (SYSCFG) || defined (DBGMCU) |
AnnaBridge | 163:e59c8e839560 | 64 | |
AnnaBridge | 163:e59c8e839560 | 65 | /** @defgroup SYSTEM_LL SYSTEM |
AnnaBridge | 163:e59c8e839560 | 66 | * @{ |
AnnaBridge | 163:e59c8e839560 | 67 | */ |
AnnaBridge | 163:e59c8e839560 | 68 | |
AnnaBridge | 163:e59c8e839560 | 69 | /* Private types -------------------------------------------------------------*/ |
AnnaBridge | 163:e59c8e839560 | 70 | /* Private variables ---------------------------------------------------------*/ |
AnnaBridge | 163:e59c8e839560 | 71 | |
AnnaBridge | 163:e59c8e839560 | 72 | /* Private constants ---------------------------------------------------------*/ |
AnnaBridge | 163:e59c8e839560 | 73 | /** @defgroup SYSTEM_LL_Private_Constants SYSTEM Private Constants |
AnnaBridge | 163:e59c8e839560 | 74 | * @{ |
AnnaBridge | 163:e59c8e839560 | 75 | */ |
AnnaBridge | 163:e59c8e839560 | 76 | |
AnnaBridge | 163:e59c8e839560 | 77 | /* Offset used to access to SYSCFG_CFGR1 and SYSCFG_CFGR3 registers */ |
AnnaBridge | 168:b9e159c1930a | 78 | #define SYSCFG_OFFSET_CFGR1 0x00000000U |
AnnaBridge | 168:b9e159c1930a | 79 | #define SYSCFG_OFFSET_CFGR3 0x00000050U |
AnnaBridge | 163:e59c8e839560 | 80 | |
AnnaBridge | 163:e59c8e839560 | 81 | /* Mask used for TIM breaks functions */ |
AnnaBridge | 163:e59c8e839560 | 82 | #if defined(SYSCFG_CFGR2_PVD_LOCK) && defined(SYSCFG_CFGR2_SRAM_PARITY_LOCK) |
AnnaBridge | 163:e59c8e839560 | 83 | #define SYSCFG_MASK_TIM_BREAK (SYSCFG_CFGR2_LOCKUP_LOCK | SYSCFG_CFGR2_SRAM_PARITY_LOCK | SYSCFG_CFGR2_PVD_LOCK) |
AnnaBridge | 163:e59c8e839560 | 84 | #elif defined(SYSCFG_CFGR2_PVD_LOCK) && !defined(SYSCFG_CFGR2_SRAM_PARITY_LOCK) |
AnnaBridge | 163:e59c8e839560 | 85 | #define SYSCFG_MASK_TIM_BREAK (SYSCFG_CFGR2_LOCKUP_LOCK | SYSCFG_CFGR2_PVD_LOCK) |
AnnaBridge | 163:e59c8e839560 | 86 | #elif !defined(SYSCFG_CFGR2_PVD_LOCK) && defined(SYSCFG_CFGR2_SRAM_PARITY_LOCK) |
AnnaBridge | 163:e59c8e839560 | 87 | #define SYSCFG_MASK_TIM_BREAK (SYSCFG_CFGR2_LOCKUP_LOCK | SYSCFG_CFGR2_SRAM_PARITY_LOCK) |
AnnaBridge | 163:e59c8e839560 | 88 | #else |
AnnaBridge | 163:e59c8e839560 | 89 | #define SYSCFG_MASK_TIM_BREAK (SYSCFG_CFGR2_LOCKUP_LOCK) |
AnnaBridge | 163:e59c8e839560 | 90 | #endif /* SYSCFG_CFGR2_PVD_LOCK && SYSCFG_CFGR2_SRAM_PARITY_LOCK */ |
AnnaBridge | 163:e59c8e839560 | 91 | |
AnnaBridge | 163:e59c8e839560 | 92 | /** |
AnnaBridge | 163:e59c8e839560 | 93 | * @} |
AnnaBridge | 163:e59c8e839560 | 94 | */ |
AnnaBridge | 163:e59c8e839560 | 95 | |
AnnaBridge | 163:e59c8e839560 | 96 | /* Private macros ------------------------------------------------------------*/ |
AnnaBridge | 163:e59c8e839560 | 97 | |
AnnaBridge | 163:e59c8e839560 | 98 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 163:e59c8e839560 | 99 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 163:e59c8e839560 | 100 | /** @defgroup SYSTEM_LL_Exported_Constants SYSTEM Exported Constants |
AnnaBridge | 163:e59c8e839560 | 101 | * @{ |
AnnaBridge | 163:e59c8e839560 | 102 | */ |
AnnaBridge | 163:e59c8e839560 | 103 | |
AnnaBridge | 163:e59c8e839560 | 104 | /** @defgroup SYSTEM_LL_EC_REMAP SYSCFG REMAP |
AnnaBridge | 163:e59c8e839560 | 105 | * @{ |
AnnaBridge | 163:e59c8e839560 | 106 | */ |
AnnaBridge | 163:e59c8e839560 | 107 | #define LL_SYSCFG_REMAP_FLASH (uint32_t)0x00000000 /* Main Flash memory mapped at 0x00000000 */ |
AnnaBridge | 163:e59c8e839560 | 108 | #define LL_SYSCFG_REMAP_SYSTEMFLASH SYSCFG_CFGR1_MEM_MODE_0 /* System Flash memory mapped at 0x00000000 */ |
AnnaBridge | 163:e59c8e839560 | 109 | #define LL_SYSCFG_REMAP_SRAM (SYSCFG_CFGR1_MEM_MODE_1 | SYSCFG_CFGR1_MEM_MODE_0) /* Embedded SRAM mapped at 0x00000000 */ |
AnnaBridge | 163:e59c8e839560 | 110 | #if defined(FMC_BANK1) |
AnnaBridge | 163:e59c8e839560 | 111 | #define LL_SYSCFG_REMAP_FMC SYSCFG_CFGR1_MEM_MODE_2 /*<! FMC Bank (Only the first two banks) */ |
AnnaBridge | 163:e59c8e839560 | 112 | #endif /* FMC_BANK1 */ |
AnnaBridge | 163:e59c8e839560 | 113 | /** |
AnnaBridge | 163:e59c8e839560 | 114 | * @} |
AnnaBridge | 163:e59c8e839560 | 115 | */ |
AnnaBridge | 163:e59c8e839560 | 116 | |
AnnaBridge | 163:e59c8e839560 | 117 | #if defined(SYSCFG_CFGR3_SPI1_RX_DMA_RMP) |
AnnaBridge | 163:e59c8e839560 | 118 | /** @defgroup SYSTEM_LL_EC_SPI1_DMA_RMP_RX SYSCFG SPI1 RX/TX DMA1 request REMAP |
AnnaBridge | 163:e59c8e839560 | 119 | * @{ |
AnnaBridge | 163:e59c8e839560 | 120 | */ |
AnnaBridge | 163:e59c8e839560 | 121 | #define LL_SYSCFG_SPI1RX_RMP_DMA1_CH2 (SYSCFG_CFGR3_SPI1_RX_DMA_RMP << 16U | (uint32_t)0x00000000U) /*!< SPI1_RX mapped on DMA1 CH2 */ |
AnnaBridge | 163:e59c8e839560 | 122 | #define LL_SYSCFG_SPI1RX_RMP_DMA1_CH4 (SYSCFG_CFGR3_SPI1_RX_DMA_RMP << 16U | SYSCFG_CFGR3_SPI1_RX_DMA_RMP_0) /*!< SPI1_RX mapped on DMA1 CH4 */ |
AnnaBridge | 163:e59c8e839560 | 123 | #define LL_SYSCFG_SPI1RX_RMP_DMA1_CH6 (SYSCFG_CFGR3_SPI1_RX_DMA_RMP << 16U | SYSCFG_CFGR3_SPI1_RX_DMA_RMP_1) /*!< SPI1_RX mapped on DMA1 CH6 */ |
AnnaBridge | 163:e59c8e839560 | 124 | #define LL_SYSCFG_SPI1TX_RMP_DMA1_CH3 (SYSCFG_CFGR3_SPI1_TX_DMA_RMP << 16U | (uint32_t)0x00000000U) /*!< SPI1_TX mapped on DMA1 CH3 */ |
AnnaBridge | 163:e59c8e839560 | 125 | #define LL_SYSCFG_SPI1TX_RMP_DMA1_CH5 (SYSCFG_CFGR3_SPI1_TX_DMA_RMP << 16U | SYSCFG_CFGR3_SPI1_TX_DMA_RMP_0) /*!< SPI1_TX mapped on DMA1 CH5 */ |
AnnaBridge | 163:e59c8e839560 | 126 | #define LL_SYSCFG_SPI1TX_RMP_DMA1_CH7 (SYSCFG_CFGR3_SPI1_TX_DMA_RMP << 16U | SYSCFG_CFGR3_SPI1_TX_DMA_RMP_1) /*!< SPI1_TX mapped on DMA1 CH7 */ |
AnnaBridge | 163:e59c8e839560 | 127 | /** |
AnnaBridge | 163:e59c8e839560 | 128 | * @} |
AnnaBridge | 163:e59c8e839560 | 129 | */ |
AnnaBridge | 163:e59c8e839560 | 130 | #endif /* SYSCFG_CFGR3_SPI1_RX_DMA_RMP */ |
AnnaBridge | 163:e59c8e839560 | 131 | |
AnnaBridge | 163:e59c8e839560 | 132 | #if defined(SYSCFG_CFGR3_I2C1_RX_DMA_RMP) |
AnnaBridge | 163:e59c8e839560 | 133 | /** @defgroup SYSTEM_LL_EC_I2C1_DMA_RMP_RX SYSCFG I2C1 RX/TX DMA1 request REMAP |
AnnaBridge | 163:e59c8e839560 | 134 | * @{ |
AnnaBridge | 163:e59c8e839560 | 135 | */ |
AnnaBridge | 163:e59c8e839560 | 136 | #define LL_SYSCFG_I2C1RX_RMP_DMA1_CH7 (SYSCFG_CFGR3_I2C1_RX_DMA_RMP << 16U | (uint32_t)0x00000000U) /*!< I2C1_RX mapped on DMA1 CH7 */ |
AnnaBridge | 163:e59c8e839560 | 137 | #define LL_SYSCFG_I2C1RX_RMP_DMA1_CH3 (SYSCFG_CFGR3_I2C1_RX_DMA_RMP << 16U | SYSCFG_CFGR3_I2C1_RX_DMA_RMP_0) /*!< I2C1_RX mapped on DMA1 CH3 */ |
AnnaBridge | 163:e59c8e839560 | 138 | #define LL_SYSCFG_I2C1RX_RMP_DMA1_CH5 (SYSCFG_CFGR3_I2C1_RX_DMA_RMP << 16U | SYSCFG_CFGR3_I2C1_RX_DMA_RMP_1) /*!< I2C1_RX mapped on DMA1 CH5 */ |
AnnaBridge | 163:e59c8e839560 | 139 | #define LL_SYSCFG_I2C1TX_RMP_DMA1_CH6 (SYSCFG_CFGR3_I2C1_TX_DMA_RMP << 16U | (uint32_t)0x00000000U) /*!< I2C1_TX mapped on DMA1 CH6 */ |
AnnaBridge | 163:e59c8e839560 | 140 | #define LL_SYSCFG_I2C1TX_RMP_DMA1_CH2 (SYSCFG_CFGR3_I2C1_TX_DMA_RMP << 16U | SYSCFG_CFGR3_I2C1_TX_DMA_RMP_0) /*!< I2C1_TX mapped on DMA1 CH2 */ |
AnnaBridge | 163:e59c8e839560 | 141 | #define LL_SYSCFG_I2C1TX_RMP_DMA1_CH4 (SYSCFG_CFGR3_I2C1_TX_DMA_RMP << 16U | SYSCFG_CFGR3_I2C1_TX_DMA_RMP_1) /*!< I2C1_TX mapped on DMA1 CH4 */ |
AnnaBridge | 163:e59c8e839560 | 142 | /** |
AnnaBridge | 163:e59c8e839560 | 143 | * @} |
AnnaBridge | 163:e59c8e839560 | 144 | */ |
AnnaBridge | 163:e59c8e839560 | 145 | |
AnnaBridge | 163:e59c8e839560 | 146 | #endif /* SYSCFG_CFGR3_I2C1_RX_DMA_RMP */ |
AnnaBridge | 163:e59c8e839560 | 147 | |
AnnaBridge | 163:e59c8e839560 | 148 | #if defined(SYSCFG_CFGR1_ADC24_DMA_RMP) || defined(SYSCFG_CFGR3_ADC2_DMA_RMP) |
AnnaBridge | 163:e59c8e839560 | 149 | /** @defgroup SYSTEM_LL_EC_ADC24_DMA_REMAP SYSCFG ADC DMA request REMAP |
AnnaBridge | 163:e59c8e839560 | 150 | * @{ |
AnnaBridge | 163:e59c8e839560 | 151 | */ |
AnnaBridge | 163:e59c8e839560 | 152 | #if defined (SYSCFG_CFGR1_ADC24_DMA_RMP) |
AnnaBridge | 163:e59c8e839560 | 153 | #define LL_SYSCFG_ADC24_RMP_DMA2_CH12 (SYSCFG_OFFSET_CFGR1 << 24U | SYSCFG_CFGR1_ADC24_DMA_RMP << 8U | (uint32_t)0x00000000U) /*!< ADC24 DMA requests mapped on DMA2 channels 1 and 2 */ |
AnnaBridge | 163:e59c8e839560 | 154 | #define LL_SYSCFG_ADC24_RMP_DMA2_CH34 (SYSCFG_OFFSET_CFGR1 << 24U | SYSCFG_CFGR1_ADC24_DMA_RMP << 8U | SYSCFG_CFGR1_ADC24_DMA_RMP) /*!< ADC24 DMA requests mapped on DMA2 channels 3 and 4 */ |
AnnaBridge | 163:e59c8e839560 | 155 | #endif /*SYSCFG_CFGR1_ADC24_DMA_RMP*/ |
AnnaBridge | 163:e59c8e839560 | 156 | #if defined (SYSCFG_CFGR3_ADC2_DMA_RMP) |
AnnaBridge | 163:e59c8e839560 | 157 | #define LL_SYSCFG_ADC2_RMP_DMA1_CH2 (SYSCFG_OFFSET_CFGR3 << 24U | SYSCFG_CFGR3_ADC2_DMA_RMP_0 << 8U | (uint32_t)0x00000000U) /*!< ADC2 mapped on DMA1 channel 2 */ |
AnnaBridge | 163:e59c8e839560 | 158 | #define LL_SYSCFG_ADC2_RMP_DMA1_CH4 (SYSCFG_OFFSET_CFGR3 << 24U | SYSCFG_CFGR3_ADC2_DMA_RMP_0 << 8U | SYSCFG_CFGR3_ADC2_DMA_RMP_0) /*!< ADC2 mapped on DMA1 channel 4 */ |
AnnaBridge | 163:e59c8e839560 | 159 | #define LL_SYSCFG_ADC2_RMP_DMA2 (SYSCFG_OFFSET_CFGR3 << 24U | SYSCFG_CFGR3_ADC2_DMA_RMP_1 << 8U | (uint32_t)0x00000000U) /*!< ADC2 mapped on DMA2 */ |
AnnaBridge | 163:e59c8e839560 | 160 | #define LL_SYSCFG_ADC2_RMP_DMA1 (SYSCFG_OFFSET_CFGR3 << 24U | SYSCFG_CFGR3_ADC2_DMA_RMP_1 << 8U | SYSCFG_CFGR3_ADC2_DMA_RMP_1) /*!< ADC2 mapped on DMA1 */ |
AnnaBridge | 163:e59c8e839560 | 161 | #endif /*SYSCFG_CFGR3_ADC2_DMA_RMP*/ |
AnnaBridge | 163:e59c8e839560 | 162 | /** |
AnnaBridge | 163:e59c8e839560 | 163 | * @} |
AnnaBridge | 163:e59c8e839560 | 164 | */ |
AnnaBridge | 163:e59c8e839560 | 165 | |
AnnaBridge | 163:e59c8e839560 | 166 | #endif /* SYSCFG_CFGR1_ADC24_DMA_RMP || SYSCFG_CFGR3_ADC2_DMA_RMP */ |
AnnaBridge | 163:e59c8e839560 | 167 | |
AnnaBridge | 163:e59c8e839560 | 168 | /** @defgroup SYSTEM_LL_EC_DAC1_DMA2_REMAP SYSCFG DAC1/2 DMA1/2 request REMAP |
AnnaBridge | 163:e59c8e839560 | 169 | * @{ |
AnnaBridge | 163:e59c8e839560 | 170 | */ |
AnnaBridge | 163:e59c8e839560 | 171 | #define LL_SYSCFG_DAC1_CH1_RMP_DMA2_CH3 ((SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP << 8U) | (uint32_t)0x00000000U) /*!< DAC_CH1 DMA requests mapped on DMA2 channel 3 */ |
AnnaBridge | 163:e59c8e839560 | 172 | #define LL_SYSCFG_DAC1_CH1_RMP_DMA1_CH3 ((SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP << 8U) | SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP) /*!< DAC_CH1 DMA requests mapped on DMA1 channel 3 */ |
AnnaBridge | 163:e59c8e839560 | 173 | #if defined(SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP) |
AnnaBridge | 163:e59c8e839560 | 174 | #define LL_SYSCFG_DAC1_OUT2_RMP_DMA2_CH4 ((SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP << 8U) | (uint32_t)0x00000000U) /*!< DAC1_OUT2 DMA requests mapped on DMA2 channel 4 */ |
AnnaBridge | 163:e59c8e839560 | 175 | #define LL_SYSCFG_DAC1_OUT2_RMP_DMA1_CH4 ((SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP << 8U) | SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP) /*!< DAC1_OUT2 DMA requests mapped on DMA1 channel 4 */ |
AnnaBridge | 163:e59c8e839560 | 176 | #endif /*SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP*/ |
AnnaBridge | 163:e59c8e839560 | 177 | #if defined(SYSCFG_CFGR1_TIM18DAC2Ch1_DMA_RMP) |
AnnaBridge | 163:e59c8e839560 | 178 | #define LL_SYSCFG_DAC2_OUT1_RMP_DMA2_CH5 ((SYSCFG_CFGR1_TIM18DAC2Ch1_DMA_RMP << 8U) | (uint32_t)0x00000000U) /*!< DAC2_OUT1 DMA requests mapped on DMA2 channel 5 */ |
AnnaBridge | 163:e59c8e839560 | 179 | #define LL_SYSCFG_DAC2_OUT1_RMP_DMA1_CH5 ((SYSCFG_CFGR1_TIM18DAC2Ch1_DMA_RMP << 8U) | SYSCFG_CFGR1_TIM18DAC2Ch1_DMA_RMP) /*!< DAC2_OUT1 DMA requests mapped on DMA1 channel 5 */ |
AnnaBridge | 163:e59c8e839560 | 180 | #endif /*SYSCFG_CFGR1_TIM18DAC2Ch1_DMA_RMP*/ |
AnnaBridge | 163:e59c8e839560 | 181 | #if defined(SYSCFG_CFGR1_DAC2Ch1_DMA_RMP) |
AnnaBridge | 163:e59c8e839560 | 182 | #define LL_SYSCFG_DAC2_CH1_RMP_NO ((SYSCFG_CFGR1_DAC2Ch1_DMA_RMP << 8U) | (uint32_t)0x00000000U) /*!< No remap */ |
AnnaBridge | 163:e59c8e839560 | 183 | #define LL_SYSCFG_DAC2_CH1_RMP_DMA1_CH5 ((SYSCFG_CFGR1_DAC2Ch1_DMA_RMP << 8U) | SYSCFG_CFGR1_DAC2Ch1_DMA_RMP) /*!< DAC2_CH1 DMA requests mapped on DMA1 channel 5 */ |
AnnaBridge | 163:e59c8e839560 | 184 | #endif /*SYSCFG_CFGR1_DAC2Ch1_DMA_RMP*/ |
AnnaBridge | 163:e59c8e839560 | 185 | /** |
AnnaBridge | 163:e59c8e839560 | 186 | * @} |
AnnaBridge | 163:e59c8e839560 | 187 | */ |
AnnaBridge | 163:e59c8e839560 | 188 | |
AnnaBridge | 163:e59c8e839560 | 189 | /** @defgroup SYSTEM_LL_EC_TIM16_DMA1_REMAP SYSCFG TIM DMA request REMAP |
AnnaBridge | 163:e59c8e839560 | 190 | * @{ |
AnnaBridge | 163:e59c8e839560 | 191 | */ |
AnnaBridge | 163:e59c8e839560 | 192 | #define LL_SYSCFG_TIM16_RMP_DMA1_CH3 ((SYSCFG_CFGR1_TIM16_DMA_RMP << 8U) | (uint32_t)0x00000000U) /*!< TIM16_CH1 and TIM16_UP DMA requests mapped on DMA1 channel 3 */ |
AnnaBridge | 163:e59c8e839560 | 193 | #define LL_SYSCFG_TIM16_RMP_DMA1_CH6 ((SYSCFG_CFGR1_TIM16_DMA_RMP << 8U) | SYSCFG_CFGR1_TIM16_DMA_RMP) /*!< TIM16_CH1 and TIM16_UP DMA requests mapped on DMA1 channel 6 */ |
AnnaBridge | 163:e59c8e839560 | 194 | #define LL_SYSCFG_TIM17_RMP_DMA1_CH1 ((SYSCFG_CFGR1_TIM17_DMA_RMP << 8U) | (uint32_t)0x00000000U) /*!< TIM17_CH1 and TIM17_UP DMA requests mapped on DMA1 channel 1 */ |
AnnaBridge | 163:e59c8e839560 | 195 | #define LL_SYSCFG_TIM17_RMP_DMA1_CH7 ((SYSCFG_CFGR1_TIM17_DMA_RMP << 8U) | SYSCFG_CFGR1_TIM17_DMA_RMP) /*!< TIM17_CH1 and TIM17_UP DMA requests mapped on DMA1 channel 7 */ |
AnnaBridge | 163:e59c8e839560 | 196 | #define LL_SYSCFG_TIM6_RMP_DMA2_CH3 ((SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP << 8U) | (uint32_t)0x00000000U) /*!< TIM6 DMA requests mapped on DMA2 channel 3 */ |
AnnaBridge | 163:e59c8e839560 | 197 | #define LL_SYSCFG_TIM6_RMP_DMA1_CH3 ((SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP << 8U) | SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP) /*!< TIM6 DMA requests mapped on DMA1 channel 3 */ |
AnnaBridge | 163:e59c8e839560 | 198 | #if defined(SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP) |
AnnaBridge | 163:e59c8e839560 | 199 | #define LL_SYSCFG_TIM7_RMP_DMA2_CH4 ((SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP << 8U) | (uint32_t)0x00000000U) /*!< TIM7 DMA requests mapped on DMA2 channel 4 */ |
AnnaBridge | 163:e59c8e839560 | 200 | #define LL_SYSCFG_TIM7_RMP_DMA1_CH4 ((SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP << 8U) | SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP) /*!< TIM7 DMA requests mapped on DMA1 channel 4 */ |
AnnaBridge | 163:e59c8e839560 | 201 | #endif /*SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP*/ |
AnnaBridge | 163:e59c8e839560 | 202 | #if defined(SYSCFG_CFGR1_TIM18DAC2Ch1_DMA_RMP) |
AnnaBridge | 163:e59c8e839560 | 203 | #define LL_SYSCFG_TIM18_RMP_DMA2_CH5 ((SYSCFG_CFGR1_TIM18DAC2Ch1_DMA_RMP << 8U) | (uint32_t)0x00000000U) /*!< TIM18 DMA requests mapped on DMA2 channel 5 */ |
AnnaBridge | 163:e59c8e839560 | 204 | #define LL_SYSCFG_TIM18_RMP_DMA1_CH5 ((SYSCFG_CFGR1_TIM18DAC2Ch1_DMA_RMP << 8U) | SYSCFG_CFGR1_TIM18DAC2Ch1_DMA_RMP) /*!< TIM18 DMA requests mapped on DMA1 channel 5 */ |
AnnaBridge | 163:e59c8e839560 | 205 | #endif /*SYSCFG_CFGR1_TIM18DAC2Ch1_DMA_RMP*/ |
AnnaBridge | 163:e59c8e839560 | 206 | /** |
AnnaBridge | 163:e59c8e839560 | 207 | * @} |
AnnaBridge | 163:e59c8e839560 | 208 | */ |
AnnaBridge | 163:e59c8e839560 | 209 | |
AnnaBridge | 163:e59c8e839560 | 210 | #if defined(SYSCFG_CFGR1_TIM1_ITR3_RMP) || defined(SYSCFG_CFGR1_ENCODER_MODE) |
AnnaBridge | 163:e59c8e839560 | 211 | /** @defgroup SYSTEM_LL_EC_TIM1_ITR3_RMP_TIM4 SYSCFG TIM REMAP |
AnnaBridge | 163:e59c8e839560 | 212 | * @{ |
AnnaBridge | 163:e59c8e839560 | 213 | */ |
AnnaBridge | 163:e59c8e839560 | 214 | #if defined(SYSCFG_CFGR1_TIM1_ITR3_RMP) |
AnnaBridge | 163:e59c8e839560 | 215 | #define LL_SYSCFG_TIM1_ITR3_RMP_TIM4_TRGO ((SYSCFG_CFGR1_TIM1_ITR3_RMP << 8U) | (uint32_t)0x00000000U) /*!< TIM1_ITR3 = TIM4_TRGO */ |
AnnaBridge | 163:e59c8e839560 | 216 | #define LL_SYSCFG_TIM1_ITR3_RMP_TIM17_OC ((SYSCFG_CFGR1_TIM1_ITR3_RMP << 8U) | SYSCFG_CFGR1_TIM1_ITR3_RMP) /*!< TIM1_ITR3 = TIM17_OC */ |
AnnaBridge | 163:e59c8e839560 | 217 | #endif /* SYSCFG_CFGR1_TIM1_ITR3_RMP */ |
AnnaBridge | 163:e59c8e839560 | 218 | #if defined(SYSCFG_CFGR1_ENCODER_MODE) |
AnnaBridge | 163:e59c8e839560 | 219 | #define LL_SYSCFG_TIM15_ENCODEMODE_NOREDIRECTION ((SYSCFG_CFGR1_ENCODER_MODE << 8U) | (uint32_t)0x00000000U) /*!< No redirection */ |
AnnaBridge | 163:e59c8e839560 | 220 | #define LL_SYSCFG_TIM15_ENCODEMODE_TIM2 ((SYSCFG_CFGR1_ENCODER_MODE_0 << 8U) | SYSCFG_CFGR1_ENCODER_MODE_0) /*!< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ |
AnnaBridge | 163:e59c8e839560 | 221 | #if defined(SYSCFG_CFGR1_ENCODER_MODE_TIM3) |
AnnaBridge | 163:e59c8e839560 | 222 | #define LL_SYSCFG_TIM15_ENCODEMODE_TIM3 ((SYSCFG_CFGR1_ENCODER_MODE_TIM3 << 8U) | SYSCFG_CFGR1_ENCODER_MODE_TIM3) /*!< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ |
AnnaBridge | 163:e59c8e839560 | 223 | #endif /* SYSCFG_CFGR1_ENCODER_MODE_TIM3 */ |
AnnaBridge | 163:e59c8e839560 | 224 | #if defined(SYSCFG_CFGR1_ENCODER_MODE_TIM4) |
AnnaBridge | 163:e59c8e839560 | 225 | #define LL_SYSCFG_TIM15_ENCODEMODE_TIM4 ((SYSCFG_CFGR1_ENCODER_MODE_TIM4 << 8U) | SYSCFG_CFGR1_ENCODER_MODE_TIM4) /*!< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ |
AnnaBridge | 163:e59c8e839560 | 226 | #endif /* SYSCFG_CFGR1_ENCODER_MODE_TIM4 */ |
AnnaBridge | 163:e59c8e839560 | 227 | #endif /* SYSCFG_CFGR1_ENCODER_MODE */ |
AnnaBridge | 163:e59c8e839560 | 228 | /** |
AnnaBridge | 163:e59c8e839560 | 229 | * @} |
AnnaBridge | 163:e59c8e839560 | 230 | */ |
AnnaBridge | 163:e59c8e839560 | 231 | |
AnnaBridge | 163:e59c8e839560 | 232 | #endif /* SYSCFG_CFGR1_TIM1_ITR3_RMP || SYSCFG_CFGR1_ENCODER_MODE */ |
AnnaBridge | 163:e59c8e839560 | 233 | |
AnnaBridge | 163:e59c8e839560 | 234 | #if defined(SYSCFG_CFGR4_ADC12_EXT2_RMP) |
AnnaBridge | 163:e59c8e839560 | 235 | /** @defgroup SYSTEM_LL_EC_ADC12_EXT2_RMP_TIM1 SYSCFG ADC Trigger REMAP |
AnnaBridge | 163:e59c8e839560 | 236 | * @{ |
AnnaBridge | 163:e59c8e839560 | 237 | */ |
AnnaBridge | 163:e59c8e839560 | 238 | #define LL_SYSCFG_ADC12_EXT2_RMP_TIM1_CC3 ((SYSCFG_CFGR4_ADC12_EXT2_RMP << 16U) | (uint32_t)0x00000000U) /*!< Input trigger of ADC12 regular channel EXT2:Trigger source is TIM1_CC3 */ |
AnnaBridge | 163:e59c8e839560 | 239 | #define LL_SYSCFG_ADC12_EXT2_RMP_TIM20_TRGO ((SYSCFG_CFGR4_ADC12_EXT2_RMP << 16U) | SYSCFG_CFGR4_ADC12_EXT2_RMP) /*!< Input trigger of ADC12 regular channel EXT2:Trigger source is TIM20_TRGO */ |
AnnaBridge | 163:e59c8e839560 | 240 | #define LL_SYSCFG_ADC12_EXT3_RMP_TIM2_CC2 ((SYSCFG_CFGR4_ADC12_EXT3_RMP << 16U) | (uint32_t)0x00000000U) /*!< Input trigger of ADC12 regular channel EXT3:Trigger source is TIM2_CC2 */ |
AnnaBridge | 163:e59c8e839560 | 241 | #define LL_SYSCFG_ADC12_EXT3_RMP_TIM20_TRGO2 ((SYSCFG_CFGR4_ADC12_EXT3_RMP << 16U) | SYSCFG_CFGR4_ADC12_EXT3_RMP) /*!< Input trigger of ADC12 regular channel EXT3:Trigger source is TIM20_TRGO2 */ |
AnnaBridge | 163:e59c8e839560 | 242 | #define LL_SYSCFG_ADC12_EXT5_RMP_TIM4_CC4 ((SYSCFG_CFGR4_ADC12_EXT5_RMP << 16U) | (uint32_t)0x00000000U) /*!< Input trigger of ADC12 regular channel EXT5:Trigger source is TIM4_CC4 */ |
AnnaBridge | 163:e59c8e839560 | 243 | #define LL_SYSCFG_ADC12_EXT5_RMP_TIM20_CC1 ((SYSCFG_CFGR4_ADC12_EXT5_RMP << 16U) | SYSCFG_CFGR4_ADC12_EXT5_RMP) /*!< Input trigger of ADC12 regular channel EXT5:Trigger source is TIM20_CC1 */ |
AnnaBridge | 163:e59c8e839560 | 244 | #define LL_SYSCFG_ADC12_EXT13_RMP_TIM6_TRGO ((SYSCFG_CFGR4_ADC12_EXT13_RMP << 16U) | (uint32_t)0x00000000U) /*!< Input trigger of ADC12 regular channel EXT13:Trigger source is TIM6_TRGO */ |
AnnaBridge | 163:e59c8e839560 | 245 | #define LL_SYSCFG_ADC12_EXT13_RMP_TIM20_CC2 ((SYSCFG_CFGR4_ADC12_EXT13_RMP << 16U) | SYSCFG_CFGR4_ADC12_EXT13_RMP) /*!< Input trigger of ADC12 regular channel EXT13:Trigger source is TIM20_CC2 */ |
AnnaBridge | 163:e59c8e839560 | 246 | #define LL_SYSCFG_ADC12_EXT15_RMP_TIM3_CC4 ((SYSCFG_CFGR4_ADC12_EXT15_RMP << 16U) | (uint32_t)0x00000000U) /*!< Input trigger of ADC12 regular channel EXT15:Trigger source is TIM3_CC4 */ |
AnnaBridge | 163:e59c8e839560 | 247 | #define LL_SYSCFG_ADC12_EXT15_RMP_TIM20_CC3 ((SYSCFG_CFGR4_ADC12_EXT15_RMP << 16U) | SYSCFG_CFGR4_ADC12_EXT15_RMP) /*!< Input trigger of ADC12 regular channel EXT15:Trigger source is TIM20_CC3 */ |
AnnaBridge | 163:e59c8e839560 | 248 | #define LL_SYSCFG_ADC12_JEXT3_RMP_TIM2_CC1 ((SYSCFG_CFGR4_ADC12_JEXT3_RMP << 16U) | (uint32_t)0x00000000U) /*!< Input trigger of ADC12 regular channel JEXT3:Trigger source is TIM2_CC1 */ |
AnnaBridge | 163:e59c8e839560 | 249 | #define LL_SYSCFG_ADC12_JEXT3_RMP_TIM20_TRGO ((SYSCFG_CFGR4_ADC12_JEXT3_RMP << 16U) | SYSCFG_CFGR4_ADC12_JEXT3_RMP) /*!< Input trigger of ADC12 regular channel JEXT3:Trigger source is TIM20_TRGO */ |
AnnaBridge | 163:e59c8e839560 | 250 | #define LL_SYSCFG_ADC12_JEXT6_RMP_EXTI_LINE_15 ((SYSCFG_CFGR4_ADC12_JEXT6_RMP << 16U) | (uint32_t)0x00000000U) /*!< Input trigger of ADC12 regular channel JEXT6:Trigger source is EXTI_LINE_15 */ |
AnnaBridge | 163:e59c8e839560 | 251 | #define LL_SYSCFG_ADC12_JEXT6_RMP_TIM20_TRGO2 ((SYSCFG_CFGR4_ADC12_JEXT6_RMP << 16U) | SYSCFG_CFGR4_ADC12_JEXT6_RMP) /*!< Input trigger of ADC12 regular channel JEXT6:Trigger source is TIM20_TRGO2 */ |
AnnaBridge | 163:e59c8e839560 | 252 | #define LL_SYSCFG_ADC12_JEXT13_RMP_TIM3_CC1 ((SYSCFG_CFGR4_ADC12_JEXT13_RMP << 16U) | (uint32_t)0x00000000U) /*!< Input trigger of ADC12 regular channel JEXT13:Trigger source is TIM3_CC1 */ |
AnnaBridge | 163:e59c8e839560 | 253 | #define LL_SYSCFG_ADC12_JEXT13_RMP_TIM20_CC4 ((SYSCFG_CFGR4_ADC12_JEXT13_RMP << 16U) | SYSCFG_CFGR4_ADC12_JEXT13_RMP) /*!< Input trigger of ADC12 regular channel JEXT13:Trigger source is TIM20_CC4 */ |
AnnaBridge | 163:e59c8e839560 | 254 | #define LL_SYSCFG_ADC34_EXT5_RMP_EXTI_LINE_2 ((SYSCFG_CFGR4_ADC34_EXT5_RMP << 16U) | (uint32_t)0x00000000U) /*!< Input trigger of ADC34 regular channel EXT5:Trigger source is EXTI_LINE_2 */ |
AnnaBridge | 163:e59c8e839560 | 255 | #define LL_SYSCFG_ADC34_EXT5_RMP_TIM20_TRGO ((SYSCFG_CFGR4_ADC34_EXT5_RMP << 16U) | SYSCFG_CFGR4_ADC34_EXT5_RMP) /*!< Input trigger of ADC34 regular channel EXT5:Trigger source is TIM20_TRGO */ |
AnnaBridge | 163:e59c8e839560 | 256 | #define LL_SYSCFG_ADC34_EXT6_RMP_TIM4_CC1 ((SYSCFG_CFGR4_ADC34_EXT6_RMP << 16U) | (uint32_t)0x00000000U) /*!< Input trigger of ADC34 regular channel EXT6:Trigger source is TIM4_CC1 */ |
AnnaBridge | 163:e59c8e839560 | 257 | #define LL_SYSCFG_ADC34_EXT6_RMP_TIM20_TRGO2 ((SYSCFG_CFGR4_ADC34_EXT6_RMP << 16U) | SYSCFG_CFGR4_ADC34_EXT6_RMP) /*!< Input trigger of ADC34 regular channel EXT6:Trigger source is TIM20_TRGO2 */ |
AnnaBridge | 163:e59c8e839560 | 258 | #define LL_SYSCFG_ADC34_EXT15_RMP_TIM2_CC1 ((SYSCFG_CFGR4_ADC34_EXT15_RMP << 16U) | (uint32_t)0x00000000U) /*!< Input trigger of ADC34 regular channel EXT15:Trigger source is TIM2_CC1 */ |
AnnaBridge | 163:e59c8e839560 | 259 | #define LL_SYSCFG_ADC34_EXT15_RMP_TIM20_CC1 ((SYSCFG_CFGR4_ADC34_EXT15_RMP << 16U) | SYSCFG_CFGR4_ADC34_EXT15_RMP) /*!< Input trigger of ADC34 regular channel EXT15:Trigger source is TIM20_CC1 */ |
AnnaBridge | 163:e59c8e839560 | 260 | #define LL_SYSCFG_ADC34_JEXT5_RMP_TIM4_CC3 ((SYSCFG_CFGR4_ADC34_JEXT5_RMP << 16U) | (uint32_t)0x00000000U) /*!< Input trigger of ADC34 regular channel JEXT5:Trigger source is TIM4_CC3 */ |
AnnaBridge | 163:e59c8e839560 | 261 | #define LL_SYSCFG_ADC34_JEXT5_RMP_TIM20_TRGO ((SYSCFG_CFGR4_ADC34_JEXT5_RMP << 16U) | SYSCFG_CFGR4_ADC34_JEXT5_RMP) /*!< Input trigger of ADC34 regular channel JEXT5:Trigger source is TIM20_TRGO */ |
AnnaBridge | 163:e59c8e839560 | 262 | #define LL_SYSCFG_ADC34_JEXT11_RMP_TIM1_CC3 ((SYSCFG_CFGR4_ADC34_JEXT11_RMP << 16U) | (uint32_t)0x00000000U) /*!< Input trigger of ADC34 regular channel JEXT11:Trigger source is TIM1_CC3 */ |
AnnaBridge | 163:e59c8e839560 | 263 | #define LL_SYSCFG_ADC34_JEXT11_RMP_TIM20_TRGO2 ((SYSCFG_CFGR4_ADC34_JEXT11_RMP << 16U) | SYSCFG_CFGR4_ADC34_JEXT11_RMP) /*!< Input trigger of ADC34 regular channel JEXT11:Trigger source is TIM20_TRGO2 */ |
AnnaBridge | 163:e59c8e839560 | 264 | #define LL_SYSCFG_ADC34_JEXT14_RMP_TIM7_TRGO ((SYSCFG_CFGR4_ADC34_JEXT14_RMP << 16U) | (uint32_t)0x00000000U) /*!< Input trigger of ADC34 regular channel JEXT14:Trigger source is TIM7_TRGO */ |
AnnaBridge | 163:e59c8e839560 | 265 | #define LL_SYSCFG_ADC34_JEXT14_RMP_TIM20_CC2 ((SYSCFG_CFGR4_ADC34_JEXT14_RMP << 16U) | SYSCFG_CFGR4_ADC34_JEXT14_RMP) /*!< Input trigger of ADC34 regular channel JEXT14:Trigger source is TIM20_CC2 */ |
AnnaBridge | 163:e59c8e839560 | 266 | /** |
AnnaBridge | 163:e59c8e839560 | 267 | * @} |
AnnaBridge | 163:e59c8e839560 | 268 | */ |
AnnaBridge | 163:e59c8e839560 | 269 | |
AnnaBridge | 163:e59c8e839560 | 270 | #endif /* SYSCFG_CFGR4_ADC12_EXT2_RMP */ |
AnnaBridge | 163:e59c8e839560 | 271 | |
AnnaBridge | 163:e59c8e839560 | 272 | #if defined(SYSCFG_CFGR1_DAC1_TRIG1_RMP) || defined(SYSCFG_CFGR3_TRIGGER_RMP) |
AnnaBridge | 163:e59c8e839560 | 273 | /** @defgroup SYSTEM_LL_EC_DAC1_TRIG1_REMAP SYSCFG DAC1 Trigger REMAP |
AnnaBridge | 163:e59c8e839560 | 274 | * @{ |
AnnaBridge | 163:e59c8e839560 | 275 | */ |
AnnaBridge | 163:e59c8e839560 | 276 | #if defined(SYSCFG_CFGR1_DAC1_TRIG1_RMP) |
AnnaBridge | 163:e59c8e839560 | 277 | #define LL_SYSCFG_DAC1_TRIG1_RMP_TIM8_TRGO (SYSCFG_OFFSET_CFGR1 << 24U | SYSCFG_CFGR1_DAC1_TRIG1_RMP << 4 | (uint32_t)0x00000000U) /*!< No remap: DAC trigger TRIG1 is TIM8_TRGO */ |
AnnaBridge | 163:e59c8e839560 | 278 | #define LL_SYSCFG_DAC1_TRIG1_RMP_TIM3_TRGO (SYSCFG_OFFSET_CFGR1 << 24U | SYSCFG_CFGR1_DAC1_TRIG1_RMP << 4 | SYSCFG_CFGR1_DAC1_TRIG1_RMP) /*!< DAC trigger is TIM3_TRGO */ |
AnnaBridge | 163:e59c8e839560 | 279 | #endif /* SYSCFG_CFGR1_DAC1_TRIG1_RMP */ |
AnnaBridge | 163:e59c8e839560 | 280 | #if defined(SYSCFG_CFGR3_DAC1_TRG3_RMP) |
AnnaBridge | 163:e59c8e839560 | 281 | #define LL_SYSCFG_DAC1_TRIG3_RMP_TIM15_TRGO (SYSCFG_OFFSET_CFGR3 << 24U | SYSCFG_CFGR3_DAC1_TRG3_RMP << 4 | (uint32_t)0x00000000U) /*!< DAC trigger is TIM15_TRGO */ |
AnnaBridge | 163:e59c8e839560 | 282 | #define LL_SYSCFG_DAC1_TRIG3_RMP_HRTIM1_DAC1_TRIG1 (SYSCFG_OFFSET_CFGR3 << 24U | SYSCFG_CFGR3_DAC1_TRG3_RMP << 4 | SYSCFG_CFGR3_DAC1_TRG3_RMP) /*!< DAC trigger is HRTIM1_DAC1_TRIG1 */ |
AnnaBridge | 163:e59c8e839560 | 283 | #endif /* SYSCFG_CFGR3_DAC1_TRG3_RMP */ |
AnnaBridge | 163:e59c8e839560 | 284 | #if defined(SYSCFG_CFGR3_DAC1_TRG5_RMP) |
AnnaBridge | 163:e59c8e839560 | 285 | #define LL_SYSCFG_DAC1_TRIG5_RMP_NO (SYSCFG_OFFSET_CFGR3 << 24U | SYSCFG_CFGR3_DAC1_TRG5_RMP << 4 | (uint32_t)0x00000000U) /*!< No remap */ |
AnnaBridge | 163:e59c8e839560 | 286 | #define LL_SYSCFG_DAC1_TRIG5_RMP_HRTIM1_DAC1_TRIG2 (SYSCFG_OFFSET_CFGR3 << 24U | SYSCFG_CFGR3_DAC1_TRG5_RMP << 4 | SYSCFG_CFGR3_DAC1_TRG5_RMP) /*!< DAC trigger is HRTIM1_DAC1_TRIG2 */ |
AnnaBridge | 163:e59c8e839560 | 287 | #endif /* SYSCFG_CFGR3_DAC1_TRG5_RMP */ |
AnnaBridge | 163:e59c8e839560 | 288 | /** |
AnnaBridge | 163:e59c8e839560 | 289 | * @} |
AnnaBridge | 163:e59c8e839560 | 290 | */ |
AnnaBridge | 163:e59c8e839560 | 291 | |
AnnaBridge | 163:e59c8e839560 | 292 | #endif /* SYSCFG_CFGR1_DAC1_TRIG1_RMP || SYSCFG_CFGR3_TRIGGER_RMP */ |
AnnaBridge | 163:e59c8e839560 | 293 | |
AnnaBridge | 163:e59c8e839560 | 294 | /** @defgroup SYSTEM_LL_EC_I2C_FASTMODEPLUS SYSCFG I2C FASTMODEPLUS |
AnnaBridge | 163:e59c8e839560 | 295 | * @{ |
AnnaBridge | 163:e59c8e839560 | 296 | */ |
AnnaBridge | 163:e59c8e839560 | 297 | #define LL_SYSCFG_I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< I2C PB6 Fast mode plus */ |
AnnaBridge | 163:e59c8e839560 | 298 | #define LL_SYSCFG_I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< I2C PB7 Fast mode plus */ |
AnnaBridge | 163:e59c8e839560 | 299 | #define LL_SYSCFG_I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< I2C PB8 Fast mode plus */ |
AnnaBridge | 163:e59c8e839560 | 300 | #define LL_SYSCFG_I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< I2C PB9 Fast mode plus */ |
AnnaBridge | 163:e59c8e839560 | 301 | #define LL_SYSCFG_I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< I2C1 Fast mode plus */ |
AnnaBridge | 163:e59c8e839560 | 302 | #if defined(SYSCFG_CFGR1_I2C2_FMP) |
AnnaBridge | 163:e59c8e839560 | 303 | #define LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< I2C2 Fast mode plus */ |
AnnaBridge | 163:e59c8e839560 | 304 | #endif /*SYSCFG_CFGR1_I2C2_FMP*/ |
AnnaBridge | 163:e59c8e839560 | 305 | #if defined(SYSCFG_CFGR1_I2C3_FMP) |
AnnaBridge | 163:e59c8e839560 | 306 | #define LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< I2C3 Fast mode plus */ |
AnnaBridge | 163:e59c8e839560 | 307 | #endif /*SYSCFG_CFGR1_I2C3_FMP*/ |
AnnaBridge | 163:e59c8e839560 | 308 | /** |
AnnaBridge | 163:e59c8e839560 | 309 | * @} |
AnnaBridge | 163:e59c8e839560 | 310 | */ |
AnnaBridge | 163:e59c8e839560 | 311 | |
AnnaBridge | 163:e59c8e839560 | 312 | /** @defgroup SYSTEM_LL_EC_EXTI_PORT SYSCFG EXTI PORT |
AnnaBridge | 163:e59c8e839560 | 313 | * @{ |
AnnaBridge | 163:e59c8e839560 | 314 | */ |
AnnaBridge | 163:e59c8e839560 | 315 | #define LL_SYSCFG_EXTI_PORTA (uint32_t)0U /*!< EXTI PORT A */ |
AnnaBridge | 163:e59c8e839560 | 316 | #define LL_SYSCFG_EXTI_PORTB (uint32_t)1U /*!< EXTI PORT B */ |
AnnaBridge | 163:e59c8e839560 | 317 | #define LL_SYSCFG_EXTI_PORTC (uint32_t)2U /*!< EXTI PORT C */ |
AnnaBridge | 163:e59c8e839560 | 318 | #define LL_SYSCFG_EXTI_PORTD (uint32_t)3U /*!< EXTI PORT D */ |
AnnaBridge | 163:e59c8e839560 | 319 | #if defined(GPIOE) |
AnnaBridge | 163:e59c8e839560 | 320 | #define LL_SYSCFG_EXTI_PORTE (uint32_t)4U /*!< EXTI PORT E */ |
AnnaBridge | 163:e59c8e839560 | 321 | #endif /* GPIOE */ |
AnnaBridge | 163:e59c8e839560 | 322 | #define LL_SYSCFG_EXTI_PORTF (uint32_t)5U /*!< EXTI PORT F */ |
AnnaBridge | 163:e59c8e839560 | 323 | #if defined(GPIOG) |
AnnaBridge | 163:e59c8e839560 | 324 | #define LL_SYSCFG_EXTI_PORTG (uint32_t)6U /*!< EXTI PORT G */ |
AnnaBridge | 163:e59c8e839560 | 325 | #endif /* GPIOG */ |
AnnaBridge | 163:e59c8e839560 | 326 | #if defined(GPIOH) |
AnnaBridge | 163:e59c8e839560 | 327 | #define LL_SYSCFG_EXTI_PORTH (uint32_t)7U /*!< EXTI PORT H */ |
AnnaBridge | 163:e59c8e839560 | 328 | #endif /* GPIOH */ |
AnnaBridge | 163:e59c8e839560 | 329 | /** |
AnnaBridge | 163:e59c8e839560 | 330 | * @} |
AnnaBridge | 163:e59c8e839560 | 331 | */ |
AnnaBridge | 163:e59c8e839560 | 332 | |
AnnaBridge | 163:e59c8e839560 | 333 | /** @defgroup SYSTEM_LL_EC_EXTI_LINE SYSCFG EXTI LINE |
AnnaBridge | 163:e59c8e839560 | 334 | * @{ |
AnnaBridge | 163:e59c8e839560 | 335 | */ |
AnnaBridge | 163:e59c8e839560 | 336 | #define LL_SYSCFG_EXTI_LINE0 (uint32_t)(0x000FU << 16U | 0U) /* EXTI_POSITION_0 | EXTICR[0] */ |
AnnaBridge | 163:e59c8e839560 | 337 | #define LL_SYSCFG_EXTI_LINE1 (uint32_t)(0x00F0U << 16U | 0U) /* EXTI_POSITION_4 | EXTICR[0] */ |
AnnaBridge | 163:e59c8e839560 | 338 | #define LL_SYSCFG_EXTI_LINE2 (uint32_t)(0x0F00U << 16U | 0U) /* EXTI_POSITION_8 | EXTICR[0] */ |
AnnaBridge | 163:e59c8e839560 | 339 | #define LL_SYSCFG_EXTI_LINE3 (uint32_t)(0xF000U << 16U | 0U) /* EXTI_POSITION_12 | EXTICR[0] */ |
AnnaBridge | 163:e59c8e839560 | 340 | #define LL_SYSCFG_EXTI_LINE4 (uint32_t)(0x000FU << 16U | 1U) /* EXTI_POSITION_0 | EXTICR[1] */ |
AnnaBridge | 163:e59c8e839560 | 341 | #define LL_SYSCFG_EXTI_LINE5 (uint32_t)(0x00F0U << 16U | 1U) /* EXTI_POSITION_4 | EXTICR[1] */ |
AnnaBridge | 163:e59c8e839560 | 342 | #define LL_SYSCFG_EXTI_LINE6 (uint32_t)(0x0F00U << 16U | 1U) /* EXTI_POSITION_8 | EXTICR[1] */ |
AnnaBridge | 163:e59c8e839560 | 343 | #define LL_SYSCFG_EXTI_LINE7 (uint32_t)(0xF000U << 16U | 1U) /* EXTI_POSITION_12 | EXTICR[1] */ |
AnnaBridge | 163:e59c8e839560 | 344 | #define LL_SYSCFG_EXTI_LINE8 (uint32_t)(0x000FU << 16U | 2U) /* EXTI_POSITION_0 | EXTICR[2] */ |
AnnaBridge | 163:e59c8e839560 | 345 | #define LL_SYSCFG_EXTI_LINE9 (uint32_t)(0x00F0U << 16U | 2U) /* EXTI_POSITION_4 | EXTICR[2] */ |
AnnaBridge | 163:e59c8e839560 | 346 | #define LL_SYSCFG_EXTI_LINE10 (uint32_t)(0x0F00U << 16U | 2U) /* EXTI_POSITION_8 | EXTICR[2] */ |
AnnaBridge | 163:e59c8e839560 | 347 | #define LL_SYSCFG_EXTI_LINE11 (uint32_t)(0xF000U << 16U | 2U) /* EXTI_POSITION_12 | EXTICR[2] */ |
AnnaBridge | 163:e59c8e839560 | 348 | #define LL_SYSCFG_EXTI_LINE12 (uint32_t)(0x000FU << 16U | 3U) /* EXTI_POSITION_0 | EXTICR[3] */ |
AnnaBridge | 163:e59c8e839560 | 349 | #define LL_SYSCFG_EXTI_LINE13 (uint32_t)(0x00F0U << 16U | 3U) /* EXTI_POSITION_4 | EXTICR[3] */ |
AnnaBridge | 163:e59c8e839560 | 350 | #define LL_SYSCFG_EXTI_LINE14 (uint32_t)(0x0F00U << 16U | 3U) /* EXTI_POSITION_8 | EXTICR[3] */ |
AnnaBridge | 163:e59c8e839560 | 351 | #define LL_SYSCFG_EXTI_LINE15 (uint32_t)(0xF000U << 16U | 3U) /* EXTI_POSITION_12 | EXTICR[3] */ |
AnnaBridge | 163:e59c8e839560 | 352 | /** |
AnnaBridge | 163:e59c8e839560 | 353 | * @} |
AnnaBridge | 163:e59c8e839560 | 354 | */ |
AnnaBridge | 163:e59c8e839560 | 355 | |
AnnaBridge | 163:e59c8e839560 | 356 | /** @defgroup SYSTEM_LL_EC_TIMBREAK SYSCFG TIMER BREAK |
AnnaBridge | 163:e59c8e839560 | 357 | * @{ |
AnnaBridge | 163:e59c8e839560 | 358 | */ |
AnnaBridge | 163:e59c8e839560 | 359 | #if defined(SYSCFG_CFGR2_PVD_LOCK) |
AnnaBridge | 163:e59c8e839560 | 360 | #define LL_SYSCFG_TIMBREAK_PVD SYSCFG_CFGR2_PVD_LOCK /*!< Enables and locks the PVD connection with TIMx Break Input and also the PVDE and PLS bits of the Power Control Interface */ |
AnnaBridge | 163:e59c8e839560 | 361 | #endif /*SYSCFG_CFGR2_PVD_LOCK*/ |
AnnaBridge | 163:e59c8e839560 | 362 | #if defined(SYSCFG_CFGR2_SRAM_PARITY_LOCK) |
AnnaBridge | 163:e59c8e839560 | 363 | #define LL_SYSCFG_TIMBREAK_SRAM_PARITY SYSCFG_CFGR2_SRAM_PARITY_LOCK /*!< Enables and locks the SRAM_PARITY error signal with Break Input of TIMx */ |
AnnaBridge | 163:e59c8e839560 | 364 | #endif /* SYSCFG_CFGR2_SRAM_PARITY_LOCK */ |
AnnaBridge | 163:e59c8e839560 | 365 | #define LL_SYSCFG_TIMBREAK_LOCKUP SYSCFG_CFGR2_LOCKUP_LOCK /*!< Enables and locks the LOCKUP (Hardfault) output of CortexM0 with Break Input of TIMx */ |
AnnaBridge | 163:e59c8e839560 | 366 | /** |
AnnaBridge | 163:e59c8e839560 | 367 | * @} |
AnnaBridge | 163:e59c8e839560 | 368 | */ |
AnnaBridge | 163:e59c8e839560 | 369 | |
AnnaBridge | 163:e59c8e839560 | 370 | #if defined(SYSCFG_RCR_PAGE0) |
AnnaBridge | 163:e59c8e839560 | 371 | /** @defgroup SYSTEM_LL_EC_CCMSRAMWRP SYSCFG CCM SRAM WRP |
AnnaBridge | 163:e59c8e839560 | 372 | * @{ |
AnnaBridge | 163:e59c8e839560 | 373 | */ |
AnnaBridge | 163:e59c8e839560 | 374 | #define LL_SYSCFG_CCMSRAMWRP_PAGE0 SYSCFG_RCR_PAGE0 /*!< ICODE SRAM Write protection page 0 */ |
AnnaBridge | 163:e59c8e839560 | 375 | #define LL_SYSCFG_CCMSRAMWRP_PAGE1 SYSCFG_RCR_PAGE1 /*!< ICODE SRAM Write protection page 1 */ |
AnnaBridge | 163:e59c8e839560 | 376 | #define LL_SYSCFG_CCMSRAMWRP_PAGE2 SYSCFG_RCR_PAGE2 /*!< ICODE SRAM Write protection page 2 */ |
AnnaBridge | 163:e59c8e839560 | 377 | #define LL_SYSCFG_CCMSRAMWRP_PAGE3 SYSCFG_RCR_PAGE3 /*!< ICODE SRAM Write protection page 3 */ |
AnnaBridge | 163:e59c8e839560 | 378 | #if defined(SYSCFG_RCR_PAGE4) |
AnnaBridge | 163:e59c8e839560 | 379 | #define LL_SYSCFG_CCMSRAMWRP_PAGE4 SYSCFG_RCR_PAGE4 /*!< ICODE SRAM Write protection page 4 */ |
AnnaBridge | 163:e59c8e839560 | 380 | #define LL_SYSCFG_CCMSRAMWRP_PAGE5 SYSCFG_RCR_PAGE5 /*!< ICODE SRAM Write protection page 5 */ |
AnnaBridge | 163:e59c8e839560 | 381 | #define LL_SYSCFG_CCMSRAMWRP_PAGE6 SYSCFG_RCR_PAGE6 /*!< ICODE SRAM Write protection page 6 */ |
AnnaBridge | 163:e59c8e839560 | 382 | #define LL_SYSCFG_CCMSRAMWRP_PAGE7 SYSCFG_RCR_PAGE7 /*!< ICODE SRAM Write protection page 7 */ |
AnnaBridge | 163:e59c8e839560 | 383 | #endif |
AnnaBridge | 163:e59c8e839560 | 384 | #if defined(SYSCFG_RCR_PAGE8) |
AnnaBridge | 163:e59c8e839560 | 385 | #define LL_SYSCFG_CCMSRAMWRP_PAGE8 SYSCFG_RCR_PAGE8 /*!< ICODE SRAM Write protection page 8 */ |
AnnaBridge | 163:e59c8e839560 | 386 | #define LL_SYSCFG_CCMSRAMWRP_PAGE9 SYSCFG_RCR_PAGE9 /*!< ICODE SRAM Write protection page 9 */ |
AnnaBridge | 163:e59c8e839560 | 387 | #define LL_SYSCFG_CCMSRAMWRP_PAGE10 SYSCFG_RCR_PAGE10 /*!< ICODE SRAM Write protection page 10 */ |
AnnaBridge | 163:e59c8e839560 | 388 | #define LL_SYSCFG_CCMSRAMWRP_PAGE11 SYSCFG_RCR_PAGE11 /*!< ICODE SRAM Write protection page 11 */ |
AnnaBridge | 163:e59c8e839560 | 389 | #define LL_SYSCFG_CCMSRAMWRP_PAGE12 SYSCFG_RCR_PAGE12 /*!< ICODE SRAM Write protection page 12 */ |
AnnaBridge | 163:e59c8e839560 | 390 | #define LL_SYSCFG_CCMSRAMWRP_PAGE13 SYSCFG_RCR_PAGE13 /*!< ICODE SRAM Write protection page 13 */ |
AnnaBridge | 163:e59c8e839560 | 391 | #define LL_SYSCFG_CCMSRAMWRP_PAGE14 SYSCFG_RCR_PAGE14 /*!< ICODE SRAM Write protection page 14 */ |
AnnaBridge | 163:e59c8e839560 | 392 | #define LL_SYSCFG_CCMSRAMWRP_PAGE15 SYSCFG_RCR_PAGE15 /*!< ICODE SRAM Write protection page 15 */ |
AnnaBridge | 163:e59c8e839560 | 393 | #endif |
AnnaBridge | 163:e59c8e839560 | 394 | /** |
AnnaBridge | 163:e59c8e839560 | 395 | * @} |
AnnaBridge | 163:e59c8e839560 | 396 | */ |
AnnaBridge | 163:e59c8e839560 | 397 | |
AnnaBridge | 163:e59c8e839560 | 398 | #endif /* SYSCFG_RCR_PAGE0 */ |
AnnaBridge | 163:e59c8e839560 | 399 | |
AnnaBridge | 163:e59c8e839560 | 400 | /** @defgroup SYSTEM_LL_EC_TRACE DBGMCU TRACE Pin Assignment |
AnnaBridge | 163:e59c8e839560 | 401 | * @{ |
AnnaBridge | 163:e59c8e839560 | 402 | */ |
AnnaBridge | 168:b9e159c1930a | 403 | #define LL_DBGMCU_TRACE_NONE 0x00000000U /*!< TRACE pins not assigned (default state) */ |
AnnaBridge | 163:e59c8e839560 | 404 | #define LL_DBGMCU_TRACE_ASYNCH DBGMCU_CR_TRACE_IOEN /*!< TRACE pin assignment for Asynchronous Mode */ |
AnnaBridge | 163:e59c8e839560 | 405 | #define LL_DBGMCU_TRACE_SYNCH_SIZE1 (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE_0) /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 1 */ |
AnnaBridge | 163:e59c8e839560 | 406 | #define LL_DBGMCU_TRACE_SYNCH_SIZE2 (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE_1) /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 2 */ |
AnnaBridge | 163:e59c8e839560 | 407 | #define LL_DBGMCU_TRACE_SYNCH_SIZE4 (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE) /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 4 */ |
AnnaBridge | 163:e59c8e839560 | 408 | /** |
AnnaBridge | 163:e59c8e839560 | 409 | * @} |
AnnaBridge | 163:e59c8e839560 | 410 | */ |
AnnaBridge | 163:e59c8e839560 | 411 | |
AnnaBridge | 163:e59c8e839560 | 412 | /** @defgroup SYSTEM_LL_EC_APB1_GRP1_STOP_IP DBGMCU APB1 GRP1 STOP IP |
AnnaBridge | 163:e59c8e839560 | 413 | * @{ |
AnnaBridge | 163:e59c8e839560 | 414 | */ |
AnnaBridge | 163:e59c8e839560 | 415 | #define LL_DBGMCU_APB1_GRP1_TIM2_STOP DBGMCU_APB1_FZ_DBG_TIM2_STOP /*!< TIM2 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 416 | #if defined(DBGMCU_APB1_FZ_DBG_TIM3_STOP) |
AnnaBridge | 163:e59c8e839560 | 417 | #define LL_DBGMCU_APB1_GRP1_TIM3_STOP DBGMCU_APB1_FZ_DBG_TIM3_STOP /*!< TIM3 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 418 | #endif /*DBGMCU_APB1_FZ_DBG_TIM3_STOP*/ |
AnnaBridge | 163:e59c8e839560 | 419 | #if defined(DBGMCU_APB1_FZ_DBG_TIM4_STOP) |
AnnaBridge | 163:e59c8e839560 | 420 | #define LL_DBGMCU_APB1_GRP1_TIM4_STOP DBGMCU_APB1_FZ_DBG_TIM4_STOP /*!< TIM4 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 421 | #endif /*DBGMCU_APB1_FZ_DBG_TIM4_STOP*/ |
AnnaBridge | 163:e59c8e839560 | 422 | #if defined(DBGMCU_APB1_FZ_DBG_TIM5_STOP) |
AnnaBridge | 163:e59c8e839560 | 423 | #define LL_DBGMCU_APB1_GRP1_TIM5_STOP DBGMCU_APB1_FZ_DBG_TIM5_STOP /*!< TIM5 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 424 | #endif /*DBGMCU_APB1_FZ_DBG_TIM5_STOP*/ |
AnnaBridge | 163:e59c8e839560 | 425 | #define LL_DBGMCU_APB1_GRP1_TIM6_STOP DBGMCU_APB1_FZ_DBG_TIM6_STOP /*!< TIM6 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 426 | #if defined(DBGMCU_APB1_FZ_DBG_TIM7_STOP) |
AnnaBridge | 163:e59c8e839560 | 427 | #define LL_DBGMCU_APB1_GRP1_TIM7_STOP DBGMCU_APB1_FZ_DBG_TIM7_STOP /*!< TIM7 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 428 | #endif /*DBGMCU_APB1_FZ_DBG_TIM7_STOP*/ |
AnnaBridge | 163:e59c8e839560 | 429 | #if defined(DBGMCU_APB1_FZ_DBG_TIM12_STOP) |
AnnaBridge | 163:e59c8e839560 | 430 | #define LL_DBGMCU_APB1_GRP1_TIM12_STOP DBGMCU_APB1_FZ_DBG_TIM12_STOP /*!< TIM12 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 431 | #endif /*DBGMCU_APB1_FZ_DBG_TIM12_STOP*/ |
AnnaBridge | 163:e59c8e839560 | 432 | #if defined(DBGMCU_APB1_FZ_DBG_TIM13_STOP) |
AnnaBridge | 163:e59c8e839560 | 433 | #define LL_DBGMCU_APB1_GRP1_TIM13_STOP DBGMCU_APB1_FZ_DBG_TIM13_STOP /*!< TIM13 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 434 | #endif /*DBGMCU_APB1_FZ_DBG_TIM13_STOP*/ |
AnnaBridge | 163:e59c8e839560 | 435 | #if defined(DBGMCU_APB1_FZ_DBG_TIM14_STOP) |
AnnaBridge | 163:e59c8e839560 | 436 | #define LL_DBGMCU_APB1_GRP1_TIM14_STOP DBGMCU_APB1_FZ_DBG_TIM14_STOP /*!< TIM14 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 437 | #endif /*DBGMCU_APB1_FZ_DBG_TIM14_STOP*/ |
AnnaBridge | 163:e59c8e839560 | 438 | #if defined(DBGMCU_APB1_FZ_DBG_TIM18_STOP) |
AnnaBridge | 163:e59c8e839560 | 439 | #define LL_DBGMCU_APB1_GRP1_TIM18_STOP DBGMCU_APB1_FZ_DBG_TIM18_STOP /*!< TIM18 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 440 | #endif /*DBGMCU_APB1_FZ_DBG_TIM18_STOP*/ |
AnnaBridge | 163:e59c8e839560 | 441 | #define LL_DBGMCU_APB1_GRP1_RTC_STOP DBGMCU_APB1_FZ_DBG_RTC_STOP /*!< RTC counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 442 | #define LL_DBGMCU_APB1_GRP1_WWDG_STOP DBGMCU_APB1_FZ_DBG_WWDG_STOP /*!< Debug Window Watchdog stopped when Core is halted */ |
AnnaBridge | 163:e59c8e839560 | 443 | #define LL_DBGMCU_APB1_GRP1_IWDG_STOP DBGMCU_APB1_FZ_DBG_IWDG_STOP /*!< Debug Independent Watchdog stopped when Core is halted */ |
AnnaBridge | 163:e59c8e839560 | 444 | #define LL_DBGMCU_APB1_GRP1_I2C1_STOP DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT /*!< I2C1 SMBUS timeout mode stopped when Core is halted */ |
AnnaBridge | 163:e59c8e839560 | 445 | #if defined(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT) |
AnnaBridge | 163:e59c8e839560 | 446 | #define LL_DBGMCU_APB1_GRP1_I2C2_STOP DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT /*!< I2C2 SMBUS timeout mode stopped when Core is halted */ |
AnnaBridge | 163:e59c8e839560 | 447 | #endif /*DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT*/ |
AnnaBridge | 163:e59c8e839560 | 448 | #if defined(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT) |
AnnaBridge | 163:e59c8e839560 | 449 | #define LL_DBGMCU_APB1_GRP1_I2C3_STOP DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT /*!< I2C3 SMBUS timeout mode stopped when Core is halted */ |
AnnaBridge | 163:e59c8e839560 | 450 | #endif /*DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT*/ |
AnnaBridge | 163:e59c8e839560 | 451 | #if defined(DBGMCU_APB1_FZ_DBG_CAN_STOP) |
AnnaBridge | 163:e59c8e839560 | 452 | #define LL_DBGMCU_APB1_GRP1_CAN_STOP DBGMCU_APB1_FZ_DBG_CAN_STOP /*!< CAN debug stopped when Core is halted */ |
AnnaBridge | 163:e59c8e839560 | 453 | #endif /*DBGMCU_APB1_FZ_DBG_CAN_STOP*/ |
AnnaBridge | 163:e59c8e839560 | 454 | /** |
AnnaBridge | 163:e59c8e839560 | 455 | * @} |
AnnaBridge | 163:e59c8e839560 | 456 | */ |
AnnaBridge | 163:e59c8e839560 | 457 | |
AnnaBridge | 163:e59c8e839560 | 458 | /** @defgroup SYSTEM_LL_EC_APB2_GRP1_STOP_IP DBGMCU APB2 GRP1 STOP IP |
AnnaBridge | 163:e59c8e839560 | 459 | * @{ |
AnnaBridge | 163:e59c8e839560 | 460 | */ |
AnnaBridge | 163:e59c8e839560 | 461 | #if defined(DBGMCU_APB2_FZ_DBG_TIM1_STOP) |
AnnaBridge | 163:e59c8e839560 | 462 | #define LL_DBGMCU_APB2_GRP1_TIM1_STOP DBGMCU_APB2_FZ_DBG_TIM1_STOP /*!< TIM1 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 463 | #endif /*DBGMCU_APB2_FZ_DBG_TIM1_STOP*/ |
AnnaBridge | 163:e59c8e839560 | 464 | #if defined(DBGMCU_APB2_FZ_DBG_TIM8_STOP) |
AnnaBridge | 163:e59c8e839560 | 465 | #define LL_DBGMCU_APB2_GRP1_TIM8_STOP DBGMCU_APB2_FZ_DBG_TIM8_STOP /*!< TIM8 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 466 | #endif /*DBGMCU_APB2_FZ_DBG_TIM8_STOP*/ |
AnnaBridge | 163:e59c8e839560 | 467 | #define LL_DBGMCU_APB2_GRP1_TIM15_STOP DBGMCU_APB2_FZ_DBG_TIM15_STOP /*!< TIM15 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 468 | #define LL_DBGMCU_APB2_GRP1_TIM16_STOP DBGMCU_APB2_FZ_DBG_TIM16_STOP /*!< TIM16 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 469 | #define LL_DBGMCU_APB2_GRP1_TIM17_STOP DBGMCU_APB2_FZ_DBG_TIM17_STOP /*!< TIM17 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 470 | #if defined(DBGMCU_APB2_FZ_DBG_TIM19_STOP) |
AnnaBridge | 163:e59c8e839560 | 471 | #define LL_DBGMCU_APB2_GRP1_TIM19_STOP DBGMCU_APB2_FZ_DBG_TIM19_STOP /*!< TIM19 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 472 | #endif /*DBGMCU_APB2_FZ_DBG_TIM19_STOP*/ |
AnnaBridge | 163:e59c8e839560 | 473 | #if defined(DBGMCU_APB2_FZ_DBG_TIM20_STOP) |
AnnaBridge | 163:e59c8e839560 | 474 | #define LL_DBGMCU_APB2_GRP1_TIM20_STOP DBGMCU_APB2_FZ_DBG_TIM20_STOP /*!< TIM20 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 475 | #endif /*DBGMCU_APB2_FZ_DBG_TIM20_STOP*/ |
AnnaBridge | 163:e59c8e839560 | 476 | #if defined(DBGMCU_APB2_FZ_DBG_HRTIM1_STOP) |
AnnaBridge | 163:e59c8e839560 | 477 | #define LL_DBGMCU_APB2_GRP1_HRTIM1_STOP DBGMCU_APB2_FZ_DBG_HRTIM1_STOP /*!< HRTIM1 counter stopped when core is halted */ |
AnnaBridge | 163:e59c8e839560 | 478 | #endif /*DBGMCU_APB2_FZ_DBG_HRTIM1_STOP*/ |
AnnaBridge | 163:e59c8e839560 | 479 | /** |
AnnaBridge | 163:e59c8e839560 | 480 | * @} |
AnnaBridge | 163:e59c8e839560 | 481 | */ |
AnnaBridge | 163:e59c8e839560 | 482 | |
AnnaBridge | 163:e59c8e839560 | 483 | /** @defgroup SYSTEM_LL_EC_LATENCY FLASH LATENCY |
AnnaBridge | 163:e59c8e839560 | 484 | * @{ |
AnnaBridge | 163:e59c8e839560 | 485 | */ |
AnnaBridge | 168:b9e159c1930a | 486 | #define LL_FLASH_LATENCY_0 0x00000000U /*!< FLASH Zero Latency cycle */ |
AnnaBridge | 163:e59c8e839560 | 487 | #define LL_FLASH_LATENCY_1 FLASH_ACR_LATENCY_0 /*!< FLASH One Latency cycle */ |
AnnaBridge | 163:e59c8e839560 | 488 | #define LL_FLASH_LATENCY_2 FLASH_ACR_LATENCY_1 /*!< FLASH Two Latency cycles */ |
AnnaBridge | 163:e59c8e839560 | 489 | /** |
AnnaBridge | 163:e59c8e839560 | 490 | * @} |
AnnaBridge | 163:e59c8e839560 | 491 | */ |
AnnaBridge | 163:e59c8e839560 | 492 | |
AnnaBridge | 163:e59c8e839560 | 493 | /** |
AnnaBridge | 163:e59c8e839560 | 494 | * @} |
AnnaBridge | 163:e59c8e839560 | 495 | */ |
AnnaBridge | 163:e59c8e839560 | 496 | |
AnnaBridge | 163:e59c8e839560 | 497 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 163:e59c8e839560 | 498 | |
AnnaBridge | 163:e59c8e839560 | 499 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 163:e59c8e839560 | 500 | /** @defgroup SYSTEM_LL_Exported_Functions SYSTEM Exported Functions |
AnnaBridge | 163:e59c8e839560 | 501 | * @{ |
AnnaBridge | 163:e59c8e839560 | 502 | */ |
AnnaBridge | 163:e59c8e839560 | 503 | |
AnnaBridge | 163:e59c8e839560 | 504 | /** @defgroup SYSTEM_LL_EF_SYSCFG SYSCFG |
AnnaBridge | 163:e59c8e839560 | 505 | * @{ |
AnnaBridge | 163:e59c8e839560 | 506 | */ |
AnnaBridge | 163:e59c8e839560 | 507 | |
AnnaBridge | 163:e59c8e839560 | 508 | /** |
AnnaBridge | 163:e59c8e839560 | 509 | * @brief Set memory mapping at address 0x00000000 |
AnnaBridge | 163:e59c8e839560 | 510 | * @rmtoll SYSCFG_CFGR1 MEM_MODE LL_SYSCFG_SetRemapMemory |
AnnaBridge | 163:e59c8e839560 | 511 | * @param Memory This parameter can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 512 | * @arg @ref LL_SYSCFG_REMAP_FLASH |
AnnaBridge | 163:e59c8e839560 | 513 | * @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH |
AnnaBridge | 163:e59c8e839560 | 514 | * @arg @ref LL_SYSCFG_REMAP_SRAM |
AnnaBridge | 163:e59c8e839560 | 515 | * @arg @ref LL_SYSCFG_REMAP_FMC (*) |
AnnaBridge | 163:e59c8e839560 | 516 | * |
AnnaBridge | 163:e59c8e839560 | 517 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 518 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 519 | */ |
AnnaBridge | 163:e59c8e839560 | 520 | __STATIC_INLINE void LL_SYSCFG_SetRemapMemory(uint32_t Memory) |
AnnaBridge | 163:e59c8e839560 | 521 | { |
AnnaBridge | 163:e59c8e839560 | 522 | MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, Memory); |
AnnaBridge | 163:e59c8e839560 | 523 | } |
AnnaBridge | 163:e59c8e839560 | 524 | |
AnnaBridge | 163:e59c8e839560 | 525 | /** |
AnnaBridge | 163:e59c8e839560 | 526 | * @brief Get memory mapping at address 0x00000000 |
AnnaBridge | 163:e59c8e839560 | 527 | * @rmtoll SYSCFG_CFGR1 MEM_MODE LL_SYSCFG_GetRemapMemory |
AnnaBridge | 163:e59c8e839560 | 528 | * @retval Returned value can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 529 | * @arg @ref LL_SYSCFG_REMAP_FLASH |
AnnaBridge | 163:e59c8e839560 | 530 | * @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH |
AnnaBridge | 163:e59c8e839560 | 531 | * @arg @ref LL_SYSCFG_REMAP_SRAM |
AnnaBridge | 163:e59c8e839560 | 532 | * @arg @ref LL_SYSCFG_REMAP_FMC (*) |
AnnaBridge | 163:e59c8e839560 | 533 | * |
AnnaBridge | 163:e59c8e839560 | 534 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 535 | */ |
AnnaBridge | 163:e59c8e839560 | 536 | __STATIC_INLINE uint32_t LL_SYSCFG_GetRemapMemory(void) |
AnnaBridge | 163:e59c8e839560 | 537 | { |
AnnaBridge | 163:e59c8e839560 | 538 | return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)); |
AnnaBridge | 163:e59c8e839560 | 539 | } |
AnnaBridge | 163:e59c8e839560 | 540 | |
AnnaBridge | 163:e59c8e839560 | 541 | #if defined(SYSCFG_CFGR3_SPI1_RX_DMA_RMP) |
AnnaBridge | 163:e59c8e839560 | 542 | /** |
AnnaBridge | 163:e59c8e839560 | 543 | * @brief Set DMA request remapping bits for SPI |
AnnaBridge | 163:e59c8e839560 | 544 | * @rmtoll SYSCFG_CFGR3 SPI1_RX_DMA_RMP LL_SYSCFG_SetRemapDMA_SPI\n |
AnnaBridge | 163:e59c8e839560 | 545 | * SYSCFG_CFGR3 SPI1_TX_DMA_RMP LL_SYSCFG_SetRemapDMA_SPI |
AnnaBridge | 163:e59c8e839560 | 546 | * @param Remap This parameter can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 547 | * @arg @ref LL_SYSCFG_SPI1RX_RMP_DMA1_CH2 |
AnnaBridge | 163:e59c8e839560 | 548 | * @arg @ref LL_SYSCFG_SPI1RX_RMP_DMA1_CH4 |
AnnaBridge | 163:e59c8e839560 | 549 | * @arg @ref LL_SYSCFG_SPI1RX_RMP_DMA1_CH6 |
AnnaBridge | 163:e59c8e839560 | 550 | * @arg @ref LL_SYSCFG_SPI1TX_RMP_DMA1_CH3 |
AnnaBridge | 163:e59c8e839560 | 551 | * @arg @ref LL_SYSCFG_SPI1TX_RMP_DMA1_CH5 |
AnnaBridge | 163:e59c8e839560 | 552 | * @arg @ref LL_SYSCFG_SPI1TX_RMP_DMA1_CH7 |
AnnaBridge | 163:e59c8e839560 | 553 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 554 | */ |
AnnaBridge | 163:e59c8e839560 | 555 | __STATIC_INLINE void LL_SYSCFG_SetRemapDMA_SPI(uint32_t Remap) |
AnnaBridge | 163:e59c8e839560 | 556 | { |
AnnaBridge | 163:e59c8e839560 | 557 | MODIFY_REG(SYSCFG->CFGR3, (Remap >> 16U), (Remap & 0x0000FFFF)); |
AnnaBridge | 163:e59c8e839560 | 558 | } |
AnnaBridge | 163:e59c8e839560 | 559 | #endif /* SYSCFG_CFGR3_SPI1_RX_DMA_RMP */ |
AnnaBridge | 163:e59c8e839560 | 560 | |
AnnaBridge | 163:e59c8e839560 | 561 | #if defined(SYSCFG_CFGR3_I2C1_RX_DMA_RMP) |
AnnaBridge | 163:e59c8e839560 | 562 | /** |
AnnaBridge | 163:e59c8e839560 | 563 | * @brief Set DMA request remapping bits for I2C |
AnnaBridge | 163:e59c8e839560 | 564 | * @rmtoll SYSCFG_CFGR3 I2C1_RX_DMA_RMP LL_SYSCFG_SetRemapDMA_I2C\n |
AnnaBridge | 163:e59c8e839560 | 565 | * SYSCFG_CFGR3 I2C1_TX_DMA_RMP LL_SYSCFG_SetRemapDMA_I2C |
AnnaBridge | 163:e59c8e839560 | 566 | * @param Remap This parameter can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 567 | * @arg @ref LL_SYSCFG_I2C1RX_RMP_DMA1_CH7 |
AnnaBridge | 163:e59c8e839560 | 568 | * @arg @ref LL_SYSCFG_I2C1RX_RMP_DMA1_CH3 |
AnnaBridge | 163:e59c8e839560 | 569 | * @arg @ref LL_SYSCFG_I2C1RX_RMP_DMA1_CH5 |
AnnaBridge | 163:e59c8e839560 | 570 | * @arg @ref LL_SYSCFG_I2C1TX_RMP_DMA1_CH6 |
AnnaBridge | 163:e59c8e839560 | 571 | * @arg @ref LL_SYSCFG_I2C1TX_RMP_DMA1_CH2 |
AnnaBridge | 163:e59c8e839560 | 572 | * @arg @ref LL_SYSCFG_I2C1TX_RMP_DMA1_CH4 |
AnnaBridge | 163:e59c8e839560 | 573 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 574 | */ |
AnnaBridge | 163:e59c8e839560 | 575 | __STATIC_INLINE void LL_SYSCFG_SetRemapDMA_I2C(uint32_t Remap) |
AnnaBridge | 163:e59c8e839560 | 576 | { |
AnnaBridge | 163:e59c8e839560 | 577 | MODIFY_REG(SYSCFG->CFGR3, (Remap >> 16U), (Remap & 0x0000FFFF)); |
AnnaBridge | 163:e59c8e839560 | 578 | } |
AnnaBridge | 163:e59c8e839560 | 579 | #endif /* SYSCFG_CFGR3_I2C1_RX_DMA_RMP */ |
AnnaBridge | 163:e59c8e839560 | 580 | |
AnnaBridge | 163:e59c8e839560 | 581 | #if defined(SYSCFG_CFGR1_ADC24_DMA_RMP) || defined(SYSCFG_CFGR3_ADC2_DMA_RMP) |
AnnaBridge | 163:e59c8e839560 | 582 | /** |
AnnaBridge | 163:e59c8e839560 | 583 | * @brief Set DMA request remapping bits for ADC |
AnnaBridge | 163:e59c8e839560 | 584 | * @rmtoll SYSCFG_CFGR1 ADC24_DMA_RMP LL_SYSCFG_SetRemapDMA_ADC\n |
AnnaBridge | 163:e59c8e839560 | 585 | * SYSCFG_CFGR3 ADC2_DMA_RMP LL_SYSCFG_SetRemapDMA_ADC |
AnnaBridge | 163:e59c8e839560 | 586 | * @param Remap This parameter can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 587 | * @arg @ref LL_SYSCFG_ADC24_RMP_DMA2_CH12 (*) |
AnnaBridge | 163:e59c8e839560 | 588 | * @arg @ref LL_SYSCFG_ADC24_RMP_DMA2_CH34 (*) |
AnnaBridge | 163:e59c8e839560 | 589 | * @arg @ref LL_SYSCFG_ADC2_RMP_DMA1_CH2 (*) |
AnnaBridge | 163:e59c8e839560 | 590 | * @arg @ref LL_SYSCFG_ADC2_RMP_DMA1_CH4 (*) |
AnnaBridge | 163:e59c8e839560 | 591 | * @arg @ref LL_SYSCFG_ADC2_RMP_DMA2 (*) |
AnnaBridge | 163:e59c8e839560 | 592 | * @arg @ref LL_SYSCFG_ADC2_RMP_DMA1 (*) |
AnnaBridge | 163:e59c8e839560 | 593 | * |
AnnaBridge | 163:e59c8e839560 | 594 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 595 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 596 | */ |
AnnaBridge | 163:e59c8e839560 | 597 | __STATIC_INLINE void LL_SYSCFG_SetRemapDMA_ADC(uint32_t Remap) |
AnnaBridge | 163:e59c8e839560 | 598 | { |
AnnaBridge | 163:e59c8e839560 | 599 | __IO uint32_t *reg = (__IO uint32_t *)(uint32_t)(SYSCFG_BASE + (Remap >> 24U)); |
AnnaBridge | 163:e59c8e839560 | 600 | MODIFY_REG(*reg, (Remap & 0x00FF0000U) >> 8U, (Remap & 0x0000FFFFU)); |
AnnaBridge | 163:e59c8e839560 | 601 | } |
AnnaBridge | 163:e59c8e839560 | 602 | #endif /* SYSCFG_CFGR1_ADC24_DMA_RMP || SYSCFG_CFGR3_ADC2_DMA_RMP */ |
AnnaBridge | 163:e59c8e839560 | 603 | |
AnnaBridge | 163:e59c8e839560 | 604 | /** |
AnnaBridge | 163:e59c8e839560 | 605 | * @brief Set DMA request remapping bits for DAC |
AnnaBridge | 163:e59c8e839560 | 606 | * @rmtoll SYSCFG_CFGR1 TIM6DAC1Ch1_DMA_RMP LL_SYSCFG_SetRemapDMA_DAC\n |
AnnaBridge | 163:e59c8e839560 | 607 | * SYSCFG_CFGR1 DAC2Ch1_DMA_RMP LL_SYSCFG_SetRemapDMA_DAC |
AnnaBridge | 163:e59c8e839560 | 608 | * @param Remap This parameter can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 609 | * @arg @ref LL_SYSCFG_DAC1_CH1_RMP_DMA2_CH3 |
AnnaBridge | 163:e59c8e839560 | 610 | * @arg @ref LL_SYSCFG_DAC1_CH1_RMP_DMA1_CH3 |
AnnaBridge | 163:e59c8e839560 | 611 | * @arg @ref LL_SYSCFG_DAC1_OUT2_RMP_DMA2_CH4 (*) |
AnnaBridge | 163:e59c8e839560 | 612 | * @arg @ref LL_SYSCFG_DAC1_OUT2_RMP_DMA1_CH4 (*) |
AnnaBridge | 163:e59c8e839560 | 613 | * @arg @ref LL_SYSCFG_DAC2_OUT1_RMP_DMA2_CH5 (*) |
AnnaBridge | 163:e59c8e839560 | 614 | * @arg @ref LL_SYSCFG_DAC2_OUT1_RMP_DMA1_CH5 (*) |
AnnaBridge | 163:e59c8e839560 | 615 | * @arg @ref LL_SYSCFG_DAC2_CH1_RMP_NO (*) |
AnnaBridge | 163:e59c8e839560 | 616 | * @arg @ref LL_SYSCFG_DAC2_CH1_RMP_DMA1_CH5 (*) |
AnnaBridge | 163:e59c8e839560 | 617 | * |
AnnaBridge | 163:e59c8e839560 | 618 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 619 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 620 | */ |
AnnaBridge | 163:e59c8e839560 | 621 | __STATIC_INLINE void LL_SYSCFG_SetRemapDMA_DAC(uint32_t Remap) |
AnnaBridge | 163:e59c8e839560 | 622 | { |
AnnaBridge | 163:e59c8e839560 | 623 | MODIFY_REG(SYSCFG->CFGR1, (Remap & 0x00FF0000U) >> 8U, (Remap & 0x0000FF00U)); |
AnnaBridge | 163:e59c8e839560 | 624 | } |
AnnaBridge | 163:e59c8e839560 | 625 | |
AnnaBridge | 163:e59c8e839560 | 626 | /** |
AnnaBridge | 163:e59c8e839560 | 627 | * @brief Set DMA request remapping bits for TIM |
AnnaBridge | 163:e59c8e839560 | 628 | * @rmtoll SYSCFG_CFGR1 TIM16_DMA_RMP LL_SYSCFG_SetRemapDMA_TIM\n |
AnnaBridge | 163:e59c8e839560 | 629 | * SYSCFG_CFGR1 TIM17_DMA_RMP LL_SYSCFG_SetRemapDMA_TIM\n |
AnnaBridge | 163:e59c8e839560 | 630 | * SYSCFG_CFGR1 TIM6DAC1Ch1_DMA_RMP LL_SYSCFG_SetRemapDMA_TIM\n |
AnnaBridge | 163:e59c8e839560 | 631 | * SYSCFG_CFGR1 TIM7DAC1Ch2_DMA_RMP LL_SYSCFG_SetRemapDMA_TIM\n |
AnnaBridge | 163:e59c8e839560 | 632 | * SYSCFG_CFGR1 TIM18DAC2Ch1_DMA_RMP LL_SYSCFG_SetRemapDMA_TIM |
AnnaBridge | 163:e59c8e839560 | 633 | * @param Remap This parameter can be a combination of the following values: |
AnnaBridge | 163:e59c8e839560 | 634 | * @arg @ref LL_SYSCFG_TIM16_RMP_DMA1_CH3 or @ref LL_SYSCFG_TIM16_RMP_DMA1_CH6 |
AnnaBridge | 163:e59c8e839560 | 635 | * @arg @ref LL_SYSCFG_TIM17_RMP_DMA1_CH1 or @ref LL_SYSCFG_TIM17_RMP_DMA1_CH7 |
AnnaBridge | 163:e59c8e839560 | 636 | * @arg @ref LL_SYSCFG_TIM6_RMP_DMA2_CH3 or @ref LL_SYSCFG_TIM6_RMP_DMA1_CH3 |
AnnaBridge | 163:e59c8e839560 | 637 | * @arg @ref LL_SYSCFG_TIM7_RMP_DMA2_CH4 or @ref LL_SYSCFG_TIM7_RMP_DMA1_CH4 (*) |
AnnaBridge | 163:e59c8e839560 | 638 | * @arg @ref LL_SYSCFG_TIM18_RMP_DMA2_CH5 or @ref LL_SYSCFG_TIM18_RMP_DMA1_CH5 (*) |
AnnaBridge | 163:e59c8e839560 | 639 | * |
AnnaBridge | 163:e59c8e839560 | 640 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 641 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 642 | */ |
AnnaBridge | 163:e59c8e839560 | 643 | __STATIC_INLINE void LL_SYSCFG_SetRemapDMA_TIM(uint32_t Remap) |
AnnaBridge | 163:e59c8e839560 | 644 | { |
AnnaBridge | 163:e59c8e839560 | 645 | MODIFY_REG(SYSCFG->CFGR1, (Remap & 0x00FF0000U) >> 8U, (Remap & 0x0000FF00U)); |
AnnaBridge | 163:e59c8e839560 | 646 | } |
AnnaBridge | 163:e59c8e839560 | 647 | |
AnnaBridge | 163:e59c8e839560 | 648 | #if defined(SYSCFG_CFGR1_TIM1_ITR3_RMP) || defined(SYSCFG_CFGR1_ENCODER_MODE) |
AnnaBridge | 163:e59c8e839560 | 649 | /** |
AnnaBridge | 163:e59c8e839560 | 650 | * @brief Set Timer input remap |
AnnaBridge | 163:e59c8e839560 | 651 | * @rmtoll SYSCFG_CFGR1 TIM1_ITR3_RMP LL_SYSCFG_SetRemapInput_TIM\n |
AnnaBridge | 163:e59c8e839560 | 652 | * SYSCFG_CFGR1 ENCODER_MODE LL_SYSCFG_SetRemapInput_TIM |
AnnaBridge | 163:e59c8e839560 | 653 | * @param Remap This parameter can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 654 | * @arg @ref LL_SYSCFG_TIM1_ITR3_RMP_TIM4_TRGO (*) |
AnnaBridge | 163:e59c8e839560 | 655 | * @arg @ref LL_SYSCFG_TIM1_ITR3_RMP_TIM17_OC (*) |
AnnaBridge | 163:e59c8e839560 | 656 | * @arg @ref LL_SYSCFG_TIM15_ENCODEMODE_NOREDIRECTION (*) |
AnnaBridge | 163:e59c8e839560 | 657 | * @arg @ref LL_SYSCFG_TIM15_ENCODEMODE_TIM2 (*) |
AnnaBridge | 163:e59c8e839560 | 658 | * @arg @ref LL_SYSCFG_TIM15_ENCODEMODE_TIM3 (*) |
AnnaBridge | 163:e59c8e839560 | 659 | * @arg @ref LL_SYSCFG_TIM15_ENCODEMODE_TIM4 (*) |
AnnaBridge | 163:e59c8e839560 | 660 | * |
AnnaBridge | 163:e59c8e839560 | 661 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 662 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 663 | */ |
AnnaBridge | 163:e59c8e839560 | 664 | __STATIC_INLINE void LL_SYSCFG_SetRemapInput_TIM(uint32_t Remap) |
AnnaBridge | 163:e59c8e839560 | 665 | { |
AnnaBridge | 163:e59c8e839560 | 666 | MODIFY_REG(SYSCFG->CFGR1, (Remap & 0xFF00FF00U) >> 8U, (Remap & 0x00FF00FFU)); |
AnnaBridge | 163:e59c8e839560 | 667 | } |
AnnaBridge | 163:e59c8e839560 | 668 | #endif /* SYSCFG_CFGR1_TIM1_ITR3_RMP || SYSCFG_CFGR1_ENCODER_MODE */ |
AnnaBridge | 163:e59c8e839560 | 669 | |
AnnaBridge | 163:e59c8e839560 | 670 | #if defined(SYSCFG_CFGR4_ADC12_EXT2_RMP) |
AnnaBridge | 163:e59c8e839560 | 671 | /** |
AnnaBridge | 163:e59c8e839560 | 672 | * @brief Set ADC Trigger remap |
AnnaBridge | 163:e59c8e839560 | 673 | * @rmtoll SYSCFG_CFGR4 ADC12_EXT2_RMP LL_SYSCFG_SetRemapTrigger_ADC\n |
AnnaBridge | 163:e59c8e839560 | 674 | * SYSCFG_CFGR4 ADC12_EXT3_RMP LL_SYSCFG_SetRemapTrigger_ADC\n |
AnnaBridge | 163:e59c8e839560 | 675 | * SYSCFG_CFGR4 ADC12_EXT5_RMP LL_SYSCFG_SetRemapTrigger_ADC\n |
AnnaBridge | 163:e59c8e839560 | 676 | * SYSCFG_CFGR4 ADC12_EXT13_RMP LL_SYSCFG_SetRemapTrigger_ADC\n |
AnnaBridge | 163:e59c8e839560 | 677 | * SYSCFG_CFGR4 ADC12_EXT15_RMP LL_SYSCFG_SetRemapTrigger_ADC\n |
AnnaBridge | 163:e59c8e839560 | 678 | * SYSCFG_CFGR4 ADC12_JEXT3_RMP LL_SYSCFG_SetRemapTrigger_ADC\n |
AnnaBridge | 163:e59c8e839560 | 679 | * SYSCFG_CFGR4 ADC12_JEXT6_RMP LL_SYSCFG_SetRemapTrigger_ADC\n |
AnnaBridge | 163:e59c8e839560 | 680 | * SYSCFG_CFGR4 ADC12_JEXT13_RMP LL_SYSCFG_SetRemapTrigger_ADC\n |
AnnaBridge | 163:e59c8e839560 | 681 | * SYSCFG_CFGR4 ADC34_EXT5_RMP LL_SYSCFG_SetRemapTrigger_ADC\n |
AnnaBridge | 163:e59c8e839560 | 682 | * SYSCFG_CFGR4 ADC34_EXT6_RMP LL_SYSCFG_SetRemapTrigger_ADC\n |
AnnaBridge | 163:e59c8e839560 | 683 | * SYSCFG_CFGR4 ADC34_EXT15_RMP LL_SYSCFG_SetRemapTrigger_ADC\n |
AnnaBridge | 163:e59c8e839560 | 684 | * SYSCFG_CFGR4 ADC34_JEXT5_RMP LL_SYSCFG_SetRemapTrigger_ADC\n |
AnnaBridge | 163:e59c8e839560 | 685 | * SYSCFG_CFGR4 ADC34_JEXT11_RMP LL_SYSCFG_SetRemapTrigger_ADC\n |
AnnaBridge | 163:e59c8e839560 | 686 | * SYSCFG_CFGR4 ADC34_JEXT14_RMP LL_SYSCFG_SetRemapTrigger_ADC |
AnnaBridge | 163:e59c8e839560 | 687 | * @param Remap This parameter can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 688 | * @arg @ref LL_SYSCFG_ADC12_EXT2_RMP_TIM1_CC3 |
AnnaBridge | 163:e59c8e839560 | 689 | * @arg @ref LL_SYSCFG_ADC12_EXT2_RMP_TIM20_TRGO |
AnnaBridge | 163:e59c8e839560 | 690 | * @arg @ref LL_SYSCFG_ADC12_EXT3_RMP_TIM2_CC2 |
AnnaBridge | 163:e59c8e839560 | 691 | * @arg @ref LL_SYSCFG_ADC12_EXT3_RMP_TIM20_TRGO2 |
AnnaBridge | 163:e59c8e839560 | 692 | * @arg @ref LL_SYSCFG_ADC12_EXT5_RMP_TIM4_CC4 |
AnnaBridge | 163:e59c8e839560 | 693 | * @arg @ref LL_SYSCFG_ADC12_EXT5_RMP_TIM20_CC1 |
AnnaBridge | 163:e59c8e839560 | 694 | * @arg @ref LL_SYSCFG_ADC12_EXT13_RMP_TIM6_TRGO |
AnnaBridge | 163:e59c8e839560 | 695 | * @arg @ref LL_SYSCFG_ADC12_EXT13_RMP_TIM20_CC2 |
AnnaBridge | 163:e59c8e839560 | 696 | * @arg @ref LL_SYSCFG_ADC12_EXT15_RMP_TIM3_CC4 |
AnnaBridge | 163:e59c8e839560 | 697 | * @arg @ref LL_SYSCFG_ADC12_EXT15_RMP_TIM20_CC3 |
AnnaBridge | 163:e59c8e839560 | 698 | * @arg @ref LL_SYSCFG_ADC12_JEXT3_RMP_TIM2_CC1 |
AnnaBridge | 163:e59c8e839560 | 699 | * @arg @ref LL_SYSCFG_ADC12_JEXT3_RMP_TIM20_TRGO |
AnnaBridge | 163:e59c8e839560 | 700 | * @arg @ref LL_SYSCFG_ADC12_JEXT6_RMP_EXTI_LINE_15 |
AnnaBridge | 163:e59c8e839560 | 701 | * @arg @ref LL_SYSCFG_ADC12_JEXT6_RMP_TIM20_TRGO2 |
AnnaBridge | 163:e59c8e839560 | 702 | * @arg @ref LL_SYSCFG_ADC12_JEXT13_RMP_TIM3_CC1 |
AnnaBridge | 163:e59c8e839560 | 703 | * @arg @ref LL_SYSCFG_ADC12_JEXT13_RMP_TIM20_CC4 |
AnnaBridge | 163:e59c8e839560 | 704 | * @arg @ref LL_SYSCFG_ADC34_EXT5_RMP_EXTI_LINE_2 |
AnnaBridge | 163:e59c8e839560 | 705 | * @arg @ref LL_SYSCFG_ADC34_EXT5_RMP_TIM20_TRGO |
AnnaBridge | 163:e59c8e839560 | 706 | * @arg @ref LL_SYSCFG_ADC34_EXT6_RMP_TIM4_CC1 |
AnnaBridge | 163:e59c8e839560 | 707 | * @arg @ref LL_SYSCFG_ADC34_EXT6_RMP_TIM20_TRGO2 |
AnnaBridge | 163:e59c8e839560 | 708 | * @arg @ref LL_SYSCFG_ADC34_EXT15_RMP_TIM2_CC1 |
AnnaBridge | 163:e59c8e839560 | 709 | * @arg @ref LL_SYSCFG_ADC34_EXT15_RMP_TIM20_CC1 |
AnnaBridge | 163:e59c8e839560 | 710 | * @arg @ref LL_SYSCFG_ADC34_JEXT5_RMP_TIM4_CC3 |
AnnaBridge | 163:e59c8e839560 | 711 | * @arg @ref LL_SYSCFG_ADC34_JEXT5_RMP_TIM20_TRGO |
AnnaBridge | 163:e59c8e839560 | 712 | * @arg @ref LL_SYSCFG_ADC34_JEXT11_RMP_TIM1_CC3 |
AnnaBridge | 163:e59c8e839560 | 713 | * @arg @ref LL_SYSCFG_ADC34_JEXT11_RMP_TIM20_TRGO2 |
AnnaBridge | 163:e59c8e839560 | 714 | * @arg @ref LL_SYSCFG_ADC34_JEXT14_RMP_TIM7_TRGO |
AnnaBridge | 163:e59c8e839560 | 715 | * @arg @ref LL_SYSCFG_ADC34_JEXT14_RMP_TIM20_CC2 |
AnnaBridge | 163:e59c8e839560 | 716 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 717 | */ |
AnnaBridge | 163:e59c8e839560 | 718 | __STATIC_INLINE void LL_SYSCFG_SetRemapTrigger_ADC(uint32_t Remap) |
AnnaBridge | 163:e59c8e839560 | 719 | { |
AnnaBridge | 163:e59c8e839560 | 720 | MODIFY_REG(SYSCFG->CFGR4, (Remap & 0xFFFF0000U) >> 16U, (Remap & 0x0000FFFFU)); |
AnnaBridge | 163:e59c8e839560 | 721 | } |
AnnaBridge | 163:e59c8e839560 | 722 | #endif /* SYSCFG_CFGR4_ADC12_EXT2_RMP */ |
AnnaBridge | 163:e59c8e839560 | 723 | |
AnnaBridge | 163:e59c8e839560 | 724 | #if defined(SYSCFG_CFGR1_DAC1_TRIG1_RMP) || defined(SYSCFG_CFGR3_TRIGGER_RMP) |
AnnaBridge | 163:e59c8e839560 | 725 | /** |
AnnaBridge | 163:e59c8e839560 | 726 | * @brief Set DAC Trigger remap |
AnnaBridge | 163:e59c8e839560 | 727 | * @rmtoll SYSCFG_CFGR1 DAC1_TRIG1_RMP LL_SYSCFG_SetRemapTrigger_DAC\n |
AnnaBridge | 163:e59c8e839560 | 728 | * SYSCFG_CFGR3 DAC1_TRG3_RMP LL_SYSCFG_SetRemapTrigger_DAC\n |
AnnaBridge | 163:e59c8e839560 | 729 | * SYSCFG_CFGR3 DAC1_TRG5_RMP LL_SYSCFG_SetRemapTrigger_DAC |
AnnaBridge | 163:e59c8e839560 | 730 | * @param Remap This parameter can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 731 | * @arg @ref LL_SYSCFG_DAC1_TRIG1_RMP_TIM8_TRGO (*) |
AnnaBridge | 163:e59c8e839560 | 732 | * @arg @ref LL_SYSCFG_DAC1_TRIG1_RMP_TIM3_TRGO (*) |
AnnaBridge | 163:e59c8e839560 | 733 | * @arg @ref LL_SYSCFG_DAC1_TRIG3_RMP_TIM15_TRGO (*) |
AnnaBridge | 163:e59c8e839560 | 734 | * @arg @ref LL_SYSCFG_DAC1_TRIG3_RMP_HRTIM1_DAC1_TRIG1 (*) |
AnnaBridge | 163:e59c8e839560 | 735 | * @arg @ref LL_SYSCFG_DAC1_TRIG5_RMP_NO (*) |
AnnaBridge | 163:e59c8e839560 | 736 | * @arg @ref LL_SYSCFG_DAC1_TRIG5_RMP_HRTIM1_DAC1_TRIG2 (*) |
AnnaBridge | 163:e59c8e839560 | 737 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 738 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 739 | */ |
AnnaBridge | 163:e59c8e839560 | 740 | __STATIC_INLINE void LL_SYSCFG_SetRemapTrigger_DAC(uint32_t Remap) |
AnnaBridge | 163:e59c8e839560 | 741 | { |
AnnaBridge | 163:e59c8e839560 | 742 | __IO uint32_t *reg = (__IO uint32_t *)(uint32_t)(SYSCFG_BASE + (Remap >> 24U)); |
AnnaBridge | 163:e59c8e839560 | 743 | MODIFY_REG(*reg, (Remap & 0x00F00F00U) >> 4U, (Remap & 0x000F00F0U)); |
AnnaBridge | 163:e59c8e839560 | 744 | } |
AnnaBridge | 163:e59c8e839560 | 745 | #endif /* SYSCFG_CFGR1_DAC1_TRIG1_RMP || SYSCFG_CFGR3_TRIGGER_RMP */ |
AnnaBridge | 163:e59c8e839560 | 746 | |
AnnaBridge | 163:e59c8e839560 | 747 | #if defined(SYSCFG_CFGR1_USB_IT_RMP) |
AnnaBridge | 163:e59c8e839560 | 748 | /** |
AnnaBridge | 163:e59c8e839560 | 749 | * @brief Enable USB interrupt remap |
AnnaBridge | 163:e59c8e839560 | 750 | * @note Remap the USB interrupts (USB_HP, USB_LP and USB_WKUP) on interrupt lines 74, 75 and 76 |
AnnaBridge | 163:e59c8e839560 | 751 | * respectively |
AnnaBridge | 163:e59c8e839560 | 752 | * @rmtoll SYSCFG_CFGR1 USB_IT_RMP LL_SYSCFG_EnableRemapIT_USB |
AnnaBridge | 163:e59c8e839560 | 753 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 754 | */ |
AnnaBridge | 163:e59c8e839560 | 755 | __STATIC_INLINE void LL_SYSCFG_EnableRemapIT_USB(void) |
AnnaBridge | 163:e59c8e839560 | 756 | { |
AnnaBridge | 163:e59c8e839560 | 757 | SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_USB_IT_RMP); |
AnnaBridge | 163:e59c8e839560 | 758 | } |
AnnaBridge | 163:e59c8e839560 | 759 | |
AnnaBridge | 163:e59c8e839560 | 760 | /** |
AnnaBridge | 163:e59c8e839560 | 761 | * @brief Disable USB interrupt remap |
AnnaBridge | 163:e59c8e839560 | 762 | * @rmtoll SYSCFG_CFGR1 USB_IT_RMP LL_SYSCFG_DisableRemapIT_USB |
AnnaBridge | 163:e59c8e839560 | 763 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 764 | */ |
AnnaBridge | 163:e59c8e839560 | 765 | __STATIC_INLINE void LL_SYSCFG_DisableRemapIT_USB(void) |
AnnaBridge | 163:e59c8e839560 | 766 | { |
AnnaBridge | 163:e59c8e839560 | 767 | CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_USB_IT_RMP); |
AnnaBridge | 163:e59c8e839560 | 768 | } |
AnnaBridge | 163:e59c8e839560 | 769 | #endif /* SYSCFG_CFGR1_USB_IT_RMP */ |
AnnaBridge | 163:e59c8e839560 | 770 | |
AnnaBridge | 163:e59c8e839560 | 771 | #if defined(SYSCFG_CFGR1_VBAT) |
AnnaBridge | 163:e59c8e839560 | 772 | /** |
AnnaBridge | 163:e59c8e839560 | 773 | * @brief Enable VBAT monitoring (to enable the power switch to deliver VBAT voltage on ADC channel 18 input) |
AnnaBridge | 163:e59c8e839560 | 774 | * @rmtoll SYSCFG_CFGR1 VBAT LL_SYSCFG_EnableVBATMonitoring |
AnnaBridge | 163:e59c8e839560 | 775 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 776 | */ |
AnnaBridge | 163:e59c8e839560 | 777 | __STATIC_INLINE void LL_SYSCFG_EnableVBATMonitoring(void) |
AnnaBridge | 163:e59c8e839560 | 778 | { |
AnnaBridge | 163:e59c8e839560 | 779 | SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_VBAT); |
AnnaBridge | 163:e59c8e839560 | 780 | } |
AnnaBridge | 163:e59c8e839560 | 781 | |
AnnaBridge | 163:e59c8e839560 | 782 | /** |
AnnaBridge | 163:e59c8e839560 | 783 | * @brief Disable VBAT monitoring |
AnnaBridge | 163:e59c8e839560 | 784 | * @rmtoll SYSCFG_CFGR1 VBAT LL_SYSCFG_DisableVBATMonitoring |
AnnaBridge | 163:e59c8e839560 | 785 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 786 | */ |
AnnaBridge | 163:e59c8e839560 | 787 | __STATIC_INLINE void LL_SYSCFG_DisableVBATMonitoring(void) |
AnnaBridge | 163:e59c8e839560 | 788 | { |
AnnaBridge | 163:e59c8e839560 | 789 | CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_VBAT); |
AnnaBridge | 163:e59c8e839560 | 790 | } |
AnnaBridge | 163:e59c8e839560 | 791 | #endif /* SYSCFG_CFGR1_VBAT */ |
AnnaBridge | 163:e59c8e839560 | 792 | |
AnnaBridge | 163:e59c8e839560 | 793 | /** |
AnnaBridge | 163:e59c8e839560 | 794 | * @brief Enable the I2C fast mode plus driving capability. |
AnnaBridge | 163:e59c8e839560 | 795 | * @rmtoll SYSCFG_CFGR1 I2C_PB6_FMP LL_SYSCFG_EnableFastModePlus\n |
AnnaBridge | 163:e59c8e839560 | 796 | * SYSCFG_CFGR1 I2C_PB7_FMP LL_SYSCFG_EnableFastModePlus\n |
AnnaBridge | 163:e59c8e839560 | 797 | * SYSCFG_CFGR1 I2C_PB8_FMP LL_SYSCFG_EnableFastModePlus\n |
AnnaBridge | 163:e59c8e839560 | 798 | * SYSCFG_CFGR1 I2C_PB9_FMP LL_SYSCFG_EnableFastModePlus\n |
AnnaBridge | 163:e59c8e839560 | 799 | * SYSCFG_CFGR1 I2C1_FMP LL_SYSCFG_EnableFastModePlus\n |
AnnaBridge | 163:e59c8e839560 | 800 | * SYSCFG_CFGR1 I2C2_FMP LL_SYSCFG_EnableFastModePlus\n |
AnnaBridge | 163:e59c8e839560 | 801 | * SYSCFG_CFGR1 I2C3_FMP LL_SYSCFG_EnableFastModePlus |
AnnaBridge | 163:e59c8e839560 | 802 | * @param ConfigFastModePlus This parameter can be a combination of the following values: |
AnnaBridge | 163:e59c8e839560 | 803 | * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB6 |
AnnaBridge | 163:e59c8e839560 | 804 | * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB7 |
AnnaBridge | 163:e59c8e839560 | 805 | * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB8 |
AnnaBridge | 163:e59c8e839560 | 806 | * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB9 |
AnnaBridge | 163:e59c8e839560 | 807 | * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C1 |
AnnaBridge | 163:e59c8e839560 | 808 | * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 (*) |
AnnaBridge | 163:e59c8e839560 | 809 | * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 (*) |
AnnaBridge | 163:e59c8e839560 | 810 | * |
AnnaBridge | 163:e59c8e839560 | 811 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 812 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 813 | */ |
AnnaBridge | 163:e59c8e839560 | 814 | __STATIC_INLINE void LL_SYSCFG_EnableFastModePlus(uint32_t ConfigFastModePlus) |
AnnaBridge | 163:e59c8e839560 | 815 | { |
AnnaBridge | 163:e59c8e839560 | 816 | SET_BIT(SYSCFG->CFGR1, ConfigFastModePlus); |
AnnaBridge | 163:e59c8e839560 | 817 | } |
AnnaBridge | 163:e59c8e839560 | 818 | |
AnnaBridge | 163:e59c8e839560 | 819 | /** |
AnnaBridge | 163:e59c8e839560 | 820 | * @brief Disable the I2C fast mode plus driving capability. |
AnnaBridge | 163:e59c8e839560 | 821 | * @rmtoll SYSCFG_CFGR1 I2C_PB6_FMP LL_SYSCFG_DisableFastModePlus\n |
AnnaBridge | 163:e59c8e839560 | 822 | * SYSCFG_CFGR1 I2C_PB7_FMP LL_SYSCFG_DisableFastModePlus\n |
AnnaBridge | 163:e59c8e839560 | 823 | * SYSCFG_CFGR1 I2C_PB8_FMP LL_SYSCFG_DisableFastModePlus\n |
AnnaBridge | 163:e59c8e839560 | 824 | * SYSCFG_CFGR1 I2C_PB9_FMP LL_SYSCFG_DisableFastModePlus\n |
AnnaBridge | 163:e59c8e839560 | 825 | * SYSCFG_CFGR1 I2C1_FMP LL_SYSCFG_DisableFastModePlus\n |
AnnaBridge | 163:e59c8e839560 | 826 | * SYSCFG_CFGR1 I2C2_FMP LL_SYSCFG_DisableFastModePlus\n |
AnnaBridge | 163:e59c8e839560 | 827 | * SYSCFG_CFGR1 I2C3_FMP LL_SYSCFG_DisableFastModePlus |
AnnaBridge | 163:e59c8e839560 | 828 | * @param ConfigFastModePlus This parameter can be a combination of the following values: |
AnnaBridge | 163:e59c8e839560 | 829 | * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB6 |
AnnaBridge | 163:e59c8e839560 | 830 | * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB7 |
AnnaBridge | 163:e59c8e839560 | 831 | * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB8 |
AnnaBridge | 163:e59c8e839560 | 832 | * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB9 |
AnnaBridge | 163:e59c8e839560 | 833 | * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C1 |
AnnaBridge | 163:e59c8e839560 | 834 | * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 (*) |
AnnaBridge | 163:e59c8e839560 | 835 | * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 (*) |
AnnaBridge | 163:e59c8e839560 | 836 | * |
AnnaBridge | 163:e59c8e839560 | 837 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 838 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 839 | */ |
AnnaBridge | 163:e59c8e839560 | 840 | __STATIC_INLINE void LL_SYSCFG_DisableFastModePlus(uint32_t ConfigFastModePlus) |
AnnaBridge | 163:e59c8e839560 | 841 | { |
AnnaBridge | 163:e59c8e839560 | 842 | CLEAR_BIT(SYSCFG->CFGR1, ConfigFastModePlus); |
AnnaBridge | 163:e59c8e839560 | 843 | } |
AnnaBridge | 163:e59c8e839560 | 844 | |
AnnaBridge | 163:e59c8e839560 | 845 | /** |
AnnaBridge | 163:e59c8e839560 | 846 | * @brief Enable Floating Point Unit Invalid operation Interrupt |
AnnaBridge | 163:e59c8e839560 | 847 | * @rmtoll SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_EnableIT_FPU_IOC |
AnnaBridge | 163:e59c8e839560 | 848 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 849 | */ |
AnnaBridge | 163:e59c8e839560 | 850 | __STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IOC(void) |
AnnaBridge | 163:e59c8e839560 | 851 | { |
AnnaBridge | 163:e59c8e839560 | 852 | SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0); |
AnnaBridge | 163:e59c8e839560 | 853 | } |
AnnaBridge | 163:e59c8e839560 | 854 | |
AnnaBridge | 163:e59c8e839560 | 855 | /** |
AnnaBridge | 163:e59c8e839560 | 856 | * @brief Enable Floating Point Unit Divide-by-zero Interrupt |
AnnaBridge | 163:e59c8e839560 | 857 | * @rmtoll SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_EnableIT_FPU_DZC |
AnnaBridge | 163:e59c8e839560 | 858 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 859 | */ |
AnnaBridge | 163:e59c8e839560 | 860 | __STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_DZC(void) |
AnnaBridge | 163:e59c8e839560 | 861 | { |
AnnaBridge | 163:e59c8e839560 | 862 | SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); |
AnnaBridge | 163:e59c8e839560 | 863 | } |
AnnaBridge | 163:e59c8e839560 | 864 | |
AnnaBridge | 163:e59c8e839560 | 865 | /** |
AnnaBridge | 163:e59c8e839560 | 866 | * @brief Enable Floating Point Unit Underflow Interrupt |
AnnaBridge | 163:e59c8e839560 | 867 | * @rmtoll SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_EnableIT_FPU_UFC |
AnnaBridge | 163:e59c8e839560 | 868 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 869 | */ |
AnnaBridge | 163:e59c8e839560 | 870 | __STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_UFC(void) |
AnnaBridge | 163:e59c8e839560 | 871 | { |
AnnaBridge | 163:e59c8e839560 | 872 | SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2); |
AnnaBridge | 163:e59c8e839560 | 873 | } |
AnnaBridge | 163:e59c8e839560 | 874 | |
AnnaBridge | 163:e59c8e839560 | 875 | /** |
AnnaBridge | 163:e59c8e839560 | 876 | * @brief Enable Floating Point Unit Overflow Interrupt |
AnnaBridge | 163:e59c8e839560 | 877 | * @rmtoll SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_EnableIT_FPU_OFC |
AnnaBridge | 163:e59c8e839560 | 878 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 879 | */ |
AnnaBridge | 163:e59c8e839560 | 880 | __STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_OFC(void) |
AnnaBridge | 163:e59c8e839560 | 881 | { |
AnnaBridge | 163:e59c8e839560 | 882 | SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3); |
AnnaBridge | 163:e59c8e839560 | 883 | } |
AnnaBridge | 163:e59c8e839560 | 884 | |
AnnaBridge | 163:e59c8e839560 | 885 | /** |
AnnaBridge | 163:e59c8e839560 | 886 | * @brief Enable Floating Point Unit Input denormal Interrupt |
AnnaBridge | 163:e59c8e839560 | 887 | * @rmtoll SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_EnableIT_FPU_IDC |
AnnaBridge | 163:e59c8e839560 | 888 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 889 | */ |
AnnaBridge | 163:e59c8e839560 | 890 | __STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IDC(void) |
AnnaBridge | 163:e59c8e839560 | 891 | { |
AnnaBridge | 163:e59c8e839560 | 892 | SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_4); |
AnnaBridge | 163:e59c8e839560 | 893 | } |
AnnaBridge | 163:e59c8e839560 | 894 | |
AnnaBridge | 163:e59c8e839560 | 895 | /** |
AnnaBridge | 163:e59c8e839560 | 896 | * @brief Enable Floating Point Unit Inexact Interrupt |
AnnaBridge | 163:e59c8e839560 | 897 | * @rmtoll SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_EnableIT_FPU_IXC |
AnnaBridge | 163:e59c8e839560 | 898 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 899 | */ |
AnnaBridge | 163:e59c8e839560 | 900 | __STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IXC(void) |
AnnaBridge | 163:e59c8e839560 | 901 | { |
AnnaBridge | 163:e59c8e839560 | 902 | SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_5); |
AnnaBridge | 163:e59c8e839560 | 903 | } |
AnnaBridge | 163:e59c8e839560 | 904 | |
AnnaBridge | 163:e59c8e839560 | 905 | /** |
AnnaBridge | 163:e59c8e839560 | 906 | * @brief Disable Floating Point Unit Invalid operation Interrupt |
AnnaBridge | 163:e59c8e839560 | 907 | * @rmtoll SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_DisableIT_FPU_IOC |
AnnaBridge | 163:e59c8e839560 | 908 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 909 | */ |
AnnaBridge | 163:e59c8e839560 | 910 | __STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IOC(void) |
AnnaBridge | 163:e59c8e839560 | 911 | { |
AnnaBridge | 163:e59c8e839560 | 912 | CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0); |
AnnaBridge | 163:e59c8e839560 | 913 | } |
AnnaBridge | 163:e59c8e839560 | 914 | |
AnnaBridge | 163:e59c8e839560 | 915 | /** |
AnnaBridge | 163:e59c8e839560 | 916 | * @brief Disable Floating Point Unit Divide-by-zero Interrupt |
AnnaBridge | 163:e59c8e839560 | 917 | * @rmtoll SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_DisableIT_FPU_DZC |
AnnaBridge | 163:e59c8e839560 | 918 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 919 | */ |
AnnaBridge | 163:e59c8e839560 | 920 | __STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_DZC(void) |
AnnaBridge | 163:e59c8e839560 | 921 | { |
AnnaBridge | 163:e59c8e839560 | 922 | CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); |
AnnaBridge | 163:e59c8e839560 | 923 | } |
AnnaBridge | 163:e59c8e839560 | 924 | |
AnnaBridge | 163:e59c8e839560 | 925 | /** |
AnnaBridge | 163:e59c8e839560 | 926 | * @brief Disable Floating Point Unit Underflow Interrupt |
AnnaBridge | 163:e59c8e839560 | 927 | * @rmtoll SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_DisableIT_FPU_UFC |
AnnaBridge | 163:e59c8e839560 | 928 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 929 | */ |
AnnaBridge | 163:e59c8e839560 | 930 | __STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_UFC(void) |
AnnaBridge | 163:e59c8e839560 | 931 | { |
AnnaBridge | 163:e59c8e839560 | 932 | CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2); |
AnnaBridge | 163:e59c8e839560 | 933 | } |
AnnaBridge | 163:e59c8e839560 | 934 | |
AnnaBridge | 163:e59c8e839560 | 935 | /** |
AnnaBridge | 163:e59c8e839560 | 936 | * @brief Disable Floating Point Unit Overflow Interrupt |
AnnaBridge | 163:e59c8e839560 | 937 | * @rmtoll SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_DisableIT_FPU_OFC |
AnnaBridge | 163:e59c8e839560 | 938 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 939 | */ |
AnnaBridge | 163:e59c8e839560 | 940 | __STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_OFC(void) |
AnnaBridge | 163:e59c8e839560 | 941 | { |
AnnaBridge | 163:e59c8e839560 | 942 | CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3); |
AnnaBridge | 163:e59c8e839560 | 943 | } |
AnnaBridge | 163:e59c8e839560 | 944 | |
AnnaBridge | 163:e59c8e839560 | 945 | /** |
AnnaBridge | 163:e59c8e839560 | 946 | * @brief Disable Floating Point Unit Input denormal Interrupt |
AnnaBridge | 163:e59c8e839560 | 947 | * @rmtoll SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_DisableIT_FPU_IDC |
AnnaBridge | 163:e59c8e839560 | 948 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 949 | */ |
AnnaBridge | 163:e59c8e839560 | 950 | __STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IDC(void) |
AnnaBridge | 163:e59c8e839560 | 951 | { |
AnnaBridge | 163:e59c8e839560 | 952 | CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_4); |
AnnaBridge | 163:e59c8e839560 | 953 | } |
AnnaBridge | 163:e59c8e839560 | 954 | |
AnnaBridge | 163:e59c8e839560 | 955 | /** |
AnnaBridge | 163:e59c8e839560 | 956 | * @brief Disable Floating Point Unit Inexact Interrupt |
AnnaBridge | 163:e59c8e839560 | 957 | * @rmtoll SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_DisableIT_FPU_IXC |
AnnaBridge | 163:e59c8e839560 | 958 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 959 | */ |
AnnaBridge | 163:e59c8e839560 | 960 | __STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IXC(void) |
AnnaBridge | 163:e59c8e839560 | 961 | { |
AnnaBridge | 163:e59c8e839560 | 962 | CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_5); |
AnnaBridge | 163:e59c8e839560 | 963 | } |
AnnaBridge | 163:e59c8e839560 | 964 | |
AnnaBridge | 163:e59c8e839560 | 965 | /** |
AnnaBridge | 163:e59c8e839560 | 966 | * @brief Check if Floating Point Unit Invalid operation Interrupt source is enabled or disabled. |
AnnaBridge | 163:e59c8e839560 | 967 | * @rmtoll SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_IsEnabledIT_FPU_IOC |
AnnaBridge | 163:e59c8e839560 | 968 | * @retval State of bit (1 or 0). |
AnnaBridge | 163:e59c8e839560 | 969 | */ |
AnnaBridge | 163:e59c8e839560 | 970 | __STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IOC(void) |
AnnaBridge | 163:e59c8e839560 | 971 | { |
AnnaBridge | 163:e59c8e839560 | 972 | return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0) == (SYSCFG_CFGR1_FPU_IE_0)); |
AnnaBridge | 163:e59c8e839560 | 973 | } |
AnnaBridge | 163:e59c8e839560 | 974 | |
AnnaBridge | 163:e59c8e839560 | 975 | /** |
AnnaBridge | 163:e59c8e839560 | 976 | * @brief Check if Floating Point Unit Divide-by-zero Interrupt source is enabled or disabled. |
AnnaBridge | 163:e59c8e839560 | 977 | * @rmtoll SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_IsEnabledIT_FPU_DZC |
AnnaBridge | 163:e59c8e839560 | 978 | * @retval State of bit (1 or 0). |
AnnaBridge | 163:e59c8e839560 | 979 | */ |
AnnaBridge | 163:e59c8e839560 | 980 | __STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_DZC(void) |
AnnaBridge | 163:e59c8e839560 | 981 | { |
AnnaBridge | 163:e59c8e839560 | 982 | return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1) == (SYSCFG_CFGR1_FPU_IE_1)); |
AnnaBridge | 163:e59c8e839560 | 983 | } |
AnnaBridge | 163:e59c8e839560 | 984 | |
AnnaBridge | 163:e59c8e839560 | 985 | /** |
AnnaBridge | 163:e59c8e839560 | 986 | * @brief Check if Floating Point Unit Underflow Interrupt source is enabled or disabled. |
AnnaBridge | 163:e59c8e839560 | 987 | * @rmtoll SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_IsEnabledIT_FPU_UFC |
AnnaBridge | 163:e59c8e839560 | 988 | * @retval State of bit (1 or 0). |
AnnaBridge | 163:e59c8e839560 | 989 | */ |
AnnaBridge | 163:e59c8e839560 | 990 | __STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_UFC(void) |
AnnaBridge | 163:e59c8e839560 | 991 | { |
AnnaBridge | 163:e59c8e839560 | 992 | return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2) == (SYSCFG_CFGR1_FPU_IE_2)); |
AnnaBridge | 163:e59c8e839560 | 993 | } |
AnnaBridge | 163:e59c8e839560 | 994 | |
AnnaBridge | 163:e59c8e839560 | 995 | /** |
AnnaBridge | 163:e59c8e839560 | 996 | * @brief Check if Floating Point Unit Overflow Interrupt source is enabled or disabled. |
AnnaBridge | 163:e59c8e839560 | 997 | * @rmtoll SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_IsEnabledIT_FPU_OFC |
AnnaBridge | 163:e59c8e839560 | 998 | * @retval State of bit (1 or 0). |
AnnaBridge | 163:e59c8e839560 | 999 | */ |
AnnaBridge | 163:e59c8e839560 | 1000 | __STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_OFC(void) |
AnnaBridge | 163:e59c8e839560 | 1001 | { |
AnnaBridge | 163:e59c8e839560 | 1002 | return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3) == (SYSCFG_CFGR1_FPU_IE_3)); |
AnnaBridge | 163:e59c8e839560 | 1003 | } |
AnnaBridge | 163:e59c8e839560 | 1004 | |
AnnaBridge | 163:e59c8e839560 | 1005 | /** |
AnnaBridge | 163:e59c8e839560 | 1006 | * @brief Check if Floating Point Unit Input denormal Interrupt source is enabled or disabled. |
AnnaBridge | 163:e59c8e839560 | 1007 | * @rmtoll SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_IsEnabledIT_FPU_IDC |
AnnaBridge | 163:e59c8e839560 | 1008 | * @retval State of bit (1 or 0). |
AnnaBridge | 163:e59c8e839560 | 1009 | */ |
AnnaBridge | 163:e59c8e839560 | 1010 | __STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IDC(void) |
AnnaBridge | 163:e59c8e839560 | 1011 | { |
AnnaBridge | 163:e59c8e839560 | 1012 | return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_4) == (SYSCFG_CFGR1_FPU_IE_4)); |
AnnaBridge | 163:e59c8e839560 | 1013 | } |
AnnaBridge | 163:e59c8e839560 | 1014 | |
AnnaBridge | 163:e59c8e839560 | 1015 | /** |
AnnaBridge | 163:e59c8e839560 | 1016 | * @brief Check if Floating Point Unit Inexact Interrupt source is enabled or disabled. |
AnnaBridge | 163:e59c8e839560 | 1017 | * @rmtoll SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_IsEnabledIT_FPU_IXC |
AnnaBridge | 163:e59c8e839560 | 1018 | * @retval State of bit (1 or 0). |
AnnaBridge | 163:e59c8e839560 | 1019 | */ |
AnnaBridge | 163:e59c8e839560 | 1020 | __STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IXC(void) |
AnnaBridge | 163:e59c8e839560 | 1021 | { |
AnnaBridge | 163:e59c8e839560 | 1022 | return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_5) == (SYSCFG_CFGR1_FPU_IE_5)); |
AnnaBridge | 163:e59c8e839560 | 1023 | } |
AnnaBridge | 163:e59c8e839560 | 1024 | |
AnnaBridge | 163:e59c8e839560 | 1025 | /** |
AnnaBridge | 163:e59c8e839560 | 1026 | * @brief Configure source input for the EXTI external interrupt. |
AnnaBridge | 163:e59c8e839560 | 1027 | * @rmtoll SYSCFG_EXTICR1 EXTI0 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1028 | * SYSCFG_EXTICR1 EXTI1 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1029 | * SYSCFG_EXTICR1 EXTI2 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1030 | * SYSCFG_EXTICR1 EXTI3 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1031 | * SYSCFG_EXTICR1 EXTI4 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1032 | * SYSCFG_EXTICR1 EXTI5 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1033 | * SYSCFG_EXTICR1 EXTI6 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1034 | * SYSCFG_EXTICR1 EXTI7 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1035 | * SYSCFG_EXTICR1 EXTI8 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1036 | * SYSCFG_EXTICR1 EXTI9 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1037 | * SYSCFG_EXTICR1 EXTI10 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1038 | * SYSCFG_EXTICR1 EXTI11 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1039 | * SYSCFG_EXTICR1 EXTI12 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1040 | * SYSCFG_EXTICR1 EXTI13 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1041 | * SYSCFG_EXTICR1 EXTI14 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1042 | * SYSCFG_EXTICR1 EXTI15 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1043 | * SYSCFG_EXTICR2 EXTI0 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1044 | * SYSCFG_EXTICR2 EXTI1 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1045 | * SYSCFG_EXTICR2 EXTI2 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1046 | * SYSCFG_EXTICR2 EXTI3 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1047 | * SYSCFG_EXTICR2 EXTI4 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1048 | * SYSCFG_EXTICR2 EXTI5 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1049 | * SYSCFG_EXTICR2 EXTI6 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1050 | * SYSCFG_EXTICR2 EXTI7 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1051 | * SYSCFG_EXTICR2 EXTI8 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1052 | * SYSCFG_EXTICR2 EXTI9 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1053 | * SYSCFG_EXTICR2 EXTI10 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1054 | * SYSCFG_EXTICR2 EXTI11 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1055 | * SYSCFG_EXTICR2 EXTI12 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1056 | * SYSCFG_EXTICR2 EXTI13 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1057 | * SYSCFG_EXTICR2 EXTI14 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1058 | * SYSCFG_EXTICR2 EXTI15 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1059 | * SYSCFG_EXTICR3 EXTI0 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1060 | * SYSCFG_EXTICR3 EXTI1 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1061 | * SYSCFG_EXTICR3 EXTI2 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1062 | * SYSCFG_EXTICR3 EXTI3 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1063 | * SYSCFG_EXTICR3 EXTI4 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1064 | * SYSCFG_EXTICR3 EXTI5 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1065 | * SYSCFG_EXTICR3 EXTI6 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1066 | * SYSCFG_EXTICR3 EXTI7 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1067 | * SYSCFG_EXTICR3 EXTI8 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1068 | * SYSCFG_EXTICR3 EXTI9 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1069 | * SYSCFG_EXTICR3 EXTI10 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1070 | * SYSCFG_EXTICR3 EXTI11 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1071 | * SYSCFG_EXTICR3 EXTI12 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1072 | * SYSCFG_EXTICR3 EXTI13 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1073 | * SYSCFG_EXTICR3 EXTI14 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1074 | * SYSCFG_EXTICR3 EXTI15 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1075 | * SYSCFG_EXTICR4 EXTI0 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1076 | * SYSCFG_EXTICR4 EXTI1 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1077 | * SYSCFG_EXTICR4 EXTI2 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1078 | * SYSCFG_EXTICR4 EXTI3 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1079 | * SYSCFG_EXTICR4 EXTI4 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1080 | * SYSCFG_EXTICR4 EXTI5 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1081 | * SYSCFG_EXTICR4 EXTI6 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1082 | * SYSCFG_EXTICR4 EXTI7 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1083 | * SYSCFG_EXTICR4 EXTI8 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1084 | * SYSCFG_EXTICR4 EXTI9 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1085 | * SYSCFG_EXTICR4 EXTI10 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1086 | * SYSCFG_EXTICR4 EXTI11 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1087 | * SYSCFG_EXTICR4 EXTI12 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1088 | * SYSCFG_EXTICR4 EXTI13 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1089 | * SYSCFG_EXTICR4 EXTI14 LL_SYSCFG_SetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1090 | * SYSCFG_EXTICR4 EXTI15 LL_SYSCFG_SetEXTISource |
AnnaBridge | 163:e59c8e839560 | 1091 | * @param Port This parameter can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 1092 | * @arg @ref LL_SYSCFG_EXTI_PORTA |
AnnaBridge | 163:e59c8e839560 | 1093 | * @arg @ref LL_SYSCFG_EXTI_PORTB |
AnnaBridge | 163:e59c8e839560 | 1094 | * @arg @ref LL_SYSCFG_EXTI_PORTC |
AnnaBridge | 163:e59c8e839560 | 1095 | * @arg @ref LL_SYSCFG_EXTI_PORTD |
AnnaBridge | 163:e59c8e839560 | 1096 | * @arg @ref LL_SYSCFG_EXTI_PORTE (*) |
AnnaBridge | 163:e59c8e839560 | 1097 | * @arg @ref LL_SYSCFG_EXTI_PORTF |
AnnaBridge | 163:e59c8e839560 | 1098 | * @arg @ref LL_SYSCFG_EXTI_PORTG (*) |
AnnaBridge | 163:e59c8e839560 | 1099 | * @arg @ref LL_SYSCFG_EXTI_PORTH (*) |
AnnaBridge | 163:e59c8e839560 | 1100 | * |
AnnaBridge | 163:e59c8e839560 | 1101 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 1102 | * @param Line This parameter can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 1103 | * @arg @ref LL_SYSCFG_EXTI_LINE0 |
AnnaBridge | 163:e59c8e839560 | 1104 | * @arg @ref LL_SYSCFG_EXTI_LINE1 |
AnnaBridge | 163:e59c8e839560 | 1105 | * @arg @ref LL_SYSCFG_EXTI_LINE2 |
AnnaBridge | 163:e59c8e839560 | 1106 | * @arg @ref LL_SYSCFG_EXTI_LINE3 |
AnnaBridge | 163:e59c8e839560 | 1107 | * @arg @ref LL_SYSCFG_EXTI_LINE4 |
AnnaBridge | 163:e59c8e839560 | 1108 | * @arg @ref LL_SYSCFG_EXTI_LINE5 |
AnnaBridge | 163:e59c8e839560 | 1109 | * @arg @ref LL_SYSCFG_EXTI_LINE6 |
AnnaBridge | 163:e59c8e839560 | 1110 | * @arg @ref LL_SYSCFG_EXTI_LINE7 |
AnnaBridge | 163:e59c8e839560 | 1111 | * @arg @ref LL_SYSCFG_EXTI_LINE8 |
AnnaBridge | 163:e59c8e839560 | 1112 | * @arg @ref LL_SYSCFG_EXTI_LINE9 |
AnnaBridge | 163:e59c8e839560 | 1113 | * @arg @ref LL_SYSCFG_EXTI_LINE10 |
AnnaBridge | 163:e59c8e839560 | 1114 | * @arg @ref LL_SYSCFG_EXTI_LINE11 |
AnnaBridge | 163:e59c8e839560 | 1115 | * @arg @ref LL_SYSCFG_EXTI_LINE12 |
AnnaBridge | 163:e59c8e839560 | 1116 | * @arg @ref LL_SYSCFG_EXTI_LINE13 |
AnnaBridge | 163:e59c8e839560 | 1117 | * @arg @ref LL_SYSCFG_EXTI_LINE14 |
AnnaBridge | 163:e59c8e839560 | 1118 | * @arg @ref LL_SYSCFG_EXTI_LINE15 |
AnnaBridge | 163:e59c8e839560 | 1119 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1120 | */ |
AnnaBridge | 163:e59c8e839560 | 1121 | __STATIC_INLINE void LL_SYSCFG_SetEXTISource(uint32_t Port, uint32_t Line) |
AnnaBridge | 163:e59c8e839560 | 1122 | { |
AnnaBridge | 163:e59c8e839560 | 1123 | MODIFY_REG(SYSCFG->EXTICR[Line & 0xFF], (Line >> 16U), Port << POSITION_VAL((Line >> 16U))); |
AnnaBridge | 163:e59c8e839560 | 1124 | } |
AnnaBridge | 163:e59c8e839560 | 1125 | |
AnnaBridge | 163:e59c8e839560 | 1126 | /** |
AnnaBridge | 163:e59c8e839560 | 1127 | * @brief Get the configured defined for specific EXTI Line |
AnnaBridge | 163:e59c8e839560 | 1128 | * @rmtoll SYSCFG_EXTICR1 EXTI0 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1129 | * SYSCFG_EXTICR1 EXTI1 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1130 | * SYSCFG_EXTICR1 EXTI2 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1131 | * SYSCFG_EXTICR1 EXTI3 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1132 | * SYSCFG_EXTICR1 EXTI4 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1133 | * SYSCFG_EXTICR1 EXTI5 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1134 | * SYSCFG_EXTICR1 EXTI6 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1135 | * SYSCFG_EXTICR1 EXTI7 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1136 | * SYSCFG_EXTICR1 EXTI8 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1137 | * SYSCFG_EXTICR1 EXTI9 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1138 | * SYSCFG_EXTICR1 EXTI10 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1139 | * SYSCFG_EXTICR1 EXTI11 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1140 | * SYSCFG_EXTICR1 EXTI12 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1141 | * SYSCFG_EXTICR1 EXTI13 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1142 | * SYSCFG_EXTICR1 EXTI14 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1143 | * SYSCFG_EXTICR1 EXTI15 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1144 | * SYSCFG_EXTICR2 EXTI0 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1145 | * SYSCFG_EXTICR2 EXTI1 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1146 | * SYSCFG_EXTICR2 EXTI2 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1147 | * SYSCFG_EXTICR2 EXTI3 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1148 | * SYSCFG_EXTICR2 EXTI4 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1149 | * SYSCFG_EXTICR2 EXTI5 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1150 | * SYSCFG_EXTICR2 EXTI6 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1151 | * SYSCFG_EXTICR2 EXTI7 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1152 | * SYSCFG_EXTICR2 EXTI8 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1153 | * SYSCFG_EXTICR2 EXTI9 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1154 | * SYSCFG_EXTICR2 EXTI10 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1155 | * SYSCFG_EXTICR2 EXTI11 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1156 | * SYSCFG_EXTICR2 EXTI12 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1157 | * SYSCFG_EXTICR2 EXTI13 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1158 | * SYSCFG_EXTICR2 EXTI14 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1159 | * SYSCFG_EXTICR2 EXTI15 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1160 | * SYSCFG_EXTICR3 EXTI0 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1161 | * SYSCFG_EXTICR3 EXTI1 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1162 | * SYSCFG_EXTICR3 EXTI2 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1163 | * SYSCFG_EXTICR3 EXTI3 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1164 | * SYSCFG_EXTICR3 EXTI4 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1165 | * SYSCFG_EXTICR3 EXTI5 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1166 | * SYSCFG_EXTICR3 EXTI6 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1167 | * SYSCFG_EXTICR3 EXTI7 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1168 | * SYSCFG_EXTICR3 EXTI8 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1169 | * SYSCFG_EXTICR3 EXTI9 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1170 | * SYSCFG_EXTICR3 EXTI10 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1171 | * SYSCFG_EXTICR3 EXTI11 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1172 | * SYSCFG_EXTICR3 EXTI12 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1173 | * SYSCFG_EXTICR3 EXTI13 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1174 | * SYSCFG_EXTICR3 EXTI14 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1175 | * SYSCFG_EXTICR3 EXTI15 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1176 | * SYSCFG_EXTICR4 EXTI0 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1177 | * SYSCFG_EXTICR4 EXTI1 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1178 | * SYSCFG_EXTICR4 EXTI2 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1179 | * SYSCFG_EXTICR4 EXTI3 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1180 | * SYSCFG_EXTICR4 EXTI4 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1181 | * SYSCFG_EXTICR4 EXTI5 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1182 | * SYSCFG_EXTICR4 EXTI6 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1183 | * SYSCFG_EXTICR4 EXTI7 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1184 | * SYSCFG_EXTICR4 EXTI8 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1185 | * SYSCFG_EXTICR4 EXTI9 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1186 | * SYSCFG_EXTICR4 EXTI10 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1187 | * SYSCFG_EXTICR4 EXTI11 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1188 | * SYSCFG_EXTICR4 EXTI12 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1189 | * SYSCFG_EXTICR4 EXTI13 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1190 | * SYSCFG_EXTICR4 EXTI14 LL_SYSCFG_GetEXTISource\n |
AnnaBridge | 163:e59c8e839560 | 1191 | * SYSCFG_EXTICR4 EXTI15 LL_SYSCFG_GetEXTISource |
AnnaBridge | 163:e59c8e839560 | 1192 | * @param Line This parameter can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 1193 | * @arg @ref LL_SYSCFG_EXTI_LINE0 |
AnnaBridge | 163:e59c8e839560 | 1194 | * @arg @ref LL_SYSCFG_EXTI_LINE1 |
AnnaBridge | 163:e59c8e839560 | 1195 | * @arg @ref LL_SYSCFG_EXTI_LINE2 |
AnnaBridge | 163:e59c8e839560 | 1196 | * @arg @ref LL_SYSCFG_EXTI_LINE3 |
AnnaBridge | 163:e59c8e839560 | 1197 | * @arg @ref LL_SYSCFG_EXTI_LINE4 |
AnnaBridge | 163:e59c8e839560 | 1198 | * @arg @ref LL_SYSCFG_EXTI_LINE5 |
AnnaBridge | 163:e59c8e839560 | 1199 | * @arg @ref LL_SYSCFG_EXTI_LINE6 |
AnnaBridge | 163:e59c8e839560 | 1200 | * @arg @ref LL_SYSCFG_EXTI_LINE7 |
AnnaBridge | 163:e59c8e839560 | 1201 | * @arg @ref LL_SYSCFG_EXTI_LINE8 |
AnnaBridge | 163:e59c8e839560 | 1202 | * @arg @ref LL_SYSCFG_EXTI_LINE9 |
AnnaBridge | 163:e59c8e839560 | 1203 | * @arg @ref LL_SYSCFG_EXTI_LINE10 |
AnnaBridge | 163:e59c8e839560 | 1204 | * @arg @ref LL_SYSCFG_EXTI_LINE11 |
AnnaBridge | 163:e59c8e839560 | 1205 | * @arg @ref LL_SYSCFG_EXTI_LINE12 |
AnnaBridge | 163:e59c8e839560 | 1206 | * @arg @ref LL_SYSCFG_EXTI_LINE13 |
AnnaBridge | 163:e59c8e839560 | 1207 | * @arg @ref LL_SYSCFG_EXTI_LINE14 |
AnnaBridge | 163:e59c8e839560 | 1208 | * @arg @ref LL_SYSCFG_EXTI_LINE15 |
AnnaBridge | 163:e59c8e839560 | 1209 | * @retval Returned value can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 1210 | * @arg @ref LL_SYSCFG_EXTI_PORTA |
AnnaBridge | 163:e59c8e839560 | 1211 | * @arg @ref LL_SYSCFG_EXTI_PORTB |
AnnaBridge | 163:e59c8e839560 | 1212 | * @arg @ref LL_SYSCFG_EXTI_PORTC |
AnnaBridge | 163:e59c8e839560 | 1213 | * @arg @ref LL_SYSCFG_EXTI_PORTD |
AnnaBridge | 163:e59c8e839560 | 1214 | * @arg @ref LL_SYSCFG_EXTI_PORTE (*) |
AnnaBridge | 163:e59c8e839560 | 1215 | * @arg @ref LL_SYSCFG_EXTI_PORTF |
AnnaBridge | 163:e59c8e839560 | 1216 | * @arg @ref LL_SYSCFG_EXTI_PORTG (*) |
AnnaBridge | 163:e59c8e839560 | 1217 | * @arg @ref LL_SYSCFG_EXTI_PORTH (*) |
AnnaBridge | 163:e59c8e839560 | 1218 | * |
AnnaBridge | 163:e59c8e839560 | 1219 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 1220 | */ |
AnnaBridge | 163:e59c8e839560 | 1221 | __STATIC_INLINE uint32_t LL_SYSCFG_GetEXTISource(uint32_t Line) |
AnnaBridge | 163:e59c8e839560 | 1222 | { |
AnnaBridge | 163:e59c8e839560 | 1223 | return (uint32_t)(READ_BIT(SYSCFG->EXTICR[Line & 0xFF], (Line >> 16U)) >> POSITION_VAL(Line >> 16U)); |
AnnaBridge | 163:e59c8e839560 | 1224 | } |
AnnaBridge | 163:e59c8e839560 | 1225 | |
AnnaBridge | 163:e59c8e839560 | 1226 | /** |
AnnaBridge | 163:e59c8e839560 | 1227 | * @brief Set connections to TIMx Break inputs |
AnnaBridge | 163:e59c8e839560 | 1228 | * @rmtoll SYSCFG_CFGR2 LOCKUP_LOCK LL_SYSCFG_SetTIMBreakInputs\n |
AnnaBridge | 163:e59c8e839560 | 1229 | * SYSCFG_CFGR2 SRAM_PARITY_LOCK LL_SYSCFG_SetTIMBreakInputs\n |
AnnaBridge | 163:e59c8e839560 | 1230 | * SYSCFG_CFGR2 PVD_LOCK LL_SYSCFG_SetTIMBreakInputs |
AnnaBridge | 163:e59c8e839560 | 1231 | * @param Break This parameter can be a combination of the following values: |
AnnaBridge | 163:e59c8e839560 | 1232 | * @arg @ref LL_SYSCFG_TIMBREAK_PVD (*) |
AnnaBridge | 163:e59c8e839560 | 1233 | * @arg @ref LL_SYSCFG_TIMBREAK_SRAM_PARITY (*) |
AnnaBridge | 163:e59c8e839560 | 1234 | * @arg @ref LL_SYSCFG_TIMBREAK_LOCKUP |
AnnaBridge | 163:e59c8e839560 | 1235 | * |
AnnaBridge | 163:e59c8e839560 | 1236 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 1237 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1238 | */ |
AnnaBridge | 163:e59c8e839560 | 1239 | __STATIC_INLINE void LL_SYSCFG_SetTIMBreakInputs(uint32_t Break) |
AnnaBridge | 163:e59c8e839560 | 1240 | { |
AnnaBridge | 163:e59c8e839560 | 1241 | MODIFY_REG(SYSCFG->CFGR2, SYSCFG_MASK_TIM_BREAK, Break); |
AnnaBridge | 163:e59c8e839560 | 1242 | } |
AnnaBridge | 163:e59c8e839560 | 1243 | |
AnnaBridge | 163:e59c8e839560 | 1244 | /** |
AnnaBridge | 163:e59c8e839560 | 1245 | * @brief Get connections to TIMx Break inputs |
AnnaBridge | 163:e59c8e839560 | 1246 | * @rmtoll SYSCFG_CFGR2 LOCKUP_LOCK LL_SYSCFG_GetTIMBreakInputs\n |
AnnaBridge | 163:e59c8e839560 | 1247 | * SYSCFG_CFGR2 SRAM_PARITY_LOCK LL_SYSCFG_GetTIMBreakInputs\n |
AnnaBridge | 163:e59c8e839560 | 1248 | * SYSCFG_CFGR2 PVD_LOCK LL_SYSCFG_GetTIMBreakInputs |
AnnaBridge | 163:e59c8e839560 | 1249 | * @retval Returned value can be can be a combination of the following values: |
AnnaBridge | 163:e59c8e839560 | 1250 | * @arg @ref LL_SYSCFG_TIMBREAK_PVD (*) |
AnnaBridge | 163:e59c8e839560 | 1251 | * @arg @ref LL_SYSCFG_TIMBREAK_SRAM_PARITY (*) |
AnnaBridge | 163:e59c8e839560 | 1252 | * @arg @ref LL_SYSCFG_TIMBREAK_LOCKUP |
AnnaBridge | 163:e59c8e839560 | 1253 | * |
AnnaBridge | 163:e59c8e839560 | 1254 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 1255 | */ |
AnnaBridge | 163:e59c8e839560 | 1256 | __STATIC_INLINE uint32_t LL_SYSCFG_GetTIMBreakInputs(void) |
AnnaBridge | 163:e59c8e839560 | 1257 | { |
AnnaBridge | 163:e59c8e839560 | 1258 | return (uint32_t)(READ_BIT(SYSCFG->CFGR2, SYSCFG_MASK_TIM_BREAK)); |
AnnaBridge | 163:e59c8e839560 | 1259 | } |
AnnaBridge | 163:e59c8e839560 | 1260 | |
AnnaBridge | 163:e59c8e839560 | 1261 | #if defined(SYSCFG_CFGR2_BYP_ADDR_PAR) |
AnnaBridge | 163:e59c8e839560 | 1262 | /** |
AnnaBridge | 163:e59c8e839560 | 1263 | * @brief Disable RAM Parity Check Disable |
AnnaBridge | 163:e59c8e839560 | 1264 | * @rmtoll SYSCFG_CFGR2 BYP_ADDR_PAR LL_SYSCFG_DisableSRAMParityCheck |
AnnaBridge | 163:e59c8e839560 | 1265 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1266 | */ |
AnnaBridge | 163:e59c8e839560 | 1267 | __STATIC_INLINE void LL_SYSCFG_DisableSRAMParityCheck(void) |
AnnaBridge | 163:e59c8e839560 | 1268 | { |
AnnaBridge | 163:e59c8e839560 | 1269 | SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_BYP_ADDR_PAR); |
AnnaBridge | 163:e59c8e839560 | 1270 | } |
AnnaBridge | 163:e59c8e839560 | 1271 | #endif /* SYSCFG_CFGR2_BYP_ADDR_PAR */ |
AnnaBridge | 163:e59c8e839560 | 1272 | |
AnnaBridge | 163:e59c8e839560 | 1273 | #if defined(SYSCFG_CFGR2_SRAM_PE) |
AnnaBridge | 163:e59c8e839560 | 1274 | /** |
AnnaBridge | 163:e59c8e839560 | 1275 | * @brief Check if SRAM parity error detected |
AnnaBridge | 163:e59c8e839560 | 1276 | * @rmtoll SYSCFG_CFGR2 SRAM_PE LL_SYSCFG_IsActiveFlag_SP |
AnnaBridge | 163:e59c8e839560 | 1277 | * @retval State of bit (1 or 0). |
AnnaBridge | 163:e59c8e839560 | 1278 | */ |
AnnaBridge | 163:e59c8e839560 | 1279 | __STATIC_INLINE uint32_t LL_SYSCFG_IsActiveFlag_SP(void) |
AnnaBridge | 163:e59c8e839560 | 1280 | { |
AnnaBridge | 163:e59c8e839560 | 1281 | return (READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SRAM_PE) == (SYSCFG_CFGR2_SRAM_PE)); |
AnnaBridge | 163:e59c8e839560 | 1282 | } |
AnnaBridge | 163:e59c8e839560 | 1283 | |
AnnaBridge | 163:e59c8e839560 | 1284 | /** |
AnnaBridge | 163:e59c8e839560 | 1285 | * @brief Clear SRAM parity error flag |
AnnaBridge | 163:e59c8e839560 | 1286 | * @rmtoll SYSCFG_CFGR2 SRAM_PE LL_SYSCFG_ClearFlag_SP |
AnnaBridge | 163:e59c8e839560 | 1287 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1288 | */ |
AnnaBridge | 163:e59c8e839560 | 1289 | __STATIC_INLINE void LL_SYSCFG_ClearFlag_SP(void) |
AnnaBridge | 163:e59c8e839560 | 1290 | { |
AnnaBridge | 163:e59c8e839560 | 1291 | SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SRAM_PE); |
AnnaBridge | 163:e59c8e839560 | 1292 | } |
AnnaBridge | 163:e59c8e839560 | 1293 | #endif /* SYSCFG_CFGR2_SRAM_PE */ |
AnnaBridge | 163:e59c8e839560 | 1294 | |
AnnaBridge | 163:e59c8e839560 | 1295 | #if defined(SYSCFG_RCR_PAGE0) |
AnnaBridge | 163:e59c8e839560 | 1296 | /** |
AnnaBridge | 163:e59c8e839560 | 1297 | * @brief Enable CCM SRAM page write protection |
AnnaBridge | 163:e59c8e839560 | 1298 | * @note Write protection is cleared only by a system reset |
AnnaBridge | 163:e59c8e839560 | 1299 | * @rmtoll SYSCFG_RCR PAGE0 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1300 | * SYSCFG_RCR PAGE1 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1301 | * SYSCFG_RCR PAGE2 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1302 | * SYSCFG_RCR PAGE3 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1303 | * SYSCFG_RCR PAGE4 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1304 | * SYSCFG_RCR PAGE5 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1305 | * SYSCFG_RCR PAGE6 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1306 | * SYSCFG_RCR PAGE7 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1307 | * SYSCFG_RCR PAGE8 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1308 | * SYSCFG_RCR PAGE9 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1309 | * SYSCFG_RCR PAGE10 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1310 | * SYSCFG_RCR PAGE11 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1311 | * SYSCFG_RCR PAGE12 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1312 | * SYSCFG_RCR PAGE13 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1313 | * SYSCFG_RCR PAGE14 LL_SYSCFG_EnableCCM_SRAMPageWRP\n |
AnnaBridge | 163:e59c8e839560 | 1314 | * SYSCFG_RCR PAGE15 LL_SYSCFG_EnableCCM_SRAMPageWRP |
AnnaBridge | 163:e59c8e839560 | 1315 | * @param PageWRP This parameter can be a combination of the following values: |
AnnaBridge | 163:e59c8e839560 | 1316 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE0 |
AnnaBridge | 163:e59c8e839560 | 1317 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE1 |
AnnaBridge | 163:e59c8e839560 | 1318 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE2 |
AnnaBridge | 163:e59c8e839560 | 1319 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE3 |
AnnaBridge | 163:e59c8e839560 | 1320 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE4 (*) |
AnnaBridge | 163:e59c8e839560 | 1321 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE5 (*) |
AnnaBridge | 163:e59c8e839560 | 1322 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE6 (*) |
AnnaBridge | 163:e59c8e839560 | 1323 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE7 (*) |
AnnaBridge | 163:e59c8e839560 | 1324 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE8 (*) |
AnnaBridge | 163:e59c8e839560 | 1325 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE9 (*) |
AnnaBridge | 163:e59c8e839560 | 1326 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE10 (*) |
AnnaBridge | 163:e59c8e839560 | 1327 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE11 (*) |
AnnaBridge | 163:e59c8e839560 | 1328 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE12 (*) |
AnnaBridge | 163:e59c8e839560 | 1329 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE13 (*) |
AnnaBridge | 163:e59c8e839560 | 1330 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE14 (*) |
AnnaBridge | 163:e59c8e839560 | 1331 | * @arg @ref LL_SYSCFG_CCMSRAMWRP_PAGE15 (*) |
AnnaBridge | 163:e59c8e839560 | 1332 | * |
AnnaBridge | 163:e59c8e839560 | 1333 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 1334 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1335 | */ |
AnnaBridge | 163:e59c8e839560 | 1336 | __STATIC_INLINE void LL_SYSCFG_EnableCCM_SRAMPageWRP(uint32_t PageWRP) |
AnnaBridge | 163:e59c8e839560 | 1337 | { |
AnnaBridge | 163:e59c8e839560 | 1338 | SET_BIT(SYSCFG->RCR, PageWRP); |
AnnaBridge | 163:e59c8e839560 | 1339 | } |
AnnaBridge | 163:e59c8e839560 | 1340 | #endif /* SYSCFG_RCR_PAGE0 */ |
AnnaBridge | 163:e59c8e839560 | 1341 | |
AnnaBridge | 163:e59c8e839560 | 1342 | /** |
AnnaBridge | 163:e59c8e839560 | 1343 | * @} |
AnnaBridge | 163:e59c8e839560 | 1344 | */ |
AnnaBridge | 163:e59c8e839560 | 1345 | |
AnnaBridge | 163:e59c8e839560 | 1346 | /** @defgroup SYSTEM_LL_EF_DBGMCU DBGMCU |
AnnaBridge | 163:e59c8e839560 | 1347 | * @{ |
AnnaBridge | 163:e59c8e839560 | 1348 | */ |
AnnaBridge | 163:e59c8e839560 | 1349 | |
AnnaBridge | 163:e59c8e839560 | 1350 | /** |
AnnaBridge | 163:e59c8e839560 | 1351 | * @brief Return the device identifier |
AnnaBridge | 163:e59c8e839560 | 1352 | * @note For STM32F303xC, STM32F358xx and STM32F302xC devices, the device ID is 0x422 |
AnnaBridge | 163:e59c8e839560 | 1353 | * @note For STM32F373xx and STM32F378xx devices, the device ID is 0x432 |
AnnaBridge | 163:e59c8e839560 | 1354 | * @note For STM32F303x8, STM32F334xx and STM32F328xx devices, the device ID is 0x438. |
AnnaBridge | 163:e59c8e839560 | 1355 | * @note For STM32F302x8, STM32F301x8 and STM32F318xx devices, the device ID is 0x439 |
AnnaBridge | 163:e59c8e839560 | 1356 | * @note For STM32F303xE, STM32F398xx and STM32F302xE devices, the device ID is 0x446 |
AnnaBridge | 163:e59c8e839560 | 1357 | * @rmtoll DBGMCU_IDCODE DEV_ID LL_DBGMCU_GetDeviceID |
AnnaBridge | 163:e59c8e839560 | 1358 | * @retval Values between Min_Data=0x00 and Max_Data=0xFFF |
AnnaBridge | 163:e59c8e839560 | 1359 | */ |
AnnaBridge | 163:e59c8e839560 | 1360 | __STATIC_INLINE uint32_t LL_DBGMCU_GetDeviceID(void) |
AnnaBridge | 163:e59c8e839560 | 1361 | { |
AnnaBridge | 163:e59c8e839560 | 1362 | return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_DEV_ID)); |
AnnaBridge | 163:e59c8e839560 | 1363 | } |
AnnaBridge | 163:e59c8e839560 | 1364 | |
AnnaBridge | 163:e59c8e839560 | 1365 | /** |
AnnaBridge | 163:e59c8e839560 | 1366 | * @brief Return the device revision identifier |
AnnaBridge | 163:e59c8e839560 | 1367 | * @note This field indicates the revision of the device. |
AnnaBridge | 163:e59c8e839560 | 1368 | * @rmtoll DBGMCU_IDCODE REV_ID LL_DBGMCU_GetRevisionID |
AnnaBridge | 163:e59c8e839560 | 1369 | * @retval Values between Min_Data=0x00 and Max_Data=0xFFFF |
AnnaBridge | 163:e59c8e839560 | 1370 | */ |
AnnaBridge | 163:e59c8e839560 | 1371 | __STATIC_INLINE uint32_t LL_DBGMCU_GetRevisionID(void) |
AnnaBridge | 163:e59c8e839560 | 1372 | { |
AnnaBridge | 168:b9e159c1930a | 1373 | return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_REV_ID) >> DBGMCU_IDCODE_REV_ID_Pos); |
AnnaBridge | 163:e59c8e839560 | 1374 | } |
AnnaBridge | 163:e59c8e839560 | 1375 | |
AnnaBridge | 163:e59c8e839560 | 1376 | /** |
AnnaBridge | 163:e59c8e839560 | 1377 | * @brief Enable the Debug Module during SLEEP mode |
AnnaBridge | 163:e59c8e839560 | 1378 | * @rmtoll DBGMCU_CR DBG_SLEEP LL_DBGMCU_EnableDBGSleepMode |
AnnaBridge | 163:e59c8e839560 | 1379 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1380 | */ |
AnnaBridge | 163:e59c8e839560 | 1381 | __STATIC_INLINE void LL_DBGMCU_EnableDBGSleepMode(void) |
AnnaBridge | 163:e59c8e839560 | 1382 | { |
AnnaBridge | 163:e59c8e839560 | 1383 | SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); |
AnnaBridge | 163:e59c8e839560 | 1384 | } |
AnnaBridge | 163:e59c8e839560 | 1385 | |
AnnaBridge | 163:e59c8e839560 | 1386 | /** |
AnnaBridge | 163:e59c8e839560 | 1387 | * @brief Disable the Debug Module during SLEEP mode |
AnnaBridge | 163:e59c8e839560 | 1388 | * @rmtoll DBGMCU_CR DBG_SLEEP LL_DBGMCU_DisableDBGSleepMode |
AnnaBridge | 163:e59c8e839560 | 1389 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1390 | */ |
AnnaBridge | 163:e59c8e839560 | 1391 | __STATIC_INLINE void LL_DBGMCU_DisableDBGSleepMode(void) |
AnnaBridge | 163:e59c8e839560 | 1392 | { |
AnnaBridge | 163:e59c8e839560 | 1393 | CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); |
AnnaBridge | 163:e59c8e839560 | 1394 | } |
AnnaBridge | 163:e59c8e839560 | 1395 | |
AnnaBridge | 163:e59c8e839560 | 1396 | /** |
AnnaBridge | 163:e59c8e839560 | 1397 | * @brief Enable the Debug Module during STOP mode |
AnnaBridge | 163:e59c8e839560 | 1398 | * @rmtoll DBGMCU_CR DBG_STOP LL_DBGMCU_EnableDBGStopMode |
AnnaBridge | 163:e59c8e839560 | 1399 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1400 | */ |
AnnaBridge | 163:e59c8e839560 | 1401 | __STATIC_INLINE void LL_DBGMCU_EnableDBGStopMode(void) |
AnnaBridge | 163:e59c8e839560 | 1402 | { |
AnnaBridge | 163:e59c8e839560 | 1403 | SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); |
AnnaBridge | 163:e59c8e839560 | 1404 | } |
AnnaBridge | 163:e59c8e839560 | 1405 | |
AnnaBridge | 163:e59c8e839560 | 1406 | /** |
AnnaBridge | 163:e59c8e839560 | 1407 | * @brief Disable the Debug Module during STOP mode |
AnnaBridge | 163:e59c8e839560 | 1408 | * @rmtoll DBGMCU_CR DBG_STOP LL_DBGMCU_DisableDBGStopMode |
AnnaBridge | 163:e59c8e839560 | 1409 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1410 | */ |
AnnaBridge | 163:e59c8e839560 | 1411 | __STATIC_INLINE void LL_DBGMCU_DisableDBGStopMode(void) |
AnnaBridge | 163:e59c8e839560 | 1412 | { |
AnnaBridge | 163:e59c8e839560 | 1413 | CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); |
AnnaBridge | 163:e59c8e839560 | 1414 | } |
AnnaBridge | 163:e59c8e839560 | 1415 | |
AnnaBridge | 163:e59c8e839560 | 1416 | /** |
AnnaBridge | 163:e59c8e839560 | 1417 | * @brief Enable the Debug Module during STANDBY mode |
AnnaBridge | 163:e59c8e839560 | 1418 | * @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_EnableDBGStandbyMode |
AnnaBridge | 163:e59c8e839560 | 1419 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1420 | */ |
AnnaBridge | 163:e59c8e839560 | 1421 | __STATIC_INLINE void LL_DBGMCU_EnableDBGStandbyMode(void) |
AnnaBridge | 163:e59c8e839560 | 1422 | { |
AnnaBridge | 163:e59c8e839560 | 1423 | SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); |
AnnaBridge | 163:e59c8e839560 | 1424 | } |
AnnaBridge | 163:e59c8e839560 | 1425 | |
AnnaBridge | 163:e59c8e839560 | 1426 | /** |
AnnaBridge | 163:e59c8e839560 | 1427 | * @brief Disable the Debug Module during STANDBY mode |
AnnaBridge | 163:e59c8e839560 | 1428 | * @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_DisableDBGStandbyMode |
AnnaBridge | 163:e59c8e839560 | 1429 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1430 | */ |
AnnaBridge | 163:e59c8e839560 | 1431 | __STATIC_INLINE void LL_DBGMCU_DisableDBGStandbyMode(void) |
AnnaBridge | 163:e59c8e839560 | 1432 | { |
AnnaBridge | 163:e59c8e839560 | 1433 | CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); |
AnnaBridge | 163:e59c8e839560 | 1434 | } |
AnnaBridge | 163:e59c8e839560 | 1435 | |
AnnaBridge | 163:e59c8e839560 | 1436 | /** |
AnnaBridge | 163:e59c8e839560 | 1437 | * @brief Set Trace pin assignment control |
AnnaBridge | 163:e59c8e839560 | 1438 | * @rmtoll DBGMCU_CR TRACE_IOEN LL_DBGMCU_SetTracePinAssignment\n |
AnnaBridge | 163:e59c8e839560 | 1439 | * DBGMCU_CR TRACE_MODE LL_DBGMCU_SetTracePinAssignment |
AnnaBridge | 163:e59c8e839560 | 1440 | * @param PinAssignment This parameter can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 1441 | * @arg @ref LL_DBGMCU_TRACE_NONE |
AnnaBridge | 163:e59c8e839560 | 1442 | * @arg @ref LL_DBGMCU_TRACE_ASYNCH |
AnnaBridge | 163:e59c8e839560 | 1443 | * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE1 |
AnnaBridge | 163:e59c8e839560 | 1444 | * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE2 |
AnnaBridge | 163:e59c8e839560 | 1445 | * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE4 |
AnnaBridge | 163:e59c8e839560 | 1446 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1447 | */ |
AnnaBridge | 163:e59c8e839560 | 1448 | __STATIC_INLINE void LL_DBGMCU_SetTracePinAssignment(uint32_t PinAssignment) |
AnnaBridge | 163:e59c8e839560 | 1449 | { |
AnnaBridge | 163:e59c8e839560 | 1450 | MODIFY_REG(DBGMCU->CR, DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE, PinAssignment); |
AnnaBridge | 163:e59c8e839560 | 1451 | } |
AnnaBridge | 163:e59c8e839560 | 1452 | |
AnnaBridge | 163:e59c8e839560 | 1453 | /** |
AnnaBridge | 163:e59c8e839560 | 1454 | * @brief Get Trace pin assignment control |
AnnaBridge | 163:e59c8e839560 | 1455 | * @rmtoll DBGMCU_CR TRACE_IOEN LL_DBGMCU_GetTracePinAssignment\n |
AnnaBridge | 163:e59c8e839560 | 1456 | * DBGMCU_CR TRACE_MODE LL_DBGMCU_GetTracePinAssignment |
AnnaBridge | 163:e59c8e839560 | 1457 | * @retval Returned value can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 1458 | * @arg @ref LL_DBGMCU_TRACE_NONE |
AnnaBridge | 163:e59c8e839560 | 1459 | * @arg @ref LL_DBGMCU_TRACE_ASYNCH |
AnnaBridge | 163:e59c8e839560 | 1460 | * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE1 |
AnnaBridge | 163:e59c8e839560 | 1461 | * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE2 |
AnnaBridge | 163:e59c8e839560 | 1462 | * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE4 |
AnnaBridge | 163:e59c8e839560 | 1463 | */ |
AnnaBridge | 163:e59c8e839560 | 1464 | __STATIC_INLINE uint32_t LL_DBGMCU_GetTracePinAssignment(void) |
AnnaBridge | 163:e59c8e839560 | 1465 | { |
AnnaBridge | 163:e59c8e839560 | 1466 | return (uint32_t)(READ_BIT(DBGMCU->CR, DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE)); |
AnnaBridge | 163:e59c8e839560 | 1467 | } |
AnnaBridge | 163:e59c8e839560 | 1468 | |
AnnaBridge | 163:e59c8e839560 | 1469 | /** |
AnnaBridge | 163:e59c8e839560 | 1470 | * @brief Freeze APB1 peripherals (group1 peripherals) |
AnnaBridge | 163:e59c8e839560 | 1471 | * @rmtoll APB1_FZ DBG_TIM2_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1472 | * APB1_FZ DBG_TIM3_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1473 | * APB1_FZ DBG_TIM4_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1474 | * APB1_FZ DBG_TIM5_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1475 | * APB1_FZ DBG_TIM6_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1476 | * APB1_FZ DBG_TIM7_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1477 | * APB1_FZ DBG_TIM12_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1478 | * APB1_FZ DBG_TIM13_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1479 | * APB1_FZ DBG_TIM14_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1480 | * APB1_FZ DBG_TIM18_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1481 | * APB1_FZ DBG_RTC_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1482 | * APB1_FZ DBG_WWDG_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1483 | * APB1_FZ DBG_IWDG_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1484 | * APB1_FZ DBG_I2C1_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1485 | * APB1_FZ DBG_I2C2_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1486 | * APB1_FZ DBG_I2C3_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1487 | * APB1_FZ DBG_CAN_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph |
AnnaBridge | 163:e59c8e839560 | 1488 | * @param Periphs This parameter can be a combination of the following values: |
AnnaBridge | 163:e59c8e839560 | 1489 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP |
AnnaBridge | 163:e59c8e839560 | 1490 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1491 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM4_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1492 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM5_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1493 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP |
AnnaBridge | 163:e59c8e839560 | 1494 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1495 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM12_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1496 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM13_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1497 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM14_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1498 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM18_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1499 | * @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP |
AnnaBridge | 163:e59c8e839560 | 1500 | * @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP |
AnnaBridge | 163:e59c8e839560 | 1501 | * @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP |
AnnaBridge | 163:e59c8e839560 | 1502 | * @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP |
AnnaBridge | 163:e59c8e839560 | 1503 | * @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1504 | * @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1505 | * @arg @ref LL_DBGMCU_APB1_GRP1_CAN_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1506 | * |
AnnaBridge | 163:e59c8e839560 | 1507 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 1508 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1509 | */ |
AnnaBridge | 163:e59c8e839560 | 1510 | __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_FreezePeriph(uint32_t Periphs) |
AnnaBridge | 163:e59c8e839560 | 1511 | { |
AnnaBridge | 163:e59c8e839560 | 1512 | SET_BIT(DBGMCU->APB1FZ, Periphs); |
AnnaBridge | 163:e59c8e839560 | 1513 | } |
AnnaBridge | 163:e59c8e839560 | 1514 | |
AnnaBridge | 163:e59c8e839560 | 1515 | /** |
AnnaBridge | 163:e59c8e839560 | 1516 | * @brief Unfreeze APB1 peripherals (group1 peripherals) |
AnnaBridge | 163:e59c8e839560 | 1517 | * @rmtoll APB1_FZ DBG_TIM2_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1518 | * APB1_FZ DBG_TIM3_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1519 | * APB1_FZ DBG_TIM4_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1520 | * APB1_FZ DBG_TIM5_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1521 | * APB1_FZ DBG_TIM6_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1522 | * APB1_FZ DBG_TIM7_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1523 | * APB1_FZ DBG_TIM12_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1524 | * APB1_FZ DBG_TIM13_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1525 | * APB1_FZ DBG_TIM14_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1526 | * APB1_FZ DBG_TIM18_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1527 | * APB1_FZ DBG_RTC_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1528 | * APB1_FZ DBG_WWDG_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1529 | * APB1_FZ DBG_IWDG_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1530 | * APB1_FZ DBG_I2C1_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1531 | * APB1_FZ DBG_I2C2_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1532 | * APB1_FZ DBG_I2C3_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1533 | * APB1_FZ DBG_CAN_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph |
AnnaBridge | 163:e59c8e839560 | 1534 | * @param Periphs This parameter can be a combination of the following values: |
AnnaBridge | 163:e59c8e839560 | 1535 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP |
AnnaBridge | 163:e59c8e839560 | 1536 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1537 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM4_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1538 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM5_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1539 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP |
AnnaBridge | 163:e59c8e839560 | 1540 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1541 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM12_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1542 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM13_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1543 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM14_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1544 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM18_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1545 | * @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP |
AnnaBridge | 163:e59c8e839560 | 1546 | * @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP |
AnnaBridge | 163:e59c8e839560 | 1547 | * @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP |
AnnaBridge | 163:e59c8e839560 | 1548 | * @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP |
AnnaBridge | 163:e59c8e839560 | 1549 | * @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1550 | * @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1551 | * @arg @ref LL_DBGMCU_APB1_GRP1_CAN_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1552 | * |
AnnaBridge | 163:e59c8e839560 | 1553 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 1554 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1555 | */ |
AnnaBridge | 163:e59c8e839560 | 1556 | __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_UnFreezePeriph(uint32_t Periphs) |
AnnaBridge | 163:e59c8e839560 | 1557 | { |
AnnaBridge | 163:e59c8e839560 | 1558 | CLEAR_BIT(DBGMCU->APB1FZ, Periphs); |
AnnaBridge | 163:e59c8e839560 | 1559 | } |
AnnaBridge | 163:e59c8e839560 | 1560 | |
AnnaBridge | 163:e59c8e839560 | 1561 | /** |
AnnaBridge | 163:e59c8e839560 | 1562 | * @brief Freeze APB2 peripherals |
AnnaBridge | 163:e59c8e839560 | 1563 | * @rmtoll APB2_FZ DBG_TIM1_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1564 | * APB2_FZ DBG_TIM8_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1565 | * APB2_FZ DBG_TIM15_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1566 | * APB2_FZ DBG_TIM16_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1567 | * APB2_FZ DBG_TIM17_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1568 | * APB2_FZ DBG_TIM19_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1569 | * APB2_FZ DBG_TIM20_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1570 | * APB2_FZ DBG_HRTIM1_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph |
AnnaBridge | 163:e59c8e839560 | 1571 | * @param Periphs This parameter can be a combination of the following values: |
AnnaBridge | 163:e59c8e839560 | 1572 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM1_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1573 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM8_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1574 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM15_STOP |
AnnaBridge | 163:e59c8e839560 | 1575 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM16_STOP |
AnnaBridge | 163:e59c8e839560 | 1576 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM17_STOP |
AnnaBridge | 163:e59c8e839560 | 1577 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM19_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1578 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM20_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1579 | * @arg @ref LL_DBGMCU_APB2_GRP1_HRTIM1_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1580 | * |
AnnaBridge | 163:e59c8e839560 | 1581 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 1582 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1583 | */ |
AnnaBridge | 163:e59c8e839560 | 1584 | __STATIC_INLINE void LL_DBGMCU_APB2_GRP1_FreezePeriph(uint32_t Periphs) |
AnnaBridge | 163:e59c8e839560 | 1585 | { |
AnnaBridge | 163:e59c8e839560 | 1586 | SET_BIT(DBGMCU->APB2FZ, Periphs); |
AnnaBridge | 163:e59c8e839560 | 1587 | } |
AnnaBridge | 163:e59c8e839560 | 1588 | |
AnnaBridge | 163:e59c8e839560 | 1589 | /** |
AnnaBridge | 163:e59c8e839560 | 1590 | * @brief Unfreeze APB2 peripherals |
AnnaBridge | 163:e59c8e839560 | 1591 | * @rmtoll APB2_FZ DBG_TIM1_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1592 | * APB2_FZ DBG_TIM8_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1593 | * APB2_FZ DBG_TIM15_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1594 | * APB2_FZ DBG_TIM16_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1595 | * APB2_FZ DBG_TIM17_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1596 | * APB2_FZ DBG_TIM19_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1597 | * APB2_FZ DBG_TIM20_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n |
AnnaBridge | 163:e59c8e839560 | 1598 | * APB2_FZ DBG_HRTIM1_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph |
AnnaBridge | 163:e59c8e839560 | 1599 | * @param Periphs This parameter can be a combination of the following values: |
AnnaBridge | 163:e59c8e839560 | 1600 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM1_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1601 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM8_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1602 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM15_STOP |
AnnaBridge | 163:e59c8e839560 | 1603 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM16_STOP |
AnnaBridge | 163:e59c8e839560 | 1604 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM17_STOP |
AnnaBridge | 163:e59c8e839560 | 1605 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM19_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1606 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM20_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1607 | * @arg @ref LL_DBGMCU_APB2_GRP1_HRTIM1_STOP (*) |
AnnaBridge | 163:e59c8e839560 | 1608 | * |
AnnaBridge | 163:e59c8e839560 | 1609 | * (*) value not defined in all devices. |
AnnaBridge | 163:e59c8e839560 | 1610 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1611 | */ |
AnnaBridge | 163:e59c8e839560 | 1612 | __STATIC_INLINE void LL_DBGMCU_APB2_GRP1_UnFreezePeriph(uint32_t Periphs) |
AnnaBridge | 163:e59c8e839560 | 1613 | { |
AnnaBridge | 163:e59c8e839560 | 1614 | CLEAR_BIT(DBGMCU->APB2FZ, Periphs); |
AnnaBridge | 163:e59c8e839560 | 1615 | } |
AnnaBridge | 163:e59c8e839560 | 1616 | |
AnnaBridge | 163:e59c8e839560 | 1617 | /** |
AnnaBridge | 163:e59c8e839560 | 1618 | * @} |
AnnaBridge | 163:e59c8e839560 | 1619 | */ |
AnnaBridge | 163:e59c8e839560 | 1620 | |
AnnaBridge | 163:e59c8e839560 | 1621 | /** @defgroup SYSTEM_LL_EF_FLASH FLASH |
AnnaBridge | 163:e59c8e839560 | 1622 | * @{ |
AnnaBridge | 163:e59c8e839560 | 1623 | */ |
AnnaBridge | 163:e59c8e839560 | 1624 | |
AnnaBridge | 163:e59c8e839560 | 1625 | /** |
AnnaBridge | 163:e59c8e839560 | 1626 | * @brief Set FLASH Latency |
AnnaBridge | 163:e59c8e839560 | 1627 | * @rmtoll FLASH_ACR LATENCY LL_FLASH_SetLatency |
AnnaBridge | 163:e59c8e839560 | 1628 | * @param Latency This parameter can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 1629 | * @arg @ref LL_FLASH_LATENCY_0 |
AnnaBridge | 163:e59c8e839560 | 1630 | * @arg @ref LL_FLASH_LATENCY_1 |
AnnaBridge | 163:e59c8e839560 | 1631 | * @arg @ref LL_FLASH_LATENCY_2 |
AnnaBridge | 163:e59c8e839560 | 1632 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1633 | */ |
AnnaBridge | 163:e59c8e839560 | 1634 | __STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency) |
AnnaBridge | 163:e59c8e839560 | 1635 | { |
AnnaBridge | 163:e59c8e839560 | 1636 | MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency); |
AnnaBridge | 163:e59c8e839560 | 1637 | } |
AnnaBridge | 163:e59c8e839560 | 1638 | |
AnnaBridge | 163:e59c8e839560 | 1639 | /** |
AnnaBridge | 163:e59c8e839560 | 1640 | * @brief Get FLASH Latency |
AnnaBridge | 163:e59c8e839560 | 1641 | * @rmtoll FLASH_ACR LATENCY LL_FLASH_GetLatency |
AnnaBridge | 163:e59c8e839560 | 1642 | * @retval Returned value can be one of the following values: |
AnnaBridge | 163:e59c8e839560 | 1643 | * @arg @ref LL_FLASH_LATENCY_0 |
AnnaBridge | 163:e59c8e839560 | 1644 | * @arg @ref LL_FLASH_LATENCY_1 |
AnnaBridge | 163:e59c8e839560 | 1645 | * @arg @ref LL_FLASH_LATENCY_2 |
AnnaBridge | 163:e59c8e839560 | 1646 | */ |
AnnaBridge | 163:e59c8e839560 | 1647 | __STATIC_INLINE uint32_t LL_FLASH_GetLatency(void) |
AnnaBridge | 163:e59c8e839560 | 1648 | { |
AnnaBridge | 163:e59c8e839560 | 1649 | return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY)); |
AnnaBridge | 163:e59c8e839560 | 1650 | } |
AnnaBridge | 163:e59c8e839560 | 1651 | |
AnnaBridge | 163:e59c8e839560 | 1652 | /** |
AnnaBridge | 163:e59c8e839560 | 1653 | * @brief Enable Prefetch |
AnnaBridge | 163:e59c8e839560 | 1654 | * @rmtoll FLASH_ACR PRFTBE LL_FLASH_EnablePrefetch |
AnnaBridge | 163:e59c8e839560 | 1655 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1656 | */ |
AnnaBridge | 163:e59c8e839560 | 1657 | __STATIC_INLINE void LL_FLASH_EnablePrefetch(void) |
AnnaBridge | 163:e59c8e839560 | 1658 | { |
AnnaBridge | 163:e59c8e839560 | 1659 | SET_BIT(FLASH->ACR, FLASH_ACR_PRFTBE ); |
AnnaBridge | 163:e59c8e839560 | 1660 | } |
AnnaBridge | 163:e59c8e839560 | 1661 | |
AnnaBridge | 163:e59c8e839560 | 1662 | /** |
AnnaBridge | 163:e59c8e839560 | 1663 | * @brief Disable Prefetch |
AnnaBridge | 163:e59c8e839560 | 1664 | * @rmtoll FLASH_ACR PRFTBE LL_FLASH_DisablePrefetch |
AnnaBridge | 163:e59c8e839560 | 1665 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1666 | */ |
AnnaBridge | 163:e59c8e839560 | 1667 | __STATIC_INLINE void LL_FLASH_DisablePrefetch(void) |
AnnaBridge | 163:e59c8e839560 | 1668 | { |
AnnaBridge | 163:e59c8e839560 | 1669 | CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTBE ); |
AnnaBridge | 163:e59c8e839560 | 1670 | } |
AnnaBridge | 163:e59c8e839560 | 1671 | |
AnnaBridge | 163:e59c8e839560 | 1672 | /** |
AnnaBridge | 163:e59c8e839560 | 1673 | * @brief Check if Prefetch buffer is enabled |
AnnaBridge | 163:e59c8e839560 | 1674 | * @rmtoll FLASH_ACR PRFTBS LL_FLASH_IsPrefetchEnabled |
AnnaBridge | 163:e59c8e839560 | 1675 | * @retval State of bit (1 or 0). |
AnnaBridge | 163:e59c8e839560 | 1676 | */ |
AnnaBridge | 163:e59c8e839560 | 1677 | __STATIC_INLINE uint32_t LL_FLASH_IsPrefetchEnabled(void) |
AnnaBridge | 163:e59c8e839560 | 1678 | { |
AnnaBridge | 163:e59c8e839560 | 1679 | return (READ_BIT(FLASH->ACR, FLASH_ACR_PRFTBS) == (FLASH_ACR_PRFTBS)); |
AnnaBridge | 163:e59c8e839560 | 1680 | } |
AnnaBridge | 163:e59c8e839560 | 1681 | |
AnnaBridge | 163:e59c8e839560 | 1682 | #if defined(FLASH_ACR_HLFCYA) |
AnnaBridge | 163:e59c8e839560 | 1683 | /** |
AnnaBridge | 163:e59c8e839560 | 1684 | * @brief Enable Flash Half Cycle Access |
AnnaBridge | 163:e59c8e839560 | 1685 | * @rmtoll FLASH_ACR HLFCYA LL_FLASH_EnableHalfCycleAccess |
AnnaBridge | 163:e59c8e839560 | 1686 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1687 | */ |
AnnaBridge | 163:e59c8e839560 | 1688 | __STATIC_INLINE void LL_FLASH_EnableHalfCycleAccess(void) |
AnnaBridge | 163:e59c8e839560 | 1689 | { |
AnnaBridge | 163:e59c8e839560 | 1690 | SET_BIT(FLASH->ACR, FLASH_ACR_HLFCYA); |
AnnaBridge | 163:e59c8e839560 | 1691 | } |
AnnaBridge | 163:e59c8e839560 | 1692 | |
AnnaBridge | 163:e59c8e839560 | 1693 | /** |
AnnaBridge | 163:e59c8e839560 | 1694 | * @brief Disable Flash Half Cycle Access |
AnnaBridge | 163:e59c8e839560 | 1695 | * @rmtoll FLASH_ACR HLFCYA LL_FLASH_DisableHalfCycleAccess |
AnnaBridge | 163:e59c8e839560 | 1696 | * @retval None |
AnnaBridge | 163:e59c8e839560 | 1697 | */ |
AnnaBridge | 163:e59c8e839560 | 1698 | __STATIC_INLINE void LL_FLASH_DisableHalfCycleAccess(void) |
AnnaBridge | 163:e59c8e839560 | 1699 | { |
AnnaBridge | 163:e59c8e839560 | 1700 | CLEAR_BIT(FLASH->ACR, FLASH_ACR_HLFCYA); |
AnnaBridge | 163:e59c8e839560 | 1701 | } |
AnnaBridge | 163:e59c8e839560 | 1702 | |
AnnaBridge | 163:e59c8e839560 | 1703 | /** |
AnnaBridge | 163:e59c8e839560 | 1704 | * @brief Check if Flash Half Cycle Access is enabled or not |
AnnaBridge | 163:e59c8e839560 | 1705 | * @rmtoll FLASH_ACR HLFCYA LL_FLASH_IsHalfCycleAccessEnabled |
AnnaBridge | 163:e59c8e839560 | 1706 | * @retval State of bit (1 or 0). |
AnnaBridge | 163:e59c8e839560 | 1707 | */ |
AnnaBridge | 163:e59c8e839560 | 1708 | __STATIC_INLINE uint32_t LL_FLASH_IsHalfCycleAccessEnabled(void) |
AnnaBridge | 163:e59c8e839560 | 1709 | { |
AnnaBridge | 163:e59c8e839560 | 1710 | return (READ_BIT(FLASH->ACR, FLASH_ACR_HLFCYA) == (FLASH_ACR_HLFCYA)); |
AnnaBridge | 163:e59c8e839560 | 1711 | } |
AnnaBridge | 163:e59c8e839560 | 1712 | #endif /* FLASH_ACR_HLFCYA */ |
AnnaBridge | 163:e59c8e839560 | 1713 | |
AnnaBridge | 163:e59c8e839560 | 1714 | |
AnnaBridge | 163:e59c8e839560 | 1715 | |
AnnaBridge | 163:e59c8e839560 | 1716 | /** |
AnnaBridge | 163:e59c8e839560 | 1717 | * @} |
AnnaBridge | 163:e59c8e839560 | 1718 | */ |
AnnaBridge | 163:e59c8e839560 | 1719 | |
AnnaBridge | 163:e59c8e839560 | 1720 | /** |
AnnaBridge | 163:e59c8e839560 | 1721 | * @} |
AnnaBridge | 163:e59c8e839560 | 1722 | */ |
AnnaBridge | 163:e59c8e839560 | 1723 | |
AnnaBridge | 163:e59c8e839560 | 1724 | /** |
AnnaBridge | 163:e59c8e839560 | 1725 | * @} |
AnnaBridge | 163:e59c8e839560 | 1726 | */ |
AnnaBridge | 163:e59c8e839560 | 1727 | |
AnnaBridge | 163:e59c8e839560 | 1728 | #endif /* defined (FLASH) || defined (SYSCFG) || defined (DBGMCU) */ |
AnnaBridge | 163:e59c8e839560 | 1729 | |
AnnaBridge | 163:e59c8e839560 | 1730 | /** |
AnnaBridge | 163:e59c8e839560 | 1731 | * @} |
AnnaBridge | 163:e59c8e839560 | 1732 | */ |
AnnaBridge | 163:e59c8e839560 | 1733 | |
AnnaBridge | 163:e59c8e839560 | 1734 | #ifdef __cplusplus |
AnnaBridge | 163:e59c8e839560 | 1735 | } |
AnnaBridge | 163:e59c8e839560 | 1736 | #endif |
AnnaBridge | 163:e59c8e839560 | 1737 | |
AnnaBridge | 163:e59c8e839560 | 1738 | #endif /* __STM32F3xx_LL_SYSTEM_H */ |
AnnaBridge | 163:e59c8e839560 | 1739 | |
AnnaBridge | 163:e59c8e839560 | 1740 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |