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TARGET_NUCLEO_F767ZI/TOOLCHAIN_IAR/stm32f7xx_hal_usart.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
mbed library. Release version 164
Who changed what in which revision?
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AnnaBridge | 171:3a7713b1edbc | 1 | /** |
AnnaBridge | 171:3a7713b1edbc | 2 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 3 | * @file stm32f7xx_hal_usart.h |
AnnaBridge | 171:3a7713b1edbc | 4 | * @author MCD Application Team |
AnnaBridge | 171:3a7713b1edbc | 5 | * @brief Header file of USART HAL module. |
AnnaBridge | 171:3a7713b1edbc | 6 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 7 | * @attention |
AnnaBridge | 171:3a7713b1edbc | 8 | * |
AnnaBridge | 171:3a7713b1edbc | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
AnnaBridge | 171:3a7713b1edbc | 10 | * |
AnnaBridge | 171:3a7713b1edbc | 11 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 171:3a7713b1edbc | 12 | * are permitted provided that the following conditions are met: |
AnnaBridge | 171:3a7713b1edbc | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 171:3a7713b1edbc | 14 | * this list of conditions and the following disclaimer. |
AnnaBridge | 171:3a7713b1edbc | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 171:3a7713b1edbc | 16 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 171:3a7713b1edbc | 17 | * and/or other materials provided with the distribution. |
AnnaBridge | 171:3a7713b1edbc | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
AnnaBridge | 171:3a7713b1edbc | 19 | * may be used to endorse or promote products derived from this software |
AnnaBridge | 171:3a7713b1edbc | 20 | * without specific prior written permission. |
AnnaBridge | 171:3a7713b1edbc | 21 | * |
AnnaBridge | 171:3a7713b1edbc | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
AnnaBridge | 171:3a7713b1edbc | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
AnnaBridge | 171:3a7713b1edbc | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 171:3a7713b1edbc | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 171:3a7713b1edbc | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
AnnaBridge | 171:3a7713b1edbc | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
AnnaBridge | 171:3a7713b1edbc | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
AnnaBridge | 171:3a7713b1edbc | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
AnnaBridge | 171:3a7713b1edbc | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
AnnaBridge | 171:3a7713b1edbc | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 171:3a7713b1edbc | 32 | * |
AnnaBridge | 171:3a7713b1edbc | 33 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 34 | */ |
AnnaBridge | 171:3a7713b1edbc | 35 | |
AnnaBridge | 171:3a7713b1edbc | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 37 | #ifndef __STM32F7xx_HAL_USART_H |
AnnaBridge | 171:3a7713b1edbc | 38 | #define __STM32F7xx_HAL_USART_H |
AnnaBridge | 171:3a7713b1edbc | 39 | |
AnnaBridge | 171:3a7713b1edbc | 40 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 41 | extern "C" { |
AnnaBridge | 171:3a7713b1edbc | 42 | #endif |
AnnaBridge | 171:3a7713b1edbc | 43 | |
AnnaBridge | 171:3a7713b1edbc | 44 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 45 | #include "stm32f7xx_hal_def.h" |
AnnaBridge | 171:3a7713b1edbc | 46 | |
AnnaBridge | 171:3a7713b1edbc | 47 | /** @addtogroup STM32F7xx_HAL_Driver |
AnnaBridge | 171:3a7713b1edbc | 48 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 49 | */ |
AnnaBridge | 171:3a7713b1edbc | 50 | |
AnnaBridge | 171:3a7713b1edbc | 51 | /** @addtogroup USART |
AnnaBridge | 171:3a7713b1edbc | 52 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 53 | */ |
AnnaBridge | 171:3a7713b1edbc | 54 | |
AnnaBridge | 171:3a7713b1edbc | 55 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 56 | /** @defgroup USART_Exported_Types USART Exported Types |
AnnaBridge | 171:3a7713b1edbc | 57 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 58 | */ |
AnnaBridge | 171:3a7713b1edbc | 59 | |
AnnaBridge | 171:3a7713b1edbc | 60 | /** |
AnnaBridge | 171:3a7713b1edbc | 61 | * @brief USART Init Structure definition |
AnnaBridge | 171:3a7713b1edbc | 62 | */ |
AnnaBridge | 171:3a7713b1edbc | 63 | typedef struct |
AnnaBridge | 171:3a7713b1edbc | 64 | { |
AnnaBridge | 171:3a7713b1edbc | 65 | uint32_t BaudRate; /*!< This member configures the Usart communication baud rate. |
AnnaBridge | 171:3a7713b1edbc | 66 | The baud rate is computed using the following formula: |
AnnaBridge | 171:3a7713b1edbc | 67 | Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate))) */ |
AnnaBridge | 171:3a7713b1edbc | 68 | |
AnnaBridge | 171:3a7713b1edbc | 69 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
AnnaBridge | 171:3a7713b1edbc | 70 | This parameter can be a value of @ref USARTEx_Word_Length */ |
AnnaBridge | 171:3a7713b1edbc | 71 | |
AnnaBridge | 171:3a7713b1edbc | 72 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
AnnaBridge | 171:3a7713b1edbc | 73 | This parameter can be a value of @ref USART_Stop_Bits */ |
AnnaBridge | 171:3a7713b1edbc | 74 | |
AnnaBridge | 171:3a7713b1edbc | 75 | uint32_t Parity; /*!< Specifies the parity mode. |
AnnaBridge | 171:3a7713b1edbc | 76 | This parameter can be a value of @ref USART_Parity |
AnnaBridge | 171:3a7713b1edbc | 77 | @note When parity is enabled, the computed parity is inserted |
AnnaBridge | 171:3a7713b1edbc | 78 | at the MSB position of the transmitted data (9th bit when |
AnnaBridge | 171:3a7713b1edbc | 79 | the word length is set to 9 data bits; 8th bit when the |
AnnaBridge | 171:3a7713b1edbc | 80 | word length is set to 8 data bits). */ |
AnnaBridge | 171:3a7713b1edbc | 81 | |
AnnaBridge | 171:3a7713b1edbc | 82 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 83 | This parameter can be a value of @ref USART_Mode */ |
AnnaBridge | 171:3a7713b1edbc | 84 | |
AnnaBridge | 171:3a7713b1edbc | 85 | uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). |
AnnaBridge | 171:3a7713b1edbc | 86 | This parameter can be a value of @ref USART_Over_Sampling */ |
AnnaBridge | 171:3a7713b1edbc | 87 | |
AnnaBridge | 171:3a7713b1edbc | 88 | uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock. |
AnnaBridge | 171:3a7713b1edbc | 89 | This parameter can be a value of @ref USART_Clock_Polarity */ |
AnnaBridge | 171:3a7713b1edbc | 90 | |
AnnaBridge | 171:3a7713b1edbc | 91 | uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made. |
AnnaBridge | 171:3a7713b1edbc | 92 | This parameter can be a value of @ref USART_Clock_Phase */ |
AnnaBridge | 171:3a7713b1edbc | 93 | |
AnnaBridge | 171:3a7713b1edbc | 94 | uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted |
AnnaBridge | 171:3a7713b1edbc | 95 | data bit (MSB) has to be output on the SCLK pin in synchronous mode. |
AnnaBridge | 171:3a7713b1edbc | 96 | This parameter can be a value of @ref USART_Last_Bit */ |
AnnaBridge | 171:3a7713b1edbc | 97 | }USART_InitTypeDef; |
AnnaBridge | 171:3a7713b1edbc | 98 | |
AnnaBridge | 171:3a7713b1edbc | 99 | /** |
AnnaBridge | 171:3a7713b1edbc | 100 | * @brief HAL USART State structures definition |
AnnaBridge | 171:3a7713b1edbc | 101 | */ |
AnnaBridge | 171:3a7713b1edbc | 102 | typedef enum |
AnnaBridge | 171:3a7713b1edbc | 103 | { |
AnnaBridge | 171:3a7713b1edbc | 104 | HAL_USART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized */ |
AnnaBridge | 171:3a7713b1edbc | 105 | HAL_USART_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ |
AnnaBridge | 171:3a7713b1edbc | 106 | HAL_USART_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ |
AnnaBridge | 171:3a7713b1edbc | 107 | HAL_USART_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */ |
AnnaBridge | 171:3a7713b1edbc | 108 | HAL_USART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ |
AnnaBridge | 171:3a7713b1edbc | 109 | HAL_USART_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission Reception process is ongoing */ |
AnnaBridge | 171:3a7713b1edbc | 110 | HAL_USART_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ |
AnnaBridge | 171:3a7713b1edbc | 111 | HAL_USART_STATE_ERROR = 0x04U /*!< Error */ |
AnnaBridge | 171:3a7713b1edbc | 112 | }HAL_USART_StateTypeDef; |
AnnaBridge | 171:3a7713b1edbc | 113 | |
AnnaBridge | 171:3a7713b1edbc | 114 | |
AnnaBridge | 171:3a7713b1edbc | 115 | /** |
AnnaBridge | 171:3a7713b1edbc | 116 | * @brief USART clock sources definitions |
AnnaBridge | 171:3a7713b1edbc | 117 | */ |
AnnaBridge | 171:3a7713b1edbc | 118 | typedef enum |
AnnaBridge | 171:3a7713b1edbc | 119 | { |
AnnaBridge | 171:3a7713b1edbc | 120 | USART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ |
AnnaBridge | 171:3a7713b1edbc | 121 | USART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ |
AnnaBridge | 171:3a7713b1edbc | 122 | USART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ |
AnnaBridge | 171:3a7713b1edbc | 123 | USART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ |
AnnaBridge | 171:3a7713b1edbc | 124 | USART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ |
AnnaBridge | 171:3a7713b1edbc | 125 | USART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ |
AnnaBridge | 171:3a7713b1edbc | 126 | }USART_ClockSourceTypeDef; |
AnnaBridge | 171:3a7713b1edbc | 127 | |
AnnaBridge | 171:3a7713b1edbc | 128 | |
AnnaBridge | 171:3a7713b1edbc | 129 | /** |
AnnaBridge | 171:3a7713b1edbc | 130 | * @brief USART handle Structure definition |
AnnaBridge | 171:3a7713b1edbc | 131 | */ |
AnnaBridge | 171:3a7713b1edbc | 132 | typedef struct |
AnnaBridge | 171:3a7713b1edbc | 133 | { |
AnnaBridge | 171:3a7713b1edbc | 134 | USART_TypeDef *Instance; /*!< USART registers base address */ |
AnnaBridge | 171:3a7713b1edbc | 135 | |
AnnaBridge | 171:3a7713b1edbc | 136 | USART_InitTypeDef Init; /*!< USART communication parameters */ |
AnnaBridge | 171:3a7713b1edbc | 137 | |
AnnaBridge | 171:3a7713b1edbc | 138 | uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */ |
AnnaBridge | 171:3a7713b1edbc | 139 | |
AnnaBridge | 171:3a7713b1edbc | 140 | uint16_t TxXferSize; /*!< USART Tx Transfer size */ |
AnnaBridge | 171:3a7713b1edbc | 141 | |
AnnaBridge | 171:3a7713b1edbc | 142 | __IO uint16_t TxXferCount; /*!< USART Tx Transfer Counter */ |
AnnaBridge | 171:3a7713b1edbc | 143 | |
AnnaBridge | 171:3a7713b1edbc | 144 | uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */ |
AnnaBridge | 171:3a7713b1edbc | 145 | |
AnnaBridge | 171:3a7713b1edbc | 146 | uint16_t RxXferSize; /*!< USART Rx Transfer size */ |
AnnaBridge | 171:3a7713b1edbc | 147 | |
AnnaBridge | 171:3a7713b1edbc | 148 | __IO uint16_t RxXferCount; /*!< USART Rx Transfer Counter */ |
AnnaBridge | 171:3a7713b1edbc | 149 | |
AnnaBridge | 171:3a7713b1edbc | 150 | uint16_t Mask; /*!< USART Rx RDR register mask */ |
AnnaBridge | 171:3a7713b1edbc | 151 | |
AnnaBridge | 171:3a7713b1edbc | 152 | DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */ |
AnnaBridge | 171:3a7713b1edbc | 153 | |
AnnaBridge | 171:3a7713b1edbc | 154 | DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */ |
AnnaBridge | 171:3a7713b1edbc | 155 | |
AnnaBridge | 171:3a7713b1edbc | 156 | HAL_LockTypeDef Lock; /*!< Locking object */ |
AnnaBridge | 171:3a7713b1edbc | 157 | |
AnnaBridge | 171:3a7713b1edbc | 158 | HAL_USART_StateTypeDef State; /*!< USART communication state */ |
AnnaBridge | 171:3a7713b1edbc | 159 | |
AnnaBridge | 171:3a7713b1edbc | 160 | __IO uint32_t ErrorCode; /*!< USART Error code */ |
AnnaBridge | 171:3a7713b1edbc | 161 | |
AnnaBridge | 171:3a7713b1edbc | 162 | }USART_HandleTypeDef; |
AnnaBridge | 171:3a7713b1edbc | 163 | /** |
AnnaBridge | 171:3a7713b1edbc | 164 | * @} |
AnnaBridge | 171:3a7713b1edbc | 165 | */ |
AnnaBridge | 171:3a7713b1edbc | 166 | |
AnnaBridge | 171:3a7713b1edbc | 167 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 168 | /** @defgroup USART_Exported_Constants USART Exported Constants |
AnnaBridge | 171:3a7713b1edbc | 169 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 170 | */ |
AnnaBridge | 171:3a7713b1edbc | 171 | |
AnnaBridge | 171:3a7713b1edbc | 172 | /** @defgroup USART_Error_Code USART Error Code |
AnnaBridge | 171:3a7713b1edbc | 173 | * @brief USART Error Code |
AnnaBridge | 171:3a7713b1edbc | 174 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 175 | */ |
AnnaBridge | 171:3a7713b1edbc | 176 | #define HAL_USART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ |
AnnaBridge | 171:3a7713b1edbc | 177 | #define HAL_USART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */ |
AnnaBridge | 171:3a7713b1edbc | 178 | #define HAL_USART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */ |
AnnaBridge | 171:3a7713b1edbc | 179 | #define HAL_USART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */ |
AnnaBridge | 171:3a7713b1edbc | 180 | #define HAL_USART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */ |
AnnaBridge | 171:3a7713b1edbc | 181 | #define HAL_USART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */ |
AnnaBridge | 171:3a7713b1edbc | 182 | /** |
AnnaBridge | 171:3a7713b1edbc | 183 | * @} |
AnnaBridge | 171:3a7713b1edbc | 184 | */ |
AnnaBridge | 171:3a7713b1edbc | 185 | |
AnnaBridge | 171:3a7713b1edbc | 186 | /** @defgroup USART_Stop_Bits USART Number of Stop Bits |
AnnaBridge | 171:3a7713b1edbc | 187 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 188 | */ |
AnnaBridge | 171:3a7713b1edbc | 189 | #define USART_STOPBITS_1 ((uint32_t)0x0000U) |
AnnaBridge | 171:3a7713b1edbc | 190 | #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
AnnaBridge | 171:3a7713b1edbc | 191 | #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1)) |
AnnaBridge | 171:3a7713b1edbc | 192 | /** |
AnnaBridge | 171:3a7713b1edbc | 193 | * @} |
AnnaBridge | 171:3a7713b1edbc | 194 | */ |
AnnaBridge | 171:3a7713b1edbc | 195 | |
AnnaBridge | 171:3a7713b1edbc | 196 | /** @defgroup USART_Parity USART Parity |
AnnaBridge | 171:3a7713b1edbc | 197 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 198 | */ |
AnnaBridge | 171:3a7713b1edbc | 199 | #define USART_PARITY_NONE ((uint32_t)0x0000U) |
AnnaBridge | 171:3a7713b1edbc | 200 | #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
AnnaBridge | 171:3a7713b1edbc | 201 | #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
AnnaBridge | 171:3a7713b1edbc | 202 | /** |
AnnaBridge | 171:3a7713b1edbc | 203 | * @} |
AnnaBridge | 171:3a7713b1edbc | 204 | */ |
AnnaBridge | 171:3a7713b1edbc | 205 | |
AnnaBridge | 171:3a7713b1edbc | 206 | /** @defgroup USART_Mode USART Mode |
AnnaBridge | 171:3a7713b1edbc | 207 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 208 | */ |
AnnaBridge | 171:3a7713b1edbc | 209 | #define USART_MODE_RX ((uint32_t)USART_CR1_RE) |
AnnaBridge | 171:3a7713b1edbc | 210 | #define USART_MODE_TX ((uint32_t)USART_CR1_TE) |
AnnaBridge | 171:3a7713b1edbc | 211 | #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) |
AnnaBridge | 171:3a7713b1edbc | 212 | /** |
AnnaBridge | 171:3a7713b1edbc | 213 | * @} |
AnnaBridge | 171:3a7713b1edbc | 214 | */ |
AnnaBridge | 171:3a7713b1edbc | 215 | |
AnnaBridge | 171:3a7713b1edbc | 216 | /** @defgroup USART_Over_Sampling USART Over Sampling |
AnnaBridge | 171:3a7713b1edbc | 217 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 218 | */ |
AnnaBridge | 171:3a7713b1edbc | 219 | #define USART_OVERSAMPLING_16 ((uint32_t)0x0000U) |
AnnaBridge | 171:3a7713b1edbc | 220 | #define USART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) |
AnnaBridge | 171:3a7713b1edbc | 221 | /** |
AnnaBridge | 171:3a7713b1edbc | 222 | * @} |
AnnaBridge | 171:3a7713b1edbc | 223 | */ |
AnnaBridge | 171:3a7713b1edbc | 224 | /** @defgroup USART_Clock USART Clock |
AnnaBridge | 171:3a7713b1edbc | 225 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 226 | */ |
AnnaBridge | 171:3a7713b1edbc | 227 | #define USART_CLOCK_DISABLE ((uint32_t)0x0000U) |
AnnaBridge | 171:3a7713b1edbc | 228 | #define USART_CLOCK_ENABLE ((uint32_t)USART_CR2_CLKEN) |
AnnaBridge | 171:3a7713b1edbc | 229 | /** |
AnnaBridge | 171:3a7713b1edbc | 230 | * @} |
AnnaBridge | 171:3a7713b1edbc | 231 | */ |
AnnaBridge | 171:3a7713b1edbc | 232 | |
AnnaBridge | 171:3a7713b1edbc | 233 | /** @defgroup USART_Clock_Polarity USART Clock Polarity |
AnnaBridge | 171:3a7713b1edbc | 234 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 235 | */ |
AnnaBridge | 171:3a7713b1edbc | 236 | #define USART_POLARITY_LOW ((uint32_t)0x0000U) |
AnnaBridge | 171:3a7713b1edbc | 237 | #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL) |
AnnaBridge | 171:3a7713b1edbc | 238 | /** |
AnnaBridge | 171:3a7713b1edbc | 239 | * @} |
AnnaBridge | 171:3a7713b1edbc | 240 | */ |
AnnaBridge | 171:3a7713b1edbc | 241 | |
AnnaBridge | 171:3a7713b1edbc | 242 | /** @defgroup USART_Clock_Phase USART Clock Phase |
AnnaBridge | 171:3a7713b1edbc | 243 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 244 | */ |
AnnaBridge | 171:3a7713b1edbc | 245 | #define USART_PHASE_1EDGE ((uint32_t)0x0000U) |
AnnaBridge | 171:3a7713b1edbc | 246 | #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA) |
AnnaBridge | 171:3a7713b1edbc | 247 | /** |
AnnaBridge | 171:3a7713b1edbc | 248 | * @} |
AnnaBridge | 171:3a7713b1edbc | 249 | */ |
AnnaBridge | 171:3a7713b1edbc | 250 | |
AnnaBridge | 171:3a7713b1edbc | 251 | /** @defgroup USART_Last_Bit USART Last Bit |
AnnaBridge | 171:3a7713b1edbc | 252 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 253 | */ |
AnnaBridge | 171:3a7713b1edbc | 254 | #define USART_LASTBIT_DISABLE ((uint32_t)0x0000U) |
AnnaBridge | 171:3a7713b1edbc | 255 | #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL) |
AnnaBridge | 171:3a7713b1edbc | 256 | /** |
AnnaBridge | 171:3a7713b1edbc | 257 | * @} |
AnnaBridge | 171:3a7713b1edbc | 258 | */ |
AnnaBridge | 171:3a7713b1edbc | 259 | |
AnnaBridge | 171:3a7713b1edbc | 260 | /** @defgroup USART_Request_Parameters USART Request Parameters |
AnnaBridge | 171:3a7713b1edbc | 261 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 262 | */ |
AnnaBridge | 171:3a7713b1edbc | 263 | #define USART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */ |
AnnaBridge | 171:3a7713b1edbc | 264 | #define USART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */ |
AnnaBridge | 171:3a7713b1edbc | 265 | /** |
AnnaBridge | 171:3a7713b1edbc | 266 | * @} |
AnnaBridge | 171:3a7713b1edbc | 267 | */ |
AnnaBridge | 171:3a7713b1edbc | 268 | |
AnnaBridge | 171:3a7713b1edbc | 269 | /** @defgroup USART_Flags USART Flags |
AnnaBridge | 171:3a7713b1edbc | 270 | * Elements values convention: 0xXXXX |
AnnaBridge | 171:3a7713b1edbc | 271 | * - 0xXXXX : Flag mask in the ISR register |
AnnaBridge | 171:3a7713b1edbc | 272 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 273 | */ |
AnnaBridge | 171:3a7713b1edbc | 274 | #define USART_FLAG_REACK ((uint32_t)0x00400000U) |
AnnaBridge | 171:3a7713b1edbc | 275 | #define USART_FLAG_TEACK ((uint32_t)0x00200000U) |
AnnaBridge | 171:3a7713b1edbc | 276 | #define USART_FLAG_BUSY ((uint32_t)0x00010000U) |
AnnaBridge | 171:3a7713b1edbc | 277 | #define USART_FLAG_CTS ((uint32_t)0x00000400U) |
AnnaBridge | 171:3a7713b1edbc | 278 | #define USART_FLAG_CTSIF ((uint32_t)0x00000200U) |
AnnaBridge | 171:3a7713b1edbc | 279 | #define USART_FLAG_LBDF ((uint32_t)0x00000100U) |
AnnaBridge | 171:3a7713b1edbc | 280 | #define USART_FLAG_TXE ((uint32_t)0x00000080U) |
AnnaBridge | 171:3a7713b1edbc | 281 | #define USART_FLAG_TC ((uint32_t)0x00000040U) |
AnnaBridge | 171:3a7713b1edbc | 282 | #define USART_FLAG_RXNE ((uint32_t)0x00000020U) |
AnnaBridge | 171:3a7713b1edbc | 283 | #define USART_FLAG_IDLE ((uint32_t)0x00000010U) |
AnnaBridge | 171:3a7713b1edbc | 284 | #define USART_FLAG_ORE ((uint32_t)0x00000008U) |
AnnaBridge | 171:3a7713b1edbc | 285 | #define USART_FLAG_NE ((uint32_t)0x00000004U) |
AnnaBridge | 171:3a7713b1edbc | 286 | #define USART_FLAG_FE ((uint32_t)0x00000002U) |
AnnaBridge | 171:3a7713b1edbc | 287 | #define USART_FLAG_PE ((uint32_t)0x00000001U) |
AnnaBridge | 171:3a7713b1edbc | 288 | /** |
AnnaBridge | 171:3a7713b1edbc | 289 | * @} |
AnnaBridge | 171:3a7713b1edbc | 290 | */ |
AnnaBridge | 171:3a7713b1edbc | 291 | |
AnnaBridge | 171:3a7713b1edbc | 292 | /** @defgroup USART_Interrupt_definition USART Interrupts Definition |
AnnaBridge | 171:3a7713b1edbc | 293 | * Elements values convention: 0000ZZZZ0XXYYYYYb |
AnnaBridge | 171:3a7713b1edbc | 294 | * - YYYYY : Interrupt source position in the XX register (5bits) |
AnnaBridge | 171:3a7713b1edbc | 295 | * - XX : Interrupt source register (2bits) |
AnnaBridge | 171:3a7713b1edbc | 296 | * - 01: CR1 register |
AnnaBridge | 171:3a7713b1edbc | 297 | * - 10: CR2 register |
AnnaBridge | 171:3a7713b1edbc | 298 | * - 11: CR3 register |
AnnaBridge | 171:3a7713b1edbc | 299 | * - ZZZZ : Flag position in the ISR register(4bits) |
AnnaBridge | 171:3a7713b1edbc | 300 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 301 | */ |
AnnaBridge | 171:3a7713b1edbc | 302 | |
AnnaBridge | 171:3a7713b1edbc | 303 | #define USART_IT_PE ((uint16_t)0x0028U) |
AnnaBridge | 171:3a7713b1edbc | 304 | #define USART_IT_TXE ((uint16_t)0x0727U) |
AnnaBridge | 171:3a7713b1edbc | 305 | #define USART_IT_TC ((uint16_t)0x0626U) |
AnnaBridge | 171:3a7713b1edbc | 306 | #define USART_IT_RXNE ((uint16_t)0x0525U) |
AnnaBridge | 171:3a7713b1edbc | 307 | #define USART_IT_IDLE ((uint16_t)0x0424U) |
AnnaBridge | 171:3a7713b1edbc | 308 | #define USART_IT_ERR ((uint16_t)0x0060U) |
AnnaBridge | 171:3a7713b1edbc | 309 | |
AnnaBridge | 171:3a7713b1edbc | 310 | #define USART_IT_ORE ((uint16_t)0x0300U) |
AnnaBridge | 171:3a7713b1edbc | 311 | #define USART_IT_NE ((uint16_t)0x0200U) |
AnnaBridge | 171:3a7713b1edbc | 312 | #define USART_IT_FE ((uint16_t)0x0100U) |
AnnaBridge | 171:3a7713b1edbc | 313 | /** |
AnnaBridge | 171:3a7713b1edbc | 314 | * @} |
AnnaBridge | 171:3a7713b1edbc | 315 | */ |
AnnaBridge | 171:3a7713b1edbc | 316 | |
AnnaBridge | 171:3a7713b1edbc | 317 | /** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags |
AnnaBridge | 171:3a7713b1edbc | 318 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 319 | */ |
AnnaBridge | 171:3a7713b1edbc | 320 | #define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ |
AnnaBridge | 171:3a7713b1edbc | 321 | #define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ |
AnnaBridge | 171:3a7713b1edbc | 322 | #define USART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */ |
AnnaBridge | 171:3a7713b1edbc | 323 | #define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */ |
AnnaBridge | 171:3a7713b1edbc | 324 | #define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ |
AnnaBridge | 171:3a7713b1edbc | 325 | #define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ |
AnnaBridge | 171:3a7713b1edbc | 326 | #define USART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ |
AnnaBridge | 171:3a7713b1edbc | 327 | /** |
AnnaBridge | 171:3a7713b1edbc | 328 | * @} |
AnnaBridge | 171:3a7713b1edbc | 329 | */ |
AnnaBridge | 171:3a7713b1edbc | 330 | |
AnnaBridge | 171:3a7713b1edbc | 331 | /** |
AnnaBridge | 171:3a7713b1edbc | 332 | * @} |
AnnaBridge | 171:3a7713b1edbc | 333 | */ |
AnnaBridge | 171:3a7713b1edbc | 334 | |
AnnaBridge | 171:3a7713b1edbc | 335 | /* Exported macros -----------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 336 | /** @defgroup USART_Exported_Macros USART Exported Macros |
AnnaBridge | 171:3a7713b1edbc | 337 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 338 | */ |
AnnaBridge | 171:3a7713b1edbc | 339 | |
AnnaBridge | 171:3a7713b1edbc | 340 | /** @brief Reset USART handle state |
AnnaBridge | 171:3a7713b1edbc | 341 | * @param __HANDLE__ USART handle. |
AnnaBridge | 171:3a7713b1edbc | 342 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 343 | */ |
AnnaBridge | 171:3a7713b1edbc | 344 | #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET) |
AnnaBridge | 171:3a7713b1edbc | 345 | |
AnnaBridge | 171:3a7713b1edbc | 346 | /** @brief Checks whether the specified USART flag is set or not. |
AnnaBridge | 171:3a7713b1edbc | 347 | * @param __HANDLE__ specifies the USART Handle |
AnnaBridge | 171:3a7713b1edbc | 348 | * @param __FLAG__ specifies the flag to check. |
AnnaBridge | 171:3a7713b1edbc | 349 | * This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 350 | * @arg USART_FLAG_REACK: Receive enable acknowledge flag |
AnnaBridge | 171:3a7713b1edbc | 351 | * @arg USART_FLAG_TEACK: Transmit enable acknowledge flag |
AnnaBridge | 171:3a7713b1edbc | 352 | * @arg USART_FLAG_BUSY: Busy flag |
AnnaBridge | 171:3a7713b1edbc | 353 | * @arg USART_FLAG_CTS: CTS Change flag |
AnnaBridge | 171:3a7713b1edbc | 354 | * @arg USART_FLAG_TXE: Transmit data register empty flag |
AnnaBridge | 171:3a7713b1edbc | 355 | * @arg USART_FLAG_TC: Transmission Complete flag |
AnnaBridge | 171:3a7713b1edbc | 356 | * @arg USART_FLAG_RXNE: Receive data register not empty flag |
AnnaBridge | 171:3a7713b1edbc | 357 | * @arg USART_FLAG_IDLE: Idle Line detection flag |
AnnaBridge | 171:3a7713b1edbc | 358 | * @arg USART_FLAG_ORE: OverRun Error flag |
AnnaBridge | 171:3a7713b1edbc | 359 | * @arg USART_FLAG_NE: Noise Error flag |
AnnaBridge | 171:3a7713b1edbc | 360 | * @arg USART_FLAG_FE: Framing Error flag |
AnnaBridge | 171:3a7713b1edbc | 361 | * @arg USART_FLAG_PE: Parity Error flag |
AnnaBridge | 171:3a7713b1edbc | 362 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
AnnaBridge | 171:3a7713b1edbc | 363 | */ |
AnnaBridge | 171:3a7713b1edbc | 364 | #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) |
AnnaBridge | 171:3a7713b1edbc | 365 | |
AnnaBridge | 171:3a7713b1edbc | 366 | |
AnnaBridge | 171:3a7713b1edbc | 367 | /** @brief Enables the specified USART interrupt. |
AnnaBridge | 171:3a7713b1edbc | 368 | * @param __HANDLE__ specifies the USART Handle |
AnnaBridge | 171:3a7713b1edbc | 369 | * @param __INTERRUPT__ specifies the USART interrupt source to enable. |
AnnaBridge | 171:3a7713b1edbc | 370 | * This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 371 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
AnnaBridge | 171:3a7713b1edbc | 372 | * @arg USART_IT_TC: Transmission complete interrupt |
AnnaBridge | 171:3a7713b1edbc | 373 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
AnnaBridge | 171:3a7713b1edbc | 374 | * @arg USART_IT_IDLE: Idle line detection interrupt |
AnnaBridge | 171:3a7713b1edbc | 375 | * @arg USART_IT_PE: Parity Error interrupt |
AnnaBridge | 171:3a7713b1edbc | 376 | * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
AnnaBridge | 171:3a7713b1edbc | 377 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 378 | */ |
AnnaBridge | 171:3a7713b1edbc | 379 | #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ |
AnnaBridge | 171:3a7713b1edbc | 380 | ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ |
AnnaBridge | 171:3a7713b1edbc | 381 | ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) |
AnnaBridge | 171:3a7713b1edbc | 382 | |
AnnaBridge | 171:3a7713b1edbc | 383 | /** @brief Disables the specified USART interrupt. |
AnnaBridge | 171:3a7713b1edbc | 384 | * @param __HANDLE__ specifies the USART Handle. |
AnnaBridge | 171:3a7713b1edbc | 385 | * @param __INTERRUPT__ specifies the USART interrupt source to disable. |
AnnaBridge | 171:3a7713b1edbc | 386 | * This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 387 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
AnnaBridge | 171:3a7713b1edbc | 388 | * @arg USART_IT_TC: Transmission complete interrupt |
AnnaBridge | 171:3a7713b1edbc | 389 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
AnnaBridge | 171:3a7713b1edbc | 390 | * @arg USART_IT_IDLE: Idle line detection interrupt |
AnnaBridge | 171:3a7713b1edbc | 391 | * @arg USART_IT_PE: Parity Error interrupt |
AnnaBridge | 171:3a7713b1edbc | 392 | * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
AnnaBridge | 171:3a7713b1edbc | 393 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 394 | */ |
AnnaBridge | 171:3a7713b1edbc | 395 | #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ |
AnnaBridge | 171:3a7713b1edbc | 396 | ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ |
AnnaBridge | 171:3a7713b1edbc | 397 | ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) |
AnnaBridge | 171:3a7713b1edbc | 398 | |
AnnaBridge | 171:3a7713b1edbc | 399 | |
AnnaBridge | 171:3a7713b1edbc | 400 | /** @brief Checks whether the specified USART interrupt has occurred or not. |
AnnaBridge | 171:3a7713b1edbc | 401 | * @param __HANDLE__ specifies the USART Handle |
AnnaBridge | 171:3a7713b1edbc | 402 | * @param __IT__ specifies the USART interrupt source to check. |
AnnaBridge | 171:3a7713b1edbc | 403 | * This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 404 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
AnnaBridge | 171:3a7713b1edbc | 405 | * @arg USART_IT_TC: Transmission complete interrupt |
AnnaBridge | 171:3a7713b1edbc | 406 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
AnnaBridge | 171:3a7713b1edbc | 407 | * @arg USART_IT_IDLE: Idle line detection interrupt |
AnnaBridge | 171:3a7713b1edbc | 408 | * @arg USART_IT_ORE: OverRun Error interrupt |
AnnaBridge | 171:3a7713b1edbc | 409 | * @arg USART_IT_NE: Noise Error interrupt |
AnnaBridge | 171:3a7713b1edbc | 410 | * @arg USART_IT_FE: Framing Error interrupt |
AnnaBridge | 171:3a7713b1edbc | 411 | * @arg USART_IT_PE: Parity Error interrupt |
AnnaBridge | 171:3a7713b1edbc | 412 | * @retval The new state of __IT__ (TRUE or FALSE). |
AnnaBridge | 171:3a7713b1edbc | 413 | */ |
AnnaBridge | 171:3a7713b1edbc | 414 | #define __HAL_USART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08))) |
AnnaBridge | 171:3a7713b1edbc | 415 | |
AnnaBridge | 171:3a7713b1edbc | 416 | /** @brief Checks whether the specified USART interrupt source is enabled. |
AnnaBridge | 171:3a7713b1edbc | 417 | * @param __HANDLE__ specifies the USART Handle. |
AnnaBridge | 171:3a7713b1edbc | 418 | * @param __IT__ specifies the USART interrupt source to check. |
AnnaBridge | 171:3a7713b1edbc | 419 | * This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 420 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
AnnaBridge | 171:3a7713b1edbc | 421 | * @arg USART_IT_TC: Transmission complete interrupt |
AnnaBridge | 171:3a7713b1edbc | 422 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
AnnaBridge | 171:3a7713b1edbc | 423 | * @arg USART_IT_IDLE: Idle line detection interrupt |
AnnaBridge | 171:3a7713b1edbc | 424 | * @arg USART_IT_ORE: OverRun Error interrupt |
AnnaBridge | 171:3a7713b1edbc | 425 | * @arg USART_IT_NE: Noise Error interrupt |
AnnaBridge | 171:3a7713b1edbc | 426 | * @arg USART_IT_FE: Framing Error interrupt |
AnnaBridge | 171:3a7713b1edbc | 427 | * @arg USART_IT_PE: Parity Error interrupt |
AnnaBridge | 171:3a7713b1edbc | 428 | * @retval The new state of __IT__ (TRUE or FALSE). |
AnnaBridge | 171:3a7713b1edbc | 429 | */ |
AnnaBridge | 171:3a7713b1edbc | 430 | #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5) == 2)? \ |
AnnaBridge | 171:3a7713b1edbc | 431 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << \ |
AnnaBridge | 171:3a7713b1edbc | 432 | (((uint16_t)(__IT__)) & USART_IT_MASK))) |
AnnaBridge | 171:3a7713b1edbc | 433 | |
AnnaBridge | 171:3a7713b1edbc | 434 | |
AnnaBridge | 171:3a7713b1edbc | 435 | /** @brief Clears the specified USART ISR flag, in setting the proper ICR register flag. |
AnnaBridge | 171:3a7713b1edbc | 436 | * @param __HANDLE__ specifies the USART Handle. |
AnnaBridge | 171:3a7713b1edbc | 437 | * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set |
AnnaBridge | 171:3a7713b1edbc | 438 | * to clear the corresponding interrupt |
AnnaBridge | 171:3a7713b1edbc | 439 | * This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 440 | * @arg USART_CLEAR_PEF: Parity Error Clear Flag |
AnnaBridge | 171:3a7713b1edbc | 441 | * @arg USART_CLEAR_FEF: Framing Error Clear Flag |
AnnaBridge | 171:3a7713b1edbc | 442 | * @arg USART_CLEAR_NEF: Noise detected Clear Flag |
AnnaBridge | 171:3a7713b1edbc | 443 | * @arg USART_CLEAR_OREF: OverRun Error Clear Flag |
AnnaBridge | 171:3a7713b1edbc | 444 | * @arg USART_CLEAR_IDLEF: IDLE line detected Clear Flag |
AnnaBridge | 171:3a7713b1edbc | 445 | * @arg USART_CLEAR_TCF: Transmission Complete Clear Flag |
AnnaBridge | 171:3a7713b1edbc | 446 | * @arg USART_CLEAR_CTSF: CTS Interrupt Clear Flag |
AnnaBridge | 171:3a7713b1edbc | 447 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 448 | */ |
AnnaBridge | 171:3a7713b1edbc | 449 | #define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) |
AnnaBridge | 171:3a7713b1edbc | 450 | |
AnnaBridge | 171:3a7713b1edbc | 451 | /** @brief Set a specific USART request flag. |
AnnaBridge | 171:3a7713b1edbc | 452 | * @param __HANDLE__ specifies the USART Handle. |
AnnaBridge | 171:3a7713b1edbc | 453 | * @param __REQ__ specifies the request flag to set |
AnnaBridge | 171:3a7713b1edbc | 454 | * This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 455 | * @arg USART_RXDATA_FLUSH_REQUEST: Receive Data flush Request |
AnnaBridge | 171:3a7713b1edbc | 456 | * @arg USART_TXDATA_FLUSH_REQUEST: Transmit data flush Request |
AnnaBridge | 171:3a7713b1edbc | 457 | * |
AnnaBridge | 171:3a7713b1edbc | 458 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 459 | */ |
AnnaBridge | 171:3a7713b1edbc | 460 | #define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) |
AnnaBridge | 171:3a7713b1edbc | 461 | |
AnnaBridge | 171:3a7713b1edbc | 462 | /** @brief Enable USART |
AnnaBridge | 171:3a7713b1edbc | 463 | * @param __HANDLE__ specifies the USART Handle. |
AnnaBridge | 171:3a7713b1edbc | 464 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 465 | */ |
AnnaBridge | 171:3a7713b1edbc | 466 | #define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
AnnaBridge | 171:3a7713b1edbc | 467 | |
AnnaBridge | 171:3a7713b1edbc | 468 | /** @brief Disable USART |
AnnaBridge | 171:3a7713b1edbc | 469 | * @param __HANDLE__ specifies the USART Handle. |
AnnaBridge | 171:3a7713b1edbc | 470 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 471 | */ |
AnnaBridge | 171:3a7713b1edbc | 472 | #define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
AnnaBridge | 171:3a7713b1edbc | 473 | |
AnnaBridge | 171:3a7713b1edbc | 474 | /** |
AnnaBridge | 171:3a7713b1edbc | 475 | * @} |
AnnaBridge | 171:3a7713b1edbc | 476 | */ |
AnnaBridge | 171:3a7713b1edbc | 477 | /* Include UART HAL Extension module */ |
AnnaBridge | 171:3a7713b1edbc | 478 | #include "stm32f7xx_hal_usart_ex.h" |
AnnaBridge | 171:3a7713b1edbc | 479 | |
AnnaBridge | 171:3a7713b1edbc | 480 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 481 | /** @addtogroup USART_Exported_Functions |
AnnaBridge | 171:3a7713b1edbc | 482 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 483 | */ |
AnnaBridge | 171:3a7713b1edbc | 484 | |
AnnaBridge | 171:3a7713b1edbc | 485 | /** @addtogroup USART_Exported_Functions_Group1 |
AnnaBridge | 171:3a7713b1edbc | 486 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 487 | */ |
AnnaBridge | 171:3a7713b1edbc | 488 | /* Initialization/de-initialization functions **********************************/ |
AnnaBridge | 171:3a7713b1edbc | 489 | HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 490 | HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 491 | void HAL_USART_MspInit(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 492 | void HAL_USART_MspDeInit(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 493 | HAL_StatusTypeDef HAL_USART_CheckIdleState(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 494 | /** |
AnnaBridge | 171:3a7713b1edbc | 495 | * @} |
AnnaBridge | 171:3a7713b1edbc | 496 | */ |
AnnaBridge | 171:3a7713b1edbc | 497 | |
AnnaBridge | 171:3a7713b1edbc | 498 | /** @addtogroup USART_Exported_Functions_Group2 |
AnnaBridge | 171:3a7713b1edbc | 499 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 500 | */ |
AnnaBridge | 171:3a7713b1edbc | 501 | /* IO operation functions *******************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 502 | HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout); |
AnnaBridge | 171:3a7713b1edbc | 503 | HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
AnnaBridge | 171:3a7713b1edbc | 504 | HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
AnnaBridge | 171:3a7713b1edbc | 505 | HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); |
AnnaBridge | 171:3a7713b1edbc | 506 | HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); |
AnnaBridge | 171:3a7713b1edbc | 507 | HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
AnnaBridge | 171:3a7713b1edbc | 508 | HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); |
AnnaBridge | 171:3a7713b1edbc | 509 | HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); |
AnnaBridge | 171:3a7713b1edbc | 510 | HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
AnnaBridge | 171:3a7713b1edbc | 511 | HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 512 | HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 513 | HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 514 | void HAL_USART_IRQHandler(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 515 | void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 516 | void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 517 | void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 518 | void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 519 | void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 520 | void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 521 | |
AnnaBridge | 171:3a7713b1edbc | 522 | /** |
AnnaBridge | 171:3a7713b1edbc | 523 | * @} |
AnnaBridge | 171:3a7713b1edbc | 524 | */ |
AnnaBridge | 171:3a7713b1edbc | 525 | |
AnnaBridge | 171:3a7713b1edbc | 526 | /** @addtogroup USART_Exported_Functions_Group3 |
AnnaBridge | 171:3a7713b1edbc | 527 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 528 | */ |
AnnaBridge | 171:3a7713b1edbc | 529 | /* Peripheral State functions ************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 530 | HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 531 | uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart); |
AnnaBridge | 171:3a7713b1edbc | 532 | |
AnnaBridge | 171:3a7713b1edbc | 533 | /** |
AnnaBridge | 171:3a7713b1edbc | 534 | * @} |
AnnaBridge | 171:3a7713b1edbc | 535 | */ |
AnnaBridge | 171:3a7713b1edbc | 536 | |
AnnaBridge | 171:3a7713b1edbc | 537 | /** |
AnnaBridge | 171:3a7713b1edbc | 538 | * @} |
AnnaBridge | 171:3a7713b1edbc | 539 | */ |
AnnaBridge | 171:3a7713b1edbc | 540 | /* Private types -------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 541 | /* Private variables ---------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 542 | /* Private constants ---------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 543 | /** @defgroup USART_Private_Constants USART Private Constants |
AnnaBridge | 171:3a7713b1edbc | 544 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 545 | */ |
AnnaBridge | 171:3a7713b1edbc | 546 | /** @brief USART interruptions flag mask |
AnnaBridge | 171:3a7713b1edbc | 547 | * |
AnnaBridge | 171:3a7713b1edbc | 548 | */ |
AnnaBridge | 171:3a7713b1edbc | 549 | #define USART_IT_MASK ((uint16_t)0x001FU) |
AnnaBridge | 171:3a7713b1edbc | 550 | |
AnnaBridge | 171:3a7713b1edbc | 551 | /** |
AnnaBridge | 171:3a7713b1edbc | 552 | * @} |
AnnaBridge | 171:3a7713b1edbc | 553 | */ |
AnnaBridge | 171:3a7713b1edbc | 554 | /* Private macros ------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 555 | /** @defgroup USART_Private_Macros USART Private Macros |
AnnaBridge | 171:3a7713b1edbc | 556 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 557 | */ |
AnnaBridge | 171:3a7713b1edbc | 558 | /** @brief Reports the USART clock source. |
AnnaBridge | 171:3a7713b1edbc | 559 | * @param __HANDLE__ specifies the USART Handle |
AnnaBridge | 171:3a7713b1edbc | 560 | * @param __CLOCKSOURCE__ output variable |
AnnaBridge | 171:3a7713b1edbc | 561 | * @retval the USART clocking source, written in __CLOCKSOURCE__. |
AnnaBridge | 171:3a7713b1edbc | 562 | */ |
AnnaBridge | 171:3a7713b1edbc | 563 | #define USART_GETCLOCKSOURCE(__HANDLE__, __CLOCKSOURCE__)\ |
AnnaBridge | 171:3a7713b1edbc | 564 | do { \ |
AnnaBridge | 171:3a7713b1edbc | 565 | if((__HANDLE__)->Instance == USART1) \ |
AnnaBridge | 171:3a7713b1edbc | 566 | { \ |
AnnaBridge | 171:3a7713b1edbc | 567 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
AnnaBridge | 171:3a7713b1edbc | 568 | { \ |
AnnaBridge | 171:3a7713b1edbc | 569 | case RCC_USART1CLKSOURCE_PCLK2: \ |
AnnaBridge | 171:3a7713b1edbc | 570 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ |
AnnaBridge | 171:3a7713b1edbc | 571 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 572 | case RCC_USART1CLKSOURCE_HSI: \ |
AnnaBridge | 171:3a7713b1edbc | 573 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
AnnaBridge | 171:3a7713b1edbc | 574 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 575 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
AnnaBridge | 171:3a7713b1edbc | 576 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
AnnaBridge | 171:3a7713b1edbc | 577 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 578 | case RCC_USART1CLKSOURCE_LSE: \ |
AnnaBridge | 171:3a7713b1edbc | 579 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
AnnaBridge | 171:3a7713b1edbc | 580 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 581 | default: \ |
AnnaBridge | 171:3a7713b1edbc | 582 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 583 | } \ |
AnnaBridge | 171:3a7713b1edbc | 584 | } \ |
AnnaBridge | 171:3a7713b1edbc | 585 | else if((__HANDLE__)->Instance == USART2) \ |
AnnaBridge | 171:3a7713b1edbc | 586 | { \ |
AnnaBridge | 171:3a7713b1edbc | 587 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ |
AnnaBridge | 171:3a7713b1edbc | 588 | { \ |
AnnaBridge | 171:3a7713b1edbc | 589 | case RCC_USART2CLKSOURCE_PCLK1: \ |
AnnaBridge | 171:3a7713b1edbc | 590 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 591 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 592 | case RCC_USART2CLKSOURCE_HSI: \ |
AnnaBridge | 171:3a7713b1edbc | 593 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
AnnaBridge | 171:3a7713b1edbc | 594 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 595 | case RCC_USART2CLKSOURCE_SYSCLK: \ |
AnnaBridge | 171:3a7713b1edbc | 596 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
AnnaBridge | 171:3a7713b1edbc | 597 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 598 | case RCC_USART2CLKSOURCE_LSE: \ |
AnnaBridge | 171:3a7713b1edbc | 599 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
AnnaBridge | 171:3a7713b1edbc | 600 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 601 | default: \ |
AnnaBridge | 171:3a7713b1edbc | 602 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 603 | } \ |
AnnaBridge | 171:3a7713b1edbc | 604 | } \ |
AnnaBridge | 171:3a7713b1edbc | 605 | else if((__HANDLE__)->Instance == USART3) \ |
AnnaBridge | 171:3a7713b1edbc | 606 | { \ |
AnnaBridge | 171:3a7713b1edbc | 607 | switch(__HAL_RCC_GET_USART3_SOURCE()) \ |
AnnaBridge | 171:3a7713b1edbc | 608 | { \ |
AnnaBridge | 171:3a7713b1edbc | 609 | case RCC_USART3CLKSOURCE_PCLK1: \ |
AnnaBridge | 171:3a7713b1edbc | 610 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
AnnaBridge | 171:3a7713b1edbc | 611 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 612 | case RCC_USART3CLKSOURCE_HSI: \ |
AnnaBridge | 171:3a7713b1edbc | 613 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
AnnaBridge | 171:3a7713b1edbc | 614 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 615 | case RCC_USART3CLKSOURCE_SYSCLK: \ |
AnnaBridge | 171:3a7713b1edbc | 616 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
AnnaBridge | 171:3a7713b1edbc | 617 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 618 | case RCC_USART3CLKSOURCE_LSE: \ |
AnnaBridge | 171:3a7713b1edbc | 619 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
AnnaBridge | 171:3a7713b1edbc | 620 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 621 | default: \ |
AnnaBridge | 171:3a7713b1edbc | 622 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 623 | } \ |
AnnaBridge | 171:3a7713b1edbc | 624 | } \ |
AnnaBridge | 171:3a7713b1edbc | 625 | else if((__HANDLE__)->Instance == USART6) \ |
AnnaBridge | 171:3a7713b1edbc | 626 | { \ |
AnnaBridge | 171:3a7713b1edbc | 627 | switch(__HAL_RCC_GET_USART6_SOURCE()) \ |
AnnaBridge | 171:3a7713b1edbc | 628 | { \ |
AnnaBridge | 171:3a7713b1edbc | 629 | case RCC_USART6CLKSOURCE_PCLK2: \ |
AnnaBridge | 171:3a7713b1edbc | 630 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ |
AnnaBridge | 171:3a7713b1edbc | 631 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 632 | case RCC_USART6CLKSOURCE_HSI: \ |
AnnaBridge | 171:3a7713b1edbc | 633 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
AnnaBridge | 171:3a7713b1edbc | 634 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 635 | case RCC_USART6CLKSOURCE_SYSCLK: \ |
AnnaBridge | 171:3a7713b1edbc | 636 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
AnnaBridge | 171:3a7713b1edbc | 637 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 638 | case RCC_USART6CLKSOURCE_LSE: \ |
AnnaBridge | 171:3a7713b1edbc | 639 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
AnnaBridge | 171:3a7713b1edbc | 640 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 641 | default: \ |
AnnaBridge | 171:3a7713b1edbc | 642 | break; \ |
AnnaBridge | 171:3a7713b1edbc | 643 | } \ |
AnnaBridge | 171:3a7713b1edbc | 644 | } \ |
AnnaBridge | 171:3a7713b1edbc | 645 | } while(0) |
AnnaBridge | 171:3a7713b1edbc | 646 | |
AnnaBridge | 171:3a7713b1edbc | 647 | |
AnnaBridge | 171:3a7713b1edbc | 648 | #define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_1) || \ |
AnnaBridge | 171:3a7713b1edbc | 649 | ((__STOPBITS__) == USART_STOPBITS_1_5) || \ |
AnnaBridge | 171:3a7713b1edbc | 650 | ((__STOPBITS__) == USART_STOPBITS_2)) |
AnnaBridge | 171:3a7713b1edbc | 651 | #define IS_USART_PARITY(__PARITY__) (((__PARITY__) == USART_PARITY_NONE) || \ |
AnnaBridge | 171:3a7713b1edbc | 652 | ((__PARITY__) == USART_PARITY_EVEN) || \ |
AnnaBridge | 171:3a7713b1edbc | 653 | ((__PARITY__) == USART_PARITY_ODD)) |
AnnaBridge | 171:3a7713b1edbc | 654 | #define IS_USART_MODE(__MODE__) ((((__MODE__) & (uint32_t)0xFFFFFFF3U) == 0x00U) && ((__MODE__) != (uint32_t)0x00U)) |
AnnaBridge | 171:3a7713b1edbc | 655 | #define IS_USART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == USART_OVERSAMPLING_16) || \ |
AnnaBridge | 171:3a7713b1edbc | 656 | ((__SAMPLING__) == USART_OVERSAMPLING_8)) |
AnnaBridge | 171:3a7713b1edbc | 657 | #define IS_USART_CLOCK(__CLOCK__) (((__CLOCK__)== USART_CLOCK_DISABLE) || \ |
AnnaBridge | 171:3a7713b1edbc | 658 | ((__CLOCK__)== USART_CLOCK_ENABLE)) |
AnnaBridge | 171:3a7713b1edbc | 659 | #define IS_USART_POLARITY(__CPOL__) (((__CPOL__) == USART_POLARITY_LOW) || ((__CPOL__) == USART_POLARITY_HIGH)) |
AnnaBridge | 171:3a7713b1edbc | 660 | #define IS_USART_PHASE(__CPHA__) (((__CPHA__) == USART_PHASE_1EDGE) || ((__CPHA__) == USART_PHASE_2EDGE)) |
AnnaBridge | 171:3a7713b1edbc | 661 | #define IS_USART_LASTBIT(__LASTBIT__) (((__LASTBIT__) == USART_LASTBIT_DISABLE) || \ |
AnnaBridge | 171:3a7713b1edbc | 662 | ((__LASTBIT__) == USART_LASTBIT_ENABLE)) |
AnnaBridge | 171:3a7713b1edbc | 663 | #define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \ |
AnnaBridge | 171:3a7713b1edbc | 664 | ((__PARAM__) == USART_TXDATA_FLUSH_REQUEST)) |
AnnaBridge | 171:3a7713b1edbc | 665 | #define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 9000001) |
AnnaBridge | 171:3a7713b1edbc | 666 | |
AnnaBridge | 171:3a7713b1edbc | 667 | /** |
AnnaBridge | 171:3a7713b1edbc | 668 | * @} |
AnnaBridge | 171:3a7713b1edbc | 669 | */ |
AnnaBridge | 171:3a7713b1edbc | 670 | |
AnnaBridge | 171:3a7713b1edbc | 671 | /* Private functions ---------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 672 | /** @defgroup USART_Private_Functions USART Private Functions |
AnnaBridge | 171:3a7713b1edbc | 673 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 674 | */ |
AnnaBridge | 171:3a7713b1edbc | 675 | |
AnnaBridge | 171:3a7713b1edbc | 676 | /** |
AnnaBridge | 171:3a7713b1edbc | 677 | * @} |
AnnaBridge | 171:3a7713b1edbc | 678 | */ |
AnnaBridge | 171:3a7713b1edbc | 679 | |
AnnaBridge | 171:3a7713b1edbc | 680 | /** |
AnnaBridge | 171:3a7713b1edbc | 681 | * @} |
AnnaBridge | 171:3a7713b1edbc | 682 | */ |
AnnaBridge | 171:3a7713b1edbc | 683 | |
AnnaBridge | 171:3a7713b1edbc | 684 | /** |
AnnaBridge | 171:3a7713b1edbc | 685 | * @} |
AnnaBridge | 171:3a7713b1edbc | 686 | */ |
AnnaBridge | 171:3a7713b1edbc | 687 | |
AnnaBridge | 171:3a7713b1edbc | 688 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 689 | } |
AnnaBridge | 171:3a7713b1edbc | 690 | #endif |
AnnaBridge | 171:3a7713b1edbc | 691 | |
AnnaBridge | 171:3a7713b1edbc | 692 | #endif /* __STM32F7xx_HAL_USART_H */ |
AnnaBridge | 171:3a7713b1edbc | 693 | |
AnnaBridge | 171:3a7713b1edbc | 694 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |