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CMSIS DSP library

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cmsis_dsp/MatrixFunctions/arm_mat_trans_q15.c@5:3762170b6d4d, 2015-11-20 (annotated)

Committer:
mbed_official
Date:
Fri Nov 20 08:45:18 2015 +0000
Revision:
5:3762170b6d4d
Parent:
3:7a284390b0ce 
Synchronized with git revision 2eb940b9a73af188d3004a2575fdfbb05febe62b



Full URL: https://github.com/mbedmicro/mbed/commit/2eb940b9a73af188d3004a2575fdfbb05febe62b/



Added option to build rpc library. closes #1426

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 5:3762170b6d4d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 5:3762170b6d4d 4 * $Date: 19. March 2015
mbed_official 5:3762170b6d4d 5 * $Revision: V.1.4.5
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_mat_trans_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q15 matrix transpose.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupMatrix
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup MatrixTrans
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52 /*
emilmont 1:fdd22bb7aa52 53 * @brief Q15 matrix transpose.
emilmont 1:fdd22bb7aa52 54 * @param[in] *pSrc points to the input matrix
emilmont 1:fdd22bb7aa52 55 * @param[out] *pDst points to the output matrix
emilmont 2:da51fb522205 56 * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
emilmont 1:fdd22bb7aa52 57 * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emilmont 1:fdd22bb7aa52 58 */
emilmont 1:fdd22bb7aa52 59
emilmont 1:fdd22bb7aa52 60 arm_status arm_mat_trans_q15(
emilmont 1:fdd22bb7aa52 61 const arm_matrix_instance_q15 * pSrc,
emilmont 1:fdd22bb7aa52 62 arm_matrix_instance_q15 * pDst)
emilmont 1:fdd22bb7aa52 63 {
emilmont 1:fdd22bb7aa52 64 q15_t *pSrcA = pSrc->pData; /* input data matrix pointer */
emilmont 1:fdd22bb7aa52 65 q15_t *pOut = pDst->pData; /* output data matrix pointer */
emilmont 1:fdd22bb7aa52 66 uint16_t nRows = pSrc->numRows; /* number of nRows */
emilmont 1:fdd22bb7aa52 67 uint16_t nColumns = pSrc->numCols; /* number of nColumns */
emilmont 1:fdd22bb7aa52 68 uint16_t col, row = nRows, i = 0u; /* row and column loop counters */
emilmont 1:fdd22bb7aa52 69 arm_status status; /* status of matrix transpose */
emilmont 1:fdd22bb7aa52 70
mbed_official 3:7a284390b0ce 71 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 72
emilmont 1:fdd22bb7aa52 73 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 74 #ifndef UNALIGNED_SUPPORT_DISABLE
emilmont 1:fdd22bb7aa52 75
emilmont 1:fdd22bb7aa52 76 q31_t in; /* variable to hold temporary output */
emilmont 1:fdd22bb7aa52 77
emilmont 1:fdd22bb7aa52 78 #else
emilmont 1:fdd22bb7aa52 79
emilmont 1:fdd22bb7aa52 80 q15_t in;
emilmont 1:fdd22bb7aa52 81
emilmont 2:da51fb522205 82 #endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
emilmont 1:fdd22bb7aa52 83
emilmont 1:fdd22bb7aa52 84 #ifdef ARM_MATH_MATRIX_CHECK
emilmont 1:fdd22bb7aa52 85
emilmont 1:fdd22bb7aa52 86
emilmont 1:fdd22bb7aa52 87 /* Check for matrix mismatch condition */
emilmont 1:fdd22bb7aa52 88 if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
emilmont 1:fdd22bb7aa52 89 {
emilmont 1:fdd22bb7aa52 90 /* Set status as ARM_MATH_SIZE_MISMATCH */
emilmont 1:fdd22bb7aa52 91 status = ARM_MATH_SIZE_MISMATCH;
emilmont 1:fdd22bb7aa52 92 }
emilmont 1:fdd22bb7aa52 93 else
emilmont 1:fdd22bb7aa52 94 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emilmont 1:fdd22bb7aa52 95
emilmont 1:fdd22bb7aa52 96 {
emilmont 1:fdd22bb7aa52 97 /* Matrix transpose by exchanging the rows with columns */
emilmont 1:fdd22bb7aa52 98 /* row loop */
emilmont 1:fdd22bb7aa52 99 do
emilmont 1:fdd22bb7aa52 100 {
emilmont 1:fdd22bb7aa52 101
emilmont 1:fdd22bb7aa52 102 /* Apply loop unrolling and exchange the columns with row elements */
emilmont 1:fdd22bb7aa52 103 col = nColumns >> 2u;
emilmont 1:fdd22bb7aa52 104
emilmont 1:fdd22bb7aa52 105 /* The pointer pOut is set to starting address of the column being processed */
emilmont 1:fdd22bb7aa52 106 pOut = pDst->pData + i;
emilmont 1:fdd22bb7aa52 107
emilmont 1:fdd22bb7aa52 108 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 109 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 110 while(col > 0u)
emilmont 1:fdd22bb7aa52 111 {
emilmont 1:fdd22bb7aa52 112 #ifndef UNALIGNED_SUPPORT_DISABLE
emilmont 1:fdd22bb7aa52 113
emilmont 1:fdd22bb7aa52 114 /* Read two elements from the row */
emilmont 1:fdd22bb7aa52 115 in = *__SIMD32(pSrcA)++;
emilmont 1:fdd22bb7aa52 116
emilmont 1:fdd22bb7aa52 117 /* Unpack and store one element in the destination */
emilmont 1:fdd22bb7aa52 118 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 119
emilmont 1:fdd22bb7aa52 120 *pOut = (q15_t) in;
emilmont 1:fdd22bb7aa52 121
emilmont 1:fdd22bb7aa52 122 #else
emilmont 1:fdd22bb7aa52 123
emilmont 1:fdd22bb7aa52 124 *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
emilmont 1:fdd22bb7aa52 125
emilmont 1:fdd22bb7aa52 126 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 127
emilmont 1:fdd22bb7aa52 128 /* Update the pointer pOut to point to the next row of the transposed matrix */
emilmont 1:fdd22bb7aa52 129 pOut += nRows;
emilmont 1:fdd22bb7aa52 130
emilmont 1:fdd22bb7aa52 131 /* Unpack and store the second element in the destination */
emilmont 1:fdd22bb7aa52 132
emilmont 1:fdd22bb7aa52 133 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 134
emilmont 1:fdd22bb7aa52 135 *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
emilmont 1:fdd22bb7aa52 136
emilmont 1:fdd22bb7aa52 137 #else
emilmont 1:fdd22bb7aa52 138
emilmont 1:fdd22bb7aa52 139 *pOut = (q15_t) in;
emilmont 1:fdd22bb7aa52 140
emilmont 1:fdd22bb7aa52 141 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 142
emilmont 1:fdd22bb7aa52 143 /* Update the pointer pOut to point to the next row of the transposed matrix */
emilmont 1:fdd22bb7aa52 144 pOut += nRows;
emilmont 1:fdd22bb7aa52 145
emilmont 1:fdd22bb7aa52 146 /* Read two elements from the row */
emilmont 1:fdd22bb7aa52 147 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 148
emilmont 1:fdd22bb7aa52 149 in = *__SIMD32(pSrcA)++;
emilmont 1:fdd22bb7aa52 150
emilmont 1:fdd22bb7aa52 151 #else
emilmont 1:fdd22bb7aa52 152
emilmont 1:fdd22bb7aa52 153 in = *__SIMD32(pSrcA)++;
emilmont 1:fdd22bb7aa52 154
emilmont 1:fdd22bb7aa52 155 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 156
emilmont 1:fdd22bb7aa52 157 /* Unpack and store one element in the destination */
emilmont 1:fdd22bb7aa52 158 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 159
emilmont 1:fdd22bb7aa52 160 *pOut = (q15_t) in;
emilmont 1:fdd22bb7aa52 161
emilmont 1:fdd22bb7aa52 162 #else
emilmont 1:fdd22bb7aa52 163
emilmont 1:fdd22bb7aa52 164 *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
emilmont 1:fdd22bb7aa52 165
emilmont 1:fdd22bb7aa52 166 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 167
emilmont 1:fdd22bb7aa52 168 /* Update the pointer pOut to point to the next row of the transposed matrix */
emilmont 1:fdd22bb7aa52 169 pOut += nRows;
emilmont 1:fdd22bb7aa52 170
emilmont 1:fdd22bb7aa52 171 /* Unpack and store the second element in the destination */
emilmont 1:fdd22bb7aa52 172 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 173
emilmont 1:fdd22bb7aa52 174 *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
emilmont 1:fdd22bb7aa52 175
emilmont 1:fdd22bb7aa52 176 #else
emilmont 1:fdd22bb7aa52 177
emilmont 1:fdd22bb7aa52 178 *pOut = (q15_t) in;
emilmont 1:fdd22bb7aa52 179
emilmont 1:fdd22bb7aa52 180 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 181
emilmont 2:da51fb522205 182 #else
emilmont 1:fdd22bb7aa52 183 /* Read one element from the row */
emilmont 1:fdd22bb7aa52 184 in = *pSrcA++;
emilmont 1:fdd22bb7aa52 185
emilmont 1:fdd22bb7aa52 186 /* Store one element in the destination */
emilmont 1:fdd22bb7aa52 187 *pOut = in;
emilmont 1:fdd22bb7aa52 188
emilmont 1:fdd22bb7aa52 189 /* Update the pointer px to point to the next row of the transposed matrix */
emilmont 1:fdd22bb7aa52 190 pOut += nRows;
emilmont 1:fdd22bb7aa52 191
emilmont 1:fdd22bb7aa52 192 /* Read one element from the row */
emilmont 1:fdd22bb7aa52 193 in = *pSrcA++;
emilmont 1:fdd22bb7aa52 194
emilmont 1:fdd22bb7aa52 195 /* Store one element in the destination */
emilmont 1:fdd22bb7aa52 196 *pOut = in;
emilmont 1:fdd22bb7aa52 197
emilmont 1:fdd22bb7aa52 198 /* Update the pointer px to point to the next row of the transposed matrix */
emilmont 1:fdd22bb7aa52 199 pOut += nRows;
emilmont 1:fdd22bb7aa52 200
emilmont 1:fdd22bb7aa52 201 /* Read one element from the row */
emilmont 1:fdd22bb7aa52 202 in = *pSrcA++;
emilmont 1:fdd22bb7aa52 203
emilmont 1:fdd22bb7aa52 204 /* Store one element in the destination */
emilmont 1:fdd22bb7aa52 205 *pOut = in;
emilmont 1:fdd22bb7aa52 206
emilmont 1:fdd22bb7aa52 207 /* Update the pointer px to point to the next row of the transposed matrix */
emilmont 1:fdd22bb7aa52 208 pOut += nRows;
emilmont 1:fdd22bb7aa52 209
emilmont 1:fdd22bb7aa52 210 /* Read one element from the row */
emilmont 1:fdd22bb7aa52 211 in = *pSrcA++;
emilmont 1:fdd22bb7aa52 212
emilmont 1:fdd22bb7aa52 213 /* Store one element in the destination */
emilmont 1:fdd22bb7aa52 214 *pOut = in;
emilmont 1:fdd22bb7aa52 215
emilmont 2:da51fb522205 216 #endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
emilmont 1:fdd22bb7aa52 217
emilmont 1:fdd22bb7aa52 218 /* Update the pointer pOut to point to the next row of the transposed matrix */
emilmont 1:fdd22bb7aa52 219 pOut += nRows;
emilmont 1:fdd22bb7aa52 220
emilmont 1:fdd22bb7aa52 221 /* Decrement the column loop counter */
emilmont 1:fdd22bb7aa52 222 col--;
emilmont 1:fdd22bb7aa52 223 }
emilmont 1:fdd22bb7aa52 224
emilmont 1:fdd22bb7aa52 225 /* Perform matrix transpose for last 3 samples here. */
emilmont 1:fdd22bb7aa52 226 col = nColumns % 0x4u;
emilmont 1:fdd22bb7aa52 227
emilmont 1:fdd22bb7aa52 228 #else
emilmont 1:fdd22bb7aa52 229
emilmont 1:fdd22bb7aa52 230 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 231
emilmont 1:fdd22bb7aa52 232 #ifdef ARM_MATH_MATRIX_CHECK
emilmont 1:fdd22bb7aa52 233
emilmont 1:fdd22bb7aa52 234 /* Check for matrix mismatch condition */
emilmont 1:fdd22bb7aa52 235 if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
emilmont 1:fdd22bb7aa52 236 {
emilmont 1:fdd22bb7aa52 237 /* Set status as ARM_MATH_SIZE_MISMATCH */
emilmont 1:fdd22bb7aa52 238 status = ARM_MATH_SIZE_MISMATCH;
emilmont 1:fdd22bb7aa52 239 }
emilmont 1:fdd22bb7aa52 240 else
emilmont 1:fdd22bb7aa52 241 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emilmont 1:fdd22bb7aa52 242
emilmont 1:fdd22bb7aa52 243 {
emilmont 1:fdd22bb7aa52 244 /* Matrix transpose by exchanging the rows with columns */
emilmont 1:fdd22bb7aa52 245 /* row loop */
emilmont 1:fdd22bb7aa52 246 do
emilmont 1:fdd22bb7aa52 247 {
emilmont 1:fdd22bb7aa52 248 /* The pointer pOut is set to starting address of the column being processed */
emilmont 1:fdd22bb7aa52 249 pOut = pDst->pData + i;
emilmont 1:fdd22bb7aa52 250
emilmont 1:fdd22bb7aa52 251 /* Initialize column loop counter */
emilmont 1:fdd22bb7aa52 252 col = nColumns;
emilmont 1:fdd22bb7aa52 253
mbed_official 3:7a284390b0ce 254 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 255
emilmont 1:fdd22bb7aa52 256 while(col > 0u)
emilmont 1:fdd22bb7aa52 257 {
emilmont 1:fdd22bb7aa52 258 /* Read and store the input element in the destination */
emilmont 1:fdd22bb7aa52 259 *pOut = *pSrcA++;
emilmont 1:fdd22bb7aa52 260
emilmont 1:fdd22bb7aa52 261 /* Update the pointer pOut to point to the next row of the transposed matrix */
emilmont 1:fdd22bb7aa52 262 pOut += nRows;
emilmont 1:fdd22bb7aa52 263
emilmont 1:fdd22bb7aa52 264 /* Decrement the column loop counter */
emilmont 1:fdd22bb7aa52 265 col--;
emilmont 1:fdd22bb7aa52 266 }
emilmont 1:fdd22bb7aa52 267
emilmont 1:fdd22bb7aa52 268 i++;
emilmont 1:fdd22bb7aa52 269
emilmont 1:fdd22bb7aa52 270 /* Decrement the row loop counter */
emilmont 1:fdd22bb7aa52 271 row--;
emilmont 1:fdd22bb7aa52 272
emilmont 1:fdd22bb7aa52 273 } while(row > 0u);
emilmont 1:fdd22bb7aa52 274
emilmont 1:fdd22bb7aa52 275 /* set status as ARM_MATH_SUCCESS */
emilmont 1:fdd22bb7aa52 276 status = ARM_MATH_SUCCESS;
emilmont 1:fdd22bb7aa52 277 }
emilmont 1:fdd22bb7aa52 278 /* Return to application */
emilmont 1:fdd22bb7aa52 279 return (status);
emilmont 1:fdd22bb7aa52 280 }
emilmont 1:fdd22bb7aa52 281
emilmont 1:fdd22bb7aa52 282 /**
emilmont 1:fdd22bb7aa52 283 * @} end of MatrixTrans group
emilmont 1:fdd22bb7aa52 284 */