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CMSIS DSP library

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cmsis_dsp/FilteringFunctions/arm_iir_lattice_q31.c@5:3762170b6d4d, 2015-11-20 (annotated)

Committer:
mbed_official
Date:
Fri Nov 20 08:45:18 2015 +0000
Revision:
5:3762170b6d4d
Parent:
3:7a284390b0ce 
Synchronized with git revision 2eb940b9a73af188d3004a2575fdfbb05febe62b



Full URL: https://github.com/mbedmicro/mbed/commit/2eb940b9a73af188d3004a2575fdfbb05febe62b/



Added option to build rpc library. closes #1426

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 5:3762170b6d4d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 5:3762170b6d4d 4 * $Date: 19. March 2015
mbed_official 5:3762170b6d4d 5 * $Revision: V.1.4.5
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_iir_lattice_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q31 IIR lattice filter processing function.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupFilters
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup IIR_Lattice
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52 /**
emilmont 1:fdd22bb7aa52 53 * @brief Processing function for the Q31 IIR lattice filter.
emilmont 1:fdd22bb7aa52 54 * @param[in] *S points to an instance of the Q31 IIR lattice structure.
emilmont 1:fdd22bb7aa52 55 * @param[in] *pSrc points to the block of input data.
emilmont 1:fdd22bb7aa52 56 * @param[out] *pDst points to the block of output data.
emilmont 1:fdd22bb7aa52 57 * @param[in] blockSize number of samples to process.
emilmont 1:fdd22bb7aa52 58 * @return none.
emilmont 1:fdd22bb7aa52 59 *
emilmont 1:fdd22bb7aa52 60 * @details
emilmont 1:fdd22bb7aa52 61 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 62 * \par
emilmont 1:fdd22bb7aa52 63 * The function is implemented using an internal 64-bit accumulator.
emilmont 1:fdd22bb7aa52 64 * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
emilmont 1:fdd22bb7aa52 65 * Thus, if the accumulator result overflows it wraps around rather than clip.
emilmont 1:fdd22bb7aa52 66 * In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits.
emilmont 1:fdd22bb7aa52 67 * After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.
emilmont 1:fdd22bb7aa52 68 */
emilmont 1:fdd22bb7aa52 69
emilmont 1:fdd22bb7aa52 70 void arm_iir_lattice_q31(
emilmont 1:fdd22bb7aa52 71 const arm_iir_lattice_instance_q31 * S,
emilmont 1:fdd22bb7aa52 72 q31_t * pSrc,
emilmont 1:fdd22bb7aa52 73 q31_t * pDst,
emilmont 1:fdd22bb7aa52 74 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 75 {
emilmont 1:fdd22bb7aa52 76 q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages */
emilmont 1:fdd22bb7aa52 77 q63_t acc; /* Accumlator */
emilmont 1:fdd22bb7aa52 78 uint32_t blkCnt, tapCnt; /* Temporary variables for counts */
emilmont 1:fdd22bb7aa52 79 q31_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */
emilmont 1:fdd22bb7aa52 80 uint32_t numStages = S->numStages; /* number of stages */
emilmont 1:fdd22bb7aa52 81 q31_t *pState; /* State pointer */
emilmont 1:fdd22bb7aa52 82 q31_t *pStateCurnt; /* State current pointer */
emilmont 1:fdd22bb7aa52 83
emilmont 1:fdd22bb7aa52 84 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 85
emilmont 1:fdd22bb7aa52 86 pState = &S->pState[0];
emilmont 1:fdd22bb7aa52 87
emilmont 1:fdd22bb7aa52 88
mbed_official 3:7a284390b0ce 89 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 90
emilmont 1:fdd22bb7aa52 91 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 92
emilmont 1:fdd22bb7aa52 93 /* Sample processing */
emilmont 1:fdd22bb7aa52 94 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 95 {
emilmont 1:fdd22bb7aa52 96 /* Read Sample from input buffer */
emilmont 1:fdd22bb7aa52 97 /* fN(n) = x(n) */
emilmont 1:fdd22bb7aa52 98 fcurr = *pSrc++;
emilmont 1:fdd22bb7aa52 99
emilmont 1:fdd22bb7aa52 100 /* Initialize state read pointer */
emilmont 1:fdd22bb7aa52 101 px1 = pState;
emilmont 1:fdd22bb7aa52 102 /* Initialize state write pointer */
emilmont 1:fdd22bb7aa52 103 px2 = pState;
emilmont 1:fdd22bb7aa52 104 /* Set accumulator to zero */
emilmont 1:fdd22bb7aa52 105 acc = 0;
emilmont 1:fdd22bb7aa52 106 /* Initialize Ladder coeff pointer */
emilmont 1:fdd22bb7aa52 107 pv = &S->pvCoeffs[0];
emilmont 1:fdd22bb7aa52 108 /* Initialize Reflection coeff pointer */
emilmont 1:fdd22bb7aa52 109 pk = &S->pkCoeffs[0];
emilmont 1:fdd22bb7aa52 110
emilmont 1:fdd22bb7aa52 111
emilmont 1:fdd22bb7aa52 112 /* Process sample for first tap */
emilmont 1:fdd22bb7aa52 113 gcurr = *px1++;
emilmont 1:fdd22bb7aa52 114 /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
emilmont 1:fdd22bb7aa52 115 fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
emilmont 1:fdd22bb7aa52 116 /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
emilmont 1:fdd22bb7aa52 117 gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
emilmont 1:fdd22bb7aa52 118 /* write gN-1(n-1) into state for next sample processing */
emilmont 1:fdd22bb7aa52 119 *px2++ = gnext;
emilmont 1:fdd22bb7aa52 120 /* y(n) += gN(n) * vN */
emilmont 1:fdd22bb7aa52 121 acc += ((q63_t) gnext * *pv++);
emilmont 1:fdd22bb7aa52 122
emilmont 1:fdd22bb7aa52 123 /* Update f values for next coefficient processing */
emilmont 1:fdd22bb7aa52 124 fcurr = fnext;
emilmont 1:fdd22bb7aa52 125
emilmont 1:fdd22bb7aa52 126 /* Loop unrolling. Process 4 taps at a time. */
emilmont 1:fdd22bb7aa52 127 tapCnt = (numStages - 1u) >> 2;
emilmont 1:fdd22bb7aa52 128
emilmont 1:fdd22bb7aa52 129 while(tapCnt > 0u)
emilmont 1:fdd22bb7aa52 130 {
emilmont 1:fdd22bb7aa52 131
emilmont 1:fdd22bb7aa52 132 /* Process sample for 2nd, 6th .. taps */
emilmont 1:fdd22bb7aa52 133 /* Read gN-2(n-1) from state buffer */
emilmont 1:fdd22bb7aa52 134 gcurr = *px1++;
emilmont 1:fdd22bb7aa52 135 /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
emilmont 1:fdd22bb7aa52 136 fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
emilmont 1:fdd22bb7aa52 137 /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
emilmont 1:fdd22bb7aa52 138 gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
emilmont 1:fdd22bb7aa52 139 /* y(n) += gN-1(n) * vN-1 */
emilmont 1:fdd22bb7aa52 140 /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
emilmont 1:fdd22bb7aa52 141 acc += ((q63_t) gnext * *pv++);
emilmont 1:fdd22bb7aa52 142 /* write gN-1(n) into state for next sample processing */
emilmont 1:fdd22bb7aa52 143 *px2++ = gnext;
emilmont 1:fdd22bb7aa52 144
emilmont 1:fdd22bb7aa52 145 /* Process sample for 3nd, 7th ...taps */
emilmont 1:fdd22bb7aa52 146 /* Read gN-3(n-1) from state buffer */
emilmont 1:fdd22bb7aa52 147 gcurr = *px1++;
emilmont 1:fdd22bb7aa52 148 /* Process sample for 3rd, 7th .. taps */
emilmont 1:fdd22bb7aa52 149 /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
emilmont 1:fdd22bb7aa52 150 fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
emilmont 1:fdd22bb7aa52 151 /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
emilmont 1:fdd22bb7aa52 152 gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
emilmont 1:fdd22bb7aa52 153 /* y(n) += gN-2(n) * vN-2 */
emilmont 1:fdd22bb7aa52 154 /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
emilmont 1:fdd22bb7aa52 155 acc += ((q63_t) gnext * *pv++);
emilmont 1:fdd22bb7aa52 156 /* write gN-2(n) into state for next sample processing */
emilmont 1:fdd22bb7aa52 157 *px2++ = gnext;
emilmont 1:fdd22bb7aa52 158
emilmont 1:fdd22bb7aa52 159
emilmont 1:fdd22bb7aa52 160 /* Process sample for 4th, 8th ...taps */
emilmont 1:fdd22bb7aa52 161 /* Read gN-4(n-1) from state buffer */
emilmont 1:fdd22bb7aa52 162 gcurr = *px1++;
emilmont 1:fdd22bb7aa52 163 /* Process sample for 4th, 8th .. taps */
emilmont 1:fdd22bb7aa52 164 /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
emilmont 1:fdd22bb7aa52 165 fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
emilmont 1:fdd22bb7aa52 166 /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
emilmont 1:fdd22bb7aa52 167 gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
emilmont 1:fdd22bb7aa52 168 /* y(n) += gN-3(n) * vN-3 */
emilmont 1:fdd22bb7aa52 169 /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
emilmont 1:fdd22bb7aa52 170 acc += ((q63_t) gnext * *pv++);
emilmont 1:fdd22bb7aa52 171 /* write gN-3(n) into state for next sample processing */
emilmont 1:fdd22bb7aa52 172 *px2++ = gnext;
emilmont 1:fdd22bb7aa52 173
emilmont 1:fdd22bb7aa52 174
emilmont 1:fdd22bb7aa52 175 /* Process sample for 5th, 9th ...taps */
emilmont 1:fdd22bb7aa52 176 /* Read gN-5(n-1) from state buffer */
emilmont 1:fdd22bb7aa52 177 gcurr = *px1++;
emilmont 1:fdd22bb7aa52 178 /* Process sample for 5th, 9th .. taps */
emilmont 1:fdd22bb7aa52 179 /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
emilmont 1:fdd22bb7aa52 180 fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
emilmont 1:fdd22bb7aa52 181 /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
emilmont 1:fdd22bb7aa52 182 gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
emilmont 1:fdd22bb7aa52 183 /* y(n) += gN-4(n) * vN-4 */
emilmont 1:fdd22bb7aa52 184 /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
emilmont 1:fdd22bb7aa52 185 acc += ((q63_t) gnext * *pv++);
emilmont 1:fdd22bb7aa52 186 /* write gN-4(n) into state for next sample processing */
emilmont 1:fdd22bb7aa52 187 *px2++ = gnext;
emilmont 1:fdd22bb7aa52 188
emilmont 1:fdd22bb7aa52 189 tapCnt--;
emilmont 1:fdd22bb7aa52 190
emilmont 1:fdd22bb7aa52 191 }
emilmont 1:fdd22bb7aa52 192
emilmont 1:fdd22bb7aa52 193 fnext = fcurr;
emilmont 1:fdd22bb7aa52 194
emilmont 1:fdd22bb7aa52 195 /* If the filter length is not a multiple of 4, compute the remaining filter taps */
emilmont 1:fdd22bb7aa52 196 tapCnt = (numStages - 1u) % 0x4u;
emilmont 1:fdd22bb7aa52 197
emilmont 1:fdd22bb7aa52 198 while(tapCnt > 0u)
emilmont 1:fdd22bb7aa52 199 {
emilmont 1:fdd22bb7aa52 200 gcurr = *px1++;
emilmont 1:fdd22bb7aa52 201 /* Process sample for last taps */
emilmont 1:fdd22bb7aa52 202 fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
emilmont 1:fdd22bb7aa52 203 gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
emilmont 1:fdd22bb7aa52 204 /* Output samples for last taps */
emilmont 1:fdd22bb7aa52 205 acc += ((q63_t) gnext * *pv++);
emilmont 1:fdd22bb7aa52 206 *px2++ = gnext;
emilmont 1:fdd22bb7aa52 207 fcurr = fnext;
emilmont 1:fdd22bb7aa52 208
emilmont 1:fdd22bb7aa52 209 tapCnt--;
emilmont 1:fdd22bb7aa52 210
emilmont 1:fdd22bb7aa52 211 }
emilmont 1:fdd22bb7aa52 212
emilmont 1:fdd22bb7aa52 213 /* y(n) += g0(n) * v0 */
emilmont 1:fdd22bb7aa52 214 acc += (q63_t) fnext *(
emilmont 1:fdd22bb7aa52 215 *pv++);
emilmont 1:fdd22bb7aa52 216
emilmont 1:fdd22bb7aa52 217 *px2++ = fnext;
emilmont 1:fdd22bb7aa52 218
emilmont 1:fdd22bb7aa52 219 /* write out into pDst */
emilmont 1:fdd22bb7aa52 220 *pDst++ = (q31_t) (acc >> 31u);
emilmont 1:fdd22bb7aa52 221
emilmont 1:fdd22bb7aa52 222 /* Advance the state pointer by 4 to process the next group of 4 samples */
emilmont 1:fdd22bb7aa52 223 pState = pState + 1u;
emilmont 1:fdd22bb7aa52 224 blkCnt--;
emilmont 1:fdd22bb7aa52 225
emilmont 1:fdd22bb7aa52 226 }
emilmont 1:fdd22bb7aa52 227
emilmont 1:fdd22bb7aa52 228 /* Processing is complete. Now copy last S->numStages samples to start of the buffer
emilmont 1:fdd22bb7aa52 229 for the preperation of next frame process */
emilmont 1:fdd22bb7aa52 230
emilmont 1:fdd22bb7aa52 231 /* Points to the start of the state buffer */
emilmont 1:fdd22bb7aa52 232 pStateCurnt = &S->pState[0];
emilmont 1:fdd22bb7aa52 233 pState = &S->pState[blockSize];
emilmont 1:fdd22bb7aa52 234
emilmont 1:fdd22bb7aa52 235 tapCnt = numStages >> 2u;
emilmont 1:fdd22bb7aa52 236
emilmont 1:fdd22bb7aa52 237 /* copy data */
emilmont 1:fdd22bb7aa52 238 while(tapCnt > 0u)
emilmont 1:fdd22bb7aa52 239 {
emilmont 1:fdd22bb7aa52 240 *pStateCurnt++ = *pState++;
emilmont 1:fdd22bb7aa52 241 *pStateCurnt++ = *pState++;
emilmont 1:fdd22bb7aa52 242 *pStateCurnt++ = *pState++;
emilmont 1:fdd22bb7aa52 243 *pStateCurnt++ = *pState++;
emilmont 1:fdd22bb7aa52 244
emilmont 1:fdd22bb7aa52 245 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 246 tapCnt--;
emilmont 1:fdd22bb7aa52 247
emilmont 1:fdd22bb7aa52 248 }
emilmont 1:fdd22bb7aa52 249
emilmont 1:fdd22bb7aa52 250 /* Calculate remaining number of copies */
emilmont 1:fdd22bb7aa52 251 tapCnt = (numStages) % 0x4u;
emilmont 1:fdd22bb7aa52 252
emilmont 1:fdd22bb7aa52 253 /* Copy the remaining q31_t data */
emilmont 1:fdd22bb7aa52 254 while(tapCnt > 0u)
emilmont 1:fdd22bb7aa52 255 {
emilmont 1:fdd22bb7aa52 256 *pStateCurnt++ = *pState++;
emilmont 1:fdd22bb7aa52 257
emilmont 1:fdd22bb7aa52 258 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 259 tapCnt--;
emilmont 1:fdd22bb7aa52 260 };
emilmont 1:fdd22bb7aa52 261
emilmont 1:fdd22bb7aa52 262 #else
emilmont 1:fdd22bb7aa52 263
emilmont 1:fdd22bb7aa52 264 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 265 /* Sample processing */
emilmont 1:fdd22bb7aa52 266 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 267 {
emilmont 1:fdd22bb7aa52 268 /* Read Sample from input buffer */
emilmont 1:fdd22bb7aa52 269 /* fN(n) = x(n) */
emilmont 1:fdd22bb7aa52 270 fcurr = *pSrc++;
emilmont 1:fdd22bb7aa52 271
emilmont 1:fdd22bb7aa52 272 /* Initialize state read pointer */
emilmont 1:fdd22bb7aa52 273 px1 = pState;
emilmont 1:fdd22bb7aa52 274 /* Initialize state write pointer */
emilmont 1:fdd22bb7aa52 275 px2 = pState;
emilmont 1:fdd22bb7aa52 276 /* Set accumulator to zero */
emilmont 1:fdd22bb7aa52 277 acc = 0;
emilmont 1:fdd22bb7aa52 278 /* Initialize Ladder coeff pointer */
emilmont 1:fdd22bb7aa52 279 pv = &S->pvCoeffs[0];
emilmont 1:fdd22bb7aa52 280 /* Initialize Reflection coeff pointer */
emilmont 1:fdd22bb7aa52 281 pk = &S->pkCoeffs[0];
emilmont 1:fdd22bb7aa52 282
emilmont 1:fdd22bb7aa52 283 tapCnt = numStages;
emilmont 1:fdd22bb7aa52 284
emilmont 1:fdd22bb7aa52 285 while(tapCnt > 0u)
emilmont 1:fdd22bb7aa52 286 {
emilmont 1:fdd22bb7aa52 287 gcurr = *px1++;
emilmont 1:fdd22bb7aa52 288 /* Process sample */
emilmont 1:fdd22bb7aa52 289 /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
emilmont 1:fdd22bb7aa52 290 fnext =
emilmont 1:fdd22bb7aa52 291 clip_q63_to_q31(((q63_t) fcurr -
emilmont 1:fdd22bb7aa52 292 ((q31_t) (((q63_t) gcurr * (*pk)) >> 31))));
emilmont 1:fdd22bb7aa52 293 /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
emilmont 1:fdd22bb7aa52 294 gnext =
emilmont 1:fdd22bb7aa52 295 clip_q63_to_q31(((q63_t) gcurr +
emilmont 1:fdd22bb7aa52 296 ((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
emilmont 1:fdd22bb7aa52 297 /* Output samples */
emilmont 1:fdd22bb7aa52 298 /* y(n) += gN(n) * vN */
emilmont 1:fdd22bb7aa52 299 acc += ((q63_t) gnext * *pv++);
emilmont 1:fdd22bb7aa52 300 /* write gN-1(n-1) into state for next sample processing */
emilmont 1:fdd22bb7aa52 301 *px2++ = gnext;
emilmont 1:fdd22bb7aa52 302 /* Update f values for next coefficient processing */
emilmont 1:fdd22bb7aa52 303 fcurr = fnext;
emilmont 1:fdd22bb7aa52 304
emilmont 1:fdd22bb7aa52 305 tapCnt--;
emilmont 1:fdd22bb7aa52 306 }
emilmont 1:fdd22bb7aa52 307
emilmont 1:fdd22bb7aa52 308 /* y(n) += g0(n) * v0 */
emilmont 1:fdd22bb7aa52 309 acc += (q63_t) fnext *(
emilmont 1:fdd22bb7aa52 310 *pv++);
emilmont 1:fdd22bb7aa52 311
emilmont 1:fdd22bb7aa52 312 *px2++ = fnext;
emilmont 1:fdd22bb7aa52 313
emilmont 1:fdd22bb7aa52 314 /* write out into pDst */
emilmont 1:fdd22bb7aa52 315 *pDst++ = (q31_t) (acc >> 31u);
emilmont 1:fdd22bb7aa52 316
emilmont 1:fdd22bb7aa52 317 /* Advance the state pointer by 1 to process the next group of samples */
emilmont 1:fdd22bb7aa52 318 pState = pState + 1u;
emilmont 1:fdd22bb7aa52 319 blkCnt--;
emilmont 1:fdd22bb7aa52 320
emilmont 1:fdd22bb7aa52 321 }
emilmont 1:fdd22bb7aa52 322
emilmont 1:fdd22bb7aa52 323 /* Processing is complete. Now copy last S->numStages samples to start of the buffer
emilmont 1:fdd22bb7aa52 324 for the preperation of next frame process */
emilmont 1:fdd22bb7aa52 325
emilmont 1:fdd22bb7aa52 326 /* Points to the start of the state buffer */
emilmont 1:fdd22bb7aa52 327 pStateCurnt = &S->pState[0];
emilmont 1:fdd22bb7aa52 328 pState = &S->pState[blockSize];
emilmont 1:fdd22bb7aa52 329
emilmont 1:fdd22bb7aa52 330 tapCnt = numStages;
emilmont 1:fdd22bb7aa52 331
emilmont 1:fdd22bb7aa52 332 /* Copy the remaining q31_t data */
emilmont 1:fdd22bb7aa52 333 while(tapCnt > 0u)
emilmont 1:fdd22bb7aa52 334 {
emilmont 1:fdd22bb7aa52 335 *pStateCurnt++ = *pState++;
emilmont 1:fdd22bb7aa52 336
emilmont 1:fdd22bb7aa52 337 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 338 tapCnt--;
emilmont 1:fdd22bb7aa52 339 }
emilmont 1:fdd22bb7aa52 340
mbed_official 3:7a284390b0ce 341 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 342
emilmont 1:fdd22bb7aa52 343 }
emilmont 1:fdd22bb7aa52 344
emilmont 1:fdd22bb7aa52 345
emilmont 1:fdd22bb7aa52 346
emilmont 1:fdd22bb7aa52 347
emilmont 1:fdd22bb7aa52 348 /**
emilmont 1:fdd22bb7aa52 349 * @} end of IIR_Lattice group
emilmont 1:fdd22bb7aa52 350 */