CMSIS DSP library

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This is an mbed 2 library. To learn more about mbed OS 5, visit the docs.

Committer:
mbed_official
Date:
Fri Nov 20 08:45:18 2015 +0000
Revision:
5:3762170b6d4d
Parent:
3:7a284390b0ce
Synchronized with git revision 2eb940b9a73af188d3004a2575fdfbb05febe62b

Full URL: https://github.com/mbedmicro/mbed/commit/2eb940b9a73af188d3004a2575fdfbb05febe62b/

Added option to build rpc library. closes #1426

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 5:3762170b6d4d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 5:3762170b6d4d 4 * $Date: 19. March 2015
mbed_official 5:3762170b6d4d 5 * $Revision: V.1.4.5
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_iir_lattice_f32.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Floating-point IIR Lattice filter processing function.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupFilters
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters
emilmont 1:fdd22bb7aa52 49 *
emilmont 1:fdd22bb7aa52 50 * This set of functions implements lattice filters
emilmont 1:fdd22bb7aa52 51 * for Q15, Q31 and floating-point data types. Lattice filters are used in a
emilmont 1:fdd22bb7aa52 52 * variety of adaptive filter applications. The filter structure has feedforward and
emilmont 1:fdd22bb7aa52 53 * feedback components and the net impulse response is infinite length.
emilmont 1:fdd22bb7aa52 54 * The functions operate on blocks
emilmont 1:fdd22bb7aa52 55 * of input and output data and each call to the function processes
emilmont 1:fdd22bb7aa52 56 * <code>blockSize</code> samples through the filter. <code>pSrc</code> and
emilmont 1:fdd22bb7aa52 57 * <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
emilmont 1:fdd22bb7aa52 58
emilmont 1:fdd22bb7aa52 59 * \par Algorithm:
emilmont 1:fdd22bb7aa52 60 * \image html IIRLattice.gif "Infinite Impulse Response Lattice filter"
emilmont 1:fdd22bb7aa52 61 * <pre>
emilmont 1:fdd22bb7aa52 62 * fN(n) = x(n)
emilmont 1:fdd22bb7aa52 63 * fm-1(n) = fm(n) - km * gm-1(n-1) for m = N, N-1, ...1
emilmont 1:fdd22bb7aa52 64 * gm(n) = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ...1
emilmont 1:fdd22bb7aa52 65 * y(n) = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)
emilmont 1:fdd22bb7aa52 66 * </pre>
emilmont 1:fdd22bb7aa52 67 * \par
emilmont 1:fdd22bb7aa52 68 * <code>pkCoeffs</code> points to array of reflection coefficients of size <code>numStages</code>.
emilmont 1:fdd22bb7aa52 69 * Reflection coefficients are stored in time-reversed order.
emilmont 1:fdd22bb7aa52 70 * \par
emilmont 1:fdd22bb7aa52 71 * <pre>
emilmont 1:fdd22bb7aa52 72 * {kN, kN-1, ....k1}
emilmont 1:fdd22bb7aa52 73 * </pre>
emilmont 1:fdd22bb7aa52 74 * <code>pvCoeffs</code> points to the array of ladder coefficients of size <code>(numStages+1)</code>.
emilmont 1:fdd22bb7aa52 75 * Ladder coefficients are stored in time-reversed order.
emilmont 1:fdd22bb7aa52 76 * \par
emilmont 1:fdd22bb7aa52 77 * <pre>
emilmont 1:fdd22bb7aa52 78 * {vN, vN-1, ...v0}
emilmont 1:fdd22bb7aa52 79 * </pre>
emilmont 1:fdd22bb7aa52 80 * <code>pState</code> points to a state array of size <code>numStages + blockSize</code>.
emilmont 1:fdd22bb7aa52 81 * The state variables shown in the figure above (the g values) are stored in the <code>pState</code> array.
emilmont 1:fdd22bb7aa52 82 * The state variables are updated after each block of data is processed; the coefficients are untouched.
emilmont 1:fdd22bb7aa52 83 * \par Instance Structure
emilmont 1:fdd22bb7aa52 84 * The coefficients and state variables for a filter are stored together in an instance data structure.
emilmont 1:fdd22bb7aa52 85 * A separate instance structure must be defined for each filter.
emilmont 1:fdd22bb7aa52 86 * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
emilmont 1:fdd22bb7aa52 87 * There are separate instance structure declarations for each of the 3 supported data types.
emilmont 1:fdd22bb7aa52 88 *
emilmont 1:fdd22bb7aa52 89 * \par Initialization Functions
emilmont 1:fdd22bb7aa52 90 * There is also an associated initialization function for each data type.
emilmont 1:fdd22bb7aa52 91 * The initialization function performs the following operations:
emilmont 1:fdd22bb7aa52 92 * - Sets the values of the internal structure fields.
mbed_official 3:7a284390b0ce 93 * - Zeros out the values in the state buffer.
mbed_official 3:7a284390b0ce 94 * To do this manually without calling the init function, assign the follow subfields of the instance structure:
mbed_official 3:7a284390b0ce 95 * numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero.
emilmont 1:fdd22bb7aa52 96 *
emilmont 1:fdd22bb7aa52 97 * \par
emilmont 1:fdd22bb7aa52 98 * Use of the initialization function is optional.
emilmont 1:fdd22bb7aa52 99 * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
emilmont 1:fdd22bb7aa52 100 * To place an instance structure into a const data section, the instance structure must be manually initialized.
emilmont 1:fdd22bb7aa52 101 * Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
emilmont 1:fdd22bb7aa52 102 * <pre>
emilmont 1:fdd22bb7aa52 103 *arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};
emilmont 1:fdd22bb7aa52 104 *arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};
emilmont 1:fdd22bb7aa52 105 *arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};
emilmont 1:fdd22bb7aa52 106 * </pre>
emilmont 1:fdd22bb7aa52 107 * \par
emilmont 1:fdd22bb7aa52 108 * where <code>numStages</code> is the number of stages in the filter; <code>pState</code> points to the state buffer array;
emilmont 1:fdd22bb7aa52 109 * <code>pkCoeffs</code> points to array of the reflection coefficients; <code>pvCoeffs</code> points to the array of ladder coefficients.
emilmont 1:fdd22bb7aa52 110 * \par Fixed-Point Behavior
emilmont 1:fdd22bb7aa52 111 * Care must be taken when using the fixed-point versions of the IIR lattice filter functions.
emilmont 1:fdd22bb7aa52 112 * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
emilmont 1:fdd22bb7aa52 113 * Refer to the function specific documentation below for usage guidelines.
emilmont 1:fdd22bb7aa52 114 */
emilmont 1:fdd22bb7aa52 115
emilmont 1:fdd22bb7aa52 116 /**
emilmont 1:fdd22bb7aa52 117 * @addtogroup IIR_Lattice
emilmont 1:fdd22bb7aa52 118 * @{
emilmont 1:fdd22bb7aa52 119 */
emilmont 1:fdd22bb7aa52 120
emilmont 1:fdd22bb7aa52 121 /**
emilmont 1:fdd22bb7aa52 122 * @brief Processing function for the floating-point IIR lattice filter.
emilmont 1:fdd22bb7aa52 123 * @param[in] *S points to an instance of the floating-point IIR lattice structure.
emilmont 1:fdd22bb7aa52 124 * @param[in] *pSrc points to the block of input data.
emilmont 1:fdd22bb7aa52 125 * @param[out] *pDst points to the block of output data.
emilmont 1:fdd22bb7aa52 126 * @param[in] blockSize number of samples to process.
emilmont 1:fdd22bb7aa52 127 * @return none.
emilmont 1:fdd22bb7aa52 128 */
emilmont 1:fdd22bb7aa52 129
mbed_official 3:7a284390b0ce 130 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 131
emilmont 1:fdd22bb7aa52 132 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 133
emilmont 1:fdd22bb7aa52 134 void arm_iir_lattice_f32(
emilmont 1:fdd22bb7aa52 135 const arm_iir_lattice_instance_f32 * S,
emilmont 1:fdd22bb7aa52 136 float32_t * pSrc,
emilmont 1:fdd22bb7aa52 137 float32_t * pDst,
emilmont 1:fdd22bb7aa52 138 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 139 {
emilmont 1:fdd22bb7aa52 140 float32_t fnext1, gcurr1, gnext; /* Temporary variables for lattice stages */
emilmont 1:fdd22bb7aa52 141 float32_t acc; /* Accumlator */
emilmont 1:fdd22bb7aa52 142 uint32_t blkCnt, tapCnt; /* temporary variables for counts */
emilmont 1:fdd22bb7aa52 143 float32_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */
emilmont 1:fdd22bb7aa52 144 uint32_t numStages = S->numStages; /* number of stages */
emilmont 1:fdd22bb7aa52 145 float32_t *pState; /* State pointer */
emilmont 1:fdd22bb7aa52 146 float32_t *pStateCurnt; /* State current pointer */
emilmont 1:fdd22bb7aa52 147 float32_t k1, k2;
emilmont 1:fdd22bb7aa52 148 float32_t v1, v2, v3, v4;
emilmont 1:fdd22bb7aa52 149 float32_t gcurr2;
emilmont 1:fdd22bb7aa52 150 float32_t fnext2;
emilmont 1:fdd22bb7aa52 151
emilmont 1:fdd22bb7aa52 152 /* initialise loop count */
emilmont 1:fdd22bb7aa52 153 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 154
emilmont 1:fdd22bb7aa52 155 /* initialise state pointer */
emilmont 1:fdd22bb7aa52 156 pState = &S->pState[0];
emilmont 1:fdd22bb7aa52 157
emilmont 1:fdd22bb7aa52 158 /* Sample processing */
emilmont 1:fdd22bb7aa52 159 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 160 {
emilmont 1:fdd22bb7aa52 161 /* Read Sample from input buffer */
emilmont 1:fdd22bb7aa52 162 /* fN(n) = x(n) */
emilmont 1:fdd22bb7aa52 163 fnext2 = *pSrc++;
emilmont 1:fdd22bb7aa52 164
emilmont 1:fdd22bb7aa52 165 /* Initialize Ladder coeff pointer */
emilmont 1:fdd22bb7aa52 166 pv = &S->pvCoeffs[0];
emilmont 1:fdd22bb7aa52 167 /* Initialize Reflection coeff pointer */
emilmont 1:fdd22bb7aa52 168 pk = &S->pkCoeffs[0];
emilmont 1:fdd22bb7aa52 169
emilmont 1:fdd22bb7aa52 170 /* Initialize state read pointer */
emilmont 1:fdd22bb7aa52 171 px1 = pState;
emilmont 1:fdd22bb7aa52 172 /* Initialize state write pointer */
emilmont 1:fdd22bb7aa52 173 px2 = pState;
emilmont 1:fdd22bb7aa52 174
emilmont 1:fdd22bb7aa52 175 /* Set accumulator to zero */
emilmont 1:fdd22bb7aa52 176 acc = 0.0;
emilmont 1:fdd22bb7aa52 177
emilmont 1:fdd22bb7aa52 178 /* Loop unrolling. Process 4 taps at a time. */
emilmont 1:fdd22bb7aa52 179 tapCnt = (numStages) >> 2;
emilmont 1:fdd22bb7aa52 180
emilmont 1:fdd22bb7aa52 181 while(tapCnt > 0u)
emilmont 1:fdd22bb7aa52 182 {
emilmont 1:fdd22bb7aa52 183 /* Read gN-1(n-1) from state buffer */
emilmont 1:fdd22bb7aa52 184 gcurr1 = *px1;
emilmont 1:fdd22bb7aa52 185
emilmont 1:fdd22bb7aa52 186 /* read reflection coefficient kN */
emilmont 1:fdd22bb7aa52 187 k1 = *pk;
emilmont 1:fdd22bb7aa52 188
emilmont 1:fdd22bb7aa52 189 /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
emilmont 1:fdd22bb7aa52 190 fnext1 = fnext2 - (k1 * gcurr1);
emilmont 1:fdd22bb7aa52 191
emilmont 1:fdd22bb7aa52 192 /* read ladder coefficient vN */
emilmont 1:fdd22bb7aa52 193 v1 = *pv;
emilmont 1:fdd22bb7aa52 194
emilmont 1:fdd22bb7aa52 195 /* read next reflection coefficient kN-1 */
emilmont 1:fdd22bb7aa52 196 k2 = *(pk + 1u);
emilmont 1:fdd22bb7aa52 197
emilmont 1:fdd22bb7aa52 198 /* Read gN-2(n-1) from state buffer */
emilmont 1:fdd22bb7aa52 199 gcurr2 = *(px1 + 1u);
emilmont 1:fdd22bb7aa52 200
emilmont 1:fdd22bb7aa52 201 /* read next ladder coefficient vN-1 */
emilmont 1:fdd22bb7aa52 202 v2 = *(pv + 1u);
emilmont 1:fdd22bb7aa52 203
emilmont 1:fdd22bb7aa52 204 /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
emilmont 1:fdd22bb7aa52 205 fnext2 = fnext1 - (k2 * gcurr2);
emilmont 1:fdd22bb7aa52 206
emilmont 1:fdd22bb7aa52 207 /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
emilmont 1:fdd22bb7aa52 208 gnext = gcurr1 + (k1 * fnext1);
emilmont 1:fdd22bb7aa52 209
emilmont 1:fdd22bb7aa52 210 /* read reflection coefficient kN-2 */
emilmont 1:fdd22bb7aa52 211 k1 = *(pk + 2u);
emilmont 1:fdd22bb7aa52 212
emilmont 1:fdd22bb7aa52 213 /* write gN(n) into state for next sample processing */
emilmont 1:fdd22bb7aa52 214 *px2++ = gnext;
emilmont 1:fdd22bb7aa52 215
emilmont 1:fdd22bb7aa52 216 /* Read gN-3(n-1) from state buffer */
emilmont 1:fdd22bb7aa52 217 gcurr1 = *(px1 + 2u);
emilmont 1:fdd22bb7aa52 218
emilmont 1:fdd22bb7aa52 219 /* y(n) += gN(n) * vN */
emilmont 1:fdd22bb7aa52 220 acc += (gnext * v1);
emilmont 1:fdd22bb7aa52 221
emilmont 1:fdd22bb7aa52 222 /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
emilmont 1:fdd22bb7aa52 223 fnext1 = fnext2 - (k1 * gcurr1);
emilmont 1:fdd22bb7aa52 224
emilmont 1:fdd22bb7aa52 225 /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
emilmont 1:fdd22bb7aa52 226 gnext = gcurr2 + (k2 * fnext2);
emilmont 1:fdd22bb7aa52 227
emilmont 1:fdd22bb7aa52 228 /* Read gN-4(n-1) from state buffer */
emilmont 1:fdd22bb7aa52 229 gcurr2 = *(px1 + 3u);
emilmont 1:fdd22bb7aa52 230
emilmont 1:fdd22bb7aa52 231 /* y(n) += gN-1(n) * vN-1 */
emilmont 1:fdd22bb7aa52 232 acc += (gnext * v2);
emilmont 1:fdd22bb7aa52 233
emilmont 1:fdd22bb7aa52 234 /* read reflection coefficient kN-3 */
emilmont 1:fdd22bb7aa52 235 k2 = *(pk + 3u);
emilmont 1:fdd22bb7aa52 236
emilmont 1:fdd22bb7aa52 237 /* write gN-1(n) into state for next sample processing */
emilmont 1:fdd22bb7aa52 238 *px2++ = gnext;
emilmont 1:fdd22bb7aa52 239
emilmont 1:fdd22bb7aa52 240 /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
emilmont 1:fdd22bb7aa52 241 fnext2 = fnext1 - (k2 * gcurr2);
emilmont 1:fdd22bb7aa52 242
emilmont 1:fdd22bb7aa52 243 /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
emilmont 1:fdd22bb7aa52 244 gnext = gcurr1 + (k1 * fnext1);
emilmont 1:fdd22bb7aa52 245
emilmont 1:fdd22bb7aa52 246 /* read ladder coefficient vN-2 */
emilmont 1:fdd22bb7aa52 247 v3 = *(pv + 2u);
emilmont 1:fdd22bb7aa52 248
emilmont 1:fdd22bb7aa52 249 /* y(n) += gN-2(n) * vN-2 */
emilmont 1:fdd22bb7aa52 250 acc += (gnext * v3);
emilmont 1:fdd22bb7aa52 251
emilmont 1:fdd22bb7aa52 252 /* write gN-2(n) into state for next sample processing */
emilmont 1:fdd22bb7aa52 253 *px2++ = gnext;
emilmont 1:fdd22bb7aa52 254
emilmont 1:fdd22bb7aa52 255 /* update pointer */
emilmont 1:fdd22bb7aa52 256 pk += 4u;
emilmont 1:fdd22bb7aa52 257
emilmont 1:fdd22bb7aa52 258 /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
emilmont 1:fdd22bb7aa52 259 gnext = (fnext2 * k2) + gcurr2;
emilmont 1:fdd22bb7aa52 260
emilmont 1:fdd22bb7aa52 261 /* read next ladder coefficient vN-3 */
emilmont 1:fdd22bb7aa52 262 v4 = *(pv + 3u);
emilmont 1:fdd22bb7aa52 263
emilmont 1:fdd22bb7aa52 264 /* y(n) += gN-4(n) * vN-4 */
emilmont 1:fdd22bb7aa52 265 acc += (gnext * v4);
emilmont 1:fdd22bb7aa52 266
emilmont 1:fdd22bb7aa52 267 /* write gN-3(n) into state for next sample processing */
emilmont 1:fdd22bb7aa52 268 *px2++ = gnext;
emilmont 1:fdd22bb7aa52 269
emilmont 1:fdd22bb7aa52 270 /* update pointers */
emilmont 1:fdd22bb7aa52 271 px1 += 4u;
emilmont 1:fdd22bb7aa52 272 pv += 4u;
emilmont 1:fdd22bb7aa52 273
emilmont 1:fdd22bb7aa52 274 tapCnt--;
emilmont 1:fdd22bb7aa52 275
emilmont 1:fdd22bb7aa52 276 }
emilmont 1:fdd22bb7aa52 277
emilmont 1:fdd22bb7aa52 278 /* If the filter length is not a multiple of 4, compute the remaining filter taps */
emilmont 1:fdd22bb7aa52 279 tapCnt = (numStages) % 0x4u;
emilmont 1:fdd22bb7aa52 280
emilmont 1:fdd22bb7aa52 281 while(tapCnt > 0u)
emilmont 1:fdd22bb7aa52 282 {
emilmont 1:fdd22bb7aa52 283 gcurr1 = *px1++;
emilmont 1:fdd22bb7aa52 284 /* Process sample for last taps */
emilmont 1:fdd22bb7aa52 285 fnext1 = fnext2 - ((*pk) * gcurr1);
emilmont 1:fdd22bb7aa52 286 gnext = (fnext1 * (*pk++)) + gcurr1;
emilmont 1:fdd22bb7aa52 287 /* Output samples for last taps */
emilmont 1:fdd22bb7aa52 288 acc += (gnext * (*pv++));
emilmont 1:fdd22bb7aa52 289 *px2++ = gnext;
emilmont 1:fdd22bb7aa52 290 fnext2 = fnext1;
emilmont 1:fdd22bb7aa52 291
emilmont 1:fdd22bb7aa52 292 tapCnt--;
emilmont 1:fdd22bb7aa52 293
emilmont 1:fdd22bb7aa52 294 }
emilmont 1:fdd22bb7aa52 295
emilmont 1:fdd22bb7aa52 296 /* y(n) += g0(n) * v0 */
emilmont 1:fdd22bb7aa52 297 acc += (fnext2 * (*pv));
emilmont 1:fdd22bb7aa52 298
emilmont 1:fdd22bb7aa52 299 *px2++ = fnext2;
emilmont 1:fdd22bb7aa52 300
emilmont 1:fdd22bb7aa52 301 /* write out into pDst */
emilmont 1:fdd22bb7aa52 302 *pDst++ = acc;
emilmont 1:fdd22bb7aa52 303
emilmont 1:fdd22bb7aa52 304 /* Advance the state pointer by 4 to process the next group of 4 samples */
emilmont 1:fdd22bb7aa52 305 pState = pState + 1u;
emilmont 1:fdd22bb7aa52 306
emilmont 1:fdd22bb7aa52 307 blkCnt--;
emilmont 1:fdd22bb7aa52 308
emilmont 1:fdd22bb7aa52 309 }
emilmont 1:fdd22bb7aa52 310
emilmont 1:fdd22bb7aa52 311 /* Processing is complete. Now copy last S->numStages samples to start of the buffer
emilmont 1:fdd22bb7aa52 312 for the preperation of next frame process */
emilmont 1:fdd22bb7aa52 313
emilmont 1:fdd22bb7aa52 314 /* Points to the start of the state buffer */
emilmont 1:fdd22bb7aa52 315 pStateCurnt = &S->pState[0];
emilmont 1:fdd22bb7aa52 316 pState = &S->pState[blockSize];
emilmont 1:fdd22bb7aa52 317
emilmont 1:fdd22bb7aa52 318 tapCnt = numStages >> 2u;
emilmont 1:fdd22bb7aa52 319
emilmont 1:fdd22bb7aa52 320 /* copy data */
emilmont 1:fdd22bb7aa52 321 while(tapCnt > 0u)
emilmont 1:fdd22bb7aa52 322 {
emilmont 1:fdd22bb7aa52 323 *pStateCurnt++ = *pState++;
emilmont 1:fdd22bb7aa52 324 *pStateCurnt++ = *pState++;
emilmont 1:fdd22bb7aa52 325 *pStateCurnt++ = *pState++;
emilmont 1:fdd22bb7aa52 326 *pStateCurnt++ = *pState++;
emilmont 1:fdd22bb7aa52 327
emilmont 1:fdd22bb7aa52 328 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 329 tapCnt--;
emilmont 1:fdd22bb7aa52 330
emilmont 1:fdd22bb7aa52 331 }
emilmont 1:fdd22bb7aa52 332
emilmont 1:fdd22bb7aa52 333 /* Calculate remaining number of copies */
emilmont 1:fdd22bb7aa52 334 tapCnt = (numStages) % 0x4u;
emilmont 1:fdd22bb7aa52 335
emilmont 1:fdd22bb7aa52 336 /* Copy the remaining q31_t data */
emilmont 1:fdd22bb7aa52 337 while(tapCnt > 0u)
emilmont 1:fdd22bb7aa52 338 {
emilmont 1:fdd22bb7aa52 339 *pStateCurnt++ = *pState++;
emilmont 1:fdd22bb7aa52 340
emilmont 1:fdd22bb7aa52 341 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 342 tapCnt--;
emilmont 1:fdd22bb7aa52 343 }
emilmont 1:fdd22bb7aa52 344 }
emilmont 1:fdd22bb7aa52 345
emilmont 1:fdd22bb7aa52 346 #else
emilmont 1:fdd22bb7aa52 347
emilmont 1:fdd22bb7aa52 348 void arm_iir_lattice_f32(
emilmont 1:fdd22bb7aa52 349 const arm_iir_lattice_instance_f32 * S,
emilmont 1:fdd22bb7aa52 350 float32_t * pSrc,
emilmont 1:fdd22bb7aa52 351 float32_t * pDst,
emilmont 1:fdd22bb7aa52 352 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 353 {
emilmont 1:fdd22bb7aa52 354 float32_t fcurr, fnext = 0, gcurr, gnext; /* Temporary variables for lattice stages */
emilmont 1:fdd22bb7aa52 355 float32_t acc; /* Accumlator */
emilmont 1:fdd22bb7aa52 356 uint32_t blkCnt, tapCnt; /* temporary variables for counts */
emilmont 1:fdd22bb7aa52 357 float32_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */
emilmont 1:fdd22bb7aa52 358 uint32_t numStages = S->numStages; /* number of stages */
emilmont 1:fdd22bb7aa52 359 float32_t *pState; /* State pointer */
emilmont 1:fdd22bb7aa52 360 float32_t *pStateCurnt; /* State current pointer */
emilmont 1:fdd22bb7aa52 361
emilmont 1:fdd22bb7aa52 362
emilmont 1:fdd22bb7aa52 363 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 364
emilmont 1:fdd22bb7aa52 365 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 366
emilmont 1:fdd22bb7aa52 367 pState = &S->pState[0];
emilmont 1:fdd22bb7aa52 368
emilmont 1:fdd22bb7aa52 369 /* Sample processing */
emilmont 1:fdd22bb7aa52 370 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 371 {
emilmont 1:fdd22bb7aa52 372 /* Read Sample from input buffer */
emilmont 1:fdd22bb7aa52 373 /* fN(n) = x(n) */
emilmont 1:fdd22bb7aa52 374 fcurr = *pSrc++;
emilmont 1:fdd22bb7aa52 375
emilmont 1:fdd22bb7aa52 376 /* Initialize state read pointer */
emilmont 1:fdd22bb7aa52 377 px1 = pState;
emilmont 1:fdd22bb7aa52 378 /* Initialize state write pointer */
emilmont 1:fdd22bb7aa52 379 px2 = pState;
emilmont 1:fdd22bb7aa52 380 /* Set accumulator to zero */
emilmont 1:fdd22bb7aa52 381 acc = 0.0f;
emilmont 1:fdd22bb7aa52 382 /* Initialize Ladder coeff pointer */
emilmont 1:fdd22bb7aa52 383 pv = &S->pvCoeffs[0];
emilmont 1:fdd22bb7aa52 384 /* Initialize Reflection coeff pointer */
emilmont 1:fdd22bb7aa52 385 pk = &S->pkCoeffs[0];
emilmont 1:fdd22bb7aa52 386
emilmont 1:fdd22bb7aa52 387
emilmont 1:fdd22bb7aa52 388 /* Process sample for numStages */
emilmont 1:fdd22bb7aa52 389 tapCnt = numStages;
emilmont 1:fdd22bb7aa52 390
emilmont 1:fdd22bb7aa52 391 while(tapCnt > 0u)
emilmont 1:fdd22bb7aa52 392 {
emilmont 1:fdd22bb7aa52 393 gcurr = *px1++;
emilmont 1:fdd22bb7aa52 394 /* Process sample for last taps */
emilmont 1:fdd22bb7aa52 395 fnext = fcurr - ((*pk) * gcurr);
emilmont 1:fdd22bb7aa52 396 gnext = (fnext * (*pk++)) + gcurr;
emilmont 1:fdd22bb7aa52 397
emilmont 1:fdd22bb7aa52 398 /* Output samples for last taps */
emilmont 1:fdd22bb7aa52 399 acc += (gnext * (*pv++));
emilmont 1:fdd22bb7aa52 400 *px2++ = gnext;
emilmont 1:fdd22bb7aa52 401 fcurr = fnext;
emilmont 1:fdd22bb7aa52 402
emilmont 1:fdd22bb7aa52 403 /* Decrementing loop counter */
emilmont 1:fdd22bb7aa52 404 tapCnt--;
emilmont 1:fdd22bb7aa52 405
emilmont 1:fdd22bb7aa52 406 }
emilmont 1:fdd22bb7aa52 407
emilmont 1:fdd22bb7aa52 408 /* y(n) += g0(n) * v0 */
emilmont 1:fdd22bb7aa52 409 acc += (fnext * (*pv));
emilmont 1:fdd22bb7aa52 410
emilmont 1:fdd22bb7aa52 411 *px2++ = fnext;
emilmont 1:fdd22bb7aa52 412
emilmont 1:fdd22bb7aa52 413 /* write out into pDst */
emilmont 1:fdd22bb7aa52 414 *pDst++ = acc;
emilmont 1:fdd22bb7aa52 415
emilmont 1:fdd22bb7aa52 416 /* Advance the state pointer by 1 to process the next group of samples */
emilmont 1:fdd22bb7aa52 417 pState = pState + 1u;
emilmont 1:fdd22bb7aa52 418 blkCnt--;
emilmont 1:fdd22bb7aa52 419
emilmont 1:fdd22bb7aa52 420 }
emilmont 1:fdd22bb7aa52 421
emilmont 1:fdd22bb7aa52 422 /* Processing is complete. Now copy last S->numStages samples to start of the buffer
emilmont 1:fdd22bb7aa52 423 for the preperation of next frame process */
emilmont 1:fdd22bb7aa52 424
emilmont 1:fdd22bb7aa52 425 /* Points to the start of the state buffer */
emilmont 1:fdd22bb7aa52 426 pStateCurnt = &S->pState[0];
emilmont 1:fdd22bb7aa52 427 pState = &S->pState[blockSize];
emilmont 1:fdd22bb7aa52 428
emilmont 1:fdd22bb7aa52 429 tapCnt = numStages;
emilmont 1:fdd22bb7aa52 430
emilmont 1:fdd22bb7aa52 431 /* Copy the data */
emilmont 1:fdd22bb7aa52 432 while(tapCnt > 0u)
emilmont 1:fdd22bb7aa52 433 {
emilmont 1:fdd22bb7aa52 434 *pStateCurnt++ = *pState++;
emilmont 1:fdd22bb7aa52 435
emilmont 1:fdd22bb7aa52 436 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 437 tapCnt--;
emilmont 1:fdd22bb7aa52 438 }
emilmont 1:fdd22bb7aa52 439
emilmont 1:fdd22bb7aa52 440 }
emilmont 1:fdd22bb7aa52 441
mbed_official 3:7a284390b0ce 442 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 443
emilmont 1:fdd22bb7aa52 444
emilmont 1:fdd22bb7aa52 445 /**
emilmont 1:fdd22bb7aa52 446 * @} end of IIR_Lattice group
emilmont 1:fdd22bb7aa52 447 */