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CMSIS DSP library

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cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q7.c@5:3762170b6d4d, 2015-11-20 (annotated)

Committer:
mbed_official
Date:
Fri Nov 20 08:45:18 2015 +0000
Revision:
5:3762170b6d4d
Parent:
3:7a284390b0ce 
Synchronized with git revision 2eb940b9a73af188d3004a2575fdfbb05febe62b



Full URL: https://github.com/mbedmicro/mbed/commit/2eb940b9a73af188d3004a2575fdfbb05febe62b/



Added option to build rpc library. closes #1426

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 5:3762170b6d4d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 5:3762170b6d4d 4 * $Date: 19. March 2015
mbed_official 5:3762170b6d4d 5 * $Revision: V.1.4.5
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_fir_sparse_init_q7.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q7 sparse FIR filter initialization function.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * ---------------------------------------------------------------------------*/
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupFilters
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup FIR_Sparse
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52 /**
emilmont 1:fdd22bb7aa52 53 * @brief Initialization function for the Q7 sparse FIR filter.
emilmont 1:fdd22bb7aa52 54 * @param[in,out] *S points to an instance of the Q7 sparse FIR structure.
emilmont 1:fdd22bb7aa52 55 * @param[in] numTaps number of nonzero coefficients in the filter.
emilmont 1:fdd22bb7aa52 56 * @param[in] *pCoeffs points to the array of filter coefficients.
emilmont 1:fdd22bb7aa52 57 * @param[in] *pState points to the state buffer.
emilmont 1:fdd22bb7aa52 58 * @param[in] *pTapDelay points to the array of offset times.
emilmont 1:fdd22bb7aa52 59 * @param[in] maxDelay maximum offset time supported.
emilmont 1:fdd22bb7aa52 60 * @param[in] blockSize number of samples that will be processed per block.
emilmont 1:fdd22bb7aa52 61 * @return none
emilmont 1:fdd22bb7aa52 62 *
emilmont 1:fdd22bb7aa52 63 * <b>Description:</b>
emilmont 1:fdd22bb7aa52 64 * \par
emilmont 1:fdd22bb7aa52 65 * <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
emilmont 1:fdd22bb7aa52 66 * <code>pState</code> holds the filter's state variables and must be of length
emilmont 1:fdd22bb7aa52 67 * <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
emilmont 1:fdd22bb7aa52 68 * is the maximum number of delay line values.
emilmont 1:fdd22bb7aa52 69 * <code>blockSize</code> is the
emilmont 1:fdd22bb7aa52 70 * number of samples processed by the <code>arm_fir_sparse_q7()</code> function.
emilmont 1:fdd22bb7aa52 71 */
emilmont 1:fdd22bb7aa52 72
emilmont 1:fdd22bb7aa52 73 void arm_fir_sparse_init_q7(
emilmont 1:fdd22bb7aa52 74 arm_fir_sparse_instance_q7 * S,
emilmont 1:fdd22bb7aa52 75 uint16_t numTaps,
emilmont 1:fdd22bb7aa52 76 q7_t * pCoeffs,
emilmont 1:fdd22bb7aa52 77 q7_t * pState,
emilmont 1:fdd22bb7aa52 78 int32_t * pTapDelay,
emilmont 1:fdd22bb7aa52 79 uint16_t maxDelay,
emilmont 1:fdd22bb7aa52 80 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 81 {
emilmont 1:fdd22bb7aa52 82 /* Assign filter taps */
emilmont 1:fdd22bb7aa52 83 S->numTaps = numTaps;
emilmont 1:fdd22bb7aa52 84
emilmont 1:fdd22bb7aa52 85 /* Assign coefficient pointer */
emilmont 1:fdd22bb7aa52 86 S->pCoeffs = pCoeffs;
emilmont 1:fdd22bb7aa52 87
emilmont 1:fdd22bb7aa52 88 /* Assign TapDelay pointer */
emilmont 1:fdd22bb7aa52 89 S->pTapDelay = pTapDelay;
emilmont 1:fdd22bb7aa52 90
emilmont 1:fdd22bb7aa52 91 /* Assign MaxDelay */
emilmont 1:fdd22bb7aa52 92 S->maxDelay = maxDelay;
emilmont 1:fdd22bb7aa52 93
emilmont 1:fdd22bb7aa52 94 /* reset the stateIndex to 0 */
emilmont 1:fdd22bb7aa52 95 S->stateIndex = 0u;
emilmont 1:fdd22bb7aa52 96
emilmont 1:fdd22bb7aa52 97 /* Clear state buffer and size is always maxDelay + blockSize */
emilmont 1:fdd22bb7aa52 98 memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t));
emilmont 1:fdd22bb7aa52 99
emilmont 1:fdd22bb7aa52 100 /* Assign state pointer */
emilmont 1:fdd22bb7aa52 101 S->pState = pState;
emilmont 1:fdd22bb7aa52 102
emilmont 1:fdd22bb7aa52 103 }
emilmont 1:fdd22bb7aa52 104
emilmont 1:fdd22bb7aa52 105 /**
emilmont 1:fdd22bb7aa52 106 * @} end of FIR_Sparse group
emilmont 1:fdd22bb7aa52 107 */