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CMSIS DSP library

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cmsis_dsp/FilteringFunctions/arm_fir_lattice_q31.c@5:3762170b6d4d, 2015-11-20 (annotated)

Committer:
mbed_official
Date:
Fri Nov 20 08:45:18 2015 +0000
Revision:
5:3762170b6d4d
Parent:
3:7a284390b0ce 
Synchronized with git revision 2eb940b9a73af188d3004a2575fdfbb05febe62b



Full URL: https://github.com/mbedmicro/mbed/commit/2eb940b9a73af188d3004a2575fdfbb05febe62b/



Added option to build rpc library. closes #1426

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 5:3762170b6d4d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 5:3762170b6d4d 4 * $Date: 19. March 2015
mbed_official 5:3762170b6d4d 5 * $Revision: V.1.4.5
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_fir_lattice_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q31 FIR lattice filter processing function.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupFilters
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup FIR_Lattice
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52
emilmont 1:fdd22bb7aa52 53 /**
emilmont 1:fdd22bb7aa52 54 * @brief Processing function for the Q31 FIR lattice filter.
emilmont 1:fdd22bb7aa52 55 * @param[in] *S points to an instance of the Q31 FIR lattice structure.
emilmont 1:fdd22bb7aa52 56 * @param[in] *pSrc points to the block of input data.
emilmont 1:fdd22bb7aa52 57 * @param[out] *pDst points to the block of output data
emilmont 1:fdd22bb7aa52 58 * @param[in] blockSize number of samples to process.
emilmont 1:fdd22bb7aa52 59 * @return none.
emilmont 1:fdd22bb7aa52 60 *
emilmont 1:fdd22bb7aa52 61 * @details
emilmont 1:fdd22bb7aa52 62 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 63 * In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.
emilmont 1:fdd22bb7aa52 64 */
emilmont 1:fdd22bb7aa52 65
mbed_official 3:7a284390b0ce 66 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 67
emilmont 1:fdd22bb7aa52 68 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 69
emilmont 1:fdd22bb7aa52 70 void arm_fir_lattice_q31(
emilmont 1:fdd22bb7aa52 71 const arm_fir_lattice_instance_q31 * S,
emilmont 1:fdd22bb7aa52 72 q31_t * pSrc,
emilmont 1:fdd22bb7aa52 73 q31_t * pDst,
emilmont 1:fdd22bb7aa52 74 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 75 {
emilmont 1:fdd22bb7aa52 76 q31_t *pState; /* State pointer */
emilmont 1:fdd22bb7aa52 77 q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
emilmont 1:fdd22bb7aa52 78 q31_t *px; /* temporary state pointer */
emilmont 1:fdd22bb7aa52 79 q31_t *pk; /* temporary coefficient pointer */
emilmont 1:fdd22bb7aa52 80 q31_t fcurr1, fnext1, gcurr1 = 0, gnext1; /* temporary variables for first sample in loop unrolling */
emilmont 1:fdd22bb7aa52 81 q31_t fcurr2, fnext2, gnext2; /* temporary variables for second sample in loop unrolling */
emilmont 1:fdd22bb7aa52 82 uint32_t numStages = S->numStages; /* Length of the filter */
emilmont 1:fdd22bb7aa52 83 uint32_t blkCnt, stageCnt; /* temporary variables for counts */
emilmont 1:fdd22bb7aa52 84 q31_t k;
emilmont 1:fdd22bb7aa52 85
emilmont 1:fdd22bb7aa52 86 pState = &S->pState[0];
emilmont 1:fdd22bb7aa52 87
emilmont 1:fdd22bb7aa52 88 blkCnt = blockSize >> 1u;
emilmont 1:fdd22bb7aa52 89
emilmont 1:fdd22bb7aa52 90 /* First part of the processing with loop unrolling. Compute 2 outputs at a time.
emilmont 1:fdd22bb7aa52 91 a second loop below computes the remaining 1 sample. */
emilmont 1:fdd22bb7aa52 92 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 93 {
emilmont 1:fdd22bb7aa52 94 /* f0(n) = x(n) */
emilmont 1:fdd22bb7aa52 95 fcurr1 = *pSrc++;
emilmont 1:fdd22bb7aa52 96
emilmont 1:fdd22bb7aa52 97 /* f0(n) = x(n) */
emilmont 1:fdd22bb7aa52 98 fcurr2 = *pSrc++;
emilmont 1:fdd22bb7aa52 99
emilmont 1:fdd22bb7aa52 100 /* Initialize coeff pointer */
emilmont 1:fdd22bb7aa52 101 pk = (pCoeffs);
emilmont 1:fdd22bb7aa52 102
emilmont 1:fdd22bb7aa52 103 /* Initialize state pointer */
emilmont 1:fdd22bb7aa52 104 px = pState;
emilmont 1:fdd22bb7aa52 105
emilmont 1:fdd22bb7aa52 106 /* read g0(n - 1) from state buffer */
emilmont 1:fdd22bb7aa52 107 gcurr1 = *px;
emilmont 1:fdd22bb7aa52 108
emilmont 1:fdd22bb7aa52 109 /* Read the reflection coefficient */
emilmont 1:fdd22bb7aa52 110 k = *pk++;
emilmont 1:fdd22bb7aa52 111
emilmont 1:fdd22bb7aa52 112 /* for sample 1 processing */
emilmont 1:fdd22bb7aa52 113 /* f1(n) = f0(n) + K1 * g0(n-1) */
emilmont 1:fdd22bb7aa52 114 fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
emilmont 1:fdd22bb7aa52 115
emilmont 1:fdd22bb7aa52 116 /* g1(n) = f0(n) * K1 + g0(n-1) */
emilmont 1:fdd22bb7aa52 117 gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
emilmont 1:fdd22bb7aa52 118 fnext1 = fcurr1 + (fnext1 << 1u);
emilmont 1:fdd22bb7aa52 119 gnext1 = gcurr1 + (gnext1 << 1u);
emilmont 1:fdd22bb7aa52 120
emilmont 1:fdd22bb7aa52 121 /* for sample 1 processing */
emilmont 1:fdd22bb7aa52 122 /* f1(n) = f0(n) + K1 * g0(n-1) */
emilmont 1:fdd22bb7aa52 123 fnext2 = (q31_t) (((q63_t) fcurr1 * k) >> 32);
emilmont 1:fdd22bb7aa52 124
emilmont 1:fdd22bb7aa52 125 /* g1(n) = f0(n) * K1 + g0(n-1) */
emilmont 1:fdd22bb7aa52 126 gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32);
emilmont 1:fdd22bb7aa52 127 fnext2 = fcurr2 + (fnext2 << 1u);
emilmont 1:fdd22bb7aa52 128 gnext2 = fcurr1 + (gnext2 << 1u);
emilmont 1:fdd22bb7aa52 129
emilmont 1:fdd22bb7aa52 130 /* save g1(n) in state buffer */
emilmont 1:fdd22bb7aa52 131 *px++ = fcurr2;
emilmont 1:fdd22bb7aa52 132
emilmont 1:fdd22bb7aa52 133 /* f1(n) is saved in fcurr1
emilmont 1:fdd22bb7aa52 134 for next stage processing */
emilmont 1:fdd22bb7aa52 135 fcurr1 = fnext1;
emilmont 1:fdd22bb7aa52 136 fcurr2 = fnext2;
emilmont 1:fdd22bb7aa52 137
emilmont 1:fdd22bb7aa52 138 stageCnt = (numStages - 1u);
emilmont 1:fdd22bb7aa52 139
emilmont 1:fdd22bb7aa52 140 /* stage loop */
emilmont 1:fdd22bb7aa52 141 while(stageCnt > 0u)
emilmont 1:fdd22bb7aa52 142 {
emilmont 1:fdd22bb7aa52 143
emilmont 1:fdd22bb7aa52 144 /* Read the reflection coefficient */
emilmont 1:fdd22bb7aa52 145 k = *pk++;
emilmont 1:fdd22bb7aa52 146
emilmont 1:fdd22bb7aa52 147 /* read g2(n) from state buffer */
emilmont 1:fdd22bb7aa52 148 gcurr1 = *px;
emilmont 1:fdd22bb7aa52 149
emilmont 1:fdd22bb7aa52 150 /* save g1(n) in state buffer */
emilmont 1:fdd22bb7aa52 151 *px++ = gnext2;
emilmont 1:fdd22bb7aa52 152
emilmont 1:fdd22bb7aa52 153 /* Sample processing for K2, K3.... */
emilmont 1:fdd22bb7aa52 154 /* f2(n) = f1(n) + K2 * g1(n-1) */
emilmont 1:fdd22bb7aa52 155 fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
emilmont 1:fdd22bb7aa52 156 fnext2 = (q31_t) (((q63_t) gnext1 * k) >> 32);
emilmont 1:fdd22bb7aa52 157
emilmont 1:fdd22bb7aa52 158 fnext1 = fcurr1 + (fnext1 << 1u);
emilmont 1:fdd22bb7aa52 159 fnext2 = fcurr2 + (fnext2 << 1u);
emilmont 1:fdd22bb7aa52 160
emilmont 1:fdd22bb7aa52 161 /* g2(n) = f1(n) * K2 + g1(n-1) */
emilmont 1:fdd22bb7aa52 162 gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32);
emilmont 1:fdd22bb7aa52 163 gnext2 = gnext1 + (gnext2 << 1u);
emilmont 1:fdd22bb7aa52 164
emilmont 1:fdd22bb7aa52 165 /* g2(n) = f1(n) * K2 + g1(n-1) */
emilmont 1:fdd22bb7aa52 166 gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
emilmont 1:fdd22bb7aa52 167 gnext1 = gcurr1 + (gnext1 << 1u);
emilmont 1:fdd22bb7aa52 168
emilmont 1:fdd22bb7aa52 169 /* f1(n) is saved in fcurr1
emilmont 1:fdd22bb7aa52 170 for next stage processing */
emilmont 1:fdd22bb7aa52 171 fcurr1 = fnext1;
emilmont 1:fdd22bb7aa52 172 fcurr2 = fnext2;
emilmont 1:fdd22bb7aa52 173
emilmont 1:fdd22bb7aa52 174 stageCnt--;
emilmont 1:fdd22bb7aa52 175
emilmont 1:fdd22bb7aa52 176 }
emilmont 1:fdd22bb7aa52 177
emilmont 1:fdd22bb7aa52 178 /* y(n) = fN(n) */
emilmont 1:fdd22bb7aa52 179 *pDst++ = fcurr1;
emilmont 1:fdd22bb7aa52 180 *pDst++ = fcurr2;
emilmont 1:fdd22bb7aa52 181
emilmont 1:fdd22bb7aa52 182 blkCnt--;
emilmont 1:fdd22bb7aa52 183
emilmont 1:fdd22bb7aa52 184 }
emilmont 1:fdd22bb7aa52 185
emilmont 1:fdd22bb7aa52 186 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 187 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 188 blkCnt = blockSize % 0x2u;
emilmont 1:fdd22bb7aa52 189
emilmont 1:fdd22bb7aa52 190 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 191 {
emilmont 1:fdd22bb7aa52 192 /* f0(n) = x(n) */
emilmont 1:fdd22bb7aa52 193 fcurr1 = *pSrc++;
emilmont 1:fdd22bb7aa52 194
emilmont 1:fdd22bb7aa52 195 /* Initialize coeff pointer */
emilmont 1:fdd22bb7aa52 196 pk = (pCoeffs);
emilmont 1:fdd22bb7aa52 197
emilmont 1:fdd22bb7aa52 198 /* Initialize state pointer */
emilmont 1:fdd22bb7aa52 199 px = pState;
emilmont 1:fdd22bb7aa52 200
emilmont 1:fdd22bb7aa52 201 /* read g0(n - 1) from state buffer */
emilmont 1:fdd22bb7aa52 202 gcurr1 = *px;
emilmont 1:fdd22bb7aa52 203
emilmont 1:fdd22bb7aa52 204 /* Read the reflection coefficient */
emilmont 1:fdd22bb7aa52 205 k = *pk++;
emilmont 1:fdd22bb7aa52 206
emilmont 1:fdd22bb7aa52 207 /* for sample 1 processing */
emilmont 1:fdd22bb7aa52 208 /* f1(n) = f0(n) + K1 * g0(n-1) */
emilmont 1:fdd22bb7aa52 209 fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
emilmont 1:fdd22bb7aa52 210 fnext1 = fcurr1 + (fnext1 << 1u);
emilmont 1:fdd22bb7aa52 211
emilmont 1:fdd22bb7aa52 212 /* g1(n) = f0(n) * K1 + g0(n-1) */
emilmont 1:fdd22bb7aa52 213 gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
emilmont 1:fdd22bb7aa52 214 gnext1 = gcurr1 + (gnext1 << 1u);
emilmont 1:fdd22bb7aa52 215
emilmont 1:fdd22bb7aa52 216 /* save g1(n) in state buffer */
emilmont 1:fdd22bb7aa52 217 *px++ = fcurr1;
emilmont 1:fdd22bb7aa52 218
emilmont 1:fdd22bb7aa52 219 /* f1(n) is saved in fcurr1
emilmont 1:fdd22bb7aa52 220 for next stage processing */
emilmont 1:fdd22bb7aa52 221 fcurr1 = fnext1;
emilmont 1:fdd22bb7aa52 222
emilmont 1:fdd22bb7aa52 223 stageCnt = (numStages - 1u);
emilmont 1:fdd22bb7aa52 224
emilmont 1:fdd22bb7aa52 225 /* stage loop */
emilmont 1:fdd22bb7aa52 226 while(stageCnt > 0u)
emilmont 1:fdd22bb7aa52 227 {
emilmont 1:fdd22bb7aa52 228 /* Read the reflection coefficient */
emilmont 1:fdd22bb7aa52 229 k = *pk++;
emilmont 1:fdd22bb7aa52 230
emilmont 1:fdd22bb7aa52 231 /* read g2(n) from state buffer */
emilmont 1:fdd22bb7aa52 232 gcurr1 = *px;
emilmont 1:fdd22bb7aa52 233
emilmont 1:fdd22bb7aa52 234 /* save g1(n) in state buffer */
emilmont 1:fdd22bb7aa52 235 *px++ = gnext1;
emilmont 1:fdd22bb7aa52 236
emilmont 1:fdd22bb7aa52 237 /* Sample processing for K2, K3.... */
emilmont 1:fdd22bb7aa52 238 /* f2(n) = f1(n) + K2 * g1(n-1) */
emilmont 1:fdd22bb7aa52 239 fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
emilmont 1:fdd22bb7aa52 240 fnext1 = fcurr1 + (fnext1 << 1u);
emilmont 1:fdd22bb7aa52 241
emilmont 1:fdd22bb7aa52 242 /* g2(n) = f1(n) * K2 + g1(n-1) */
emilmont 1:fdd22bb7aa52 243 gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
emilmont 1:fdd22bb7aa52 244 gnext1 = gcurr1 + (gnext1 << 1u);
emilmont 1:fdd22bb7aa52 245
emilmont 1:fdd22bb7aa52 246 /* f1(n) is saved in fcurr1
emilmont 1:fdd22bb7aa52 247 for next stage processing */
emilmont 1:fdd22bb7aa52 248 fcurr1 = fnext1;
emilmont 1:fdd22bb7aa52 249
emilmont 1:fdd22bb7aa52 250 stageCnt--;
emilmont 1:fdd22bb7aa52 251
emilmont 1:fdd22bb7aa52 252 }
emilmont 1:fdd22bb7aa52 253
emilmont 1:fdd22bb7aa52 254
emilmont 1:fdd22bb7aa52 255 /* y(n) = fN(n) */
emilmont 1:fdd22bb7aa52 256 *pDst++ = fcurr1;
emilmont 1:fdd22bb7aa52 257
emilmont 1:fdd22bb7aa52 258 blkCnt--;
emilmont 1:fdd22bb7aa52 259
emilmont 1:fdd22bb7aa52 260 }
emilmont 1:fdd22bb7aa52 261
emilmont 1:fdd22bb7aa52 262
emilmont 1:fdd22bb7aa52 263 }
emilmont 1:fdd22bb7aa52 264
emilmont 1:fdd22bb7aa52 265
emilmont 1:fdd22bb7aa52 266 #else
emilmont 1:fdd22bb7aa52 267
emilmont 1:fdd22bb7aa52 268 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 269
emilmont 1:fdd22bb7aa52 270 void arm_fir_lattice_q31(
emilmont 1:fdd22bb7aa52 271 const arm_fir_lattice_instance_q31 * S,
emilmont 1:fdd22bb7aa52 272 q31_t * pSrc,
emilmont 1:fdd22bb7aa52 273 q31_t * pDst,
emilmont 1:fdd22bb7aa52 274 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 275 {
emilmont 1:fdd22bb7aa52 276 q31_t *pState; /* State pointer */
emilmont 1:fdd22bb7aa52 277 q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
emilmont 1:fdd22bb7aa52 278 q31_t *px; /* temporary state pointer */
emilmont 1:fdd22bb7aa52 279 q31_t *pk; /* temporary coefficient pointer */
emilmont 1:fdd22bb7aa52 280 q31_t fcurr, fnext, gcurr, gnext; /* temporary variables */
emilmont 1:fdd22bb7aa52 281 uint32_t numStages = S->numStages; /* Length of the filter */
emilmont 1:fdd22bb7aa52 282 uint32_t blkCnt, stageCnt; /* temporary variables for counts */
emilmont 1:fdd22bb7aa52 283
emilmont 1:fdd22bb7aa52 284 pState = &S->pState[0];
emilmont 1:fdd22bb7aa52 285
emilmont 1:fdd22bb7aa52 286 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 287
emilmont 1:fdd22bb7aa52 288 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 289 {
emilmont 1:fdd22bb7aa52 290 /* f0(n) = x(n) */
emilmont 1:fdd22bb7aa52 291 fcurr = *pSrc++;
emilmont 1:fdd22bb7aa52 292
emilmont 1:fdd22bb7aa52 293 /* Initialize coeff pointer */
emilmont 1:fdd22bb7aa52 294 pk = (pCoeffs);
emilmont 1:fdd22bb7aa52 295
emilmont 1:fdd22bb7aa52 296 /* Initialize state pointer */
emilmont 1:fdd22bb7aa52 297 px = pState;
emilmont 1:fdd22bb7aa52 298
emilmont 1:fdd22bb7aa52 299 /* read g0(n-1) from state buffer */
emilmont 1:fdd22bb7aa52 300 gcurr = *px;
emilmont 1:fdd22bb7aa52 301
emilmont 1:fdd22bb7aa52 302 /* for sample 1 processing */
emilmont 1:fdd22bb7aa52 303 /* f1(n) = f0(n) + K1 * g0(n-1) */
emilmont 1:fdd22bb7aa52 304 fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
emilmont 1:fdd22bb7aa52 305 /* g1(n) = f0(n) * K1 + g0(n-1) */
emilmont 1:fdd22bb7aa52 306 gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
emilmont 1:fdd22bb7aa52 307 /* save g1(n) in state buffer */
emilmont 1:fdd22bb7aa52 308 *px++ = fcurr;
emilmont 1:fdd22bb7aa52 309
emilmont 1:fdd22bb7aa52 310 /* f1(n) is saved in fcurr1
emilmont 1:fdd22bb7aa52 311 for next stage processing */
emilmont 1:fdd22bb7aa52 312 fcurr = fnext;
emilmont 1:fdd22bb7aa52 313
emilmont 1:fdd22bb7aa52 314 stageCnt = (numStages - 1u);
emilmont 1:fdd22bb7aa52 315
emilmont 1:fdd22bb7aa52 316 /* stage loop */
emilmont 1:fdd22bb7aa52 317 while(stageCnt > 0u)
emilmont 1:fdd22bb7aa52 318 {
emilmont 1:fdd22bb7aa52 319 /* read g2(n) from state buffer */
emilmont 1:fdd22bb7aa52 320 gcurr = *px;
emilmont 1:fdd22bb7aa52 321
emilmont 1:fdd22bb7aa52 322 /* save g1(n) in state buffer */
emilmont 1:fdd22bb7aa52 323 *px++ = gnext;
emilmont 1:fdd22bb7aa52 324
emilmont 1:fdd22bb7aa52 325 /* Sample processing for K2, K3.... */
emilmont 1:fdd22bb7aa52 326 /* f2(n) = f1(n) + K2 * g1(n-1) */
emilmont 1:fdd22bb7aa52 327 fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
emilmont 1:fdd22bb7aa52 328 /* g2(n) = f1(n) * K2 + g1(n-1) */
emilmont 1:fdd22bb7aa52 329 gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
emilmont 1:fdd22bb7aa52 330
emilmont 1:fdd22bb7aa52 331 /* f1(n) is saved in fcurr1
emilmont 1:fdd22bb7aa52 332 for next stage processing */
emilmont 1:fdd22bb7aa52 333 fcurr = fnext;
emilmont 1:fdd22bb7aa52 334
emilmont 1:fdd22bb7aa52 335 stageCnt--;
emilmont 1:fdd22bb7aa52 336
emilmont 1:fdd22bb7aa52 337 }
emilmont 1:fdd22bb7aa52 338
emilmont 1:fdd22bb7aa52 339 /* y(n) = fN(n) */
emilmont 1:fdd22bb7aa52 340 *pDst++ = fcurr;
emilmont 1:fdd22bb7aa52 341
emilmont 1:fdd22bb7aa52 342 blkCnt--;
emilmont 1:fdd22bb7aa52 343
emilmont 1:fdd22bb7aa52 344 }
emilmont 1:fdd22bb7aa52 345
emilmont 1:fdd22bb7aa52 346 }
emilmont 1:fdd22bb7aa52 347
mbed_official 3:7a284390b0ce 348 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 349
emilmont 1:fdd22bb7aa52 350
emilmont 1:fdd22bb7aa52 351 /**
emilmont 1:fdd22bb7aa52 352 * @} end of FIR_Lattice group
emilmont 1:fdd22bb7aa52 353 */