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CMSIS DSP library

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cmsis_dsp/FilteringFunctions/arm_fir_init_q15.c@5:3762170b6d4d, 2015-11-20 (annotated)

Committer:
mbed_official
Date:
Fri Nov 20 08:45:18 2015 +0000
Revision:
5:3762170b6d4d
Parent:
3:7a284390b0ce 
Synchronized with git revision 2eb940b9a73af188d3004a2575fdfbb05febe62b



Full URL: https://github.com/mbedmicro/mbed/commit/2eb940b9a73af188d3004a2575fdfbb05febe62b/



Added option to build rpc library. closes #1426

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 5:3762170b6d4d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 5:3762170b6d4d 4 * $Date: 19. March 2015
mbed_official 5:3762170b6d4d 5 * $Revision: V.1.4.5
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_fir_init_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 1:fdd22bb7aa52 10 * Description: Q15 FIR filter initialization function.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * ------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupFilters
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup FIR
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52 /**
emilmont 1:fdd22bb7aa52 53 * @param[in,out] *S points to an instance of the Q15 FIR filter structure.
emilmont 2:da51fb522205 54 * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
emilmont 1:fdd22bb7aa52 55 * @param[in] *pCoeffs points to the filter coefficients buffer.
emilmont 1:fdd22bb7aa52 56 * @param[in] *pState points to the state buffer.
emilmont 1:fdd22bb7aa52 57 * @param[in] blockSize is number of samples processed per call.
emilmont 1:fdd22bb7aa52 58 * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if
emilmont 1:fdd22bb7aa52 59 * <code>numTaps</code> is not greater than or equal to 4 and even.
emilmont 1:fdd22bb7aa52 60 *
emilmont 1:fdd22bb7aa52 61 * <b>Description:</b>
emilmont 1:fdd22bb7aa52 62 * \par
emilmont 1:fdd22bb7aa52 63 * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
emilmont 1:fdd22bb7aa52 64 * <pre>
emilmont 1:fdd22bb7aa52 65 * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
emilmont 1:fdd22bb7aa52 66 * </pre>
emilmont 1:fdd22bb7aa52 67 * Note that <code>numTaps</code> must be even and greater than or equal to 4.
emilmont 1:fdd22bb7aa52 68 * To implement an odd length filter simply increase <code>numTaps</code> by 1 and set the last coefficient to zero.
emilmont 1:fdd22bb7aa52 69 * For example, to implement a filter with <code>numTaps=3</code> and coefficients
emilmont 1:fdd22bb7aa52 70 * <pre>
emilmont 1:fdd22bb7aa52 71 * {0.3, -0.8, 0.3}
emilmont 1:fdd22bb7aa52 72 * </pre>
emilmont 1:fdd22bb7aa52 73 * set <code>numTaps=4</code> and use the coefficients:
emilmont 1:fdd22bb7aa52 74 * <pre>
emilmont 1:fdd22bb7aa52 75 * {0.3, -0.8, 0.3, 0}.
emilmont 1:fdd22bb7aa52 76 * </pre>
emilmont 1:fdd22bb7aa52 77 * Similarly, to implement a two point filter
emilmont 1:fdd22bb7aa52 78 * <pre>
emilmont 1:fdd22bb7aa52 79 * {0.3, -0.3}
emilmont 1:fdd22bb7aa52 80 * </pre>
emilmont 1:fdd22bb7aa52 81 * set <code>numTaps=4</code> and use the coefficients:
emilmont 1:fdd22bb7aa52 82 * <pre>
emilmont 1:fdd22bb7aa52 83 * {0.3, -0.3, 0, 0}.
emilmont 1:fdd22bb7aa52 84 * </pre>
emilmont 1:fdd22bb7aa52 85 * \par
emilmont 1:fdd22bb7aa52 86 * <code>pState</code> points to the array of state variables.
emilmont 1:fdd22bb7aa52 87 * <code>pState</code> is of length <code>numTaps+blockSize</code>, when running on Cortex-M4 and Cortex-M3 and is of length <code>numTaps+blockSize-1</code>, when running on Cortex-M0 where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q15()</code>.
emilmont 1:fdd22bb7aa52 88 */
emilmont 1:fdd22bb7aa52 89
emilmont 1:fdd22bb7aa52 90 arm_status arm_fir_init_q15(
emilmont 1:fdd22bb7aa52 91 arm_fir_instance_q15 * S,
emilmont 1:fdd22bb7aa52 92 uint16_t numTaps,
emilmont 1:fdd22bb7aa52 93 q15_t * pCoeffs,
emilmont 1:fdd22bb7aa52 94 q15_t * pState,
emilmont 1:fdd22bb7aa52 95 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 96 {
emilmont 1:fdd22bb7aa52 97 arm_status status;
emilmont 1:fdd22bb7aa52 98
emilmont 1:fdd22bb7aa52 99
mbed_official 3:7a284390b0ce 100 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 101
emilmont 1:fdd22bb7aa52 102 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 103
emilmont 1:fdd22bb7aa52 104 /* The Number of filter coefficients in the filter must be even and at least 4 */
emilmont 1:fdd22bb7aa52 105 if(numTaps & 0x1u)
emilmont 1:fdd22bb7aa52 106 {
emilmont 1:fdd22bb7aa52 107 status = ARM_MATH_ARGUMENT_ERROR;
emilmont 1:fdd22bb7aa52 108 }
emilmont 1:fdd22bb7aa52 109 else
emilmont 1:fdd22bb7aa52 110 {
emilmont 1:fdd22bb7aa52 111 /* Assign filter taps */
emilmont 1:fdd22bb7aa52 112 S->numTaps = numTaps;
emilmont 1:fdd22bb7aa52 113
emilmont 1:fdd22bb7aa52 114 /* Assign coefficient pointer */
emilmont 1:fdd22bb7aa52 115 S->pCoeffs = pCoeffs;
emilmont 1:fdd22bb7aa52 116
emilmont 1:fdd22bb7aa52 117 /* Clear the state buffer. The size is always (blockSize + numTaps ) */
emilmont 1:fdd22bb7aa52 118 memset(pState, 0, (numTaps + (blockSize)) * sizeof(q15_t));
emilmont 1:fdd22bb7aa52 119
emilmont 1:fdd22bb7aa52 120 /* Assign state pointer */
emilmont 1:fdd22bb7aa52 121 S->pState = pState;
emilmont 1:fdd22bb7aa52 122
emilmont 1:fdd22bb7aa52 123 status = ARM_MATH_SUCCESS;
emilmont 1:fdd22bb7aa52 124 }
emilmont 1:fdd22bb7aa52 125
emilmont 1:fdd22bb7aa52 126 return (status);
emilmont 1:fdd22bb7aa52 127
emilmont 1:fdd22bb7aa52 128 #else
emilmont 1:fdd22bb7aa52 129
emilmont 1:fdd22bb7aa52 130 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 131
emilmont 1:fdd22bb7aa52 132 /* Assign filter taps */
emilmont 1:fdd22bb7aa52 133 S->numTaps = numTaps;
emilmont 1:fdd22bb7aa52 134
emilmont 1:fdd22bb7aa52 135 /* Assign coefficient pointer */
emilmont 1:fdd22bb7aa52 136 S->pCoeffs = pCoeffs;
emilmont 1:fdd22bb7aa52 137
emilmont 1:fdd22bb7aa52 138 /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
emilmont 1:fdd22bb7aa52 139 memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
emilmont 1:fdd22bb7aa52 140
emilmont 1:fdd22bb7aa52 141 /* Assign state pointer */
emilmont 1:fdd22bb7aa52 142 S->pState = pState;
emilmont 1:fdd22bb7aa52 143
emilmont 1:fdd22bb7aa52 144 status = ARM_MATH_SUCCESS;
emilmont 1:fdd22bb7aa52 145
emilmont 1:fdd22bb7aa52 146 return (status);
emilmont 1:fdd22bb7aa52 147
mbed_official 3:7a284390b0ce 148 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 149
emilmont 1:fdd22bb7aa52 150 }
emilmont 1:fdd22bb7aa52 151
emilmont 1:fdd22bb7aa52 152 /**
emilmont 1:fdd22bb7aa52 153 * @} end of FIR group
emilmont 1:fdd22bb7aa52 154 */