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CMSIS DSP library

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cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c@5:3762170b6d4d, 2015-11-20 (annotated)

Committer:
mbed_official
Date:
Fri Nov 20 08:45:18 2015 +0000
Revision:
5:3762170b6d4d
Parent:
3:7a284390b0ce 
Synchronized with git revision 2eb940b9a73af188d3004a2575fdfbb05febe62b



Full URL: https://github.com/mbedmicro/mbed/commit/2eb940b9a73af188d3004a2575fdfbb05febe62b/



Added option to build rpc library. closes #1426

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 5:3762170b6d4d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 5:3762170b6d4d 4 * $Date: 19. March 2015
mbed_official 5:3762170b6d4d 5 * $Revision: V.1.4.5
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_biquad_cascade_df1_fast_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Fast processing function for the
emilmont 2:da51fb522205 11 * Q15 Biquad cascade filter.
emilmont 1:fdd22bb7aa52 12 *
emilmont 1:fdd22bb7aa52 13 * Target Processor: Cortex-M4/Cortex-M3
emilmont 1:fdd22bb7aa52 14 *
mbed_official 3:7a284390b0ce 15 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 16 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 17 * are met:
mbed_official 3:7a284390b0ce 18 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 19 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 20 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 21 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 22 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 23 * distribution.
mbed_official 3:7a284390b0ce 24 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 25 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 26 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 27 *
mbed_official 3:7a284390b0ce 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 31 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 32 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 33 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 34 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 35 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 36 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 38 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 39 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 40 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 41
emilmont 1:fdd22bb7aa52 42 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 43
emilmont 1:fdd22bb7aa52 44 /**
emilmont 1:fdd22bb7aa52 45 * @ingroup groupFilters
emilmont 1:fdd22bb7aa52 46 */
emilmont 1:fdd22bb7aa52 47
emilmont 1:fdd22bb7aa52 48 /**
emilmont 1:fdd22bb7aa52 49 * @addtogroup BiquadCascadeDF1
emilmont 1:fdd22bb7aa52 50 * @{
emilmont 1:fdd22bb7aa52 51 */
emilmont 1:fdd22bb7aa52 52
emilmont 1:fdd22bb7aa52 53 /**
emilmont 1:fdd22bb7aa52 54 * @details
emilmont 1:fdd22bb7aa52 55 * @param[in] *S points to an instance of the Q15 Biquad cascade structure.
emilmont 1:fdd22bb7aa52 56 * @param[in] *pSrc points to the block of input data.
emilmont 1:fdd22bb7aa52 57 * @param[out] *pDst points to the block of output data.
emilmont 1:fdd22bb7aa52 58 * @param[in] blockSize number of samples to process per call.
emilmont 1:fdd22bb7aa52 59 * @return none.
emilmont 1:fdd22bb7aa52 60 *
emilmont 1:fdd22bb7aa52 61 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 62 * \par
emilmont 1:fdd22bb7aa52 63 * This fast version uses a 32-bit accumulator with 2.30 format.
emilmont 1:fdd22bb7aa52 64 * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
emilmont 1:fdd22bb7aa52 65 * Thus, if the accumulator result overflows it wraps around and distorts the result.
emilmont 1:fdd22bb7aa52 66 * In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25).
emilmont 1:fdd22bb7aa52 67 * The 2.30 accumulator is then shifted by <code>postShift</code> bits and the result truncated to 1.15 format by discarding the low 16 bits.
emilmont 1:fdd22bb7aa52 68 *
emilmont 1:fdd22bb7aa52 69 * \par
emilmont 1:fdd22bb7aa52 70 * Refer to the function <code>arm_biquad_cascade_df1_q15()</code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure.
emilmont 1:fdd22bb7aa52 71 * Use the function <code>arm_biquad_cascade_df1_init_q15()</code> to initialize the filter structure.
emilmont 1:fdd22bb7aa52 72 *
emilmont 1:fdd22bb7aa52 73 */
emilmont 1:fdd22bb7aa52 74
emilmont 1:fdd22bb7aa52 75 void arm_biquad_cascade_df1_fast_q15(
emilmont 1:fdd22bb7aa52 76 const arm_biquad_casd_df1_inst_q15 * S,
emilmont 1:fdd22bb7aa52 77 q15_t * pSrc,
emilmont 1:fdd22bb7aa52 78 q15_t * pDst,
emilmont 1:fdd22bb7aa52 79 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 80 {
emilmont 1:fdd22bb7aa52 81 q15_t *pIn = pSrc; /* Source pointer */
emilmont 1:fdd22bb7aa52 82 q15_t *pOut = pDst; /* Destination pointer */
emilmont 1:fdd22bb7aa52 83 q31_t in; /* Temporary variable to hold input value */
emilmont 1:fdd22bb7aa52 84 q31_t out; /* Temporary variable to hold output value */
emilmont 1:fdd22bb7aa52 85 q31_t b0; /* Temporary variable to hold bo value */
emilmont 1:fdd22bb7aa52 86 q31_t b1, a1; /* Filter coefficients */
emilmont 1:fdd22bb7aa52 87 q31_t state_in, state_out; /* Filter state variables */
emilmont 1:fdd22bb7aa52 88 q31_t acc; /* Accumulator */
emilmont 1:fdd22bb7aa52 89 int32_t shift = (int32_t) (15 - S->postShift); /* Post shift */
emilmont 1:fdd22bb7aa52 90 q15_t *pState = S->pState; /* State pointer */
emilmont 1:fdd22bb7aa52 91 q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
emilmont 1:fdd22bb7aa52 92 uint32_t sample, stage = S->numStages; /* Stage loop counter */
emilmont 1:fdd22bb7aa52 93
emilmont 1:fdd22bb7aa52 94
emilmont 1:fdd22bb7aa52 95
emilmont 1:fdd22bb7aa52 96 do
emilmont 1:fdd22bb7aa52 97 {
emilmont 1:fdd22bb7aa52 98
emilmont 1:fdd22bb7aa52 99 /* Read the b0 and 0 coefficients using SIMD */
emilmont 1:fdd22bb7aa52 100 b0 = *__SIMD32(pCoeffs)++;
emilmont 1:fdd22bb7aa52 101
emilmont 1:fdd22bb7aa52 102 /* Read the b1 and b2 coefficients using SIMD */
emilmont 1:fdd22bb7aa52 103 b1 = *__SIMD32(pCoeffs)++;
emilmont 1:fdd22bb7aa52 104
emilmont 1:fdd22bb7aa52 105 /* Read the a1 and a2 coefficients using SIMD */
emilmont 1:fdd22bb7aa52 106 a1 = *__SIMD32(pCoeffs)++;
emilmont 1:fdd22bb7aa52 107
emilmont 1:fdd22bb7aa52 108 /* Read the input state values from the state buffer: x[n-1], x[n-2] */
emilmont 1:fdd22bb7aa52 109 state_in = *__SIMD32(pState)++;
emilmont 1:fdd22bb7aa52 110
emilmont 1:fdd22bb7aa52 111 /* Read the output state values from the state buffer: y[n-1], y[n-2] */
emilmont 1:fdd22bb7aa52 112 state_out = *__SIMD32(pState)--;
emilmont 1:fdd22bb7aa52 113
emilmont 1:fdd22bb7aa52 114 /* Apply loop unrolling and compute 2 output values simultaneously. */
emilmont 1:fdd22bb7aa52 115 /* The variable acc hold output values that are being computed:
emilmont 1:fdd22bb7aa52 116 *
emilmont 1:fdd22bb7aa52 117 * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
emilmont 1:fdd22bb7aa52 118 * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
emilmont 1:fdd22bb7aa52 119 */
emilmont 1:fdd22bb7aa52 120 sample = blockSize >> 1u;
emilmont 1:fdd22bb7aa52 121
emilmont 1:fdd22bb7aa52 122 /* First part of the processing with loop unrolling. Compute 2 outputs at a time.
emilmont 1:fdd22bb7aa52 123 ** a second loop below computes the remaining 1 sample. */
emilmont 1:fdd22bb7aa52 124 while(sample > 0u)
emilmont 1:fdd22bb7aa52 125 {
emilmont 1:fdd22bb7aa52 126
emilmont 1:fdd22bb7aa52 127 /* Read the input */
emilmont 1:fdd22bb7aa52 128 in = *__SIMD32(pIn)++;
emilmont 1:fdd22bb7aa52 129
emilmont 1:fdd22bb7aa52 130 /* out = b0 * x[n] + 0 * 0 */
emilmont 1:fdd22bb7aa52 131 out = __SMUAD(b0, in);
emilmont 1:fdd22bb7aa52 132 /* acc = b1 * x[n-1] + acc += b2 * x[n-2] + out */
emilmont 1:fdd22bb7aa52 133 acc = __SMLAD(b1, state_in, out);
emilmont 1:fdd22bb7aa52 134 /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */
emilmont 1:fdd22bb7aa52 135 acc = __SMLAD(a1, state_out, acc);
emilmont 1:fdd22bb7aa52 136
emilmont 1:fdd22bb7aa52 137 /* The result is converted from 3.29 to 1.31 and then saturation is applied */
emilmont 1:fdd22bb7aa52 138 out = __SSAT((acc >> shift), 16);
emilmont 1:fdd22bb7aa52 139
emilmont 1:fdd22bb7aa52 140 /* Every time after the output is computed state should be updated. */
emilmont 1:fdd22bb7aa52 141 /* The states should be updated as: */
emilmont 1:fdd22bb7aa52 142 /* Xn2 = Xn1 */
emilmont 1:fdd22bb7aa52 143 /* Xn1 = Xn */
emilmont 1:fdd22bb7aa52 144 /* Yn2 = Yn1 */
emilmont 1:fdd22bb7aa52 145 /* Yn1 = acc */
emilmont 1:fdd22bb7aa52 146 /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
emilmont 1:fdd22bb7aa52 147 /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
emilmont 1:fdd22bb7aa52 148
emilmont 1:fdd22bb7aa52 149 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 150
emilmont 1:fdd22bb7aa52 151 state_in = __PKHBT(in, state_in, 16);
emilmont 1:fdd22bb7aa52 152 state_out = __PKHBT(out, state_out, 16);
emilmont 1:fdd22bb7aa52 153
emilmont 1:fdd22bb7aa52 154 #else
emilmont 1:fdd22bb7aa52 155
emilmont 1:fdd22bb7aa52 156 state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
emilmont 1:fdd22bb7aa52 157 state_out = __PKHBT(state_out >> 16, (out), 16);
emilmont 1:fdd22bb7aa52 158
emilmont 1:fdd22bb7aa52 159 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 160
emilmont 1:fdd22bb7aa52 161 /* out = b0 * x[n] + 0 * 0 */
emilmont 1:fdd22bb7aa52 162 out = __SMUADX(b0, in);
emilmont 1:fdd22bb7aa52 163 /* acc0 = b1 * x[n-1] , acc0 += b2 * x[n-2] + out */
emilmont 1:fdd22bb7aa52 164 acc = __SMLAD(b1, state_in, out);
emilmont 1:fdd22bb7aa52 165 /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */
emilmont 1:fdd22bb7aa52 166 acc = __SMLAD(a1, state_out, acc);
emilmont 1:fdd22bb7aa52 167
emilmont 1:fdd22bb7aa52 168 /* The result is converted from 3.29 to 1.31 and then saturation is applied */
emilmont 1:fdd22bb7aa52 169 out = __SSAT((acc >> shift), 16);
emilmont 1:fdd22bb7aa52 170
emilmont 1:fdd22bb7aa52 171
emilmont 1:fdd22bb7aa52 172 /* Store the output in the destination buffer. */
emilmont 1:fdd22bb7aa52 173
emilmont 1:fdd22bb7aa52 174 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 175
emilmont 1:fdd22bb7aa52 176 *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
emilmont 1:fdd22bb7aa52 177
emilmont 1:fdd22bb7aa52 178 #else
emilmont 1:fdd22bb7aa52 179
emilmont 1:fdd22bb7aa52 180 *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
emilmont 1:fdd22bb7aa52 181
emilmont 1:fdd22bb7aa52 182 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 183
emilmont 1:fdd22bb7aa52 184 /* Every time after the output is computed state should be updated. */
emilmont 1:fdd22bb7aa52 185 /* The states should be updated as: */
emilmont 1:fdd22bb7aa52 186 /* Xn2 = Xn1 */
emilmont 1:fdd22bb7aa52 187 /* Xn1 = Xn */
emilmont 1:fdd22bb7aa52 188 /* Yn2 = Yn1 */
emilmont 1:fdd22bb7aa52 189 /* Yn1 = acc */
emilmont 1:fdd22bb7aa52 190 /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
emilmont 1:fdd22bb7aa52 191 /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
emilmont 1:fdd22bb7aa52 192
emilmont 1:fdd22bb7aa52 193 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 194
emilmont 1:fdd22bb7aa52 195 state_in = __PKHBT(in >> 16, state_in, 16);
emilmont 1:fdd22bb7aa52 196 state_out = __PKHBT(out, state_out, 16);
emilmont 1:fdd22bb7aa52 197
emilmont 1:fdd22bb7aa52 198 #else
emilmont 1:fdd22bb7aa52 199
emilmont 1:fdd22bb7aa52 200 state_in = __PKHBT(state_in >> 16, in, 16);
emilmont 1:fdd22bb7aa52 201 state_out = __PKHBT(state_out >> 16, out, 16);
emilmont 1:fdd22bb7aa52 202
emilmont 1:fdd22bb7aa52 203 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 204
emilmont 1:fdd22bb7aa52 205
emilmont 1:fdd22bb7aa52 206 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 207 sample--;
emilmont 1:fdd22bb7aa52 208
emilmont 1:fdd22bb7aa52 209 }
emilmont 1:fdd22bb7aa52 210
emilmont 1:fdd22bb7aa52 211 /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 212 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 213
emilmont 1:fdd22bb7aa52 214 if((blockSize & 0x1u) != 0u)
emilmont 1:fdd22bb7aa52 215 {
emilmont 1:fdd22bb7aa52 216 /* Read the input */
emilmont 1:fdd22bb7aa52 217 in = *pIn++;
emilmont 1:fdd22bb7aa52 218
emilmont 1:fdd22bb7aa52 219 /* out = b0 * x[n] + 0 * 0 */
emilmont 1:fdd22bb7aa52 220
emilmont 1:fdd22bb7aa52 221 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 222
emilmont 1:fdd22bb7aa52 223 out = __SMUAD(b0, in);
emilmont 1:fdd22bb7aa52 224
emilmont 1:fdd22bb7aa52 225 #else
emilmont 1:fdd22bb7aa52 226
emilmont 1:fdd22bb7aa52 227 out = __SMUADX(b0, in);
emilmont 1:fdd22bb7aa52 228
emilmont 1:fdd22bb7aa52 229 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 230
emilmont 1:fdd22bb7aa52 231 /* acc = b1 * x[n-1], acc += b2 * x[n-2] + out */
emilmont 1:fdd22bb7aa52 232 acc = __SMLAD(b1, state_in, out);
emilmont 1:fdd22bb7aa52 233 /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */
emilmont 1:fdd22bb7aa52 234 acc = __SMLAD(a1, state_out, acc);
emilmont 1:fdd22bb7aa52 235
emilmont 1:fdd22bb7aa52 236 /* The result is converted from 3.29 to 1.31 and then saturation is applied */
emilmont 1:fdd22bb7aa52 237 out = __SSAT((acc >> shift), 16);
emilmont 1:fdd22bb7aa52 238
emilmont 1:fdd22bb7aa52 239 /* Store the output in the destination buffer. */
emilmont 1:fdd22bb7aa52 240 *pOut++ = (q15_t) out;
emilmont 1:fdd22bb7aa52 241
emilmont 1:fdd22bb7aa52 242 /* Every time after the output is computed state should be updated. */
emilmont 1:fdd22bb7aa52 243 /* The states should be updated as: */
emilmont 1:fdd22bb7aa52 244 /* Xn2 = Xn1 */
emilmont 1:fdd22bb7aa52 245 /* Xn1 = Xn */
emilmont 1:fdd22bb7aa52 246 /* Yn2 = Yn1 */
emilmont 1:fdd22bb7aa52 247 /* Yn1 = acc */
emilmont 1:fdd22bb7aa52 248 /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
emilmont 1:fdd22bb7aa52 249 /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
emilmont 1:fdd22bb7aa52 250
emilmont 1:fdd22bb7aa52 251 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 252
emilmont 1:fdd22bb7aa52 253 state_in = __PKHBT(in, state_in, 16);
emilmont 1:fdd22bb7aa52 254 state_out = __PKHBT(out, state_out, 16);
emilmont 1:fdd22bb7aa52 255
emilmont 1:fdd22bb7aa52 256 #else
emilmont 1:fdd22bb7aa52 257
emilmont 1:fdd22bb7aa52 258 state_in = __PKHBT(state_in >> 16, in, 16);
emilmont 1:fdd22bb7aa52 259 state_out = __PKHBT(state_out >> 16, out, 16);
emilmont 1:fdd22bb7aa52 260
emilmont 1:fdd22bb7aa52 261 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 262
emilmont 1:fdd22bb7aa52 263 }
emilmont 1:fdd22bb7aa52 264
emilmont 1:fdd22bb7aa52 265 /* The first stage goes from the input buffer to the output buffer. */
emilmont 1:fdd22bb7aa52 266 /* Subsequent (numStages - 1) occur in-place in the output buffer */
emilmont 1:fdd22bb7aa52 267 pIn = pDst;
emilmont 1:fdd22bb7aa52 268
emilmont 1:fdd22bb7aa52 269 /* Reset the output pointer */
emilmont 1:fdd22bb7aa52 270 pOut = pDst;
emilmont 1:fdd22bb7aa52 271
emilmont 1:fdd22bb7aa52 272 /* Store the updated state variables back into the state array */
emilmont 1:fdd22bb7aa52 273 *__SIMD32(pState)++ = state_in;
emilmont 1:fdd22bb7aa52 274 *__SIMD32(pState)++ = state_out;
emilmont 1:fdd22bb7aa52 275
emilmont 1:fdd22bb7aa52 276
emilmont 1:fdd22bb7aa52 277 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 278 stage--;
emilmont 1:fdd22bb7aa52 279
emilmont 1:fdd22bb7aa52 280 } while(stage > 0u);
emilmont 1:fdd22bb7aa52 281 }
emilmont 1:fdd22bb7aa52 282
emilmont 1:fdd22bb7aa52 283
emilmont 1:fdd22bb7aa52 284 /**
emilmont 1:fdd22bb7aa52 285 * @} end of BiquadCascadeDF1 group
emilmont 1:fdd22bb7aa52 286 */