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CMSIS DSP library

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cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c@5:3762170b6d4d, 2015-11-20 (annotated)

Committer:
mbed_official
Date:
Fri Nov 20 08:45:18 2015 +0000
Revision:
5:3762170b6d4d
Parent:
3:7a284390b0ce 
Synchronized with git revision 2eb940b9a73af188d3004a2575fdfbb05febe62b



Full URL: https://github.com/mbedmicro/mbed/commit/2eb940b9a73af188d3004a2575fdfbb05febe62b/



Added option to build rpc library. closes #1426

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 5:3762170b6d4d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 5:3762170b6d4d 4 * $Date: 19. March 2015
mbed_official 5:3762170b6d4d 5 * $Revision: V.1.4.5
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_cmplx_mag_squared_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q31 complex magnitude squared.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * ---------------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupCmplxMath
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup cmplx_mag_squared
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52
emilmont 1:fdd22bb7aa52 53 /**
emilmont 1:fdd22bb7aa52 54 * @brief Q31 complex magnitude squared
emilmont 1:fdd22bb7aa52 55 * @param *pSrc points to the complex input vector
emilmont 1:fdd22bb7aa52 56 * @param *pDst points to the real output vector
emilmont 1:fdd22bb7aa52 57 * @param numSamples number of complex samples in the input vector
emilmont 1:fdd22bb7aa52 58 * @return none.
emilmont 1:fdd22bb7aa52 59 *
emilmont 1:fdd22bb7aa52 60 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 61 * \par
emilmont 1:fdd22bb7aa52 62 * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
emilmont 1:fdd22bb7aa52 63 * Input down scaling is not required.
emilmont 1:fdd22bb7aa52 64 */
emilmont 1:fdd22bb7aa52 65
emilmont 1:fdd22bb7aa52 66 void arm_cmplx_mag_squared_q31(
emilmont 1:fdd22bb7aa52 67 q31_t * pSrc,
emilmont 1:fdd22bb7aa52 68 q31_t * pDst,
emilmont 1:fdd22bb7aa52 69 uint32_t numSamples)
emilmont 1:fdd22bb7aa52 70 {
emilmont 1:fdd22bb7aa52 71 q31_t real, imag; /* Temporary variables to store real and imaginary values */
emilmont 1:fdd22bb7aa52 72 q31_t acc0, acc1; /* Accumulators */
emilmont 1:fdd22bb7aa52 73
mbed_official 3:7a284390b0ce 74 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 75
emilmont 1:fdd22bb7aa52 76 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 77 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 78
emilmont 1:fdd22bb7aa52 79 /* loop Unrolling */
emilmont 1:fdd22bb7aa52 80 blkCnt = numSamples >> 2u;
emilmont 1:fdd22bb7aa52 81
emilmont 1:fdd22bb7aa52 82 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 83 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 84 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 85 {
emilmont 1:fdd22bb7aa52 86 /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
emilmont 1:fdd22bb7aa52 87 real = *pSrc++;
emilmont 1:fdd22bb7aa52 88 imag = *pSrc++;
emilmont 1:fdd22bb7aa52 89 acc0 = (q31_t) (((q63_t) real * real) >> 33);
emilmont 1:fdd22bb7aa52 90 acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
emilmont 1:fdd22bb7aa52 91 /* store the result in 3.29 format in the destination buffer. */
emilmont 1:fdd22bb7aa52 92 *pDst++ = acc0 + acc1;
emilmont 1:fdd22bb7aa52 93
emilmont 1:fdd22bb7aa52 94 real = *pSrc++;
emilmont 1:fdd22bb7aa52 95 imag = *pSrc++;
emilmont 1:fdd22bb7aa52 96 acc0 = (q31_t) (((q63_t) real * real) >> 33);
emilmont 1:fdd22bb7aa52 97 acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
emilmont 1:fdd22bb7aa52 98 /* store the result in 3.29 format in the destination buffer. */
emilmont 1:fdd22bb7aa52 99 *pDst++ = acc0 + acc1;
emilmont 1:fdd22bb7aa52 100
emilmont 1:fdd22bb7aa52 101 real = *pSrc++;
emilmont 1:fdd22bb7aa52 102 imag = *pSrc++;
emilmont 1:fdd22bb7aa52 103 acc0 = (q31_t) (((q63_t) real * real) >> 33);
emilmont 1:fdd22bb7aa52 104 acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
emilmont 1:fdd22bb7aa52 105 /* store the result in 3.29 format in the destination buffer. */
emilmont 1:fdd22bb7aa52 106 *pDst++ = acc0 + acc1;
emilmont 1:fdd22bb7aa52 107
emilmont 1:fdd22bb7aa52 108 real = *pSrc++;
emilmont 1:fdd22bb7aa52 109 imag = *pSrc++;
emilmont 1:fdd22bb7aa52 110 acc0 = (q31_t) (((q63_t) real * real) >> 33);
emilmont 1:fdd22bb7aa52 111 acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
emilmont 1:fdd22bb7aa52 112 /* store the result in 3.29 format in the destination buffer. */
emilmont 1:fdd22bb7aa52 113 *pDst++ = acc0 + acc1;
emilmont 1:fdd22bb7aa52 114
emilmont 1:fdd22bb7aa52 115 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 116 blkCnt--;
emilmont 1:fdd22bb7aa52 117 }
emilmont 1:fdd22bb7aa52 118
emilmont 1:fdd22bb7aa52 119 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 120 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 121 blkCnt = numSamples % 0x4u;
emilmont 1:fdd22bb7aa52 122
emilmont 1:fdd22bb7aa52 123 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 124 {
emilmont 1:fdd22bb7aa52 125 /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
emilmont 1:fdd22bb7aa52 126 real = *pSrc++;
emilmont 1:fdd22bb7aa52 127 imag = *pSrc++;
emilmont 1:fdd22bb7aa52 128 acc0 = (q31_t) (((q63_t) real * real) >> 33);
emilmont 1:fdd22bb7aa52 129 acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
emilmont 1:fdd22bb7aa52 130 /* store the result in 3.29 format in the destination buffer. */
emilmont 1:fdd22bb7aa52 131 *pDst++ = acc0 + acc1;
emilmont 1:fdd22bb7aa52 132
emilmont 1:fdd22bb7aa52 133 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 134 blkCnt--;
emilmont 1:fdd22bb7aa52 135 }
emilmont 1:fdd22bb7aa52 136
emilmont 1:fdd22bb7aa52 137 #else
emilmont 1:fdd22bb7aa52 138
emilmont 1:fdd22bb7aa52 139 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 140
emilmont 1:fdd22bb7aa52 141 while(numSamples > 0u)
emilmont 1:fdd22bb7aa52 142 {
emilmont 1:fdd22bb7aa52 143 /* out = ((real * real) + (imag * imag)) */
emilmont 1:fdd22bb7aa52 144 real = *pSrc++;
emilmont 1:fdd22bb7aa52 145 imag = *pSrc++;
emilmont 1:fdd22bb7aa52 146 acc0 = (q31_t) (((q63_t) real * real) >> 33);
emilmont 1:fdd22bb7aa52 147 acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
emilmont 1:fdd22bb7aa52 148 /* store the result in 3.29 format in the destination buffer. */
emilmont 1:fdd22bb7aa52 149 *pDst++ = acc0 + acc1;
emilmont 1:fdd22bb7aa52 150
emilmont 1:fdd22bb7aa52 151 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 152 numSamples--;
emilmont 1:fdd22bb7aa52 153 }
emilmont 1:fdd22bb7aa52 154
mbed_official 3:7a284390b0ce 155 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 156
emilmont 1:fdd22bb7aa52 157 }
emilmont 1:fdd22bb7aa52 158
emilmont 1:fdd22bb7aa52 159 /**
emilmont 1:fdd22bb7aa52 160 * @} end of cmplx_mag_squared group
emilmont 1:fdd22bb7aa52 161 */