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CMSIS DSP library

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cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c@5:3762170b6d4d, 2015-11-20 (annotated)

Committer:
mbed_official
Date:
Fri Nov 20 08:45:18 2015 +0000
Revision:
5:3762170b6d4d
Parent:
3:7a284390b0ce 
Synchronized with git revision 2eb940b9a73af188d3004a2575fdfbb05febe62b



Full URL: https://github.com/mbedmicro/mbed/commit/2eb940b9a73af188d3004a2575fdfbb05febe62b/



Added option to build rpc library. closes #1426

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 5:3762170b6d4d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 5:3762170b6d4d 4 * $Date: 19. March 2015
mbed_official 5:3762170b6d4d 5 * $Revision: V.1.4.5
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_cmplx_dot_prod_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Processing function for the Q15 Complex Dot product
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupCmplxMath
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup cmplx_dot_prod
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52 /**
emilmont 1:fdd22bb7aa52 53 * @brief Q15 complex dot product
emilmont 1:fdd22bb7aa52 54 * @param *pSrcA points to the first input vector
emilmont 1:fdd22bb7aa52 55 * @param *pSrcB points to the second input vector
emilmont 1:fdd22bb7aa52 56 * @param numSamples number of complex samples in each vector
emilmont 1:fdd22bb7aa52 57 * @param *realResult real part of the result returned here
emilmont 1:fdd22bb7aa52 58 * @param *imagResult imaginary part of the result returned here
emilmont 1:fdd22bb7aa52 59 * @return none.
emilmont 1:fdd22bb7aa52 60 *
emilmont 1:fdd22bb7aa52 61 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 62 * \par
emilmont 1:fdd22bb7aa52 63 * The function is implemented using an internal 64-bit accumulator.
emilmont 1:fdd22bb7aa52 64 * The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.
emilmont 1:fdd22bb7aa52 65 * These are accumulated in a 64-bit accumulator with 34.30 precision.
emilmont 1:fdd22bb7aa52 66 * As a final step, the accumulators are converted to 8.24 format.
emilmont 1:fdd22bb7aa52 67 * The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format.
emilmont 1:fdd22bb7aa52 68 */
emilmont 1:fdd22bb7aa52 69
emilmont 1:fdd22bb7aa52 70 void arm_cmplx_dot_prod_q15(
emilmont 1:fdd22bb7aa52 71 q15_t * pSrcA,
emilmont 1:fdd22bb7aa52 72 q15_t * pSrcB,
emilmont 1:fdd22bb7aa52 73 uint32_t numSamples,
emilmont 1:fdd22bb7aa52 74 q31_t * realResult,
emilmont 1:fdd22bb7aa52 75 q31_t * imagResult)
emilmont 1:fdd22bb7aa52 76 {
emilmont 1:fdd22bb7aa52 77 q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */
mbed_official 5:3762170b6d4d 78 q15_t a0,b0,c0,d0;
emilmont 1:fdd22bb7aa52 79
mbed_official 3:7a284390b0ce 80 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 81
emilmont 1:fdd22bb7aa52 82 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 83 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 84
emilmont 1:fdd22bb7aa52 85
emilmont 1:fdd22bb7aa52 86 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 87 blkCnt = numSamples >> 2u;
emilmont 1:fdd22bb7aa52 88
emilmont 1:fdd22bb7aa52 89 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 90 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 91 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 92 {
mbed_official 5:3762170b6d4d 93 a0 = *pSrcA++;
mbed_official 5:3762170b6d4d 94 b0 = *pSrcA++;
mbed_official 5:3762170b6d4d 95 c0 = *pSrcB++;
mbed_official 5:3762170b6d4d 96 d0 = *pSrcB++;
mbed_official 5:3762170b6d4d 97
mbed_official 5:3762170b6d4d 98 real_sum += (q31_t)a0 * c0;
mbed_official 5:3762170b6d4d 99 imag_sum += (q31_t)a0 * d0;
mbed_official 5:3762170b6d4d 100 real_sum -= (q31_t)b0 * d0;
mbed_official 5:3762170b6d4d 101 imag_sum += (q31_t)b0 * c0;
mbed_official 5:3762170b6d4d 102
mbed_official 5:3762170b6d4d 103 a0 = *pSrcA++;
mbed_official 5:3762170b6d4d 104 b0 = *pSrcA++;
mbed_official 5:3762170b6d4d 105 c0 = *pSrcB++;
mbed_official 5:3762170b6d4d 106 d0 = *pSrcB++;
mbed_official 5:3762170b6d4d 107
mbed_official 5:3762170b6d4d 108 real_sum += (q31_t)a0 * c0;
mbed_official 5:3762170b6d4d 109 imag_sum += (q31_t)a0 * d0;
mbed_official 5:3762170b6d4d 110 real_sum -= (q31_t)b0 * d0;
mbed_official 5:3762170b6d4d 111 imag_sum += (q31_t)b0 * c0;
mbed_official 5:3762170b6d4d 112
mbed_official 5:3762170b6d4d 113 a0 = *pSrcA++;
mbed_official 5:3762170b6d4d 114 b0 = *pSrcA++;
mbed_official 5:3762170b6d4d 115 c0 = *pSrcB++;
mbed_official 5:3762170b6d4d 116 d0 = *pSrcB++;
mbed_official 5:3762170b6d4d 117
mbed_official 5:3762170b6d4d 118 real_sum += (q31_t)a0 * c0;
mbed_official 5:3762170b6d4d 119 imag_sum += (q31_t)a0 * d0;
mbed_official 5:3762170b6d4d 120 real_sum -= (q31_t)b0 * d0;
mbed_official 5:3762170b6d4d 121 imag_sum += (q31_t)b0 * c0;
mbed_official 5:3762170b6d4d 122
mbed_official 5:3762170b6d4d 123 a0 = *pSrcA++;
mbed_official 5:3762170b6d4d 124 b0 = *pSrcA++;
mbed_official 5:3762170b6d4d 125 c0 = *pSrcB++;
mbed_official 5:3762170b6d4d 126 d0 = *pSrcB++;
mbed_official 5:3762170b6d4d 127
mbed_official 5:3762170b6d4d 128 real_sum += (q31_t)a0 * c0;
mbed_official 5:3762170b6d4d 129 imag_sum += (q31_t)a0 * d0;
mbed_official 5:3762170b6d4d 130 real_sum -= (q31_t)b0 * d0;
mbed_official 5:3762170b6d4d 131 imag_sum += (q31_t)b0 * c0;
emilmont 1:fdd22bb7aa52 132
mbed_official 5:3762170b6d4d 133 /* Decrement the loop counter */
mbed_official 5:3762170b6d4d 134 blkCnt--;
emilmont 1:fdd22bb7aa52 135 }
emilmont 1:fdd22bb7aa52 136
emilmont 1:fdd22bb7aa52 137 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 138 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 139 blkCnt = numSamples % 0x4u;
emilmont 1:fdd22bb7aa52 140
emilmont 1:fdd22bb7aa52 141 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 142 {
mbed_official 5:3762170b6d4d 143 a0 = *pSrcA++;
mbed_official 5:3762170b6d4d 144 b0 = *pSrcA++;
mbed_official 5:3762170b6d4d 145 c0 = *pSrcB++;
mbed_official 5:3762170b6d4d 146 d0 = *pSrcB++;
mbed_official 5:3762170b6d4d 147
mbed_official 5:3762170b6d4d 148 real_sum += (q31_t)a0 * c0;
mbed_official 5:3762170b6d4d 149 imag_sum += (q31_t)a0 * d0;
mbed_official 5:3762170b6d4d 150 real_sum -= (q31_t)b0 * d0;
mbed_official 5:3762170b6d4d 151 imag_sum += (q31_t)b0 * c0;
emilmont 1:fdd22bb7aa52 152
mbed_official 5:3762170b6d4d 153 /* Decrement the loop counter */
mbed_official 5:3762170b6d4d 154 blkCnt--;
emilmont 1:fdd22bb7aa52 155 }
emilmont 1:fdd22bb7aa52 156
emilmont 1:fdd22bb7aa52 157 #else
emilmont 1:fdd22bb7aa52 158
emilmont 1:fdd22bb7aa52 159 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 160
emilmont 1:fdd22bb7aa52 161 while(numSamples > 0u)
emilmont 1:fdd22bb7aa52 162 {
mbed_official 5:3762170b6d4d 163 a0 = *pSrcA++;
mbed_official 5:3762170b6d4d 164 b0 = *pSrcA++;
mbed_official 5:3762170b6d4d 165 c0 = *pSrcB++;
mbed_official 5:3762170b6d4d 166 d0 = *pSrcB++;
mbed_official 5:3762170b6d4d 167
mbed_official 5:3762170b6d4d 168 real_sum += a0 * c0;
mbed_official 5:3762170b6d4d 169 imag_sum += a0 * d0;
mbed_official 5:3762170b6d4d 170 real_sum -= b0 * d0;
mbed_official 5:3762170b6d4d 171 imag_sum += b0 * c0;
emilmont 1:fdd22bb7aa52 172
mbed_official 5:3762170b6d4d 173
mbed_official 5:3762170b6d4d 174 /* Decrement the loop counter */
mbed_official 5:3762170b6d4d 175 numSamples--;
emilmont 1:fdd22bb7aa52 176 }
emilmont 1:fdd22bb7aa52 177
mbed_official 3:7a284390b0ce 178 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 179
emilmont 1:fdd22bb7aa52 180 /* Store the real and imaginary results in 8.24 format */
emilmont 1:fdd22bb7aa52 181 /* Convert real data in 34.30 to 8.24 by 6 right shifts */
mbed_official 5:3762170b6d4d 182 *realResult = (q31_t) (real_sum >> 6);
emilmont 1:fdd22bb7aa52 183 /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
mbed_official 5:3762170b6d4d 184 *imagResult = (q31_t) (imag_sum >> 6);
emilmont 1:fdd22bb7aa52 185 }
emilmont 1:fdd22bb7aa52 186
emilmont 1:fdd22bb7aa52 187 /**
emilmont 1:fdd22bb7aa52 188 * @} end of cmplx_dot_prod group
emilmont 1:fdd22bb7aa52 189 */