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CMSIS DSP library

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cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c@5:3762170b6d4d, 2015-11-20 (annotated)

Committer:
mbed_official
Date:
Fri Nov 20 08:45:18 2015 +0000
Revision:
5:3762170b6d4d
Parent:
3:7a284390b0ce 
Synchronized with git revision 2eb940b9a73af188d3004a2575fdfbb05febe62b



Full URL: https://github.com/mbedmicro/mbed/commit/2eb940b9a73af188d3004a2575fdfbb05febe62b/



Added option to build rpc library. closes #1426

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 5:3762170b6d4d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 5:3762170b6d4d 4 * $Date: 19. March 2015
mbed_official 5:3762170b6d4d 5 * $Revision: V.1.4.5
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_cmplx_dot_prod_f32.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Floating-point complex dot product
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * ---------------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupCmplxMath
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @defgroup cmplx_dot_prod Complex Dot Product
emilmont 1:fdd22bb7aa52 49 *
emilmont 1:fdd22bb7aa52 50 * Computes the dot product of two complex vectors.
emilmont 1:fdd22bb7aa52 51 * The vectors are multiplied element-by-element and then summed.
emilmont 1:fdd22bb7aa52 52 *
emilmont 1:fdd22bb7aa52 53 * The <code>pSrcA</code> points to the first complex input vector and
emilmont 1:fdd22bb7aa52 54 * <code>pSrcB</code> points to the second complex input vector.
emilmont 1:fdd22bb7aa52 55 * <code>numSamples</code> specifies the number of complex samples
emilmont 1:fdd22bb7aa52 56 * and the data in each array is stored in an interleaved fashion
emilmont 1:fdd22bb7aa52 57 * (real, imag, real, imag, ...).
emilmont 1:fdd22bb7aa52 58 * Each array has a total of <code>2*numSamples</code> values.
emilmont 1:fdd22bb7aa52 59 *
emilmont 1:fdd22bb7aa52 60 * The underlying algorithm is used:
emilmont 1:fdd22bb7aa52 61 * <pre>
emilmont 1:fdd22bb7aa52 62 * realResult=0;
emilmont 1:fdd22bb7aa52 63 * imagResult=0;
emilmont 1:fdd22bb7aa52 64 * for(n=0; n<numSamples; n++) {
emilmont 1:fdd22bb7aa52 65 * realResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+0] - pSrcA[(2*n)+1]*pSrcB[(2*n)+1];
emilmont 1:fdd22bb7aa52 66 * imagResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+1] + pSrcA[(2*n)+1]*pSrcB[(2*n)+0];
emilmont 1:fdd22bb7aa52 67 * }
emilmont 1:fdd22bb7aa52 68 * </pre>
emilmont 1:fdd22bb7aa52 69 *
emilmont 1:fdd22bb7aa52 70 * There are separate functions for floating-point, Q15, and Q31 data types.
emilmont 1:fdd22bb7aa52 71 */
emilmont 1:fdd22bb7aa52 72
emilmont 1:fdd22bb7aa52 73 /**
emilmont 1:fdd22bb7aa52 74 * @addtogroup cmplx_dot_prod
emilmont 1:fdd22bb7aa52 75 * @{
emilmont 1:fdd22bb7aa52 76 */
emilmont 1:fdd22bb7aa52 77
emilmont 1:fdd22bb7aa52 78 /**
emilmont 1:fdd22bb7aa52 79 * @brief Floating-point complex dot product
emilmont 1:fdd22bb7aa52 80 * @param *pSrcA points to the first input vector
emilmont 1:fdd22bb7aa52 81 * @param *pSrcB points to the second input vector
emilmont 1:fdd22bb7aa52 82 * @param numSamples number of complex samples in each vector
emilmont 1:fdd22bb7aa52 83 * @param *realResult real part of the result returned here
emilmont 1:fdd22bb7aa52 84 * @param *imagResult imaginary part of the result returned here
emilmont 1:fdd22bb7aa52 85 * @return none.
emilmont 1:fdd22bb7aa52 86 */
emilmont 1:fdd22bb7aa52 87
emilmont 1:fdd22bb7aa52 88 void arm_cmplx_dot_prod_f32(
emilmont 1:fdd22bb7aa52 89 float32_t * pSrcA,
emilmont 1:fdd22bb7aa52 90 float32_t * pSrcB,
emilmont 1:fdd22bb7aa52 91 uint32_t numSamples,
emilmont 1:fdd22bb7aa52 92 float32_t * realResult,
emilmont 1:fdd22bb7aa52 93 float32_t * imagResult)
emilmont 1:fdd22bb7aa52 94 {
emilmont 1:fdd22bb7aa52 95 float32_t real_sum = 0.0f, imag_sum = 0.0f; /* Temporary result storage */
mbed_official 5:3762170b6d4d 96 float32_t a0,b0,c0,d0;
emilmont 1:fdd22bb7aa52 97
mbed_official 3:7a284390b0ce 98 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 99
emilmont 1:fdd22bb7aa52 100 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 101 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 102
emilmont 1:fdd22bb7aa52 103 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 104 blkCnt = numSamples >> 2u;
emilmont 1:fdd22bb7aa52 105
emilmont 1:fdd22bb7aa52 106 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 107 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 108 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 109 {
mbed_official 5:3762170b6d4d 110 a0 = *pSrcA++;
mbed_official 5:3762170b6d4d 111 b0 = *pSrcA++;
mbed_official 5:3762170b6d4d 112 c0 = *pSrcB++;
mbed_official 5:3762170b6d4d 113 d0 = *pSrcB++;
mbed_official 5:3762170b6d4d 114
mbed_official 5:3762170b6d4d 115 real_sum += a0 * c0;
mbed_official 5:3762170b6d4d 116 imag_sum += a0 * d0;
mbed_official 5:3762170b6d4d 117 real_sum -= b0 * d0;
mbed_official 5:3762170b6d4d 118 imag_sum += b0 * c0;
mbed_official 5:3762170b6d4d 119
mbed_official 5:3762170b6d4d 120 a0 = *pSrcA++;
mbed_official 5:3762170b6d4d 121 b0 = *pSrcA++;
mbed_official 5:3762170b6d4d 122 c0 = *pSrcB++;
mbed_official 5:3762170b6d4d 123 d0 = *pSrcB++;
mbed_official 5:3762170b6d4d 124
mbed_official 5:3762170b6d4d 125 real_sum += a0 * c0;
mbed_official 5:3762170b6d4d 126 imag_sum += a0 * d0;
mbed_official 5:3762170b6d4d 127 real_sum -= b0 * d0;
mbed_official 5:3762170b6d4d 128 imag_sum += b0 * c0;
mbed_official 5:3762170b6d4d 129
mbed_official 5:3762170b6d4d 130 a0 = *pSrcA++;
mbed_official 5:3762170b6d4d 131 b0 = *pSrcA++;
mbed_official 5:3762170b6d4d 132 c0 = *pSrcB++;
mbed_official 5:3762170b6d4d 133 d0 = *pSrcB++;
mbed_official 5:3762170b6d4d 134
mbed_official 5:3762170b6d4d 135 real_sum += a0 * c0;
mbed_official 5:3762170b6d4d 136 imag_sum += a0 * d0;
mbed_official 5:3762170b6d4d 137 real_sum -= b0 * d0;
mbed_official 5:3762170b6d4d 138 imag_sum += b0 * c0;
mbed_official 5:3762170b6d4d 139
mbed_official 5:3762170b6d4d 140 a0 = *pSrcA++;
mbed_official 5:3762170b6d4d 141 b0 = *pSrcA++;
mbed_official 5:3762170b6d4d 142 c0 = *pSrcB++;
mbed_official 5:3762170b6d4d 143 d0 = *pSrcB++;
mbed_official 5:3762170b6d4d 144
mbed_official 5:3762170b6d4d 145 real_sum += a0 * c0;
mbed_official 5:3762170b6d4d 146 imag_sum += a0 * d0;
mbed_official 5:3762170b6d4d 147 real_sum -= b0 * d0;
mbed_official 5:3762170b6d4d 148 imag_sum += b0 * c0;
emilmont 1:fdd22bb7aa52 149
mbed_official 5:3762170b6d4d 150 /* Decrement the loop counter */
mbed_official 5:3762170b6d4d 151 blkCnt--;
emilmont 1:fdd22bb7aa52 152 }
emilmont 1:fdd22bb7aa52 153
emilmont 1:fdd22bb7aa52 154 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 155 ** No loop unrolling is used. */
mbed_official 5:3762170b6d4d 156 blkCnt = numSamples & 0x3u;
emilmont 1:fdd22bb7aa52 157
emilmont 1:fdd22bb7aa52 158 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 159 {
mbed_official 5:3762170b6d4d 160 a0 = *pSrcA++;
mbed_official 5:3762170b6d4d 161 b0 = *pSrcA++;
mbed_official 5:3762170b6d4d 162 c0 = *pSrcB++;
mbed_official 5:3762170b6d4d 163 d0 = *pSrcB++;
mbed_official 5:3762170b6d4d 164
mbed_official 5:3762170b6d4d 165 real_sum += a0 * c0;
mbed_official 5:3762170b6d4d 166 imag_sum += a0 * d0;
mbed_official 5:3762170b6d4d 167 real_sum -= b0 * d0;
mbed_official 5:3762170b6d4d 168 imag_sum += b0 * c0;
emilmont 1:fdd22bb7aa52 169
mbed_official 5:3762170b6d4d 170 /* Decrement the loop counter */
mbed_official 5:3762170b6d4d 171 blkCnt--;
emilmont 1:fdd22bb7aa52 172 }
emilmont 1:fdd22bb7aa52 173
emilmont 1:fdd22bb7aa52 174 #else
emilmont 1:fdd22bb7aa52 175
emilmont 1:fdd22bb7aa52 176 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 177
emilmont 1:fdd22bb7aa52 178 while(numSamples > 0u)
emilmont 1:fdd22bb7aa52 179 {
mbed_official 5:3762170b6d4d 180 a0 = *pSrcA++;
mbed_official 5:3762170b6d4d 181 b0 = *pSrcA++;
mbed_official 5:3762170b6d4d 182 c0 = *pSrcB++;
mbed_official 5:3762170b6d4d 183 d0 = *pSrcB++;
mbed_official 5:3762170b6d4d 184
mbed_official 5:3762170b6d4d 185 real_sum += a0 * c0;
mbed_official 5:3762170b6d4d 186 imag_sum += a0 * d0;
mbed_official 5:3762170b6d4d 187 real_sum -= b0 * d0;
mbed_official 5:3762170b6d4d 188 imag_sum += b0 * c0;
emilmont 1:fdd22bb7aa52 189
mbed_official 5:3762170b6d4d 190 /* Decrement the loop counter */
mbed_official 5:3762170b6d4d 191 numSamples--;
emilmont 1:fdd22bb7aa52 192 }
emilmont 1:fdd22bb7aa52 193
mbed_official 3:7a284390b0ce 194 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 195
emilmont 1:fdd22bb7aa52 196 /* Store the real and imaginary results in the destination buffers */
emilmont 1:fdd22bb7aa52 197 *realResult = real_sum;
emilmont 1:fdd22bb7aa52 198 *imagResult = imag_sum;
emilmont 1:fdd22bb7aa52 199 }
emilmont 1:fdd22bb7aa52 200
emilmont 1:fdd22bb7aa52 201 /**
emilmont 1:fdd22bb7aa52 202 * @} end of cmplx_dot_prod group
emilmont 1:fdd22bb7aa52 203 */