Diff: targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct

Revision:

173:e131a1973e81

Parent:

167:e84263d55307

Child:

174:b96e65c34a4d

--- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct	Thu Aug 31 17:27:04 2017 +0100
+++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct	Fri Sep 15 14:59:18 2017 +0100
@@ -1,51 +1,78 @@
-; *************************************************************
-; *** Scatter-Loading Description File for RTL8195A         ***
-; *************************************************************
-LR_ROM 0x00000000 0x00030000{
-	_ROM_CODE 0x00000000 0x00030000  {
-	;*.o (RESET, +First)   
-	;*(InRoot$$Sections)
-	}
-}
+; Realtek Semiconductor Corp.
+;
+; RTL8195A ARMCC Scatter File
+;
+; MEMORY
+; {
+;   SROM (rx)    : ORIGIN = 0x10000000, LENGTH = 0x00007000
+;   SRAM (rwx)   : ORIGIN = 0x10007000, LENGTH = 0x00070000 - 0x00007000
+;   TCM  (rwx)   : ORIGIN = 0x1FFF0000, LENGTH = 0x00010000
+;   DRAM (rwx)   : ORIGIN = 0x30000000, LENGTH = 2M
+; }
 
-LR_RAM 0x10006000 0x6FFFF  {
-;LR_RAM 0x10000000 0x6FFFF  {
-  ;ROM_BSS 0x10000000 0x0005FFF{
-	;rtl_console.o(.mon.ram.bss*)
-  ;}
-  
-  .image2.table 0x10006000 FIXED  {
-    rtl8195a_init.o(.image2.ram.data*)	
-    rtl8195a_init.o(.image2.validate.rodata*)
-  }
-  
-  .text +0 FIXED{
-	rtl8195a_init.o(.infra.ram.start)
-  	;*.o(.mon.ram.text*)
-  	;*.o(.hal.flash.text*)
-  	;*.o(.hal.sdrc.text*)
-  	;*.o(.hal.gpio.text*)
-  	;*.o(.text*)
-  	;*.o(.rodata*)
-  	.ANY (+RO)
+LR_IRAM 0x10007000 (0x70000 - 0x7000) {
+
+  IMAGE2_TABLE 0x10007000 FIXED {
+    *rtl8195a_init.o(.image2.ram.data*, +FIRST)
+    *rtl8195a_init.o(.image2.validate.rodata*)
   }
 
-  .data +0 FIXED{
-    .ANY (+RW)
+  ER_IRAM +0 FIXED {
+    *rtl8195a_crypto.o (+RO)
+    * (i.mbedtls*)
+    *libc.a (+RO)
+    
+	*rtx_*.o (+RO)
+    *Ticker.o (+RO)
+    *Timeout.o (+RO)
+	*rtx_timer.o (+RO)
+    *TimerEvent.o (+RO)
+    *mbed_ticker_api.o (+RO)
+    *mbed_critical.o (+RO)
+    *us_ticker.o (+RO)
+    
+    *lib_peripheral_mbed_arm.ar (+RO)
   }
 
   RW_IRAM1 +0 UNINIT FIXED {
-   .ANY (+ZI)
+    *rtl8195a_crypto.o(+RW)
+    ;*mbedtls*.o(+RW)
+    *libc.a (+RW)
+    *(.sdram.data*)
+    *lib_peripheral_mbed_arm.ar (+RW)
   }
 
-  TCM_OVERLAY 0x1FFF0000 0x10000{
-    lwip_mem.o(.bss*)
-    lwip_memp.o(.bss*)
-    *.o(.tcm.heap*)
+  RW_IRAM2 +0 UNINIT FIXED {
+    *rtl8195a_crypto.o(+ZI, COMMON)
+    ;*mbedtls*.o(+ZI, COMMON)
+    *libc.a (+ZI, COMMON)
+    *(.bss.thread_stack_main)
+    *lib_peripheral_mbed_arm.ar (+ZI, COMMON)
+  }
+
+  ARM_LIB_STACK (0x10070000 - 0x1000) EMPTY 0x1000 {
   }
 }
 
-LR_DRAM 0x30000000 0x1FFFFF{
-	_DRAM_CODE 0x30000000 0x1FFFFF{
-	}
-}
\ No newline at end of file
+LR_TCM 0x1FFF0000 0x10000 {
+    TCM_OVERLAY 0x1FFF0000 0x10000 {
+        *lwip_mem.o(.bss*)
+        *lwip_memp.o(.bss*)
+        *.o(.tcm.heap*)
+    }
+}
+
+LR_DRAM 0x30000000 0x200000 {
+
+  ER_DRAM +0 FIXED {
+    .ANY (+RO)
+  }
+
+  RW_DRAM1 +0 UNINIT FIXED {
+   .ANY (+RW)
+  }
+
+  RW_DRAM2 +0 UNINIT FIXED {
+   .ANY (+ZI)
+  }
+}