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targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_ll_iwdg.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
180:96ed750bd169 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 156:95d6b41a828b 1 /**
<> 156:95d6b41a828b 2 ******************************************************************************
<> 156:95d6b41a828b 3 * @file stm32f0xx_ll_iwdg.h
<> 156:95d6b41a828b 4 * @author MCD Application Team
<> 156:95d6b41a828b 5 * @brief Header file of IWDG LL module.
<> 156:95d6b41a828b 6 ******************************************************************************
<> 156:95d6b41a828b 7 * @attention
<> 156:95d6b41a828b 8 *
<> 156:95d6b41a828b 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 156:95d6b41a828b 10 *
<> 156:95d6b41a828b 11 * Redistribution and use in source and binary forms, with or without modification,
<> 156:95d6b41a828b 12 * are permitted provided that the following conditions are met:
<> 156:95d6b41a828b 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 156:95d6b41a828b 14 * this list of conditions and the following disclaimer.
<> 156:95d6b41a828b 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 156:95d6b41a828b 16 * this list of conditions and the following disclaimer in the documentation
<> 156:95d6b41a828b 17 * and/or other materials provided with the distribution.
<> 156:95d6b41a828b 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 156:95d6b41a828b 19 * may be used to endorse or promote products derived from this software
<> 156:95d6b41a828b 20 * without specific prior written permission.
<> 156:95d6b41a828b 21 *
<> 156:95d6b41a828b 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 156:95d6b41a828b 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 156:95d6b41a828b 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 156:95d6b41a828b 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 156:95d6b41a828b 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 156:95d6b41a828b 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 156:95d6b41a828b 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 156:95d6b41a828b 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 156:95d6b41a828b 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 156:95d6b41a828b 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 156:95d6b41a828b 32 *
<> 156:95d6b41a828b 33 ******************************************************************************
<> 156:95d6b41a828b 34 */
<> 156:95d6b41a828b 35
<> 156:95d6b41a828b 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 156:95d6b41a828b 37 #ifndef __STM32F0xx_LL_IWDG_H
<> 156:95d6b41a828b 38 #define __STM32F0xx_LL_IWDG_H
<> 156:95d6b41a828b 39
<> 156:95d6b41a828b 40 #ifdef __cplusplus
<> 156:95d6b41a828b 41 extern "C" {
<> 156:95d6b41a828b 42 #endif
<> 156:95d6b41a828b 43
<> 156:95d6b41a828b 44 /* Includes ------------------------------------------------------------------*/
<> 156:95d6b41a828b 45 #include "stm32f0xx.h"
<> 156:95d6b41a828b 46
<> 156:95d6b41a828b 47 /** @addtogroup STM32F0xx_LL_Driver
<> 156:95d6b41a828b 48 * @{
<> 156:95d6b41a828b 49 */
<> 156:95d6b41a828b 50
<> 156:95d6b41a828b 51 #if defined(IWDG)
<> 156:95d6b41a828b 52
<> 156:95d6b41a828b 53 /** @defgroup IWDG_LL IWDG
<> 156:95d6b41a828b 54 * @{
<> 156:95d6b41a828b 55 */
<> 156:95d6b41a828b 56
<> 156:95d6b41a828b 57 /* Private types -------------------------------------------------------------*/
<> 156:95d6b41a828b 58 /* Private variables ---------------------------------------------------------*/
<> 156:95d6b41a828b 59
<> 156:95d6b41a828b 60 /* Private constants ---------------------------------------------------------*/
<> 156:95d6b41a828b 61 /** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
<> 156:95d6b41a828b 62 * @{
<> 156:95d6b41a828b 63 */
<> 156:95d6b41a828b 64
Anna Bridge 180:96ed750bd169 65 #define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */
Anna Bridge 180:96ed750bd169 66 #define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */
Anna Bridge 180:96ed750bd169 67 #define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */
Anna Bridge 180:96ed750bd169 68 #define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */
<> 156:95d6b41a828b 69
<> 156:95d6b41a828b 70 /**
<> 156:95d6b41a828b 71 * @}
<> 156:95d6b41a828b 72 */
<> 156:95d6b41a828b 73
<> 156:95d6b41a828b 74 /* Private macros ------------------------------------------------------------*/
<> 156:95d6b41a828b 75
<> 156:95d6b41a828b 76 /* Exported types ------------------------------------------------------------*/
<> 156:95d6b41a828b 77 /* Exported constants --------------------------------------------------------*/
<> 156:95d6b41a828b 78 /** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants
<> 156:95d6b41a828b 79 * @{
<> 156:95d6b41a828b 80 */
<> 156:95d6b41a828b 81
<> 156:95d6b41a828b 82 /** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines
<> 156:95d6b41a828b 83 * @brief Flags defines which can be used with LL_IWDG_ReadReg function
<> 156:95d6b41a828b 84 * @{
<> 156:95d6b41a828b 85 */
<> 156:95d6b41a828b 86 #define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */
<> 156:95d6b41a828b 87 #define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */
<> 156:95d6b41a828b 88 #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog counter window value update */
<> 156:95d6b41a828b 89
<> 156:95d6b41a828b 90 /**
<> 156:95d6b41a828b 91 * @}
<> 156:95d6b41a828b 92 */
<> 156:95d6b41a828b 93
<> 156:95d6b41a828b 94 /** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider
<> 156:95d6b41a828b 95 * @{
<> 156:95d6b41a828b 96 */
Anna Bridge 180:96ed750bd169 97 #define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */
<> 156:95d6b41a828b 98 #define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */
<> 156:95d6b41a828b 99 #define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */
<> 156:95d6b41a828b 100 #define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */
<> 156:95d6b41a828b 101 #define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */
<> 156:95d6b41a828b 102 #define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */
<> 156:95d6b41a828b 103 #define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */
<> 156:95d6b41a828b 104 /**
<> 156:95d6b41a828b 105 * @}
<> 156:95d6b41a828b 106 */
<> 156:95d6b41a828b 107
<> 156:95d6b41a828b 108 /**
<> 156:95d6b41a828b 109 * @}
<> 156:95d6b41a828b 110 */
<> 156:95d6b41a828b 111
<> 156:95d6b41a828b 112 /* Exported macro ------------------------------------------------------------*/
<> 156:95d6b41a828b 113 /** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros
<> 156:95d6b41a828b 114 * @{
<> 156:95d6b41a828b 115 */
<> 156:95d6b41a828b 116
<> 156:95d6b41a828b 117 /** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros
<> 156:95d6b41a828b 118 * @{
<> 156:95d6b41a828b 119 */
<> 156:95d6b41a828b 120
<> 156:95d6b41a828b 121 /**
<> 156:95d6b41a828b 122 * @brief Write a value in IWDG register
<> 156:95d6b41a828b 123 * @param __INSTANCE__ IWDG Instance
<> 156:95d6b41a828b 124 * @param __REG__ Register to be written
<> 156:95d6b41a828b 125 * @param __VALUE__ Value to be written in the register
<> 156:95d6b41a828b 126 * @retval None
<> 156:95d6b41a828b 127 */
<> 156:95d6b41a828b 128 #define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
<> 156:95d6b41a828b 129
<> 156:95d6b41a828b 130 /**
<> 156:95d6b41a828b 131 * @brief Read a value in IWDG register
<> 156:95d6b41a828b 132 * @param __INSTANCE__ IWDG Instance
<> 156:95d6b41a828b 133 * @param __REG__ Register to be read
<> 156:95d6b41a828b 134 * @retval Register value
<> 156:95d6b41a828b 135 */
<> 156:95d6b41a828b 136 #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
<> 156:95d6b41a828b 137 /**
<> 156:95d6b41a828b 138 * @}
<> 156:95d6b41a828b 139 */
<> 156:95d6b41a828b 140
<> 156:95d6b41a828b 141 /**
<> 156:95d6b41a828b 142 * @}
<> 156:95d6b41a828b 143 */
<> 156:95d6b41a828b 144
<> 156:95d6b41a828b 145
<> 156:95d6b41a828b 146 /* Exported functions --------------------------------------------------------*/
<> 156:95d6b41a828b 147 /** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions
<> 156:95d6b41a828b 148 * @{
<> 156:95d6b41a828b 149 */
<> 156:95d6b41a828b 150 /** @defgroup IWDG_LL_EF_Configuration Configuration
<> 156:95d6b41a828b 151 * @{
<> 156:95d6b41a828b 152 */
<> 156:95d6b41a828b 153
<> 156:95d6b41a828b 154 /**
<> 156:95d6b41a828b 155 * @brief Start the Independent Watchdog
<> 156:95d6b41a828b 156 * @note Except if the hardware watchdog option is selected
<> 156:95d6b41a828b 157 * @rmtoll KR KEY LL_IWDG_Enable
<> 156:95d6b41a828b 158 * @param IWDGx IWDG Instance
<> 156:95d6b41a828b 159 * @retval None
<> 156:95d6b41a828b 160 */
<> 156:95d6b41a828b 161 __STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
<> 156:95d6b41a828b 162 {
<> 156:95d6b41a828b 163 WRITE_REG(IWDG->KR, LL_IWDG_KEY_ENABLE);
<> 156:95d6b41a828b 164 }
<> 156:95d6b41a828b 165
<> 156:95d6b41a828b 166 /**
<> 156:95d6b41a828b 167 * @brief Reloads IWDG counter with value defined in the reload register
<> 156:95d6b41a828b 168 * @rmtoll KR KEY LL_IWDG_ReloadCounter
<> 156:95d6b41a828b 169 * @param IWDGx IWDG Instance
<> 156:95d6b41a828b 170 * @retval None
<> 156:95d6b41a828b 171 */
<> 156:95d6b41a828b 172 __STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
<> 156:95d6b41a828b 173 {
<> 156:95d6b41a828b 174 WRITE_REG(IWDG->KR, LL_IWDG_KEY_RELOAD);
<> 156:95d6b41a828b 175 }
<> 156:95d6b41a828b 176
<> 156:95d6b41a828b 177 /**
<> 156:95d6b41a828b 178 * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
<> 156:95d6b41a828b 179 * @rmtoll KR KEY LL_IWDG_EnableWriteAccess
<> 156:95d6b41a828b 180 * @param IWDGx IWDG Instance
<> 156:95d6b41a828b 181 * @retval None
<> 156:95d6b41a828b 182 */
<> 156:95d6b41a828b 183 __STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
<> 156:95d6b41a828b 184 {
<> 156:95d6b41a828b 185 WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
<> 156:95d6b41a828b 186 }
<> 156:95d6b41a828b 187
<> 156:95d6b41a828b 188 /**
<> 156:95d6b41a828b 189 * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
<> 156:95d6b41a828b 190 * @rmtoll KR KEY LL_IWDG_DisableWriteAccess
<> 156:95d6b41a828b 191 * @param IWDGx IWDG Instance
<> 156:95d6b41a828b 192 * @retval None
<> 156:95d6b41a828b 193 */
<> 156:95d6b41a828b 194 __STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
<> 156:95d6b41a828b 195 {
<> 156:95d6b41a828b 196 WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
<> 156:95d6b41a828b 197 }
<> 156:95d6b41a828b 198
<> 156:95d6b41a828b 199 /**
<> 156:95d6b41a828b 200 * @brief Select the prescaler of the IWDG
<> 156:95d6b41a828b 201 * @rmtoll PR PR LL_IWDG_SetPrescaler
<> 156:95d6b41a828b 202 * @param IWDGx IWDG Instance
<> 156:95d6b41a828b 203 * @param Prescaler This parameter can be one of the following values:
<> 156:95d6b41a828b 204 * @arg @ref LL_IWDG_PRESCALER_4
<> 156:95d6b41a828b 205 * @arg @ref LL_IWDG_PRESCALER_8
<> 156:95d6b41a828b 206 * @arg @ref LL_IWDG_PRESCALER_16
<> 156:95d6b41a828b 207 * @arg @ref LL_IWDG_PRESCALER_32
<> 156:95d6b41a828b 208 * @arg @ref LL_IWDG_PRESCALER_64
<> 156:95d6b41a828b 209 * @arg @ref LL_IWDG_PRESCALER_128
<> 156:95d6b41a828b 210 * @arg @ref LL_IWDG_PRESCALER_256
<> 156:95d6b41a828b 211 * @retval None
<> 156:95d6b41a828b 212 */
<> 156:95d6b41a828b 213 __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
<> 156:95d6b41a828b 214 {
<> 156:95d6b41a828b 215 WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
<> 156:95d6b41a828b 216 }
<> 156:95d6b41a828b 217
<> 156:95d6b41a828b 218 /**
<> 156:95d6b41a828b 219 * @brief Get the selected prescaler of the IWDG
<> 156:95d6b41a828b 220 * @rmtoll PR PR LL_IWDG_GetPrescaler
<> 156:95d6b41a828b 221 * @param IWDGx IWDG Instance
<> 156:95d6b41a828b 222 * @retval Returned value can be one of the following values:
<> 156:95d6b41a828b 223 * @arg @ref LL_IWDG_PRESCALER_4
<> 156:95d6b41a828b 224 * @arg @ref LL_IWDG_PRESCALER_8
<> 156:95d6b41a828b 225 * @arg @ref LL_IWDG_PRESCALER_16
<> 156:95d6b41a828b 226 * @arg @ref LL_IWDG_PRESCALER_32
<> 156:95d6b41a828b 227 * @arg @ref LL_IWDG_PRESCALER_64
<> 156:95d6b41a828b 228 * @arg @ref LL_IWDG_PRESCALER_128
<> 156:95d6b41a828b 229 * @arg @ref LL_IWDG_PRESCALER_256
<> 156:95d6b41a828b 230 */
<> 156:95d6b41a828b 231 __STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
<> 156:95d6b41a828b 232 {
<> 156:95d6b41a828b 233 return (uint32_t)(READ_REG(IWDGx->PR));
<> 156:95d6b41a828b 234 }
<> 156:95d6b41a828b 235
<> 156:95d6b41a828b 236 /**
<> 156:95d6b41a828b 237 * @brief Specify the IWDG down-counter reload value
<> 156:95d6b41a828b 238 * @rmtoll RLR RL LL_IWDG_SetReloadCounter
<> 156:95d6b41a828b 239 * @param IWDGx IWDG Instance
<> 156:95d6b41a828b 240 * @param Counter Value between Min_Data=0 and Max_Data=0x0FFF
<> 156:95d6b41a828b 241 * @retval None
<> 156:95d6b41a828b 242 */
<> 156:95d6b41a828b 243 __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
<> 156:95d6b41a828b 244 {
<> 156:95d6b41a828b 245 WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
<> 156:95d6b41a828b 246 }
<> 156:95d6b41a828b 247
<> 156:95d6b41a828b 248 /**
<> 156:95d6b41a828b 249 * @brief Get the specified IWDG down-counter reload value
<> 156:95d6b41a828b 250 * @rmtoll RLR RL LL_IWDG_GetReloadCounter
<> 156:95d6b41a828b 251 * @param IWDGx IWDG Instance
<> 156:95d6b41a828b 252 * @retval Value between Min_Data=0 and Max_Data=0x0FFF
<> 156:95d6b41a828b 253 */
<> 156:95d6b41a828b 254 __STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
<> 156:95d6b41a828b 255 {
<> 156:95d6b41a828b 256 return (uint32_t)(READ_REG(IWDGx->RLR));
<> 156:95d6b41a828b 257 }
<> 156:95d6b41a828b 258
<> 156:95d6b41a828b 259 /**
<> 156:95d6b41a828b 260 * @brief Specify high limit of the window value to be compared to the down-counter.
<> 156:95d6b41a828b 261 * @rmtoll WINR WIN LL_IWDG_SetWindow
<> 156:95d6b41a828b 262 * @param IWDGx IWDG Instance
<> 156:95d6b41a828b 263 * @param Window Value between Min_Data=0 and Max_Data=0x0FFF
<> 156:95d6b41a828b 264 * @retval None
<> 156:95d6b41a828b 265 */
<> 156:95d6b41a828b 266 __STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window)
<> 156:95d6b41a828b 267 {
<> 156:95d6b41a828b 268 WRITE_REG(IWDGx->WINR, IWDG_WINR_WIN & Window);
<> 156:95d6b41a828b 269 }
<> 156:95d6b41a828b 270
<> 156:95d6b41a828b 271 /**
<> 156:95d6b41a828b 272 * @brief Get the high limit of the window value specified.
<> 156:95d6b41a828b 273 * @rmtoll WINR WIN LL_IWDG_GetWindow
<> 156:95d6b41a828b 274 * @param IWDGx IWDG Instance
<> 156:95d6b41a828b 275 * @retval Value between Min_Data=0 and Max_Data=0x0FFF
<> 156:95d6b41a828b 276 */
<> 156:95d6b41a828b 277 __STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx)
<> 156:95d6b41a828b 278 {
<> 156:95d6b41a828b 279 return (uint32_t)(READ_REG(IWDGx->WINR));
<> 156:95d6b41a828b 280 }
<> 156:95d6b41a828b 281
<> 156:95d6b41a828b 282 /**
<> 156:95d6b41a828b 283 * @}
<> 156:95d6b41a828b 284 */
<> 156:95d6b41a828b 285
<> 156:95d6b41a828b 286 /** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management
<> 156:95d6b41a828b 287 * @{
<> 156:95d6b41a828b 288 */
<> 156:95d6b41a828b 289
<> 156:95d6b41a828b 290 /**
<> 156:95d6b41a828b 291 * @brief Check if flag Prescaler Value Update is set or not
<> 156:95d6b41a828b 292 * @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU
<> 156:95d6b41a828b 293 * @param IWDGx IWDG Instance
<> 156:95d6b41a828b 294 * @retval State of bit (1 or 0).
<> 156:95d6b41a828b 295 */
<> 156:95d6b41a828b 296 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
<> 156:95d6b41a828b 297 {
<> 156:95d6b41a828b 298 return (READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU));
<> 156:95d6b41a828b 299 }
<> 156:95d6b41a828b 300
<> 156:95d6b41a828b 301 /**
<> 156:95d6b41a828b 302 * @brief Check if flag Reload Value Update is set or not
<> 156:95d6b41a828b 303 * @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU
<> 156:95d6b41a828b 304 * @param IWDGx IWDG Instance
<> 156:95d6b41a828b 305 * @retval State of bit (1 or 0).
<> 156:95d6b41a828b 306 */
<> 156:95d6b41a828b 307 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
<> 156:95d6b41a828b 308 {
<> 156:95d6b41a828b 309 return (READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU));
<> 156:95d6b41a828b 310 }
<> 156:95d6b41a828b 311
<> 156:95d6b41a828b 312 /**
<> 156:95d6b41a828b 313 * @brief Check if flag Window Value Update is set or not
<> 156:95d6b41a828b 314 * @rmtoll SR WVU LL_IWDG_IsActiveFlag_WVU
<> 156:95d6b41a828b 315 * @param IWDGx IWDG Instance
<> 156:95d6b41a828b 316 * @retval State of bit (1 or 0).
<> 156:95d6b41a828b 317 */
<> 156:95d6b41a828b 318 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx)
<> 156:95d6b41a828b 319 {
<> 156:95d6b41a828b 320 return (READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU));
<> 156:95d6b41a828b 321 }
<> 156:95d6b41a828b 322
<> 156:95d6b41a828b 323 /**
<> 156:95d6b41a828b 324 * @brief Check if all flags Prescaler, Reload & Window Value Update are reset or not
<> 156:95d6b41a828b 325 * @rmtoll SR PVU LL_IWDG_IsReady\n
<> 156:95d6b41a828b 326 * SR WVU LL_IWDG_IsReady\n
<> 156:95d6b41a828b 327 * SR RVU LL_IWDG_IsReady
<> 156:95d6b41a828b 328 * @param IWDGx IWDG Instance
<> 156:95d6b41a828b 329 * @retval State of bits (1 or 0).
<> 156:95d6b41a828b 330 */
<> 156:95d6b41a828b 331 __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
<> 156:95d6b41a828b 332 {
<> 156:95d6b41a828b 333 return (READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U);
<> 156:95d6b41a828b 334 }
<> 156:95d6b41a828b 335
<> 156:95d6b41a828b 336 /**
<> 156:95d6b41a828b 337 * @}
<> 156:95d6b41a828b 338 */
<> 156:95d6b41a828b 339
<> 156:95d6b41a828b 340
<> 156:95d6b41a828b 341 /**
<> 156:95d6b41a828b 342 * @}
<> 156:95d6b41a828b 343 */
<> 156:95d6b41a828b 344
<> 156:95d6b41a828b 345 /**
<> 156:95d6b41a828b 346 * @}
<> 156:95d6b41a828b 347 */
<> 156:95d6b41a828b 348
<> 156:95d6b41a828b 349 #endif /* IWDG) */
<> 156:95d6b41a828b 350
<> 156:95d6b41a828b 351 /**
<> 156:95d6b41a828b 352 * @}
<> 156:95d6b41a828b 353 */
<> 156:95d6b41a828b 354
<> 156:95d6b41a828b 355 #ifdef __cplusplus
<> 156:95d6b41a828b 356 }
<> 156:95d6b41a828b 357 #endif
<> 156:95d6b41a828b 358
<> 156:95d6b41a828b 359 #endif /* __STM32F0xx_LL_IWDG_H */
<> 156:95d6b41a828b 360
<> 156:95d6b41a828b 361 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/