mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_ll_i2c.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
180:96ed750bd169 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 156:95d6b41a828b 1 /**
<> 156:95d6b41a828b 2 ******************************************************************************
<> 156:95d6b41a828b 3 * @file stm32f0xx_ll_i2c.c
<> 156:95d6b41a828b 4 * @author MCD Application Team
<> 156:95d6b41a828b 5 * @brief I2C LL module driver.
<> 156:95d6b41a828b 6 ******************************************************************************
<> 156:95d6b41a828b 7 * @attention
<> 156:95d6b41a828b 8 *
<> 156:95d6b41a828b 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 156:95d6b41a828b 10 *
<> 156:95d6b41a828b 11 * Redistribution and use in source and binary forms, with or without modification,
<> 156:95d6b41a828b 12 * are permitted provided that the following conditions are met:
<> 156:95d6b41a828b 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 156:95d6b41a828b 14 * this list of conditions and the following disclaimer.
<> 156:95d6b41a828b 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 156:95d6b41a828b 16 * this list of conditions and the following disclaimer in the documentation
<> 156:95d6b41a828b 17 * and/or other materials provided with the distribution.
<> 156:95d6b41a828b 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 156:95d6b41a828b 19 * may be used to endorse or promote products derived from this software
<> 156:95d6b41a828b 20 * without specific prior written permission.
<> 156:95d6b41a828b 21 *
<> 156:95d6b41a828b 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 156:95d6b41a828b 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 156:95d6b41a828b 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 156:95d6b41a828b 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 156:95d6b41a828b 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 156:95d6b41a828b 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 156:95d6b41a828b 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 156:95d6b41a828b 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 156:95d6b41a828b 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 156:95d6b41a828b 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 156:95d6b41a828b 32 *
<> 156:95d6b41a828b 33 ******************************************************************************
<> 156:95d6b41a828b 34 */
<> 156:95d6b41a828b 35 #if defined(USE_FULL_LL_DRIVER)
<> 156:95d6b41a828b 36
<> 156:95d6b41a828b 37 /* Includes ------------------------------------------------------------------*/
<> 156:95d6b41a828b 38 #include "stm32f0xx_ll_i2c.h"
<> 156:95d6b41a828b 39 #include "stm32f0xx_ll_bus.h"
<> 156:95d6b41a828b 40 #ifdef USE_FULL_ASSERT
<> 156:95d6b41a828b 41 #include "stm32_assert.h"
<> 156:95d6b41a828b 42 #else
<> 156:95d6b41a828b 43 #define assert_param(expr) ((void)0U)
<> 156:95d6b41a828b 44 #endif
<> 156:95d6b41a828b 45
<> 156:95d6b41a828b 46 /** @addtogroup STM32F0xx_LL_Driver
<> 156:95d6b41a828b 47 * @{
<> 156:95d6b41a828b 48 */
<> 156:95d6b41a828b 49
<> 156:95d6b41a828b 50 #if defined (I2C1) || defined (I2C2)
<> 156:95d6b41a828b 51
<> 156:95d6b41a828b 52 /** @defgroup I2C_LL I2C
<> 156:95d6b41a828b 53 * @{
<> 156:95d6b41a828b 54 */
<> 156:95d6b41a828b 55
<> 156:95d6b41a828b 56 /* Private types -------------------------------------------------------------*/
<> 156:95d6b41a828b 57 /* Private variables ---------------------------------------------------------*/
<> 156:95d6b41a828b 58 /* Private constants ---------------------------------------------------------*/
<> 156:95d6b41a828b 59 /* Private macros ------------------------------------------------------------*/
<> 156:95d6b41a828b 60 /** @addtogroup I2C_LL_Private_Macros
<> 156:95d6b41a828b 61 * @{
<> 156:95d6b41a828b 62 */
<> 156:95d6b41a828b 63
<> 156:95d6b41a828b 64 #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \
<> 156:95d6b41a828b 65 ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \
<> 156:95d6b41a828b 66 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \
<> 156:95d6b41a828b 67 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP))
<> 156:95d6b41a828b 68
<> 156:95d6b41a828b 69 #define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \
<> 156:95d6b41a828b 70 ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE))
<> 156:95d6b41a828b 71
<> 156:95d6b41a828b 72 #define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU)
<> 156:95d6b41a828b 73
Anna Bridge 180:96ed750bd169 74 #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU)
<> 156:95d6b41a828b 75
<> 156:95d6b41a828b 76 #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \
<> 156:95d6b41a828b 77 ((__VALUE__) == LL_I2C_NACK))
<> 156:95d6b41a828b 78
<> 156:95d6b41a828b 79 #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \
<> 156:95d6b41a828b 80 ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT))
<> 156:95d6b41a828b 81 /**
<> 156:95d6b41a828b 82 * @}
<> 156:95d6b41a828b 83 */
<> 156:95d6b41a828b 84
<> 156:95d6b41a828b 85 /* Private function prototypes -----------------------------------------------*/
<> 156:95d6b41a828b 86
<> 156:95d6b41a828b 87 /* Exported functions --------------------------------------------------------*/
<> 156:95d6b41a828b 88 /** @addtogroup I2C_LL_Exported_Functions
<> 156:95d6b41a828b 89 * @{
<> 156:95d6b41a828b 90 */
<> 156:95d6b41a828b 91
<> 156:95d6b41a828b 92 /** @addtogroup I2C_LL_EF_Init
<> 156:95d6b41a828b 93 * @{
<> 156:95d6b41a828b 94 */
<> 156:95d6b41a828b 95
<> 156:95d6b41a828b 96 /**
<> 156:95d6b41a828b 97 * @brief De-initialize the I2C registers to their default reset values.
<> 156:95d6b41a828b 98 * @param I2Cx I2C Instance.
<> 156:95d6b41a828b 99 * @retval An ErrorStatus enumeration value:
<> 156:95d6b41a828b 100 * - SUCCESS: I2C registers are de-initialized
<> 156:95d6b41a828b 101 * - ERROR: I2C registers are not de-initialized
<> 156:95d6b41a828b 102 */
<> 156:95d6b41a828b 103 uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx)
<> 156:95d6b41a828b 104 {
<> 156:95d6b41a828b 105 ErrorStatus status = SUCCESS;
<> 156:95d6b41a828b 106
<> 156:95d6b41a828b 107 /* Check the I2C Instance I2Cx */
<> 156:95d6b41a828b 108 assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
<> 156:95d6b41a828b 109
<> 156:95d6b41a828b 110 if (I2Cx == I2C1)
<> 156:95d6b41a828b 111 {
<> 156:95d6b41a828b 112 /* Force reset of I2C clock */
<> 156:95d6b41a828b 113 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1);
<> 156:95d6b41a828b 114
<> 156:95d6b41a828b 115 /* Release reset of I2C clock */
<> 156:95d6b41a828b 116 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1);
<> 156:95d6b41a828b 117 }
<> 156:95d6b41a828b 118 #if defined(I2C2)
<> 156:95d6b41a828b 119 else if (I2Cx == I2C2)
<> 156:95d6b41a828b 120 {
<> 156:95d6b41a828b 121 /* Force reset of I2C clock */
<> 156:95d6b41a828b 122 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2);
<> 156:95d6b41a828b 123
<> 156:95d6b41a828b 124 /* Release reset of I2C clock */
<> 156:95d6b41a828b 125 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2);
<> 156:95d6b41a828b 126
<> 156:95d6b41a828b 127 }
<> 156:95d6b41a828b 128 #endif
<> 156:95d6b41a828b 129 else
<> 156:95d6b41a828b 130 {
<> 156:95d6b41a828b 131 status = ERROR;
<> 156:95d6b41a828b 132 }
<> 156:95d6b41a828b 133
<> 156:95d6b41a828b 134 return status;
<> 156:95d6b41a828b 135 }
<> 156:95d6b41a828b 136
<> 156:95d6b41a828b 137 /**
<> 156:95d6b41a828b 138 * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct.
<> 156:95d6b41a828b 139 * @param I2Cx I2C Instance.
<> 156:95d6b41a828b 140 * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure.
<> 156:95d6b41a828b 141 * @retval An ErrorStatus enumeration value:
<> 156:95d6b41a828b 142 * - SUCCESS: I2C registers are initialized
<> 156:95d6b41a828b 143 * - ERROR: Not applicable
<> 156:95d6b41a828b 144 */
<> 156:95d6b41a828b 145 uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct)
<> 156:95d6b41a828b 146 {
<> 156:95d6b41a828b 147 /* Check the I2C Instance I2Cx */
<> 156:95d6b41a828b 148 assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
<> 156:95d6b41a828b 149
<> 156:95d6b41a828b 150 /* Check the I2C parameters from I2C_InitStruct */
<> 156:95d6b41a828b 151 assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode));
<> 156:95d6b41a828b 152 assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter));
<> 156:95d6b41a828b 153 assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter));
<> 156:95d6b41a828b 154 assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
<> 156:95d6b41a828b 155 assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
<> 156:95d6b41a828b 156 assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
<> 156:95d6b41a828b 157
<> 156:95d6b41a828b 158 /* Disable the selected I2Cx Peripheral */
<> 156:95d6b41a828b 159 LL_I2C_Disable(I2Cx);
<> 156:95d6b41a828b 160
<> 156:95d6b41a828b 161 /*---------------------------- I2Cx CR1 Configuration ------------------------
<> 156:95d6b41a828b 162 * Configure the analog and digital noise filters with parameters :
<> 156:95d6b41a828b 163 * - AnalogFilter: I2C_CR1_ANFOFF bit
<> 156:95d6b41a828b 164 * - DigitalFilter: I2C_CR1_DNF[3:0] bits
<> 156:95d6b41a828b 165 */
<> 156:95d6b41a828b 166 LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter);
<> 156:95d6b41a828b 167
<> 156:95d6b41a828b 168 /*---------------------------- I2Cx TIMINGR Configuration --------------------
<> 156:95d6b41a828b 169 * Configure the SDA setup, hold time and the SCL high, low period with parameter :
<> 156:95d6b41a828b 170 * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0],
<> 156:95d6b41a828b 171 * I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits
<> 156:95d6b41a828b 172 */
<> 156:95d6b41a828b 173 LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing);
<> 156:95d6b41a828b 174
<> 156:95d6b41a828b 175 /* Enable the selected I2Cx Peripheral */
<> 156:95d6b41a828b 176 LL_I2C_Enable(I2Cx);
<> 156:95d6b41a828b 177
<> 156:95d6b41a828b 178 /*---------------------------- I2Cx OAR1 Configuration -----------------------
<> 156:95d6b41a828b 179 * Disable, Configure and Enable I2Cx device own address 1 with parameters :
<> 156:95d6b41a828b 180 * - OwnAddress1: I2C_OAR1_OA1[9:0] bits
<> 156:95d6b41a828b 181 * - OwnAddrSize: I2C_OAR1_OA1MODE bit
<> 156:95d6b41a828b 182 */
<> 156:95d6b41a828b 183 LL_I2C_DisableOwnAddress1(I2Cx);
<> 156:95d6b41a828b 184 LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
Anna Bridge 180:96ed750bd169 185
Anna Bridge 180:96ed750bd169 186 /* OwnAdress1 == 0 is reserved for General Call address */
Anna Bridge 180:96ed750bd169 187 if (I2C_InitStruct->OwnAddress1 != 0U)
Anna Bridge 180:96ed750bd169 188 {
Anna Bridge 180:96ed750bd169 189 LL_I2C_EnableOwnAddress1(I2Cx);
Anna Bridge 180:96ed750bd169 190 }
<> 156:95d6b41a828b 191
<> 156:95d6b41a828b 192 /*---------------------------- I2Cx MODE Configuration -----------------------
<> 156:95d6b41a828b 193 * Configure I2Cx peripheral mode with parameter :
<> 156:95d6b41a828b 194 * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits
<> 156:95d6b41a828b 195 */
<> 156:95d6b41a828b 196 LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
<> 156:95d6b41a828b 197
<> 156:95d6b41a828b 198 /*---------------------------- I2Cx CR2 Configuration ------------------------
<> 156:95d6b41a828b 199 * Configure the ACKnowledge or Non ACKnowledge condition
<> 156:95d6b41a828b 200 * after the address receive match code or next received byte with parameter :
<> 156:95d6b41a828b 201 * - TypeAcknowledge: I2C_CR2_NACK bit
<> 156:95d6b41a828b 202 */
<> 156:95d6b41a828b 203 LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
<> 156:95d6b41a828b 204
<> 156:95d6b41a828b 205 return SUCCESS;
<> 156:95d6b41a828b 206 }
<> 156:95d6b41a828b 207
<> 156:95d6b41a828b 208 /**
<> 156:95d6b41a828b 209 * @brief Set each @ref LL_I2C_InitTypeDef field to default value.
<> 156:95d6b41a828b 210 * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure.
<> 156:95d6b41a828b 211 * @retval None
<> 156:95d6b41a828b 212 */
<> 156:95d6b41a828b 213 void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct)
<> 156:95d6b41a828b 214 {
<> 156:95d6b41a828b 215 /* Set I2C_InitStruct fields to default values */
<> 156:95d6b41a828b 216 I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C;
<> 156:95d6b41a828b 217 I2C_InitStruct->Timing = 0U;
<> 156:95d6b41a828b 218 I2C_InitStruct->AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
<> 156:95d6b41a828b 219 I2C_InitStruct->DigitalFilter = 0U;
<> 156:95d6b41a828b 220 I2C_InitStruct->OwnAddress1 = 0U;
<> 156:95d6b41a828b 221 I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK;
<> 156:95d6b41a828b 222 I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
<> 156:95d6b41a828b 223 }
<> 156:95d6b41a828b 224
<> 156:95d6b41a828b 225 /**
<> 156:95d6b41a828b 226 * @}
<> 156:95d6b41a828b 227 */
<> 156:95d6b41a828b 228
<> 156:95d6b41a828b 229 /**
<> 156:95d6b41a828b 230 * @}
<> 156:95d6b41a828b 231 */
<> 156:95d6b41a828b 232
<> 156:95d6b41a828b 233 /**
<> 156:95d6b41a828b 234 * @}
<> 156:95d6b41a828b 235 */
<> 156:95d6b41a828b 236
<> 156:95d6b41a828b 237 #endif /* I2C1 || I2C2 */
<> 156:95d6b41a828b 238
<> 156:95d6b41a828b 239 /**
<> 156:95d6b41a828b 240 * @}
<> 156:95d6b41a828b 241 */
<> 156:95d6b41a828b 242
<> 156:95d6b41a828b 243 #endif /* USE_FULL_LL_DRIVER */
<> 156:95d6b41a828b 244
<> 156:95d6b41a828b 245 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/