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targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_ll_exti.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
180:96ed750bd169 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 156:95d6b41a828b 1 /**
<> 156:95d6b41a828b 2 ******************************************************************************
<> 156:95d6b41a828b 3 * @file stm32f0xx_ll_exti.h
<> 156:95d6b41a828b 4 * @author MCD Application Team
<> 156:95d6b41a828b 5 * @brief Header file of EXTI LL module.
<> 156:95d6b41a828b 6 ******************************************************************************
<> 156:95d6b41a828b 7 * @attention
<> 156:95d6b41a828b 8 *
<> 156:95d6b41a828b 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 156:95d6b41a828b 10 *
<> 156:95d6b41a828b 11 * Redistribution and use in source and binary forms, with or without modification,
<> 156:95d6b41a828b 12 * are permitted provided that the following conditions are met:
<> 156:95d6b41a828b 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 156:95d6b41a828b 14 * this list of conditions and the following disclaimer.
<> 156:95d6b41a828b 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 156:95d6b41a828b 16 * this list of conditions and the following disclaimer in the documentation
<> 156:95d6b41a828b 17 * and/or other materials provided with the distribution.
<> 156:95d6b41a828b 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 156:95d6b41a828b 19 * may be used to endorse or promote products derived from this software
<> 156:95d6b41a828b 20 * without specific prior written permission.
<> 156:95d6b41a828b 21 *
<> 156:95d6b41a828b 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 156:95d6b41a828b 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 156:95d6b41a828b 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 156:95d6b41a828b 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 156:95d6b41a828b 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 156:95d6b41a828b 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 156:95d6b41a828b 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 156:95d6b41a828b 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 156:95d6b41a828b 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 156:95d6b41a828b 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 156:95d6b41a828b 32 *
<> 156:95d6b41a828b 33 ******************************************************************************
<> 156:95d6b41a828b 34 */
<> 156:95d6b41a828b 35
<> 156:95d6b41a828b 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 156:95d6b41a828b 37 #ifndef __STM32F0xx_LL_EXTI_H
<> 156:95d6b41a828b 38 #define __STM32F0xx_LL_EXTI_H
<> 156:95d6b41a828b 39
<> 156:95d6b41a828b 40 #ifdef __cplusplus
<> 156:95d6b41a828b 41 extern "C" {
<> 156:95d6b41a828b 42 #endif
<> 156:95d6b41a828b 43
<> 156:95d6b41a828b 44 /* Includes ------------------------------------------------------------------*/
<> 156:95d6b41a828b 45 #include "stm32f0xx.h"
<> 156:95d6b41a828b 46
<> 156:95d6b41a828b 47 /** @addtogroup STM32F0xx_LL_Driver
<> 156:95d6b41a828b 48 * @{
<> 156:95d6b41a828b 49 */
<> 156:95d6b41a828b 50
<> 156:95d6b41a828b 51 #if defined (EXTI)
<> 156:95d6b41a828b 52
<> 156:95d6b41a828b 53 /** @defgroup EXTI_LL EXTI
<> 156:95d6b41a828b 54 * @{
<> 156:95d6b41a828b 55 */
<> 156:95d6b41a828b 56
<> 156:95d6b41a828b 57 /* Private types -------------------------------------------------------------*/
<> 156:95d6b41a828b 58 /* Private variables ---------------------------------------------------------*/
<> 156:95d6b41a828b 59 /* Private constants ---------------------------------------------------------*/
<> 156:95d6b41a828b 60 /* Private Macros ------------------------------------------------------------*/
<> 156:95d6b41a828b 61 #if defined(USE_FULL_LL_DRIVER)
<> 156:95d6b41a828b 62 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
<> 156:95d6b41a828b 63 * @{
<> 156:95d6b41a828b 64 */
<> 156:95d6b41a828b 65 /**
<> 156:95d6b41a828b 66 * @}
<> 156:95d6b41a828b 67 */
<> 156:95d6b41a828b 68 #endif /*USE_FULL_LL_DRIVER*/
<> 156:95d6b41a828b 69 /* Exported types ------------------------------------------------------------*/
<> 156:95d6b41a828b 70 #if defined(USE_FULL_LL_DRIVER)
<> 156:95d6b41a828b 71 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
<> 156:95d6b41a828b 72 * @{
<> 156:95d6b41a828b 73 */
<> 156:95d6b41a828b 74 typedef struct
<> 156:95d6b41a828b 75 {
<> 156:95d6b41a828b 76
<> 156:95d6b41a828b 77 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
<> 156:95d6b41a828b 78 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
<> 156:95d6b41a828b 79
<> 156:95d6b41a828b 80 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
<> 156:95d6b41a828b 81 This parameter can be set either to ENABLE or DISABLE */
<> 156:95d6b41a828b 82
<> 156:95d6b41a828b 83 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
<> 156:95d6b41a828b 84 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
<> 156:95d6b41a828b 85
<> 156:95d6b41a828b 86 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
<> 156:95d6b41a828b 87 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
<> 156:95d6b41a828b 88 } LL_EXTI_InitTypeDef;
<> 156:95d6b41a828b 89
<> 156:95d6b41a828b 90 /**
<> 156:95d6b41a828b 91 * @}
<> 156:95d6b41a828b 92 */
<> 156:95d6b41a828b 93 #endif /*USE_FULL_LL_DRIVER*/
<> 156:95d6b41a828b 94
<> 156:95d6b41a828b 95 /* Exported constants --------------------------------------------------------*/
<> 156:95d6b41a828b 96 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
<> 156:95d6b41a828b 97 * @{
<> 156:95d6b41a828b 98 */
<> 156:95d6b41a828b 99
<> 156:95d6b41a828b 100 /** @defgroup EXTI_LL_EC_LINE LINE
<> 156:95d6b41a828b 101 * @{
<> 156:95d6b41a828b 102 */
<> 156:95d6b41a828b 103 #define LL_EXTI_LINE_0 EXTI_IMR_IM0 /*!< Extended line 0 */
<> 156:95d6b41a828b 104 #define LL_EXTI_LINE_1 EXTI_IMR_IM1 /*!< Extended line 1 */
<> 156:95d6b41a828b 105 #define LL_EXTI_LINE_2 EXTI_IMR_IM2 /*!< Extended line 2 */
<> 156:95d6b41a828b 106 #define LL_EXTI_LINE_3 EXTI_IMR_IM3 /*!< Extended line 3 */
<> 156:95d6b41a828b 107 #define LL_EXTI_LINE_4 EXTI_IMR_IM4 /*!< Extended line 4 */
<> 156:95d6b41a828b 108 #define LL_EXTI_LINE_5 EXTI_IMR_IM5 /*!< Extended line 5 */
<> 156:95d6b41a828b 109 #define LL_EXTI_LINE_6 EXTI_IMR_IM6 /*!< Extended line 6 */
<> 156:95d6b41a828b 110 #define LL_EXTI_LINE_7 EXTI_IMR_IM7 /*!< Extended line 7 */
<> 156:95d6b41a828b 111 #define LL_EXTI_LINE_8 EXTI_IMR_IM8 /*!< Extended line 8 */
<> 156:95d6b41a828b 112 #define LL_EXTI_LINE_9 EXTI_IMR_IM9 /*!< Extended line 9 */
<> 156:95d6b41a828b 113 #define LL_EXTI_LINE_10 EXTI_IMR_IM10 /*!< Extended line 10 */
<> 156:95d6b41a828b 114 #define LL_EXTI_LINE_11 EXTI_IMR_IM11 /*!< Extended line 11 */
<> 156:95d6b41a828b 115 #define LL_EXTI_LINE_12 EXTI_IMR_IM12 /*!< Extended line 12 */
<> 156:95d6b41a828b 116 #define LL_EXTI_LINE_13 EXTI_IMR_IM13 /*!< Extended line 13 */
<> 156:95d6b41a828b 117 #define LL_EXTI_LINE_14 EXTI_IMR_IM14 /*!< Extended line 14 */
<> 156:95d6b41a828b 118 #define LL_EXTI_LINE_15 EXTI_IMR_IM15 /*!< Extended line 15 */
<> 156:95d6b41a828b 119 #if defined(EXTI_IMR_IM16)
<> 156:95d6b41a828b 120 #define LL_EXTI_LINE_16 EXTI_IMR_IM16 /*!< Extended line 16 */
<> 156:95d6b41a828b 121 #endif
<> 156:95d6b41a828b 122 #define LL_EXTI_LINE_17 EXTI_IMR_IM17 /*!< Extended line 17 */
Anna Bridge 180:96ed750bd169 123 #if defined(EXTI_IMR_IM18)
<> 156:95d6b41a828b 124 #define LL_EXTI_LINE_18 EXTI_IMR_IM18 /*!< Extended line 18 */
Anna Bridge 180:96ed750bd169 125 #endif
<> 156:95d6b41a828b 126 #define LL_EXTI_LINE_19 EXTI_IMR_IM19 /*!< Extended line 19 */
<> 156:95d6b41a828b 127 #if defined(EXTI_IMR_IM20)
<> 156:95d6b41a828b 128 #define LL_EXTI_LINE_20 EXTI_IMR_IM20 /*!< Extended line 20 */
<> 156:95d6b41a828b 129 #endif
<> 156:95d6b41a828b 130 #if defined(EXTI_IMR_IM21)
<> 156:95d6b41a828b 131 #define LL_EXTI_LINE_21 EXTI_IMR_IM21 /*!< Extended line 21 */
<> 156:95d6b41a828b 132 #endif
<> 156:95d6b41a828b 133 #if defined(EXTI_IMR_IM22)
<> 156:95d6b41a828b 134 #define LL_EXTI_LINE_22 EXTI_IMR_IM22 /*!< Extended line 22 */
<> 156:95d6b41a828b 135 #endif
<> 156:95d6b41a828b 136 #define LL_EXTI_LINE_23 EXTI_IMR_IM23 /*!< Extended line 23 */
<> 156:95d6b41a828b 137 #if defined(EXTI_IMR_IM24)
<> 156:95d6b41a828b 138 #define LL_EXTI_LINE_24 EXTI_IMR_IM24 /*!< Extended line 24 */
<> 156:95d6b41a828b 139 #endif
<> 156:95d6b41a828b 140 #if defined(EXTI_IMR_IM25)
<> 156:95d6b41a828b 141 #define LL_EXTI_LINE_25 EXTI_IMR_IM25 /*!< Extended line 25 */
<> 156:95d6b41a828b 142 #endif
<> 156:95d6b41a828b 143 #if defined(EXTI_IMR_IM26)
<> 156:95d6b41a828b 144 #define LL_EXTI_LINE_26 EXTI_IMR_IM26 /*!< Extended line 26 */
<> 156:95d6b41a828b 145 #endif
<> 156:95d6b41a828b 146 #if defined(EXTI_IMR_IM27)
<> 156:95d6b41a828b 147 #define LL_EXTI_LINE_27 EXTI_IMR_IM27 /*!< Extended line 27 */
<> 156:95d6b41a828b 148 #endif
<> 156:95d6b41a828b 149 #if defined(EXTI_IMR_IM28)
<> 156:95d6b41a828b 150 #define LL_EXTI_LINE_28 EXTI_IMR_IM28 /*!< Extended line 28 */
<> 156:95d6b41a828b 151 #endif
<> 156:95d6b41a828b 152 #if defined(EXTI_IMR_IM29)
<> 156:95d6b41a828b 153 #define LL_EXTI_LINE_29 EXTI_IMR_IM29 /*!< Extended line 29 */
<> 156:95d6b41a828b 154 #endif
<> 156:95d6b41a828b 155 #if defined(EXTI_IMR_IM30)
<> 156:95d6b41a828b 156 #define LL_EXTI_LINE_30 EXTI_IMR_IM30 /*!< Extended line 30 */
<> 156:95d6b41a828b 157 #endif
<> 156:95d6b41a828b 158 #if defined(EXTI_IMR_IM31)
<> 156:95d6b41a828b 159 #define LL_EXTI_LINE_31 EXTI_IMR_IM31 /*!< Extended line 31 */
<> 156:95d6b41a828b 160 #endif
<> 156:95d6b41a828b 161 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR_IM /*!< All Extended line not reserved*/
<> 156:95d6b41a828b 162
<> 156:95d6b41a828b 163
Anna Bridge 180:96ed750bd169 164 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */
<> 156:95d6b41a828b 165
<> 156:95d6b41a828b 166 #if defined(USE_FULL_LL_DRIVER)
Anna Bridge 180:96ed750bd169 167 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */
<> 156:95d6b41a828b 168 #endif /*USE_FULL_LL_DRIVER*/
<> 156:95d6b41a828b 169
<> 156:95d6b41a828b 170 /**
<> 156:95d6b41a828b 171 * @}
<> 156:95d6b41a828b 172 */
<> 156:95d6b41a828b 173 #if defined(USE_FULL_LL_DRIVER)
<> 156:95d6b41a828b 174
<> 156:95d6b41a828b 175 /** @defgroup EXTI_LL_EC_MODE Mode
<> 156:95d6b41a828b 176 * @{
<> 156:95d6b41a828b 177 */
<> 156:95d6b41a828b 178 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
<> 156:95d6b41a828b 179 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
<> 156:95d6b41a828b 180 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
<> 156:95d6b41a828b 181 /**
<> 156:95d6b41a828b 182 * @}
<> 156:95d6b41a828b 183 */
<> 156:95d6b41a828b 184
<> 156:95d6b41a828b 185 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
<> 156:95d6b41a828b 186 * @{
<> 156:95d6b41a828b 187 */
<> 156:95d6b41a828b 188 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
<> 156:95d6b41a828b 189 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
<> 156:95d6b41a828b 190 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
<> 156:95d6b41a828b 191 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
<> 156:95d6b41a828b 192
<> 156:95d6b41a828b 193 /**
<> 156:95d6b41a828b 194 * @}
<> 156:95d6b41a828b 195 */
<> 156:95d6b41a828b 196
<> 156:95d6b41a828b 197
<> 156:95d6b41a828b 198 #endif /*USE_FULL_LL_DRIVER*/
<> 156:95d6b41a828b 199
<> 156:95d6b41a828b 200
<> 156:95d6b41a828b 201 /**
<> 156:95d6b41a828b 202 * @}
<> 156:95d6b41a828b 203 */
<> 156:95d6b41a828b 204
<> 156:95d6b41a828b 205 /* Exported macro ------------------------------------------------------------*/
<> 156:95d6b41a828b 206 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
<> 156:95d6b41a828b 207 * @{
<> 156:95d6b41a828b 208 */
<> 156:95d6b41a828b 209
<> 156:95d6b41a828b 210 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
<> 156:95d6b41a828b 211 * @{
<> 156:95d6b41a828b 212 */
<> 156:95d6b41a828b 213
<> 156:95d6b41a828b 214 /**
<> 156:95d6b41a828b 215 * @brief Write a value in EXTI register
<> 156:95d6b41a828b 216 * @param __REG__ Register to be written
<> 156:95d6b41a828b 217 * @param __VALUE__ Value to be written in the register
<> 156:95d6b41a828b 218 * @retval None
<> 156:95d6b41a828b 219 */
<> 156:95d6b41a828b 220 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
<> 156:95d6b41a828b 221
<> 156:95d6b41a828b 222 /**
<> 156:95d6b41a828b 223 * @brief Read a value in EXTI register
<> 156:95d6b41a828b 224 * @param __REG__ Register to be read
<> 156:95d6b41a828b 225 * @retval Register value
<> 156:95d6b41a828b 226 */
<> 156:95d6b41a828b 227 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
<> 156:95d6b41a828b 228 /**
<> 156:95d6b41a828b 229 * @}
<> 156:95d6b41a828b 230 */
<> 156:95d6b41a828b 231
<> 156:95d6b41a828b 232
<> 156:95d6b41a828b 233 /**
<> 156:95d6b41a828b 234 * @}
<> 156:95d6b41a828b 235 */
<> 156:95d6b41a828b 236
<> 156:95d6b41a828b 237
<> 156:95d6b41a828b 238
<> 156:95d6b41a828b 239 /* Exported functions --------------------------------------------------------*/
<> 156:95d6b41a828b 240 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
<> 156:95d6b41a828b 241 * @{
<> 156:95d6b41a828b 242 */
<> 156:95d6b41a828b 243 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
<> 156:95d6b41a828b 244 * @{
<> 156:95d6b41a828b 245 */
<> 156:95d6b41a828b 246
<> 156:95d6b41a828b 247 /**
<> 156:95d6b41a828b 248 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
<> 156:95d6b41a828b 249 * @note The reset value for the direct or internal lines (see RM)
<> 156:95d6b41a828b 250 * is set to 1 in order to enable the interrupt by default.
<> 156:95d6b41a828b 251 * Bits are set automatically at Power on.
<> 156:95d6b41a828b 252 * @rmtoll IMR IMx LL_EXTI_EnableIT_0_31
<> 156:95d6b41a828b 253 * @param ExtiLine This parameter can be one of the following values:
<> 156:95d6b41a828b 254 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 255 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 256 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 257 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 258 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 259 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 260 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 261 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 262 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 263 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 264 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 265 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 266 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 267 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 268 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 269 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 270 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 271 * @arg @ref LL_EXTI_LINE_17
<> 156:95d6b41a828b 272 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 273 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 274 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 275 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 276 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 277 * @arg @ref LL_EXTI_LINE_23
<> 156:95d6b41a828b 278 * @arg @ref LL_EXTI_LINE_24
<> 156:95d6b41a828b 279 * @arg @ref LL_EXTI_LINE_25
<> 156:95d6b41a828b 280 * @arg @ref LL_EXTI_LINE_26
<> 156:95d6b41a828b 281 * @arg @ref LL_EXTI_LINE_27
<> 156:95d6b41a828b 282 * @arg @ref LL_EXTI_LINE_28
<> 156:95d6b41a828b 283 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 284 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 285 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 286 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 156:95d6b41a828b 287 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 288 * @retval None
<> 156:95d6b41a828b 289 */
<> 156:95d6b41a828b 290 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 291 {
<> 156:95d6b41a828b 292 SET_BIT(EXTI->IMR, ExtiLine);
<> 156:95d6b41a828b 293 }
<> 156:95d6b41a828b 294
<> 156:95d6b41a828b 295 /**
<> 156:95d6b41a828b 296 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
<> 156:95d6b41a828b 297 * @note The reset value for the direct or internal lines (see RM)
<> 156:95d6b41a828b 298 * is set to 1 in order to enable the interrupt by default.
<> 156:95d6b41a828b 299 * Bits are set automatically at Power on.
<> 156:95d6b41a828b 300 * @rmtoll IMR IMx LL_EXTI_DisableIT_0_31
<> 156:95d6b41a828b 301 * @param ExtiLine This parameter can be one of the following values:
<> 156:95d6b41a828b 302 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 303 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 304 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 305 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 306 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 307 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 308 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 309 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 310 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 311 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 312 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 313 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 314 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 315 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 316 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 317 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 318 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 319 * @arg @ref LL_EXTI_LINE_17
<> 156:95d6b41a828b 320 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 321 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 322 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 323 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 324 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 325 * @arg @ref LL_EXTI_LINE_23
<> 156:95d6b41a828b 326 * @arg @ref LL_EXTI_LINE_24
<> 156:95d6b41a828b 327 * @arg @ref LL_EXTI_LINE_25
<> 156:95d6b41a828b 328 * @arg @ref LL_EXTI_LINE_26
<> 156:95d6b41a828b 329 * @arg @ref LL_EXTI_LINE_27
<> 156:95d6b41a828b 330 * @arg @ref LL_EXTI_LINE_28
<> 156:95d6b41a828b 331 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 332 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 333 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 334 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 156:95d6b41a828b 335 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 336 * @retval None
<> 156:95d6b41a828b 337 */
<> 156:95d6b41a828b 338 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 339 {
<> 156:95d6b41a828b 340 CLEAR_BIT(EXTI->IMR, ExtiLine);
<> 156:95d6b41a828b 341 }
<> 156:95d6b41a828b 342
<> 156:95d6b41a828b 343
<> 156:95d6b41a828b 344 /**
<> 156:95d6b41a828b 345 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
<> 156:95d6b41a828b 346 * @note The reset value for the direct or internal lines (see RM)
<> 156:95d6b41a828b 347 * is set to 1 in order to enable the interrupt by default.
<> 156:95d6b41a828b 348 * Bits are set automatically at Power on.
<> 156:95d6b41a828b 349 * @rmtoll IMR IMx LL_EXTI_IsEnabledIT_0_31
<> 156:95d6b41a828b 350 * @param ExtiLine This parameter can be one of the following values:
<> 156:95d6b41a828b 351 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 352 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 353 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 354 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 355 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 356 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 357 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 358 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 359 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 360 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 361 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 362 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 363 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 364 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 365 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 366 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 367 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 368 * @arg @ref LL_EXTI_LINE_17
<> 156:95d6b41a828b 369 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 370 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 371 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 372 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 373 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 374 * @arg @ref LL_EXTI_LINE_23
<> 156:95d6b41a828b 375 * @arg @ref LL_EXTI_LINE_24
<> 156:95d6b41a828b 376 * @arg @ref LL_EXTI_LINE_25
<> 156:95d6b41a828b 377 * @arg @ref LL_EXTI_LINE_26
<> 156:95d6b41a828b 378 * @arg @ref LL_EXTI_LINE_27
<> 156:95d6b41a828b 379 * @arg @ref LL_EXTI_LINE_28
<> 156:95d6b41a828b 380 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 381 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 382 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 383 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 156:95d6b41a828b 384 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 385 * @retval State of bit (1 or 0).
<> 156:95d6b41a828b 386 */
<> 156:95d6b41a828b 387 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 388 {
<> 156:95d6b41a828b 389 return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine));
<> 156:95d6b41a828b 390 }
<> 156:95d6b41a828b 391
<> 156:95d6b41a828b 392
<> 156:95d6b41a828b 393 /**
<> 156:95d6b41a828b 394 * @}
<> 156:95d6b41a828b 395 */
<> 156:95d6b41a828b 396
<> 156:95d6b41a828b 397 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
<> 156:95d6b41a828b 398 * @{
<> 156:95d6b41a828b 399 */
<> 156:95d6b41a828b 400
<> 156:95d6b41a828b 401 /**
<> 156:95d6b41a828b 402 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
<> 156:95d6b41a828b 403 * @rmtoll EMR EMx LL_EXTI_EnableEvent_0_31
<> 156:95d6b41a828b 404 * @param ExtiLine This parameter can be one of the following values:
<> 156:95d6b41a828b 405 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 406 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 407 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 408 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 409 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 410 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 411 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 412 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 413 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 414 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 415 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 416 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 417 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 418 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 419 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 420 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 421 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 422 * @arg @ref LL_EXTI_LINE_17
<> 156:95d6b41a828b 423 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 424 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 425 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 426 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 427 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 428 * @arg @ref LL_EXTI_LINE_23
<> 156:95d6b41a828b 429 * @arg @ref LL_EXTI_LINE_24
<> 156:95d6b41a828b 430 * @arg @ref LL_EXTI_LINE_25
<> 156:95d6b41a828b 431 * @arg @ref LL_EXTI_LINE_26
<> 156:95d6b41a828b 432 * @arg @ref LL_EXTI_LINE_27
<> 156:95d6b41a828b 433 * @arg @ref LL_EXTI_LINE_28
<> 156:95d6b41a828b 434 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 435 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 436 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 437 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 156:95d6b41a828b 438 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 439 * @retval None
<> 156:95d6b41a828b 440 */
<> 156:95d6b41a828b 441 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 442 {
<> 156:95d6b41a828b 443 SET_BIT(EXTI->EMR, ExtiLine);
<> 156:95d6b41a828b 444
<> 156:95d6b41a828b 445 }
<> 156:95d6b41a828b 446
<> 156:95d6b41a828b 447
<> 156:95d6b41a828b 448 /**
<> 156:95d6b41a828b 449 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
<> 156:95d6b41a828b 450 * @rmtoll EMR EMx LL_EXTI_DisableEvent_0_31
<> 156:95d6b41a828b 451 * @param ExtiLine This parameter can be one of the following values:
<> 156:95d6b41a828b 452 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 453 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 454 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 455 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 456 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 457 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 458 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 459 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 460 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 461 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 462 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 463 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 464 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 465 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 466 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 467 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 468 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 469 * @arg @ref LL_EXTI_LINE_17
<> 156:95d6b41a828b 470 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 471 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 472 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 473 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 474 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 475 * @arg @ref LL_EXTI_LINE_23
<> 156:95d6b41a828b 476 * @arg @ref LL_EXTI_LINE_24
<> 156:95d6b41a828b 477 * @arg @ref LL_EXTI_LINE_25
<> 156:95d6b41a828b 478 * @arg @ref LL_EXTI_LINE_26
<> 156:95d6b41a828b 479 * @arg @ref LL_EXTI_LINE_27
<> 156:95d6b41a828b 480 * @arg @ref LL_EXTI_LINE_28
<> 156:95d6b41a828b 481 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 482 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 483 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 484 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 156:95d6b41a828b 485 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 486 * @retval None
<> 156:95d6b41a828b 487 */
<> 156:95d6b41a828b 488 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 489 {
<> 156:95d6b41a828b 490 CLEAR_BIT(EXTI->EMR, ExtiLine);
<> 156:95d6b41a828b 491 }
<> 156:95d6b41a828b 492
<> 156:95d6b41a828b 493
<> 156:95d6b41a828b 494 /**
<> 156:95d6b41a828b 495 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
<> 156:95d6b41a828b 496 * @rmtoll EMR EMx LL_EXTI_IsEnabledEvent_0_31
<> 156:95d6b41a828b 497 * @param ExtiLine This parameter can be one of the following values:
<> 156:95d6b41a828b 498 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 499 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 500 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 501 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 502 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 503 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 504 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 505 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 506 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 507 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 508 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 509 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 510 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 511 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 512 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 513 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 514 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 515 * @arg @ref LL_EXTI_LINE_17
<> 156:95d6b41a828b 516 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 517 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 518 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 519 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 520 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 521 * @arg @ref LL_EXTI_LINE_23
<> 156:95d6b41a828b 522 * @arg @ref LL_EXTI_LINE_24
<> 156:95d6b41a828b 523 * @arg @ref LL_EXTI_LINE_25
<> 156:95d6b41a828b 524 * @arg @ref LL_EXTI_LINE_26
<> 156:95d6b41a828b 525 * @arg @ref LL_EXTI_LINE_27
<> 156:95d6b41a828b 526 * @arg @ref LL_EXTI_LINE_28
<> 156:95d6b41a828b 527 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 528 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 529 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 530 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 156:95d6b41a828b 531 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 532 * @retval State of bit (1 or 0).
<> 156:95d6b41a828b 533 */
<> 156:95d6b41a828b 534 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 535 {
<> 156:95d6b41a828b 536 return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine));
<> 156:95d6b41a828b 537
<> 156:95d6b41a828b 538 }
<> 156:95d6b41a828b 539
<> 156:95d6b41a828b 540
<> 156:95d6b41a828b 541 /**
<> 156:95d6b41a828b 542 * @}
<> 156:95d6b41a828b 543 */
<> 156:95d6b41a828b 544
<> 156:95d6b41a828b 545 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
<> 156:95d6b41a828b 546 * @{
<> 156:95d6b41a828b 547 */
<> 156:95d6b41a828b 548
<> 156:95d6b41a828b 549 /**
<> 156:95d6b41a828b 550 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
<> 156:95d6b41a828b 551 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 156:95d6b41a828b 552 * generated on these lines. If a rising edge on a configurable interrupt
<> 156:95d6b41a828b 553 * line occurs during a write operation in the EXTI_RTSR register, the
<> 156:95d6b41a828b 554 * pending bit is not set.
<> 156:95d6b41a828b 555 * Rising and falling edge triggers can be set for
<> 156:95d6b41a828b 556 * the same interrupt line. In this case, both generate a trigger
<> 156:95d6b41a828b 557 * condition.
<> 156:95d6b41a828b 558 * @rmtoll RTSR RTx LL_EXTI_EnableRisingTrig_0_31
<> 156:95d6b41a828b 559 * @param ExtiLine This parameter can be a combination of the following values:
<> 156:95d6b41a828b 560 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 561 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 562 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 563 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 564 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 565 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 566 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 567 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 568 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 569 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 570 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 571 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 572 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 573 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 574 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 575 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 576 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 577 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 578 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 579 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 580 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 581 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 582 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 583 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 584 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 585 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 586 * @retval None
<> 156:95d6b41a828b 587 */
<> 156:95d6b41a828b 588 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 589 {
<> 156:95d6b41a828b 590 SET_BIT(EXTI->RTSR, ExtiLine);
<> 156:95d6b41a828b 591
<> 156:95d6b41a828b 592 }
<> 156:95d6b41a828b 593
<> 156:95d6b41a828b 594
<> 156:95d6b41a828b 595 /**
<> 156:95d6b41a828b 596 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
<> 156:95d6b41a828b 597 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 156:95d6b41a828b 598 * generated on these lines. If a rising edge on a configurable interrupt
<> 156:95d6b41a828b 599 * line occurs during a write operation in the EXTI_RTSR register, the
<> 156:95d6b41a828b 600 * pending bit is not set.
<> 156:95d6b41a828b 601 * Rising and falling edge triggers can be set for
<> 156:95d6b41a828b 602 * the same interrupt line. In this case, both generate a trigger
<> 156:95d6b41a828b 603 * condition.
<> 156:95d6b41a828b 604 * @rmtoll RTSR RTx LL_EXTI_DisableRisingTrig_0_31
<> 156:95d6b41a828b 605 * @param ExtiLine This parameter can be a combination of the following values:
<> 156:95d6b41a828b 606 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 607 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 608 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 609 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 610 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 611 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 612 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 613 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 614 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 615 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 616 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 617 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 618 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 619 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 620 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 621 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 622 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 623 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 624 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 625 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 626 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 627 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 628 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 629 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 630 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 631 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 632 * @retval None
<> 156:95d6b41a828b 633 */
<> 156:95d6b41a828b 634 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 635 {
<> 156:95d6b41a828b 636 CLEAR_BIT(EXTI->RTSR, ExtiLine);
<> 156:95d6b41a828b 637
<> 156:95d6b41a828b 638 }
<> 156:95d6b41a828b 639
<> 156:95d6b41a828b 640
<> 156:95d6b41a828b 641 /**
<> 156:95d6b41a828b 642 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
<> 156:95d6b41a828b 643 * @rmtoll RTSR RTx LL_EXTI_IsEnabledRisingTrig_0_31
<> 156:95d6b41a828b 644 * @param ExtiLine This parameter can be a combination of the following values:
<> 156:95d6b41a828b 645 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 646 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 647 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 648 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 649 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 650 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 651 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 652 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 653 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 654 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 655 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 656 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 657 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 658 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 659 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 660 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 661 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 662 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 663 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 664 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 665 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 666 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 667 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 668 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 669 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 670 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 671 * @retval State of bit (1 or 0).
<> 156:95d6b41a828b 672 */
<> 156:95d6b41a828b 673 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 674 {
<> 156:95d6b41a828b 675 return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine));
<> 156:95d6b41a828b 676 }
<> 156:95d6b41a828b 677
<> 156:95d6b41a828b 678
<> 156:95d6b41a828b 679 /**
<> 156:95d6b41a828b 680 * @}
<> 156:95d6b41a828b 681 */
<> 156:95d6b41a828b 682
<> 156:95d6b41a828b 683 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
<> 156:95d6b41a828b 684 * @{
<> 156:95d6b41a828b 685 */
<> 156:95d6b41a828b 686
<> 156:95d6b41a828b 687 /**
<> 156:95d6b41a828b 688 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
<> 156:95d6b41a828b 689 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 156:95d6b41a828b 690 * generated on these lines. If a falling edge on a configurable interrupt
<> 156:95d6b41a828b 691 * line occurs during a write operation in the EXTI_FTSR register, the
<> 156:95d6b41a828b 692 * pending bit is not set.
<> 156:95d6b41a828b 693 * Rising and falling edge triggers can be set for
<> 156:95d6b41a828b 694 * the same interrupt line. In this case, both generate a trigger
<> 156:95d6b41a828b 695 * condition.
<> 156:95d6b41a828b 696 * @rmtoll FTSR FTx LL_EXTI_EnableFallingTrig_0_31
<> 156:95d6b41a828b 697 * @param ExtiLine This parameter can be a combination of the following values:
<> 156:95d6b41a828b 698 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 699 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 700 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 701 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 702 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 703 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 704 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 705 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 706 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 707 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 708 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 709 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 710 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 711 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 712 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 713 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 714 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 715 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 716 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 717 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 718 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 719 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 720 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 721 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 722 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 723 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 724 * @retval None
<> 156:95d6b41a828b 725 */
<> 156:95d6b41a828b 726 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 727 {
<> 156:95d6b41a828b 728 SET_BIT(EXTI->FTSR, ExtiLine);
<> 156:95d6b41a828b 729 }
<> 156:95d6b41a828b 730
<> 156:95d6b41a828b 731
<> 156:95d6b41a828b 732 /**
<> 156:95d6b41a828b 733 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
<> 156:95d6b41a828b 734 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 156:95d6b41a828b 735 * generated on these lines. If a Falling edge on a configurable interrupt
<> 156:95d6b41a828b 736 * line occurs during a write operation in the EXTI_FTSR register, the
<> 156:95d6b41a828b 737 * pending bit is not set.
<> 156:95d6b41a828b 738 * Rising and falling edge triggers can be set for the same interrupt line.
<> 156:95d6b41a828b 739 * In this case, both generate a trigger condition.
<> 156:95d6b41a828b 740 * @rmtoll FTSR FTx LL_EXTI_DisableFallingTrig_0_31
<> 156:95d6b41a828b 741 * @param ExtiLine This parameter can be a combination of the following values:
<> 156:95d6b41a828b 742 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 743 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 744 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 745 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 746 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 747 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 748 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 749 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 750 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 751 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 752 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 753 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 754 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 755 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 756 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 757 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 758 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 759 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 760 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 761 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 762 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 763 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 764 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 765 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 766 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 767 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 768 * @retval None
<> 156:95d6b41a828b 769 */
<> 156:95d6b41a828b 770 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 771 {
<> 156:95d6b41a828b 772 CLEAR_BIT(EXTI->FTSR, ExtiLine);
<> 156:95d6b41a828b 773 }
<> 156:95d6b41a828b 774
<> 156:95d6b41a828b 775
<> 156:95d6b41a828b 776 /**
<> 156:95d6b41a828b 777 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
<> 156:95d6b41a828b 778 * @rmtoll FTSR FTx LL_EXTI_IsEnabledFallingTrig_0_31
<> 156:95d6b41a828b 779 * @param ExtiLine This parameter can be a combination of the following values:
<> 156:95d6b41a828b 780 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 781 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 782 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 783 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 784 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 785 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 786 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 787 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 788 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 789 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 790 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 791 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 792 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 793 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 794 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 795 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 796 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 797 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 798 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 799 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 800 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 801 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 802 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 803 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 804 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 805 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 806 * @retval State of bit (1 or 0).
<> 156:95d6b41a828b 807 */
<> 156:95d6b41a828b 808 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 809 {
<> 156:95d6b41a828b 810 return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine));
<> 156:95d6b41a828b 811 }
<> 156:95d6b41a828b 812
<> 156:95d6b41a828b 813
<> 156:95d6b41a828b 814 /**
<> 156:95d6b41a828b 815 * @}
<> 156:95d6b41a828b 816 */
<> 156:95d6b41a828b 817
<> 156:95d6b41a828b 818 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
<> 156:95d6b41a828b 819 * @{
<> 156:95d6b41a828b 820 */
<> 156:95d6b41a828b 821
<> 156:95d6b41a828b 822 /**
<> 156:95d6b41a828b 823 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
<> 156:95d6b41a828b 824 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
<> 156:95d6b41a828b 825 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
<> 156:95d6b41a828b 826 * resulting in an interrupt request generation.
<> 156:95d6b41a828b 827 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
<> 156:95d6b41a828b 828 * register (by writing a 1 into the bit)
<> 156:95d6b41a828b 829 * @rmtoll SWIER SWIx LL_EXTI_GenerateSWI_0_31
<> 156:95d6b41a828b 830 * @param ExtiLine This parameter can be a combination of the following values:
<> 156:95d6b41a828b 831 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 832 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 833 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 834 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 835 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 836 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 837 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 838 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 839 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 840 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 841 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 842 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 843 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 844 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 845 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 846 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 847 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 848 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 849 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 850 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 851 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 852 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 853 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 854 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 855 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 856 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 857 * @retval None
<> 156:95d6b41a828b 858 */
<> 156:95d6b41a828b 859 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 860 {
<> 156:95d6b41a828b 861 SET_BIT(EXTI->SWIER, ExtiLine);
<> 156:95d6b41a828b 862 }
<> 156:95d6b41a828b 863
<> 156:95d6b41a828b 864
<> 156:95d6b41a828b 865 /**
<> 156:95d6b41a828b 866 * @}
<> 156:95d6b41a828b 867 */
<> 156:95d6b41a828b 868
<> 156:95d6b41a828b 869 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
<> 156:95d6b41a828b 870 * @{
<> 156:95d6b41a828b 871 */
<> 156:95d6b41a828b 872
<> 156:95d6b41a828b 873 /**
<> 156:95d6b41a828b 874 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
<> 156:95d6b41a828b 875 * @note This bit is set when the selected edge event arrives on the interrupt
<> 156:95d6b41a828b 876 * line. This bit is cleared by writing a 1 to the bit.
<> 156:95d6b41a828b 877 * @rmtoll PR PIFx LL_EXTI_IsActiveFlag_0_31
<> 156:95d6b41a828b 878 * @param ExtiLine This parameter can be a combination of the following values:
<> 156:95d6b41a828b 879 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 880 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 881 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 882 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 883 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 884 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 885 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 886 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 887 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 888 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 889 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 890 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 891 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 892 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 893 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 894 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 895 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 896 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 897 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 898 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 899 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 900 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 901 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 902 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 903 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 904 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 905 * @retval State of bit (1 or 0).
<> 156:95d6b41a828b 906 */
<> 156:95d6b41a828b 907 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 908 {
<> 156:95d6b41a828b 909 return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine));
<> 156:95d6b41a828b 910 }
<> 156:95d6b41a828b 911
<> 156:95d6b41a828b 912
<> 156:95d6b41a828b 913 /**
<> 156:95d6b41a828b 914 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
<> 156:95d6b41a828b 915 * @note This bit is set when the selected edge event arrives on the interrupt
<> 156:95d6b41a828b 916 * line. This bit is cleared by writing a 1 to the bit.
<> 156:95d6b41a828b 917 * @rmtoll PR PIFx LL_EXTI_ReadFlag_0_31
<> 156:95d6b41a828b 918 * @param ExtiLine This parameter can be a combination of the following values:
<> 156:95d6b41a828b 919 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 920 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 921 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 922 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 923 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 924 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 925 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 926 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 927 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 928 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 929 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 930 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 931 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 932 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 933 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 934 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 935 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 936 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 937 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 938 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 939 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 940 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 941 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 942 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 943 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 944 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 945 * @retval @note This bit is set when the selected edge event arrives on the interrupt
<> 156:95d6b41a828b 946 */
<> 156:95d6b41a828b 947 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 948 {
<> 156:95d6b41a828b 949 return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine));
<> 156:95d6b41a828b 950 }
<> 156:95d6b41a828b 951
<> 156:95d6b41a828b 952
<> 156:95d6b41a828b 953 /**
<> 156:95d6b41a828b 954 * @brief Clear ExtLine Flags for Lines in range 0 to 31
<> 156:95d6b41a828b 955 * @note This bit is set when the selected edge event arrives on the interrupt
<> 156:95d6b41a828b 956 * line. This bit is cleared by writing a 1 to the bit.
<> 156:95d6b41a828b 957 * @rmtoll PR PIFx LL_EXTI_ClearFlag_0_31
<> 156:95d6b41a828b 958 * @param ExtiLine This parameter can be a combination of the following values:
<> 156:95d6b41a828b 959 * @arg @ref LL_EXTI_LINE_0
<> 156:95d6b41a828b 960 * @arg @ref LL_EXTI_LINE_1
<> 156:95d6b41a828b 961 * @arg @ref LL_EXTI_LINE_2
<> 156:95d6b41a828b 962 * @arg @ref LL_EXTI_LINE_3
<> 156:95d6b41a828b 963 * @arg @ref LL_EXTI_LINE_4
<> 156:95d6b41a828b 964 * @arg @ref LL_EXTI_LINE_5
<> 156:95d6b41a828b 965 * @arg @ref LL_EXTI_LINE_6
<> 156:95d6b41a828b 966 * @arg @ref LL_EXTI_LINE_7
<> 156:95d6b41a828b 967 * @arg @ref LL_EXTI_LINE_8
<> 156:95d6b41a828b 968 * @arg @ref LL_EXTI_LINE_9
<> 156:95d6b41a828b 969 * @arg @ref LL_EXTI_LINE_10
<> 156:95d6b41a828b 970 * @arg @ref LL_EXTI_LINE_11
<> 156:95d6b41a828b 971 * @arg @ref LL_EXTI_LINE_12
<> 156:95d6b41a828b 972 * @arg @ref LL_EXTI_LINE_13
<> 156:95d6b41a828b 973 * @arg @ref LL_EXTI_LINE_14
<> 156:95d6b41a828b 974 * @arg @ref LL_EXTI_LINE_15
<> 156:95d6b41a828b 975 * @arg @ref LL_EXTI_LINE_16
<> 156:95d6b41a828b 976 * @arg @ref LL_EXTI_LINE_18
<> 156:95d6b41a828b 977 * @arg @ref LL_EXTI_LINE_19
<> 156:95d6b41a828b 978 * @arg @ref LL_EXTI_LINE_20
<> 156:95d6b41a828b 979 * @arg @ref LL_EXTI_LINE_21
<> 156:95d6b41a828b 980 * @arg @ref LL_EXTI_LINE_22
<> 156:95d6b41a828b 981 * @arg @ref LL_EXTI_LINE_29
<> 156:95d6b41a828b 982 * @arg @ref LL_EXTI_LINE_30
<> 156:95d6b41a828b 983 * @arg @ref LL_EXTI_LINE_31
<> 156:95d6b41a828b 984 * @note Please check each device line mapping for EXTI Line availability
<> 156:95d6b41a828b 985 * @retval None
<> 156:95d6b41a828b 986 */
<> 156:95d6b41a828b 987 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
<> 156:95d6b41a828b 988 {
<> 156:95d6b41a828b 989 WRITE_REG(EXTI->PR, ExtiLine);
<> 156:95d6b41a828b 990 }
<> 156:95d6b41a828b 991
<> 156:95d6b41a828b 992
<> 156:95d6b41a828b 993 /**
<> 156:95d6b41a828b 994 * @}
<> 156:95d6b41a828b 995 */
<> 156:95d6b41a828b 996
<> 156:95d6b41a828b 997 #if defined(USE_FULL_LL_DRIVER)
<> 156:95d6b41a828b 998 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
<> 156:95d6b41a828b 999 * @{
<> 156:95d6b41a828b 1000 */
<> 156:95d6b41a828b 1001
<> 156:95d6b41a828b 1002 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
<> 156:95d6b41a828b 1003 uint32_t LL_EXTI_DeInit(void);
<> 156:95d6b41a828b 1004 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
<> 156:95d6b41a828b 1005
<> 156:95d6b41a828b 1006
<> 156:95d6b41a828b 1007 /**
<> 156:95d6b41a828b 1008 * @}
<> 156:95d6b41a828b 1009 */
<> 156:95d6b41a828b 1010 #endif /* USE_FULL_LL_DRIVER */
<> 156:95d6b41a828b 1011
<> 156:95d6b41a828b 1012 /**
<> 156:95d6b41a828b 1013 * @}
<> 156:95d6b41a828b 1014 */
<> 156:95d6b41a828b 1015
<> 156:95d6b41a828b 1016 /**
<> 156:95d6b41a828b 1017 * @}
<> 156:95d6b41a828b 1018 */
<> 156:95d6b41a828b 1019
<> 156:95d6b41a828b 1020 #endif /* EXTI */
<> 156:95d6b41a828b 1021
<> 156:95d6b41a828b 1022 /**
<> 156:95d6b41a828b 1023 * @}
<> 156:95d6b41a828b 1024 */
<> 156:95d6b41a828b 1025
<> 156:95d6b41a828b 1026 #ifdef __cplusplus
<> 156:95d6b41a828b 1027 }
<> 156:95d6b41a828b 1028 #endif
<> 156:95d6b41a828b 1029
<> 156:95d6b41a828b 1030 #endif /* __STM32F0xx_LL_EXTI_H */
<> 156:95d6b41a828b 1031
<> 156:95d6b41a828b 1032 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/