mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_rtc.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 180:96ed750bd169
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32f0xx_hal_rtc.c |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
<> | 144:ef7eb2e8f9f7 | 5 | * @brief RTC HAL module driver. |
<> | 144:ef7eb2e8f9f7 | 6 | * This file provides firmware functions to manage the following |
<> | 144:ef7eb2e8f9f7 | 7 | * functionalities of the Real Time Clock (RTC) peripheral: |
<> | 144:ef7eb2e8f9f7 | 8 | * + Initialization and de-initialization functions |
<> | 144:ef7eb2e8f9f7 | 9 | * + RTC Time and Date functions |
<> | 144:ef7eb2e8f9f7 | 10 | * + RTC Alarm functions |
<> | 144:ef7eb2e8f9f7 | 11 | * + Peripheral Control functions |
<> | 144:ef7eb2e8f9f7 | 12 | * + Peripheral State functions |
<> | 144:ef7eb2e8f9f7 | 13 | * |
<> | 144:ef7eb2e8f9f7 | 14 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 15 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 16 | ##### How to use RTC Driver ##### |
<> | 144:ef7eb2e8f9f7 | 17 | =================================================================== |
<> | 144:ef7eb2e8f9f7 | 18 | [..] |
<> | 144:ef7eb2e8f9f7 | 19 | (+) Enable the RTC domain access (see description in the section above). |
<> | 144:ef7eb2e8f9f7 | 20 | (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour |
<> | 144:ef7eb2e8f9f7 | 21 | format using the HAL_RTC_Init() function. |
<> | 144:ef7eb2e8f9f7 | 22 | |
<> | 144:ef7eb2e8f9f7 | 23 | *** Time and Date configuration *** |
<> | 144:ef7eb2e8f9f7 | 24 | =================================== |
<> | 144:ef7eb2e8f9f7 | 25 | [..] |
<> | 144:ef7eb2e8f9f7 | 26 | (+) To configure the RTC Calendar (Time and Date) use the HAL_RTC_SetTime() |
<> | 144:ef7eb2e8f9f7 | 27 | and HAL_RTC_SetDate() functions. |
<> | 144:ef7eb2e8f9f7 | 28 | (+) To read the RTC Calendar, use the HAL_RTC_GetTime() and HAL_RTC_GetDate() functions. |
<> | 144:ef7eb2e8f9f7 | 29 | |
<> | 144:ef7eb2e8f9f7 | 30 | *** Alarm configuration *** |
<> | 144:ef7eb2e8f9f7 | 31 | =========================== |
<> | 144:ef7eb2e8f9f7 | 32 | [..] |
<> | 144:ef7eb2e8f9f7 | 33 | (+) To configure the RTC Alarm use the HAL_RTC_SetAlarm() function. |
<> | 144:ef7eb2e8f9f7 | 34 | You can also configure the RTC Alarm with interrupt mode using the |
<> | 144:ef7eb2e8f9f7 | 35 | HAL_RTC_SetAlarm_IT() function. |
<> | 144:ef7eb2e8f9f7 | 36 | (+) To read the RTC Alarm, use the HAL_RTC_GetAlarm() function. |
<> | 144:ef7eb2e8f9f7 | 37 | |
<> | 144:ef7eb2e8f9f7 | 38 | ##### RTC and low power modes ##### |
<> | 144:ef7eb2e8f9f7 | 39 | =================================================================== |
<> | 144:ef7eb2e8f9f7 | 40 | [..] The MCU can be woken up from a low power mode by an RTC alternate |
<> | 144:ef7eb2e8f9f7 | 41 | function. |
<> | 144:ef7eb2e8f9f7 | 42 | [..] The RTC alternate functions are the RTC alarm (Alarm A), |
<> | 144:ef7eb2e8f9f7 | 43 | RTC wake-up, RTC tamper event detection and RTC time stamp event detection. |
<> | 144:ef7eb2e8f9f7 | 44 | These RTC alternate functions can wake up the system from the Stop and |
<> | 144:ef7eb2e8f9f7 | 45 | Standby low power modes. |
<> | 144:ef7eb2e8f9f7 | 46 | [..] The system can also wake up from low power modes without depending |
<> | 144:ef7eb2e8f9f7 | 47 | on an external interrupt (Auto-wake-up mode), by using the RTC alarm |
<> | 144:ef7eb2e8f9f7 | 48 | or the RTC wake-up events. |
<> | 144:ef7eb2e8f9f7 | 49 | [..] The RTC provides a programmable time base for waking up from the |
<> | 144:ef7eb2e8f9f7 | 50 | Stop or Standby mode at regular intervals. |
<> | 144:ef7eb2e8f9f7 | 51 | Wake-up from STOP and STANDBY modes is possible only when the RTC clock source |
<> | 144:ef7eb2e8f9f7 | 52 | is LSE or LSI. |
<> | 144:ef7eb2e8f9f7 | 53 | |
<> | 144:ef7eb2e8f9f7 | 54 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 55 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 56 | * @attention |
<> | 144:ef7eb2e8f9f7 | 57 | * |
<> | 144:ef7eb2e8f9f7 | 58 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 59 | * |
<> | 144:ef7eb2e8f9f7 | 60 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 61 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 62 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 63 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 64 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 65 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 66 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 67 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 68 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 69 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 70 | * |
<> | 144:ef7eb2e8f9f7 | 71 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 72 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 73 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 74 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 75 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 76 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 77 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 78 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 79 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 80 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 81 | * |
<> | 144:ef7eb2e8f9f7 | 82 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 83 | */ |
<> | 144:ef7eb2e8f9f7 | 84 | |
<> | 144:ef7eb2e8f9f7 | 85 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 86 | #include "stm32f0xx_hal.h" |
<> | 144:ef7eb2e8f9f7 | 87 | |
<> | 144:ef7eb2e8f9f7 | 88 | /** @addtogroup STM32F0xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 89 | * @{ |
<> | 144:ef7eb2e8f9f7 | 90 | */ |
<> | 144:ef7eb2e8f9f7 | 91 | |
<> | 144:ef7eb2e8f9f7 | 92 | /** @addtogroup RTC |
<> | 144:ef7eb2e8f9f7 | 93 | * @brief RTC HAL module driver |
<> | 144:ef7eb2e8f9f7 | 94 | * @{ |
<> | 144:ef7eb2e8f9f7 | 95 | */ |
<> | 144:ef7eb2e8f9f7 | 96 | |
<> | 144:ef7eb2e8f9f7 | 97 | #ifdef HAL_RTC_MODULE_ENABLED |
<> | 144:ef7eb2e8f9f7 | 98 | |
<> | 144:ef7eb2e8f9f7 | 99 | /* Private typedef -----------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 100 | /* Private define ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 101 | /* Private macro -------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 102 | /* Private variables ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 103 | /* Private function prototypes -----------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 104 | /* Exported functions ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 105 | |
<> | 144:ef7eb2e8f9f7 | 106 | /** @addtogroup RTC_Exported_Functions |
<> | 144:ef7eb2e8f9f7 | 107 | * @{ |
<> | 144:ef7eb2e8f9f7 | 108 | */ |
<> | 144:ef7eb2e8f9f7 | 109 | |
<> | 144:ef7eb2e8f9f7 | 110 | /** @addtogroup RTC_Exported_Functions_Group1 |
<> | 144:ef7eb2e8f9f7 | 111 | * @brief Initialization and Configuration functions |
<> | 144:ef7eb2e8f9f7 | 112 | * |
<> | 144:ef7eb2e8f9f7 | 113 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 114 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 115 | ##### Initialization and de-initialization functions ##### |
<> | 144:ef7eb2e8f9f7 | 116 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 117 | [..] This section provides functions allowing to initialize and configure the |
<> | 144:ef7eb2e8f9f7 | 118 | RTC Prescaler (Synchronous and Asynchronous), RTC Hour format, disable |
<> | 144:ef7eb2e8f9f7 | 119 | RTC registers Write protection, enter and exit the RTC initialization mode, |
<> | 144:ef7eb2e8f9f7 | 120 | RTC registers synchronization check and reference clock detection enable. |
<> | 144:ef7eb2e8f9f7 | 121 | (#) The RTC Prescaler is programmed to generate the RTC 1Hz time base. |
<> | 144:ef7eb2e8f9f7 | 122 | It is split into 2 programmable prescalers to minimize power consumption. |
<> | 144:ef7eb2e8f9f7 | 123 | (++) A 7-bit asynchronous prescaler and a 15-bit synchronous prescaler. |
<> | 144:ef7eb2e8f9f7 | 124 | (++) When both prescalers are used, it is recommended to configure the |
<> | 144:ef7eb2e8f9f7 | 125 | asynchronous prescaler to a high value to minimize power consumption. |
<> | 144:ef7eb2e8f9f7 | 126 | (#) All RTC registers are Write protected. Writing to the RTC registers |
<> | 144:ef7eb2e8f9f7 | 127 | is enabled by writing a key into the Write Protection register, RTC_WPR. |
<> | 144:ef7eb2e8f9f7 | 128 | (#) To configure the RTC Calendar, user application should enter |
<> | 144:ef7eb2e8f9f7 | 129 | initialization mode. In this mode, the calendar counter is stopped |
<> | 144:ef7eb2e8f9f7 | 130 | and its value can be updated. When the initialization sequence is |
<> | 144:ef7eb2e8f9f7 | 131 | complete, the calendar restarts counting after 4 RTCCLK cycles. |
<> | 144:ef7eb2e8f9f7 | 132 | (#) To read the calendar through the shadow registers after Calendar |
<> | 144:ef7eb2e8f9f7 | 133 | initialization, calendar update or after wake-up from low power modes |
<> | 144:ef7eb2e8f9f7 | 134 | the software must first clear the RSF flag. The software must then |
<> | 144:ef7eb2e8f9f7 | 135 | wait until it is set again before reading the calendar, which means |
<> | 144:ef7eb2e8f9f7 | 136 | that the calendar registers have been correctly copied into the |
<> | 144:ef7eb2e8f9f7 | 137 | RTC_TR and RTC_DR shadow registers.The HAL_RTC_WaitForSynchro() function |
<> | 144:ef7eb2e8f9f7 | 138 | implements the above software sequence (RSF clear and RSF check). |
<> | 144:ef7eb2e8f9f7 | 139 | |
<> | 144:ef7eb2e8f9f7 | 140 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 141 | * @{ |
<> | 144:ef7eb2e8f9f7 | 142 | */ |
<> | 144:ef7eb2e8f9f7 | 143 | |
<> | 144:ef7eb2e8f9f7 | 144 | /** |
<> | 144:ef7eb2e8f9f7 | 145 | * @brief Initialize the RTC according to the specified parameters |
<> | 144:ef7eb2e8f9f7 | 146 | * in the RTC_InitTypeDef structure and initialize the associated handle. |
Anna Bridge |
180:96ed750bd169 | 147 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 148 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 149 | */ |
<> | 144:ef7eb2e8f9f7 | 150 | HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 151 | { |
<> | 144:ef7eb2e8f9f7 | 152 | /* Check the RTC peripheral state */ |
<> | 144:ef7eb2e8f9f7 | 153 | if(hrtc == NULL) |
<> | 144:ef7eb2e8f9f7 | 154 | { |
<> | 144:ef7eb2e8f9f7 | 155 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 156 | } |
<> | 144:ef7eb2e8f9f7 | 157 | |
<> | 144:ef7eb2e8f9f7 | 158 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 159 | assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance)); |
<> | 144:ef7eb2e8f9f7 | 160 | assert_param(IS_RTC_HOUR_FORMAT(hrtc->Init.HourFormat)); |
<> | 144:ef7eb2e8f9f7 | 161 | assert_param(IS_RTC_ASYNCH_PREDIV(hrtc->Init.AsynchPrediv)); |
<> | 144:ef7eb2e8f9f7 | 162 | assert_param(IS_RTC_SYNCH_PREDIV(hrtc->Init.SynchPrediv)); |
<> | 144:ef7eb2e8f9f7 | 163 | assert_param(IS_RTC_OUTPUT(hrtc->Init.OutPut)); |
<> | 144:ef7eb2e8f9f7 | 164 | assert_param(IS_RTC_OUTPUT_POL(hrtc->Init.OutPutPolarity)); |
<> | 144:ef7eb2e8f9f7 | 165 | assert_param(IS_RTC_OUTPUT_TYPE(hrtc->Init.OutPutType)); |
<> | 144:ef7eb2e8f9f7 | 166 | |
<> | 144:ef7eb2e8f9f7 | 167 | if(hrtc->State == HAL_RTC_STATE_RESET) |
<> | 144:ef7eb2e8f9f7 | 168 | { |
<> | 144:ef7eb2e8f9f7 | 169 | /* Allocate lock resource and initialize it */ |
<> | 144:ef7eb2e8f9f7 | 170 | hrtc->Lock = HAL_UNLOCKED; |
<> | 144:ef7eb2e8f9f7 | 171 | |
<> | 144:ef7eb2e8f9f7 | 172 | /* Initialize RTC MSP */ |
<> | 144:ef7eb2e8f9f7 | 173 | HAL_RTC_MspInit(hrtc); |
<> | 144:ef7eb2e8f9f7 | 174 | } |
<> | 144:ef7eb2e8f9f7 | 175 | |
<> | 144:ef7eb2e8f9f7 | 176 | /* Set RTC state */ |
<> | 144:ef7eb2e8f9f7 | 177 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 178 | |
<> | 144:ef7eb2e8f9f7 | 179 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 180 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 181 | |
<> | 144:ef7eb2e8f9f7 | 182 | /* Set Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 183 | if(RTC_EnterInitMode(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 184 | { |
<> | 144:ef7eb2e8f9f7 | 185 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 186 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 187 | |
<> | 144:ef7eb2e8f9f7 | 188 | /* Set RTC state */ |
<> | 144:ef7eb2e8f9f7 | 189 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 190 | |
<> | 144:ef7eb2e8f9f7 | 191 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 192 | } |
<> | 144:ef7eb2e8f9f7 | 193 | else |
<> | 144:ef7eb2e8f9f7 | 194 | { |
<> | 144:ef7eb2e8f9f7 | 195 | /* Clear RTC_CR FMT, OSEL and POL Bits */ |
<> | 144:ef7eb2e8f9f7 | 196 | hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL)); |
<> | 144:ef7eb2e8f9f7 | 197 | /* Set RTC_CR register */ |
<> | 144:ef7eb2e8f9f7 | 198 | hrtc->Instance->CR |= (uint32_t)(hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity); |
<> | 144:ef7eb2e8f9f7 | 199 | |
<> | 144:ef7eb2e8f9f7 | 200 | /* Configure the RTC PRER */ |
<> | 144:ef7eb2e8f9f7 | 201 | hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv); |
<> | 156:95d6b41a828b | 202 | hrtc->Instance->PRER |= (uint32_t)(hrtc->Init.AsynchPrediv << 16U); |
<> | 144:ef7eb2e8f9f7 | 203 | |
<> | 144:ef7eb2e8f9f7 | 204 | /* Exit Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 205 | hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT; |
Anna Bridge |
180:96ed750bd169 | 206 | |
Anna Bridge |
180:96ed750bd169 | 207 | /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ |
Anna Bridge |
180:96ed750bd169 | 208 | if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) |
Anna Bridge |
180:96ed750bd169 | 209 | { |
Anna Bridge |
180:96ed750bd169 | 210 | if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) |
Anna Bridge |
180:96ed750bd169 | 211 | { |
Anna Bridge |
180:96ed750bd169 | 212 | /* Enable the write protection for RTC registers */ |
Anna Bridge |
180:96ed750bd169 | 213 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
Anna Bridge |
180:96ed750bd169 | 214 | |
Anna Bridge |
180:96ed750bd169 | 215 | hrtc->State = HAL_RTC_STATE_ERROR; |
Anna Bridge |
180:96ed750bd169 | 216 | |
Anna Bridge |
180:96ed750bd169 | 217 | return HAL_ERROR; |
Anna Bridge |
180:96ed750bd169 | 218 | } |
Anna Bridge |
180:96ed750bd169 | 219 | } |
Anna Bridge |
180:96ed750bd169 | 220 | |
<> | 144:ef7eb2e8f9f7 | 221 | hrtc->Instance->TAFCR &= (uint32_t)~RTC_TAFCR_ALARMOUTTYPE; |
<> | 144:ef7eb2e8f9f7 | 222 | hrtc->Instance->TAFCR |= (uint32_t)(hrtc->Init.OutPutType); |
<> | 144:ef7eb2e8f9f7 | 223 | |
<> | 144:ef7eb2e8f9f7 | 224 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 225 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 226 | |
<> | 144:ef7eb2e8f9f7 | 227 | /* Set RTC state */ |
<> | 144:ef7eb2e8f9f7 | 228 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 229 | |
<> | 144:ef7eb2e8f9f7 | 230 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 231 | } |
<> | 144:ef7eb2e8f9f7 | 232 | } |
<> | 144:ef7eb2e8f9f7 | 233 | |
<> | 144:ef7eb2e8f9f7 | 234 | /** |
<> | 144:ef7eb2e8f9f7 | 235 | * @brief DeInitialize the RTC peripheral. |
Anna Bridge |
180:96ed750bd169 | 236 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 237 | * @note This function doesn't reset the RTC Backup Data registers. |
<> | 144:ef7eb2e8f9f7 | 238 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 239 | */ |
<> | 144:ef7eb2e8f9f7 | 240 | HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 241 | { |
<> | 144:ef7eb2e8f9f7 | 242 | #if defined (STM32F030xC) || defined (STM32F070xB) || \ |
<> | 144:ef7eb2e8f9f7 | 243 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
<> | 144:ef7eb2e8f9f7 | 244 | defined (STM32F091xC) || defined (STM32F098xx) |
<> | 144:ef7eb2e8f9f7 | 245 | uint32_t tickstart = 0; |
<> | 144:ef7eb2e8f9f7 | 246 | #endif /* defined (STM32F030xC) || defined (STM32F070xB) ||\ |
<> | 144:ef7eb2e8f9f7 | 247 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
<> | 144:ef7eb2e8f9f7 | 248 | defined (STM32F091xC) || defined (STM32F098xx) ||*/ |
<> | 144:ef7eb2e8f9f7 | 249 | |
<> | 144:ef7eb2e8f9f7 | 250 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 251 | assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance)); |
<> | 144:ef7eb2e8f9f7 | 252 | |
<> | 144:ef7eb2e8f9f7 | 253 | /* Set RTC state */ |
<> | 144:ef7eb2e8f9f7 | 254 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 255 | |
<> | 144:ef7eb2e8f9f7 | 256 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 257 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 258 | |
<> | 144:ef7eb2e8f9f7 | 259 | /* Set Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 260 | if(RTC_EnterInitMode(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 261 | { |
<> | 144:ef7eb2e8f9f7 | 262 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 263 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 264 | |
<> | 144:ef7eb2e8f9f7 | 265 | /* Set RTC state */ |
<> | 144:ef7eb2e8f9f7 | 266 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 267 | |
<> | 144:ef7eb2e8f9f7 | 268 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 269 | } |
<> | 144:ef7eb2e8f9f7 | 270 | else |
<> | 144:ef7eb2e8f9f7 | 271 | { |
<> | 144:ef7eb2e8f9f7 | 272 | /* Reset TR, DR and CR registers */ |
<> | 156:95d6b41a828b | 273 | hrtc->Instance->TR = 0x00000000U; |
<> | 156:95d6b41a828b | 274 | hrtc->Instance->DR = 0x00002101U; |
<> | 144:ef7eb2e8f9f7 | 275 | |
<> | 144:ef7eb2e8f9f7 | 276 | #if defined (STM32F030xC) || defined (STM32F070xB) || \ |
<> | 144:ef7eb2e8f9f7 | 277 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
<> | 144:ef7eb2e8f9f7 | 278 | defined (STM32F091xC) || defined (STM32F098xx) |
<> | 144:ef7eb2e8f9f7 | 279 | /* Reset All CR bits except CR[2:0] */ |
<> | 156:95d6b41a828b | 280 | hrtc->Instance->CR &= 0x00000007U; |
<> | 144:ef7eb2e8f9f7 | 281 | |
<> | 144:ef7eb2e8f9f7 | 282 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 283 | |
<> | 144:ef7eb2e8f9f7 | 284 | /* Wait till WUTWF flag is set and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 285 | while(((hrtc->Instance->ISR) & RTC_ISR_WUTWF) == (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 286 | { |
<> | 144:ef7eb2e8f9f7 | 287 | if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 288 | { |
<> | 144:ef7eb2e8f9f7 | 289 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 290 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 291 | |
<> | 144:ef7eb2e8f9f7 | 292 | /* Set RTC state */ |
<> | 144:ef7eb2e8f9f7 | 293 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 294 | |
<> | 144:ef7eb2e8f9f7 | 295 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 296 | } |
<> | 144:ef7eb2e8f9f7 | 297 | } |
<> | 144:ef7eb2e8f9f7 | 298 | #endif /* defined (STM32F030xC) || defined (STM32F070xB) ||\ |
<> | 144:ef7eb2e8f9f7 | 299 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
<> | 144:ef7eb2e8f9f7 | 300 | defined (STM32F091xC) || defined (STM32F098xx) ||*/ |
<> | 144:ef7eb2e8f9f7 | 301 | |
<> | 144:ef7eb2e8f9f7 | 302 | /* Reset all RTC CR register bits */ |
<> | 156:95d6b41a828b | 303 | hrtc->Instance->CR &= 0x00000000U; |
<> | 144:ef7eb2e8f9f7 | 304 | #if defined (STM32F030xC) || defined (STM32F070xB) || \ |
<> | 144:ef7eb2e8f9f7 | 305 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
<> | 144:ef7eb2e8f9f7 | 306 | defined (STM32F091xC) || defined (STM32F098xx) |
<> | 156:95d6b41a828b | 307 | hrtc->Instance->WUTR = 0x0000FFFFU; |
<> | 144:ef7eb2e8f9f7 | 308 | #endif /* defined (STM32F030xC) || defined (STM32F070xB) ||\ |
<> | 144:ef7eb2e8f9f7 | 309 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
<> | 144:ef7eb2e8f9f7 | 310 | defined (STM32F091xC) || defined (STM32F098xx) ||*/ |
<> | 156:95d6b41a828b | 311 | hrtc->Instance->PRER = 0x007F00FFU; |
<> | 156:95d6b41a828b | 312 | hrtc->Instance->ALRMAR = 0x00000000U; |
<> | 156:95d6b41a828b | 313 | hrtc->Instance->SHIFTR = 0x00000000U; |
<> | 156:95d6b41a828b | 314 | hrtc->Instance->CALR = 0x00000000U; |
<> | 156:95d6b41a828b | 315 | hrtc->Instance->ALRMASSR = 0x00000000U; |
<> | 144:ef7eb2e8f9f7 | 316 | |
<> | 144:ef7eb2e8f9f7 | 317 | /* Reset ISR register and exit initialization mode */ |
<> | 156:95d6b41a828b | 318 | hrtc->Instance->ISR = 0x00000000U; |
<> | 144:ef7eb2e8f9f7 | 319 | |
<> | 144:ef7eb2e8f9f7 | 320 | /* Reset Tamper and alternate functions configuration register */ |
<> | 144:ef7eb2e8f9f7 | 321 | hrtc->Instance->TAFCR = 0x00000000; |
<> | 144:ef7eb2e8f9f7 | 322 | |
<> | 144:ef7eb2e8f9f7 | 323 | /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ |
<> | 144:ef7eb2e8f9f7 | 324 | if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) |
<> | 144:ef7eb2e8f9f7 | 325 | { |
<> | 144:ef7eb2e8f9f7 | 326 | if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 327 | { |
<> | 144:ef7eb2e8f9f7 | 328 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 329 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 330 | |
<> | 144:ef7eb2e8f9f7 | 331 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 332 | |
<> | 144:ef7eb2e8f9f7 | 333 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 334 | } |
<> | 144:ef7eb2e8f9f7 | 335 | } |
<> | 144:ef7eb2e8f9f7 | 336 | } |
<> | 144:ef7eb2e8f9f7 | 337 | |
<> | 144:ef7eb2e8f9f7 | 338 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 339 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 340 | |
<> | 144:ef7eb2e8f9f7 | 341 | /* De-Initialize RTC MSP */ |
<> | 144:ef7eb2e8f9f7 | 342 | HAL_RTC_MspDeInit(hrtc); |
<> | 144:ef7eb2e8f9f7 | 343 | |
<> | 144:ef7eb2e8f9f7 | 344 | hrtc->State = HAL_RTC_STATE_RESET; |
<> | 144:ef7eb2e8f9f7 | 345 | |
<> | 144:ef7eb2e8f9f7 | 346 | /* Release Lock */ |
<> | 144:ef7eb2e8f9f7 | 347 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 348 | |
<> | 144:ef7eb2e8f9f7 | 349 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 350 | } |
<> | 144:ef7eb2e8f9f7 | 351 | |
<> | 144:ef7eb2e8f9f7 | 352 | /** |
<> | 144:ef7eb2e8f9f7 | 353 | * @brief Initialize the RTC MSP. |
Anna Bridge |
180:96ed750bd169 | 354 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 355 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 356 | */ |
<> | 144:ef7eb2e8f9f7 | 357 | __weak void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 358 | { |
<> | 144:ef7eb2e8f9f7 | 359 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 360 | UNUSED(hrtc); |
<> | 144:ef7eb2e8f9f7 | 361 | |
<> | 144:ef7eb2e8f9f7 | 362 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 363 | the HAL_RTC_MspInit could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 364 | */ |
<> | 144:ef7eb2e8f9f7 | 365 | } |
<> | 144:ef7eb2e8f9f7 | 366 | |
<> | 144:ef7eb2e8f9f7 | 367 | /** |
<> | 144:ef7eb2e8f9f7 | 368 | * @brief DeInitialize the RTC MSP. |
Anna Bridge |
180:96ed750bd169 | 369 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 370 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 371 | */ |
<> | 144:ef7eb2e8f9f7 | 372 | __weak void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 373 | { |
<> | 144:ef7eb2e8f9f7 | 374 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 375 | UNUSED(hrtc); |
<> | 144:ef7eb2e8f9f7 | 376 | |
<> | 144:ef7eb2e8f9f7 | 377 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 378 | the HAL_RTC_MspDeInit could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 379 | */ |
<> | 144:ef7eb2e8f9f7 | 380 | } |
<> | 144:ef7eb2e8f9f7 | 381 | |
<> | 144:ef7eb2e8f9f7 | 382 | /** |
<> | 144:ef7eb2e8f9f7 | 383 | * @} |
<> | 144:ef7eb2e8f9f7 | 384 | */ |
<> | 144:ef7eb2e8f9f7 | 385 | |
<> | 144:ef7eb2e8f9f7 | 386 | /** @addtogroup RTC_Exported_Functions_Group2 |
<> | 144:ef7eb2e8f9f7 | 387 | * @brief RTC Time and Date functions |
<> | 144:ef7eb2e8f9f7 | 388 | * |
<> | 144:ef7eb2e8f9f7 | 389 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 390 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 391 | ##### RTC Time and Date functions ##### |
<> | 144:ef7eb2e8f9f7 | 392 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 393 | |
<> | 144:ef7eb2e8f9f7 | 394 | [..] This section provides functions allowing to configure Time and Date features |
<> | 144:ef7eb2e8f9f7 | 395 | |
<> | 144:ef7eb2e8f9f7 | 396 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 397 | * @{ |
<> | 144:ef7eb2e8f9f7 | 398 | */ |
<> | 144:ef7eb2e8f9f7 | 399 | |
<> | 144:ef7eb2e8f9f7 | 400 | /** |
<> | 144:ef7eb2e8f9f7 | 401 | * @brief Set RTC current time. |
Anna Bridge |
180:96ed750bd169 | 402 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 403 | * @param sTime Pointer to Time structure |
Anna Bridge |
180:96ed750bd169 | 404 | * @param Format Specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 405 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 406 | * @arg RTC_FORMAT_BIN: Binary data format |
<> | 144:ef7eb2e8f9f7 | 407 | * @arg RTC_FORMAT_BCD: BCD data format |
<> | 144:ef7eb2e8f9f7 | 408 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 409 | */ |
<> | 144:ef7eb2e8f9f7 | 410 | HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 411 | { |
<> | 156:95d6b41a828b | 412 | uint32_t tmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 413 | |
<> | 144:ef7eb2e8f9f7 | 414 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 415 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 416 | assert_param(IS_RTC_DAYLIGHT_SAVING(sTime->DayLightSaving)); |
<> | 144:ef7eb2e8f9f7 | 417 | assert_param(IS_RTC_STORE_OPERATION(sTime->StoreOperation)); |
<> | 144:ef7eb2e8f9f7 | 418 | |
<> | 144:ef7eb2e8f9f7 | 419 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 420 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 421 | |
<> | 144:ef7eb2e8f9f7 | 422 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 423 | |
<> | 144:ef7eb2e8f9f7 | 424 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 425 | { |
<> | 144:ef7eb2e8f9f7 | 426 | if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 427 | { |
<> | 144:ef7eb2e8f9f7 | 428 | assert_param(IS_RTC_HOUR12(sTime->Hours)); |
<> | 144:ef7eb2e8f9f7 | 429 | assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat)); |
<> | 144:ef7eb2e8f9f7 | 430 | } |
<> | 144:ef7eb2e8f9f7 | 431 | else |
<> | 144:ef7eb2e8f9f7 | 432 | { |
<> | 156:95d6b41a828b | 433 | sTime->TimeFormat = 0x00U; |
<> | 144:ef7eb2e8f9f7 | 434 | assert_param(IS_RTC_HOUR24(sTime->Hours)); |
<> | 144:ef7eb2e8f9f7 | 435 | } |
<> | 144:ef7eb2e8f9f7 | 436 | assert_param(IS_RTC_MINUTES(sTime->Minutes)); |
<> | 144:ef7eb2e8f9f7 | 437 | assert_param(IS_RTC_SECONDS(sTime->Seconds)); |
<> | 144:ef7eb2e8f9f7 | 438 | |
<> | 156:95d6b41a828b | 439 | tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16U) | \ |
<> | 156:95d6b41a828b | 440 | ((uint32_t)RTC_ByteToBcd2(sTime->Minutes) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 441 | ((uint32_t)RTC_ByteToBcd2(sTime->Seconds)) | \ |
<> | 156:95d6b41a828b | 442 | (((uint32_t)sTime->TimeFormat) << 16U)); |
<> | 144:ef7eb2e8f9f7 | 443 | } |
<> | 144:ef7eb2e8f9f7 | 444 | else |
<> | 144:ef7eb2e8f9f7 | 445 | { |
<> | 144:ef7eb2e8f9f7 | 446 | if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 447 | { |
<> | 144:ef7eb2e8f9f7 | 448 | tmpreg = RTC_Bcd2ToByte(sTime->Hours); |
<> | 144:ef7eb2e8f9f7 | 449 | assert_param(IS_RTC_HOUR12(tmpreg)); |
<> | 144:ef7eb2e8f9f7 | 450 | assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat)); |
<> | 144:ef7eb2e8f9f7 | 451 | } |
<> | 144:ef7eb2e8f9f7 | 452 | else |
<> | 144:ef7eb2e8f9f7 | 453 | { |
<> | 156:95d6b41a828b | 454 | sTime->TimeFormat = 0x00U; |
<> | 144:ef7eb2e8f9f7 | 455 | assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sTime->Hours))); |
<> | 144:ef7eb2e8f9f7 | 456 | } |
<> | 144:ef7eb2e8f9f7 | 457 | assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sTime->Minutes))); |
<> | 144:ef7eb2e8f9f7 | 458 | assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sTime->Seconds))); |
<> | 156:95d6b41a828b | 459 | tmpreg = (((uint32_t)(sTime->Hours) << 16U) | \ |
<> | 156:95d6b41a828b | 460 | ((uint32_t)(sTime->Minutes) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 461 | ((uint32_t)sTime->Seconds) | \ |
<> | 156:95d6b41a828b | 462 | ((uint32_t)(sTime->TimeFormat) << 16U)); |
<> | 144:ef7eb2e8f9f7 | 463 | } |
<> | 144:ef7eb2e8f9f7 | 464 | |
<> | 144:ef7eb2e8f9f7 | 465 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 466 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 467 | |
<> | 144:ef7eb2e8f9f7 | 468 | /* Set Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 469 | if(RTC_EnterInitMode(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 470 | { |
<> | 144:ef7eb2e8f9f7 | 471 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 472 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 473 | |
<> | 144:ef7eb2e8f9f7 | 474 | /* Set RTC state */ |
<> | 144:ef7eb2e8f9f7 | 475 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 476 | |
<> | 144:ef7eb2e8f9f7 | 477 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 478 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 479 | |
<> | 144:ef7eb2e8f9f7 | 480 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 481 | } |
<> | 144:ef7eb2e8f9f7 | 482 | else |
<> | 144:ef7eb2e8f9f7 | 483 | { |
<> | 144:ef7eb2e8f9f7 | 484 | /* Set the RTC_TR register */ |
<> | 144:ef7eb2e8f9f7 | 485 | hrtc->Instance->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK); |
<> | 144:ef7eb2e8f9f7 | 486 | |
<> | 144:ef7eb2e8f9f7 | 487 | /* Clear the bits to be configured */ |
Anna Bridge |
180:96ed750bd169 | 488 | hrtc->Instance->CR &= ((uint32_t)~RTC_CR_BKP); |
<> | 144:ef7eb2e8f9f7 | 489 | |
<> | 144:ef7eb2e8f9f7 | 490 | /* Configure the RTC_CR register */ |
<> | 144:ef7eb2e8f9f7 | 491 | hrtc->Instance->CR |= (uint32_t)(sTime->DayLightSaving | sTime->StoreOperation); |
<> | 144:ef7eb2e8f9f7 | 492 | |
<> | 144:ef7eb2e8f9f7 | 493 | /* Exit Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 494 | hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT); |
<> | 144:ef7eb2e8f9f7 | 495 | |
<> | 144:ef7eb2e8f9f7 | 496 | /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ |
<> | 144:ef7eb2e8f9f7 | 497 | if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) |
<> | 144:ef7eb2e8f9f7 | 498 | { |
<> | 144:ef7eb2e8f9f7 | 499 | if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 500 | { |
<> | 144:ef7eb2e8f9f7 | 501 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 502 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 503 | |
<> | 144:ef7eb2e8f9f7 | 504 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 505 | |
<> | 144:ef7eb2e8f9f7 | 506 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 507 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 508 | |
<> | 144:ef7eb2e8f9f7 | 509 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 510 | } |
<> | 144:ef7eb2e8f9f7 | 511 | } |
<> | 144:ef7eb2e8f9f7 | 512 | |
<> | 144:ef7eb2e8f9f7 | 513 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 514 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 515 | |
<> | 144:ef7eb2e8f9f7 | 516 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 517 | |
<> | 144:ef7eb2e8f9f7 | 518 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 519 | |
<> | 144:ef7eb2e8f9f7 | 520 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 521 | } |
<> | 144:ef7eb2e8f9f7 | 522 | } |
<> | 144:ef7eb2e8f9f7 | 523 | |
<> | 144:ef7eb2e8f9f7 | 524 | /** |
<> | 144:ef7eb2e8f9f7 | 525 | * @brief Get RTC current time. |
Anna Bridge |
180:96ed750bd169 | 526 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 527 | * @param sTime Pointer to Time structure with Hours, Minutes and Seconds fields returned |
<> | 144:ef7eb2e8f9f7 | 528 | * with input format (BIN or BCD), also SubSeconds field returning the |
<> | 144:ef7eb2e8f9f7 | 529 | * RTC_SSR register content and SecondFraction field the Synchronous pre-scaler |
<> | 144:ef7eb2e8f9f7 | 530 | * factor to be used for second fraction ratio computation. |
Anna Bridge |
180:96ed750bd169 | 531 | * @param Format Specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 532 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 533 | * @arg RTC_FORMAT_BIN: Binary data format |
<> | 144:ef7eb2e8f9f7 | 534 | * @arg RTC_FORMAT_BCD: BCD data format |
<> | 144:ef7eb2e8f9f7 | 535 | * @note You can use SubSeconds and SecondFraction (sTime structure fields returned) to convert SubSeconds |
<> | 144:ef7eb2e8f9f7 | 536 | * value in second fraction ratio with time unit following generic formula: |
<> | 144:ef7eb2e8f9f7 | 537 | * Second fraction ratio * time_unit= [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit |
<> | 144:ef7eb2e8f9f7 | 538 | * This conversion can be performed only if no shift operation is pending (ie. SHFP=0) when PREDIV_S >= SS |
<> | 144:ef7eb2e8f9f7 | 539 | * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values |
<> | 144:ef7eb2e8f9f7 | 540 | * in the higher-order calendar shadow registers to ensure consistency between the time and date values. |
<> | 144:ef7eb2e8f9f7 | 541 | * Reading RTC current time locks the values in calendar shadow registers until Current date is read |
<> | 144:ef7eb2e8f9f7 | 542 | * to ensure consistency between the time and date values. |
<> | 144:ef7eb2e8f9f7 | 543 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 544 | */ |
<> | 144:ef7eb2e8f9f7 | 545 | HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 546 | { |
<> | 144:ef7eb2e8f9f7 | 547 | uint32_t tmpreg = 0; |
<> | 144:ef7eb2e8f9f7 | 548 | |
<> | 144:ef7eb2e8f9f7 | 549 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 550 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 551 | |
<> | 144:ef7eb2e8f9f7 | 552 | /* Get subseconds structure field from the corresponding register*/ |
<> | 144:ef7eb2e8f9f7 | 553 | sTime->SubSeconds = (uint32_t)(hrtc->Instance->SSR); |
<> | 144:ef7eb2e8f9f7 | 554 | |
<> | 144:ef7eb2e8f9f7 | 555 | /* Get SecondFraction structure field from the corresponding register field*/ |
<> | 144:ef7eb2e8f9f7 | 556 | sTime->SecondFraction = (uint32_t)(hrtc->Instance->PRER & RTC_PRER_PREDIV_S); |
<> | 144:ef7eb2e8f9f7 | 557 | |
<> | 144:ef7eb2e8f9f7 | 558 | /* Get the TR register */ |
<> | 144:ef7eb2e8f9f7 | 559 | tmpreg = (uint32_t)(hrtc->Instance->TR & RTC_TR_RESERVED_MASK); |
<> | 144:ef7eb2e8f9f7 | 560 | |
<> | 144:ef7eb2e8f9f7 | 561 | /* Fill the structure fields with the read parameters */ |
<> | 156:95d6b41a828b | 562 | sTime->Hours = (uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> 16U); |
<> | 156:95d6b41a828b | 563 | sTime->Minutes = (uint8_t)((tmpreg & (RTC_TR_MNT | RTC_TR_MNU)) >>8U); |
<> | 144:ef7eb2e8f9f7 | 564 | sTime->Seconds = (uint8_t)(tmpreg & (RTC_TR_ST | RTC_TR_SU)); |
<> | 156:95d6b41a828b | 565 | sTime->TimeFormat = (uint8_t)((tmpreg & (RTC_TR_PM)) >> 16U); |
<> | 144:ef7eb2e8f9f7 | 566 | |
<> | 144:ef7eb2e8f9f7 | 567 | /* Check the input parameters format */ |
<> | 144:ef7eb2e8f9f7 | 568 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 569 | { |
<> | 144:ef7eb2e8f9f7 | 570 | /* Convert the time structure parameters to Binary format */ |
<> | 144:ef7eb2e8f9f7 | 571 | sTime->Hours = (uint8_t)RTC_Bcd2ToByte(sTime->Hours); |
<> | 144:ef7eb2e8f9f7 | 572 | sTime->Minutes = (uint8_t)RTC_Bcd2ToByte(sTime->Minutes); |
<> | 144:ef7eb2e8f9f7 | 573 | sTime->Seconds = (uint8_t)RTC_Bcd2ToByte(sTime->Seconds); |
<> | 144:ef7eb2e8f9f7 | 574 | } |
<> | 144:ef7eb2e8f9f7 | 575 | |
<> | 144:ef7eb2e8f9f7 | 576 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 577 | } |
<> | 144:ef7eb2e8f9f7 | 578 | |
<> | 144:ef7eb2e8f9f7 | 579 | /** |
<> | 144:ef7eb2e8f9f7 | 580 | * @brief Set RTC current date. |
Anna Bridge |
180:96ed750bd169 | 581 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 582 | * @param sDate Pointer to date structure |
Anna Bridge |
180:96ed750bd169 | 583 | * @param Format specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 584 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 585 | * @arg RTC_FORMAT_BIN: Binary data format |
<> | 144:ef7eb2e8f9f7 | 586 | * @arg RTC_FORMAT_BCD: BCD data format |
<> | 144:ef7eb2e8f9f7 | 587 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 588 | */ |
<> | 144:ef7eb2e8f9f7 | 589 | HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 590 | { |
<> | 156:95d6b41a828b | 591 | uint32_t datetmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 592 | |
<> | 144:ef7eb2e8f9f7 | 593 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 594 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 595 | |
<> | 144:ef7eb2e8f9f7 | 596 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 597 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 598 | |
<> | 144:ef7eb2e8f9f7 | 599 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 600 | |
<> | 156:95d6b41a828b | 601 | if((Format == RTC_FORMAT_BIN) && ((sDate->Month & 0x10U) == 0x10U)) |
<> | 144:ef7eb2e8f9f7 | 602 | { |
<> | 156:95d6b41a828b | 603 | sDate->Month = (uint8_t)((sDate->Month & (uint8_t)~(0x10U)) + (uint8_t)0x0AU); |
<> | 144:ef7eb2e8f9f7 | 604 | } |
<> | 144:ef7eb2e8f9f7 | 605 | |
<> | 144:ef7eb2e8f9f7 | 606 | assert_param(IS_RTC_WEEKDAY(sDate->WeekDay)); |
<> | 144:ef7eb2e8f9f7 | 607 | |
<> | 144:ef7eb2e8f9f7 | 608 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 609 | { |
<> | 144:ef7eb2e8f9f7 | 610 | assert_param(IS_RTC_YEAR(sDate->Year)); |
<> | 144:ef7eb2e8f9f7 | 611 | assert_param(IS_RTC_MONTH(sDate->Month)); |
<> | 144:ef7eb2e8f9f7 | 612 | assert_param(IS_RTC_DATE(sDate->Date)); |
<> | 144:ef7eb2e8f9f7 | 613 | |
<> | 156:95d6b41a828b | 614 | datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16U) | \ |
<> | 156:95d6b41a828b | 615 | ((uint32_t)RTC_ByteToBcd2(sDate->Month) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 616 | ((uint32_t)RTC_ByteToBcd2(sDate->Date)) | \ |
<> | 156:95d6b41a828b | 617 | ((uint32_t)sDate->WeekDay << 13U)); |
<> | 144:ef7eb2e8f9f7 | 618 | } |
<> | 144:ef7eb2e8f9f7 | 619 | else |
<> | 144:ef7eb2e8f9f7 | 620 | { |
<> | 144:ef7eb2e8f9f7 | 621 | assert_param(IS_RTC_YEAR(RTC_Bcd2ToByte(sDate->Year))); |
<> | 144:ef7eb2e8f9f7 | 622 | datetmpreg = RTC_Bcd2ToByte(sDate->Month); |
<> | 144:ef7eb2e8f9f7 | 623 | assert_param(IS_RTC_MONTH(datetmpreg)); |
<> | 144:ef7eb2e8f9f7 | 624 | datetmpreg = RTC_Bcd2ToByte(sDate->Date); |
<> | 144:ef7eb2e8f9f7 | 625 | assert_param(IS_RTC_DATE(datetmpreg)); |
<> | 144:ef7eb2e8f9f7 | 626 | |
<> | 156:95d6b41a828b | 627 | datetmpreg = ((((uint32_t)sDate->Year) << 16U) | \ |
<> | 156:95d6b41a828b | 628 | (((uint32_t)sDate->Month) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 629 | ((uint32_t)sDate->Date) | \ |
<> | 156:95d6b41a828b | 630 | (((uint32_t)sDate->WeekDay) << 13U)); |
<> | 144:ef7eb2e8f9f7 | 631 | } |
<> | 144:ef7eb2e8f9f7 | 632 | |
<> | 144:ef7eb2e8f9f7 | 633 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 634 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 635 | |
<> | 144:ef7eb2e8f9f7 | 636 | /* Set Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 637 | if(RTC_EnterInitMode(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 638 | { |
<> | 144:ef7eb2e8f9f7 | 639 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 640 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 641 | |
<> | 144:ef7eb2e8f9f7 | 642 | /* Set RTC state*/ |
<> | 144:ef7eb2e8f9f7 | 643 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 644 | |
<> | 144:ef7eb2e8f9f7 | 645 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 646 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 647 | |
<> | 144:ef7eb2e8f9f7 | 648 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 649 | } |
<> | 144:ef7eb2e8f9f7 | 650 | else |
<> | 144:ef7eb2e8f9f7 | 651 | { |
<> | 144:ef7eb2e8f9f7 | 652 | /* Set the RTC_DR register */ |
<> | 144:ef7eb2e8f9f7 | 653 | hrtc->Instance->DR = (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK); |
<> | 144:ef7eb2e8f9f7 | 654 | |
<> | 144:ef7eb2e8f9f7 | 655 | /* Exit Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 656 | hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT); |
<> | 144:ef7eb2e8f9f7 | 657 | |
<> | 144:ef7eb2e8f9f7 | 658 | /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ |
<> | 144:ef7eb2e8f9f7 | 659 | if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) |
<> | 144:ef7eb2e8f9f7 | 660 | { |
<> | 144:ef7eb2e8f9f7 | 661 | if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 662 | { |
<> | 144:ef7eb2e8f9f7 | 663 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 664 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 665 | |
<> | 144:ef7eb2e8f9f7 | 666 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 667 | |
<> | 144:ef7eb2e8f9f7 | 668 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 669 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 670 | |
<> | 144:ef7eb2e8f9f7 | 671 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 672 | } |
<> | 144:ef7eb2e8f9f7 | 673 | } |
<> | 144:ef7eb2e8f9f7 | 674 | |
<> | 144:ef7eb2e8f9f7 | 675 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 676 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 677 | |
<> | 144:ef7eb2e8f9f7 | 678 | hrtc->State = HAL_RTC_STATE_READY ; |
<> | 144:ef7eb2e8f9f7 | 679 | |
<> | 144:ef7eb2e8f9f7 | 680 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 681 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 682 | |
<> | 144:ef7eb2e8f9f7 | 683 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 684 | } |
<> | 144:ef7eb2e8f9f7 | 685 | } |
<> | 144:ef7eb2e8f9f7 | 686 | |
<> | 144:ef7eb2e8f9f7 | 687 | /** |
<> | 144:ef7eb2e8f9f7 | 688 | * @brief Get RTC current date. |
Anna Bridge |
180:96ed750bd169 | 689 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 690 | * @param sDate Pointer to Date structure |
Anna Bridge |
180:96ed750bd169 | 691 | * @param Format Specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 692 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 693 | * @arg RTC_FORMAT_BIN : Binary data format |
<> | 144:ef7eb2e8f9f7 | 694 | * @arg RTC_FORMAT_BCD : BCD data format |
<> | 144:ef7eb2e8f9f7 | 695 | * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values |
<> | 144:ef7eb2e8f9f7 | 696 | * in the higher-order calendar shadow registers to ensure consistency between the time and date values. |
<> | 144:ef7eb2e8f9f7 | 697 | * Reading RTC current time locks the values in calendar shadow registers until Current date is read. |
<> | 144:ef7eb2e8f9f7 | 698 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 699 | */ |
<> | 144:ef7eb2e8f9f7 | 700 | HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 701 | { |
<> | 144:ef7eb2e8f9f7 | 702 | uint32_t datetmpreg = 0; |
<> | 144:ef7eb2e8f9f7 | 703 | |
<> | 144:ef7eb2e8f9f7 | 704 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 705 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 706 | |
<> | 144:ef7eb2e8f9f7 | 707 | /* Get the DR register */ |
<> | 144:ef7eb2e8f9f7 | 708 | datetmpreg = (uint32_t)(hrtc->Instance->DR & RTC_DR_RESERVED_MASK); |
<> | 144:ef7eb2e8f9f7 | 709 | |
<> | 144:ef7eb2e8f9f7 | 710 | /* Fill the structure fields with the read parameters */ |
<> | 156:95d6b41a828b | 711 | sDate->Year = (uint8_t)((datetmpreg & (RTC_DR_YT | RTC_DR_YU)) >> 16U); |
<> | 156:95d6b41a828b | 712 | sDate->Month = (uint8_t)((datetmpreg & (RTC_DR_MT | RTC_DR_MU)) >> 8U); |
<> | 144:ef7eb2e8f9f7 | 713 | sDate->Date = (uint8_t)(datetmpreg & (RTC_DR_DT | RTC_DR_DU)); |
<> | 156:95d6b41a828b | 714 | sDate->WeekDay = (uint8_t)((datetmpreg & (RTC_DR_WDU)) >> 13U); |
<> | 144:ef7eb2e8f9f7 | 715 | |
<> | 144:ef7eb2e8f9f7 | 716 | /* Check the input parameters format */ |
<> | 144:ef7eb2e8f9f7 | 717 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 718 | { |
<> | 144:ef7eb2e8f9f7 | 719 | /* Convert the date structure parameters to Binary format */ |
<> | 144:ef7eb2e8f9f7 | 720 | sDate->Year = (uint8_t)RTC_Bcd2ToByte(sDate->Year); |
<> | 144:ef7eb2e8f9f7 | 721 | sDate->Month = (uint8_t)RTC_Bcd2ToByte(sDate->Month); |
<> | 144:ef7eb2e8f9f7 | 722 | sDate->Date = (uint8_t)RTC_Bcd2ToByte(sDate->Date); |
<> | 144:ef7eb2e8f9f7 | 723 | } |
<> | 144:ef7eb2e8f9f7 | 724 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 725 | } |
<> | 144:ef7eb2e8f9f7 | 726 | |
<> | 144:ef7eb2e8f9f7 | 727 | /** |
<> | 144:ef7eb2e8f9f7 | 728 | * @} |
<> | 144:ef7eb2e8f9f7 | 729 | */ |
<> | 144:ef7eb2e8f9f7 | 730 | |
<> | 144:ef7eb2e8f9f7 | 731 | /** @addtogroup RTC_Exported_Functions_Group3 |
<> | 144:ef7eb2e8f9f7 | 732 | * @brief RTC Alarm functions |
<> | 144:ef7eb2e8f9f7 | 733 | * |
<> | 144:ef7eb2e8f9f7 | 734 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 735 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 736 | ##### RTC Alarm functions ##### |
<> | 144:ef7eb2e8f9f7 | 737 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 738 | |
<> | 144:ef7eb2e8f9f7 | 739 | [..] This section provides functions allowing to configure Alarm feature |
<> | 144:ef7eb2e8f9f7 | 740 | |
<> | 144:ef7eb2e8f9f7 | 741 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 742 | * @{ |
<> | 144:ef7eb2e8f9f7 | 743 | */ |
<> | 144:ef7eb2e8f9f7 | 744 | /** |
<> | 144:ef7eb2e8f9f7 | 745 | * @brief Set the specified RTC Alarm. |
Anna Bridge |
180:96ed750bd169 | 746 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 747 | * @param sAlarm Pointer to Alarm structure |
Anna Bridge |
180:96ed750bd169 | 748 | * @param Format Specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 749 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 750 | * @arg RTC_FORMAT_BIN: Binary data format |
<> | 144:ef7eb2e8f9f7 | 751 | * @arg RTC_FORMAT_BCD: BCD data format |
<> | 144:ef7eb2e8f9f7 | 752 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 753 | */ |
<> | 144:ef7eb2e8f9f7 | 754 | HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 755 | { |
<> | 156:95d6b41a828b | 756 | uint32_t tickstart = 0U; |
<> | 156:95d6b41a828b | 757 | uint32_t tmpreg = 0U, subsecondtmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 758 | |
<> | 144:ef7eb2e8f9f7 | 759 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 760 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 761 | assert_param(IS_RTC_ALARM(sAlarm->Alarm)); |
<> | 144:ef7eb2e8f9f7 | 762 | assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask)); |
<> | 144:ef7eb2e8f9f7 | 763 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel)); |
<> | 144:ef7eb2e8f9f7 | 764 | assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds)); |
<> | 144:ef7eb2e8f9f7 | 765 | assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask)); |
<> | 144:ef7eb2e8f9f7 | 766 | |
<> | 144:ef7eb2e8f9f7 | 767 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 768 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 769 | |
<> | 144:ef7eb2e8f9f7 | 770 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 771 | |
<> | 144:ef7eb2e8f9f7 | 772 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 773 | { |
<> | 144:ef7eb2e8f9f7 | 774 | if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 775 | { |
<> | 144:ef7eb2e8f9f7 | 776 | assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours)); |
<> | 144:ef7eb2e8f9f7 | 777 | assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); |
<> | 144:ef7eb2e8f9f7 | 778 | } |
<> | 144:ef7eb2e8f9f7 | 779 | else |
<> | 144:ef7eb2e8f9f7 | 780 | { |
<> | 156:95d6b41a828b | 781 | sAlarm->AlarmTime.TimeFormat = 0x00U; |
<> | 144:ef7eb2e8f9f7 | 782 | assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours)); |
<> | 144:ef7eb2e8f9f7 | 783 | } |
<> | 144:ef7eb2e8f9f7 | 784 | assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes)); |
<> | 144:ef7eb2e8f9f7 | 785 | assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds)); |
<> | 144:ef7eb2e8f9f7 | 786 | |
<> | 144:ef7eb2e8f9f7 | 787 | if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) |
<> | 144:ef7eb2e8f9f7 | 788 | { |
<> | 144:ef7eb2e8f9f7 | 789 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay)); |
<> | 144:ef7eb2e8f9f7 | 790 | } |
<> | 144:ef7eb2e8f9f7 | 791 | else |
<> | 144:ef7eb2e8f9f7 | 792 | { |
<> | 144:ef7eb2e8f9f7 | 793 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay)); |
<> | 144:ef7eb2e8f9f7 | 794 | } |
<> | 144:ef7eb2e8f9f7 | 795 | |
<> | 156:95d6b41a828b | 796 | tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) | \ |
<> | 156:95d6b41a828b | 797 | ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 798 | ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ |
<> | 156:95d6b41a828b | 799 | ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \ |
<> | 156:95d6b41a828b | 800 | ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) | \ |
<> | 144:ef7eb2e8f9f7 | 801 | ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ |
<> | 144:ef7eb2e8f9f7 | 802 | ((uint32_t)sAlarm->AlarmMask)); |
<> | 144:ef7eb2e8f9f7 | 803 | } |
<> | 144:ef7eb2e8f9f7 | 804 | else |
<> | 144:ef7eb2e8f9f7 | 805 | { |
<> | 144:ef7eb2e8f9f7 | 806 | if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 807 | { |
<> | 144:ef7eb2e8f9f7 | 808 | tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours); |
<> | 144:ef7eb2e8f9f7 | 809 | assert_param(IS_RTC_HOUR12(tmpreg)); |
<> | 144:ef7eb2e8f9f7 | 810 | assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); |
<> | 144:ef7eb2e8f9f7 | 811 | } |
<> | 144:ef7eb2e8f9f7 | 812 | else |
<> | 144:ef7eb2e8f9f7 | 813 | { |
<> | 156:95d6b41a828b | 814 | sAlarm->AlarmTime.TimeFormat = 0x00U; |
<> | 144:ef7eb2e8f9f7 | 815 | assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours))); |
<> | 144:ef7eb2e8f9f7 | 816 | } |
<> | 144:ef7eb2e8f9f7 | 817 | |
<> | 144:ef7eb2e8f9f7 | 818 | assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes))); |
<> | 144:ef7eb2e8f9f7 | 819 | assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds))); |
<> | 144:ef7eb2e8f9f7 | 820 | |
<> | 144:ef7eb2e8f9f7 | 821 | if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) |
<> | 144:ef7eb2e8f9f7 | 822 | { |
<> | 144:ef7eb2e8f9f7 | 823 | tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); |
<> | 144:ef7eb2e8f9f7 | 824 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg)); |
<> | 144:ef7eb2e8f9f7 | 825 | } |
<> | 144:ef7eb2e8f9f7 | 826 | else |
<> | 144:ef7eb2e8f9f7 | 827 | { |
<> | 144:ef7eb2e8f9f7 | 828 | tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); |
<> | 144:ef7eb2e8f9f7 | 829 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg)); |
<> | 144:ef7eb2e8f9f7 | 830 | } |
<> | 144:ef7eb2e8f9f7 | 831 | |
<> | 156:95d6b41a828b | 832 | tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) | \ |
<> | 156:95d6b41a828b | 833 | ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 834 | ((uint32_t) sAlarm->AlarmTime.Seconds) | \ |
<> | 156:95d6b41a828b | 835 | ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \ |
<> | 156:95d6b41a828b | 836 | ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) | \ |
<> | 144:ef7eb2e8f9f7 | 837 | ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ |
<> | 144:ef7eb2e8f9f7 | 838 | ((uint32_t)sAlarm->AlarmMask)); |
<> | 144:ef7eb2e8f9f7 | 839 | } |
<> | 144:ef7eb2e8f9f7 | 840 | |
<> | 144:ef7eb2e8f9f7 | 841 | /* Configure the Alarm A Sub Second registers */ |
<> | 144:ef7eb2e8f9f7 | 842 | subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask)); |
<> | 144:ef7eb2e8f9f7 | 843 | |
<> | 144:ef7eb2e8f9f7 | 844 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 845 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 846 | |
<> | 144:ef7eb2e8f9f7 | 847 | /* Disable the Alarm A interrupt */ |
<> | 144:ef7eb2e8f9f7 | 848 | __HAL_RTC_ALARMA_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 849 | |
<> | 144:ef7eb2e8f9f7 | 850 | /* In case of interrupt mode is used, the interrupt source must disabled */ |
<> | 144:ef7eb2e8f9f7 | 851 | __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA); |
<> | 144:ef7eb2e8f9f7 | 852 | |
<> | 144:ef7eb2e8f9f7 | 853 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 854 | /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 855 | while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 856 | { |
<> | 144:ef7eb2e8f9f7 | 857 | if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 858 | { |
<> | 144:ef7eb2e8f9f7 | 859 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 860 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 861 | |
<> | 144:ef7eb2e8f9f7 | 862 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 863 | |
<> | 144:ef7eb2e8f9f7 | 864 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 865 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 866 | |
<> | 144:ef7eb2e8f9f7 | 867 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 868 | } |
<> | 144:ef7eb2e8f9f7 | 869 | } |
<> | 144:ef7eb2e8f9f7 | 870 | |
<> | 144:ef7eb2e8f9f7 | 871 | hrtc->Instance->ALRMAR = (uint32_t)tmpreg; |
<> | 144:ef7eb2e8f9f7 | 872 | /* Configure the Alarm A Sub Second register */ |
<> | 144:ef7eb2e8f9f7 | 873 | hrtc->Instance->ALRMASSR = subsecondtmpreg; |
<> | 144:ef7eb2e8f9f7 | 874 | /* Configure the Alarm state: Enable Alarm */ |
<> | 144:ef7eb2e8f9f7 | 875 | __HAL_RTC_ALARMA_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 876 | |
<> | 144:ef7eb2e8f9f7 | 877 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 878 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 879 | |
<> | 144:ef7eb2e8f9f7 | 880 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 881 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 882 | |
<> | 144:ef7eb2e8f9f7 | 883 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 884 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 885 | |
<> | 144:ef7eb2e8f9f7 | 886 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 887 | } |
<> | 144:ef7eb2e8f9f7 | 888 | |
<> | 144:ef7eb2e8f9f7 | 889 | /** |
<> | 144:ef7eb2e8f9f7 | 890 | * @brief Set the specified RTC Alarm with Interrupt. |
Anna Bridge |
180:96ed750bd169 | 891 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 892 | * @param sAlarm Pointer to Alarm structure |
Anna Bridge |
180:96ed750bd169 | 893 | * @param Format Specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 894 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 895 | * @arg RTC_FORMAT_BIN: Binary data format |
<> | 144:ef7eb2e8f9f7 | 896 | * @arg RTC_FORMAT_BCD: BCD data format |
<> | 144:ef7eb2e8f9f7 | 897 | * @note The Alarm register can only be written when the corresponding Alarm |
<> | 144:ef7eb2e8f9f7 | 898 | * is disabled (Use the HAL_RTC_DeactivateAlarm()). |
<> | 144:ef7eb2e8f9f7 | 899 | * @note The HAL_RTC_SetTime() must be called before enabling the Alarm feature. |
<> | 144:ef7eb2e8f9f7 | 900 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 901 | */ |
<> | 144:ef7eb2e8f9f7 | 902 | HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 903 | { |
<> | 156:95d6b41a828b | 904 | uint32_t tickstart = 0U; |
<> | 156:95d6b41a828b | 905 | uint32_t tmpreg = 0U, subsecondtmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 906 | |
<> | 144:ef7eb2e8f9f7 | 907 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 908 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 909 | assert_param(IS_RTC_ALARM(sAlarm->Alarm)); |
<> | 144:ef7eb2e8f9f7 | 910 | assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask)); |
<> | 144:ef7eb2e8f9f7 | 911 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel)); |
<> | 144:ef7eb2e8f9f7 | 912 | assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds)); |
<> | 144:ef7eb2e8f9f7 | 913 | assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask)); |
<> | 144:ef7eb2e8f9f7 | 914 | |
<> | 144:ef7eb2e8f9f7 | 915 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 916 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 917 | |
<> | 144:ef7eb2e8f9f7 | 918 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 919 | |
<> | 144:ef7eb2e8f9f7 | 920 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 921 | { |
<> | 144:ef7eb2e8f9f7 | 922 | if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 923 | { |
<> | 144:ef7eb2e8f9f7 | 924 | assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours)); |
<> | 144:ef7eb2e8f9f7 | 925 | assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); |
<> | 144:ef7eb2e8f9f7 | 926 | } |
<> | 144:ef7eb2e8f9f7 | 927 | else |
<> | 144:ef7eb2e8f9f7 | 928 | { |
<> | 156:95d6b41a828b | 929 | sAlarm->AlarmTime.TimeFormat = 0x00U; |
<> | 144:ef7eb2e8f9f7 | 930 | assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours)); |
<> | 144:ef7eb2e8f9f7 | 931 | } |
<> | 144:ef7eb2e8f9f7 | 932 | assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes)); |
<> | 144:ef7eb2e8f9f7 | 933 | assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds)); |
<> | 144:ef7eb2e8f9f7 | 934 | |
<> | 144:ef7eb2e8f9f7 | 935 | if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) |
<> | 144:ef7eb2e8f9f7 | 936 | { |
<> | 144:ef7eb2e8f9f7 | 937 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay)); |
<> | 144:ef7eb2e8f9f7 | 938 | } |
<> | 144:ef7eb2e8f9f7 | 939 | else |
<> | 144:ef7eb2e8f9f7 | 940 | { |
<> | 144:ef7eb2e8f9f7 | 941 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay)); |
<> | 144:ef7eb2e8f9f7 | 942 | } |
<> | 156:95d6b41a828b | 943 | tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) | \ |
<> | 156:95d6b41a828b | 944 | ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 945 | ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ |
<> | 156:95d6b41a828b | 946 | ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \ |
<> | 156:95d6b41a828b | 947 | ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) | \ |
<> | 144:ef7eb2e8f9f7 | 948 | ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ |
<> | 144:ef7eb2e8f9f7 | 949 | ((uint32_t)sAlarm->AlarmMask)); |
<> | 144:ef7eb2e8f9f7 | 950 | } |
<> | 144:ef7eb2e8f9f7 | 951 | else |
<> | 144:ef7eb2e8f9f7 | 952 | { |
<> | 144:ef7eb2e8f9f7 | 953 | if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 954 | { |
<> | 144:ef7eb2e8f9f7 | 955 | tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours); |
<> | 144:ef7eb2e8f9f7 | 956 | assert_param(IS_RTC_HOUR12(tmpreg)); |
<> | 144:ef7eb2e8f9f7 | 957 | assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); |
<> | 144:ef7eb2e8f9f7 | 958 | } |
<> | 144:ef7eb2e8f9f7 | 959 | else |
<> | 144:ef7eb2e8f9f7 | 960 | { |
<> | 156:95d6b41a828b | 961 | sAlarm->AlarmTime.TimeFormat = 0x00U; |
<> | 144:ef7eb2e8f9f7 | 962 | assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours))); |
<> | 144:ef7eb2e8f9f7 | 963 | } |
<> | 144:ef7eb2e8f9f7 | 964 | |
<> | 144:ef7eb2e8f9f7 | 965 | assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes))); |
<> | 144:ef7eb2e8f9f7 | 966 | assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds))); |
<> | 144:ef7eb2e8f9f7 | 967 | |
<> | 144:ef7eb2e8f9f7 | 968 | if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) |
<> | 144:ef7eb2e8f9f7 | 969 | { |
<> | 144:ef7eb2e8f9f7 | 970 | tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); |
<> | 144:ef7eb2e8f9f7 | 971 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg)); |
<> | 144:ef7eb2e8f9f7 | 972 | } |
<> | 144:ef7eb2e8f9f7 | 973 | else |
<> | 144:ef7eb2e8f9f7 | 974 | { |
<> | 144:ef7eb2e8f9f7 | 975 | tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); |
<> | 144:ef7eb2e8f9f7 | 976 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg)); |
<> | 144:ef7eb2e8f9f7 | 977 | } |
<> | 156:95d6b41a828b | 978 | tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) | \ |
<> | 156:95d6b41a828b | 979 | ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 980 | ((uint32_t) sAlarm->AlarmTime.Seconds) | \ |
<> | 156:95d6b41a828b | 981 | ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \ |
<> | 156:95d6b41a828b | 982 | ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) | \ |
<> | 144:ef7eb2e8f9f7 | 983 | ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ |
<> | 144:ef7eb2e8f9f7 | 984 | ((uint32_t)sAlarm->AlarmMask)); |
<> | 144:ef7eb2e8f9f7 | 985 | } |
<> | 144:ef7eb2e8f9f7 | 986 | /* Configure the Alarm A Sub Second registers */ |
<> | 144:ef7eb2e8f9f7 | 987 | subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask)); |
<> | 144:ef7eb2e8f9f7 | 988 | |
<> | 144:ef7eb2e8f9f7 | 989 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 990 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 991 | |
<> | 144:ef7eb2e8f9f7 | 992 | /* Disable the Alarm A interrupt */ |
<> | 144:ef7eb2e8f9f7 | 993 | __HAL_RTC_ALARMA_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 994 | |
<> | 144:ef7eb2e8f9f7 | 995 | /* Clear flag alarm A */ |
<> | 144:ef7eb2e8f9f7 | 996 | __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); |
<> | 144:ef7eb2e8f9f7 | 997 | |
<> | 144:ef7eb2e8f9f7 | 998 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 999 | |
<> | 144:ef7eb2e8f9f7 | 1000 | /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 1001 | while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 1002 | { |
<> | 144:ef7eb2e8f9f7 | 1003 | if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 1004 | { |
<> | 144:ef7eb2e8f9f7 | 1005 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1006 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1007 | |
<> | 144:ef7eb2e8f9f7 | 1008 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1009 | |
<> | 144:ef7eb2e8f9f7 | 1010 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1011 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1012 | |
<> | 144:ef7eb2e8f9f7 | 1013 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1014 | } |
<> | 144:ef7eb2e8f9f7 | 1015 | } |
<> | 144:ef7eb2e8f9f7 | 1016 | |
<> | 144:ef7eb2e8f9f7 | 1017 | hrtc->Instance->ALRMAR = (uint32_t)tmpreg; |
<> | 144:ef7eb2e8f9f7 | 1018 | /* Configure the Alarm A Sub Second register */ |
<> | 144:ef7eb2e8f9f7 | 1019 | hrtc->Instance->ALRMASSR = subsecondtmpreg; |
<> | 144:ef7eb2e8f9f7 | 1020 | /* Configure the Alarm state: Enable Alarm */ |
<> | 144:ef7eb2e8f9f7 | 1021 | __HAL_RTC_ALARMA_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1022 | /* Configure the Alarm interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1023 | __HAL_RTC_ALARM_ENABLE_IT(hrtc,RTC_IT_ALRA); |
<> | 144:ef7eb2e8f9f7 | 1024 | |
<> | 144:ef7eb2e8f9f7 | 1025 | /* RTC Alarm Interrupt Configuration: EXTI configuration */ |
<> | 144:ef7eb2e8f9f7 | 1026 | __HAL_RTC_ALARM_EXTI_ENABLE_IT(); |
<> | 144:ef7eb2e8f9f7 | 1027 | |
<> | 144:ef7eb2e8f9f7 | 1028 | __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE(); |
<> | 144:ef7eb2e8f9f7 | 1029 | |
<> | 144:ef7eb2e8f9f7 | 1030 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1031 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1032 | |
<> | 144:ef7eb2e8f9f7 | 1033 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1034 | |
<> | 144:ef7eb2e8f9f7 | 1035 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1036 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1037 | |
<> | 144:ef7eb2e8f9f7 | 1038 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1039 | } |
<> | 144:ef7eb2e8f9f7 | 1040 | |
<> | 144:ef7eb2e8f9f7 | 1041 | /** |
<> | 144:ef7eb2e8f9f7 | 1042 | * @brief Deactivate the specified RTC Alarm. |
Anna Bridge |
180:96ed750bd169 | 1043 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 1044 | * @param Alarm Specifies the Alarm. |
<> | 144:ef7eb2e8f9f7 | 1045 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 1046 | * @arg RTC_ALARM_A: AlarmA |
<> | 144:ef7eb2e8f9f7 | 1047 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1048 | */ |
<> | 144:ef7eb2e8f9f7 | 1049 | HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm) |
<> | 144:ef7eb2e8f9f7 | 1050 | { |
<> | 156:95d6b41a828b | 1051 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 1052 | |
<> | 144:ef7eb2e8f9f7 | 1053 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1054 | assert_param(IS_RTC_ALARM(Alarm)); |
<> | 144:ef7eb2e8f9f7 | 1055 | |
<> | 144:ef7eb2e8f9f7 | 1056 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 1057 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1058 | |
<> | 144:ef7eb2e8f9f7 | 1059 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1060 | |
<> | 144:ef7eb2e8f9f7 | 1061 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1062 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1063 | |
<> | 144:ef7eb2e8f9f7 | 1064 | __HAL_RTC_ALARMA_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1065 | |
<> | 144:ef7eb2e8f9f7 | 1066 | /* In case of interrupt mode is used, the interrupt source must disabled */ |
<> | 144:ef7eb2e8f9f7 | 1067 | __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA); |
<> | 144:ef7eb2e8f9f7 | 1068 | |
<> | 144:ef7eb2e8f9f7 | 1069 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1070 | |
<> | 144:ef7eb2e8f9f7 | 1071 | /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 1072 | while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 1073 | { |
<> | 144:ef7eb2e8f9f7 | 1074 | if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 1075 | { |
<> | 144:ef7eb2e8f9f7 | 1076 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1077 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1078 | |
<> | 144:ef7eb2e8f9f7 | 1079 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1080 | |
<> | 144:ef7eb2e8f9f7 | 1081 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1082 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1083 | |
<> | 144:ef7eb2e8f9f7 | 1084 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1085 | } |
<> | 144:ef7eb2e8f9f7 | 1086 | } |
<> | 144:ef7eb2e8f9f7 | 1087 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1088 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1089 | |
<> | 144:ef7eb2e8f9f7 | 1090 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1091 | |
<> | 144:ef7eb2e8f9f7 | 1092 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1093 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1094 | |
<> | 144:ef7eb2e8f9f7 | 1095 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1096 | } |
<> | 144:ef7eb2e8f9f7 | 1097 | |
<> | 144:ef7eb2e8f9f7 | 1098 | /** |
<> | 144:ef7eb2e8f9f7 | 1099 | * @brief Get the RTC Alarm value and masks. |
Anna Bridge |
180:96ed750bd169 | 1100 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 1101 | * @param sAlarm Pointer to Date structure |
Anna Bridge |
180:96ed750bd169 | 1102 | * @param Alarm Specifies the Alarm. |
<> | 144:ef7eb2e8f9f7 | 1103 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 1104 | * @arg RTC_ALARM_A: AlarmA |
Anna Bridge |
180:96ed750bd169 | 1105 | * @param Format Specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 1106 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 1107 | * @arg RTC_FORMAT_BIN: Binary data format |
<> | 144:ef7eb2e8f9f7 | 1108 | * @arg RTC_FORMAT_BCD: BCD data format |
<> | 144:ef7eb2e8f9f7 | 1109 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1110 | */ |
<> | 144:ef7eb2e8f9f7 | 1111 | HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 1112 | { |
<> | 156:95d6b41a828b | 1113 | uint32_t tmpreg = 0U, subsecondtmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 1114 | |
<> | 144:ef7eb2e8f9f7 | 1115 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1116 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 1117 | assert_param(IS_RTC_ALARM(Alarm)); |
<> | 144:ef7eb2e8f9f7 | 1118 | |
<> | 144:ef7eb2e8f9f7 | 1119 | sAlarm->Alarm = RTC_ALARM_A; |
<> | 144:ef7eb2e8f9f7 | 1120 | |
<> | 144:ef7eb2e8f9f7 | 1121 | tmpreg = (uint32_t)(hrtc->Instance->ALRMAR); |
<> | 144:ef7eb2e8f9f7 | 1122 | subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMASSR ) & RTC_ALRMASSR_SS); |
<> | 144:ef7eb2e8f9f7 | 1123 | |
<> | 144:ef7eb2e8f9f7 | 1124 | /* Fill the structure with the read parameters */ |
<> | 156:95d6b41a828b | 1125 | sAlarm->AlarmTime.Hours = (uint32_t)((tmpreg & (RTC_ALRMAR_HT | RTC_ALRMAR_HU)) >> 16U); |
<> | 156:95d6b41a828b | 1126 | sAlarm->AlarmTime.Minutes = (uint32_t)((tmpreg & (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU)) >> 8U); |
<> | 144:ef7eb2e8f9f7 | 1127 | sAlarm->AlarmTime.Seconds = (uint32_t)(tmpreg & (RTC_ALRMAR_ST | RTC_ALRMAR_SU)); |
<> | 156:95d6b41a828b | 1128 | sAlarm->AlarmTime.TimeFormat = (uint32_t)((tmpreg & RTC_ALRMAR_PM) >> 16U); |
<> | 144:ef7eb2e8f9f7 | 1129 | sAlarm->AlarmTime.SubSeconds = (uint32_t) subsecondtmpreg; |
<> | 156:95d6b41a828b | 1130 | sAlarm->AlarmDateWeekDay = (uint32_t)((tmpreg & (RTC_ALRMAR_DT | RTC_ALRMAR_DU)) >> 24U); |
<> | 144:ef7eb2e8f9f7 | 1131 | sAlarm->AlarmDateWeekDaySel = (uint32_t)(tmpreg & RTC_ALRMAR_WDSEL); |
<> | 144:ef7eb2e8f9f7 | 1132 | sAlarm->AlarmMask = (uint32_t)(tmpreg & RTC_ALARMMASK_ALL); |
<> | 144:ef7eb2e8f9f7 | 1133 | |
<> | 144:ef7eb2e8f9f7 | 1134 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 1135 | { |
<> | 144:ef7eb2e8f9f7 | 1136 | sAlarm->AlarmTime.Hours = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours); |
<> | 144:ef7eb2e8f9f7 | 1137 | sAlarm->AlarmTime.Minutes = RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes); |
<> | 144:ef7eb2e8f9f7 | 1138 | sAlarm->AlarmTime.Seconds = RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds); |
<> | 144:ef7eb2e8f9f7 | 1139 | sAlarm->AlarmDateWeekDay = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); |
<> | 144:ef7eb2e8f9f7 | 1140 | } |
<> | 144:ef7eb2e8f9f7 | 1141 | |
<> | 144:ef7eb2e8f9f7 | 1142 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1143 | } |
<> | 144:ef7eb2e8f9f7 | 1144 | |
<> | 144:ef7eb2e8f9f7 | 1145 | /** |
<> | 144:ef7eb2e8f9f7 | 1146 | * @brief Handle Alarm interrupt request. |
Anna Bridge |
180:96ed750bd169 | 1147 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 1148 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1149 | */ |
<> | 144:ef7eb2e8f9f7 | 1150 | void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 1151 | { |
<> | 144:ef7eb2e8f9f7 | 1152 | /* Get the AlarmA interrupt source enable status */ |
<> | 144:ef7eb2e8f9f7 | 1153 | if(__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRA) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1154 | { |
<> | 144:ef7eb2e8f9f7 | 1155 | /* Get the pending status of the AlarmA Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1156 | if(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1157 | { |
<> | 144:ef7eb2e8f9f7 | 1158 | /* AlarmA callback */ |
<> | 144:ef7eb2e8f9f7 | 1159 | HAL_RTC_AlarmAEventCallback(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1160 | |
<> | 144:ef7eb2e8f9f7 | 1161 | /* Clear the AlarmA interrupt pending bit */ |
<> | 144:ef7eb2e8f9f7 | 1162 | __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); |
<> | 144:ef7eb2e8f9f7 | 1163 | } |
<> | 144:ef7eb2e8f9f7 | 1164 | } |
<> | 144:ef7eb2e8f9f7 | 1165 | |
<> | 144:ef7eb2e8f9f7 | 1166 | /* Clear the EXTI's line Flag for RTC Alarm */ |
<> | 144:ef7eb2e8f9f7 | 1167 | __HAL_RTC_ALARM_EXTI_CLEAR_FLAG(); |
<> | 144:ef7eb2e8f9f7 | 1168 | |
<> | 144:ef7eb2e8f9f7 | 1169 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1170 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1171 | } |
<> | 144:ef7eb2e8f9f7 | 1172 | |
<> | 144:ef7eb2e8f9f7 | 1173 | /** |
<> | 144:ef7eb2e8f9f7 | 1174 | * @brief Alarm A callback. |
Anna Bridge |
180:96ed750bd169 | 1175 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 1176 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1177 | */ |
<> | 144:ef7eb2e8f9f7 | 1178 | __weak void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 1179 | { |
<> | 144:ef7eb2e8f9f7 | 1180 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1181 | UNUSED(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1182 | |
<> | 144:ef7eb2e8f9f7 | 1183 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1184 | the HAL_RTC_AlarmAEventCallback could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1185 | */ |
<> | 144:ef7eb2e8f9f7 | 1186 | } |
<> | 144:ef7eb2e8f9f7 | 1187 | |
<> | 144:ef7eb2e8f9f7 | 1188 | /** |
<> | 144:ef7eb2e8f9f7 | 1189 | * @brief Handle AlarmA Polling request. |
Anna Bridge |
180:96ed750bd169 | 1190 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 1191 | * @param Timeout Timeout duration |
<> | 144:ef7eb2e8f9f7 | 1192 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1193 | */ |
<> | 144:ef7eb2e8f9f7 | 1194 | HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout) |
<> | 144:ef7eb2e8f9f7 | 1195 | { |
<> | 144:ef7eb2e8f9f7 | 1196 | |
<> | 144:ef7eb2e8f9f7 | 1197 | uint32_t tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1198 | |
<> | 144:ef7eb2e8f9f7 | 1199 | while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 1200 | { |
<> | 144:ef7eb2e8f9f7 | 1201 | if(Timeout != HAL_MAX_DELAY) |
<> | 144:ef7eb2e8f9f7 | 1202 | { |
<> | 156:95d6b41a828b | 1203 | if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) |
<> | 144:ef7eb2e8f9f7 | 1204 | { |
<> | 144:ef7eb2e8f9f7 | 1205 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1206 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1207 | } |
<> | 144:ef7eb2e8f9f7 | 1208 | } |
<> | 144:ef7eb2e8f9f7 | 1209 | } |
<> | 144:ef7eb2e8f9f7 | 1210 | |
<> | 144:ef7eb2e8f9f7 | 1211 | /* Clear the Alarm interrupt pending bit */ |
<> | 144:ef7eb2e8f9f7 | 1212 | __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); |
<> | 144:ef7eb2e8f9f7 | 1213 | |
<> | 144:ef7eb2e8f9f7 | 1214 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1215 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1216 | |
<> | 144:ef7eb2e8f9f7 | 1217 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1218 | } |
<> | 144:ef7eb2e8f9f7 | 1219 | |
<> | 144:ef7eb2e8f9f7 | 1220 | /** |
<> | 144:ef7eb2e8f9f7 | 1221 | * @} |
<> | 144:ef7eb2e8f9f7 | 1222 | */ |
<> | 144:ef7eb2e8f9f7 | 1223 | |
<> | 144:ef7eb2e8f9f7 | 1224 | /** @addtogroup RTC_Exported_Functions_Group4 |
<> | 144:ef7eb2e8f9f7 | 1225 | * @brief Peripheral Control functions |
<> | 144:ef7eb2e8f9f7 | 1226 | * |
<> | 144:ef7eb2e8f9f7 | 1227 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 1228 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1229 | ##### Peripheral Control functions ##### |
<> | 144:ef7eb2e8f9f7 | 1230 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1231 | [..] |
<> | 144:ef7eb2e8f9f7 | 1232 | This subsection provides functions allowing to |
<> | 144:ef7eb2e8f9f7 | 1233 | (+) Wait for RTC Time and Date Synchronization |
<> | 144:ef7eb2e8f9f7 | 1234 | |
<> | 144:ef7eb2e8f9f7 | 1235 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 1236 | * @{ |
<> | 144:ef7eb2e8f9f7 | 1237 | */ |
<> | 144:ef7eb2e8f9f7 | 1238 | |
<> | 144:ef7eb2e8f9f7 | 1239 | /** |
<> | 144:ef7eb2e8f9f7 | 1240 | * @brief Wait until the RTC Time and Date registers (RTC_TR and RTC_DR) are |
<> | 144:ef7eb2e8f9f7 | 1241 | * synchronized with RTC APB clock. |
<> | 144:ef7eb2e8f9f7 | 1242 | * @note The RTC Resynchronization mode is write protected, use the |
<> | 144:ef7eb2e8f9f7 | 1243 | * __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function. |
<> | 144:ef7eb2e8f9f7 | 1244 | * @note To read the calendar through the shadow registers after Calendar |
<> | 144:ef7eb2e8f9f7 | 1245 | * initialization, calendar update or after wakeup from low power modes |
<> | 144:ef7eb2e8f9f7 | 1246 | * the software must first clear the RSF flag. |
<> | 144:ef7eb2e8f9f7 | 1247 | * The software must then wait until it is set again before reading |
<> | 144:ef7eb2e8f9f7 | 1248 | * the calendar, which means that the calendar registers have been |
<> | 144:ef7eb2e8f9f7 | 1249 | * correctly copied into the RTC_TR and RTC_DR shadow registers. |
Anna Bridge |
180:96ed750bd169 | 1250 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 1251 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1252 | */ |
<> | 144:ef7eb2e8f9f7 | 1253 | HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 1254 | { |
<> | 156:95d6b41a828b | 1255 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 1256 | |
<> | 144:ef7eb2e8f9f7 | 1257 | /* Clear RSF flag */ |
<> | 144:ef7eb2e8f9f7 | 1258 | hrtc->Instance->ISR &= (uint32_t)RTC_RSF_MASK; |
<> | 144:ef7eb2e8f9f7 | 1259 | |
<> | 144:ef7eb2e8f9f7 | 1260 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1261 | |
<> | 144:ef7eb2e8f9f7 | 1262 | /* Wait the registers to be synchronised */ |
<> | 144:ef7eb2e8f9f7 | 1263 | while((hrtc->Instance->ISR & RTC_ISR_RSF) == (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 1264 | { |
<> | 144:ef7eb2e8f9f7 | 1265 | if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 1266 | { |
<> | 144:ef7eb2e8f9f7 | 1267 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1268 | } |
<> | 144:ef7eb2e8f9f7 | 1269 | } |
<> | 144:ef7eb2e8f9f7 | 1270 | |
<> | 144:ef7eb2e8f9f7 | 1271 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1272 | } |
<> | 144:ef7eb2e8f9f7 | 1273 | |
<> | 144:ef7eb2e8f9f7 | 1274 | /** |
<> | 144:ef7eb2e8f9f7 | 1275 | * @} |
<> | 144:ef7eb2e8f9f7 | 1276 | */ |
<> | 144:ef7eb2e8f9f7 | 1277 | |
<> | 144:ef7eb2e8f9f7 | 1278 | /** @addtogroup RTC_Exported_Functions_Group5 |
<> | 144:ef7eb2e8f9f7 | 1279 | * @brief Peripheral State functions |
<> | 144:ef7eb2e8f9f7 | 1280 | * |
<> | 144:ef7eb2e8f9f7 | 1281 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 1282 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1283 | ##### Peripheral State functions ##### |
<> | 144:ef7eb2e8f9f7 | 1284 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1285 | [..] |
<> | 144:ef7eb2e8f9f7 | 1286 | This subsection provides functions allowing to |
<> | 144:ef7eb2e8f9f7 | 1287 | (+) Get RTC state |
<> | 144:ef7eb2e8f9f7 | 1288 | |
<> | 144:ef7eb2e8f9f7 | 1289 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 1290 | * @{ |
<> | 144:ef7eb2e8f9f7 | 1291 | */ |
<> | 144:ef7eb2e8f9f7 | 1292 | /** |
<> | 144:ef7eb2e8f9f7 | 1293 | * @brief Return the RTC handle state. |
Anna Bridge |
180:96ed750bd169 | 1294 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 1295 | * @retval HAL state |
<> | 144:ef7eb2e8f9f7 | 1296 | */ |
<> | 144:ef7eb2e8f9f7 | 1297 | HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 1298 | { |
<> | 144:ef7eb2e8f9f7 | 1299 | /* Return RTC handle state */ |
<> | 144:ef7eb2e8f9f7 | 1300 | return hrtc->State; |
<> | 144:ef7eb2e8f9f7 | 1301 | } |
<> | 144:ef7eb2e8f9f7 | 1302 | |
<> | 144:ef7eb2e8f9f7 | 1303 | /** |
<> | 144:ef7eb2e8f9f7 | 1304 | * @} |
<> | 144:ef7eb2e8f9f7 | 1305 | */ |
<> | 144:ef7eb2e8f9f7 | 1306 | |
<> | 144:ef7eb2e8f9f7 | 1307 | /** |
<> | 144:ef7eb2e8f9f7 | 1308 | * @} |
<> | 144:ef7eb2e8f9f7 | 1309 | */ |
<> | 144:ef7eb2e8f9f7 | 1310 | |
<> | 144:ef7eb2e8f9f7 | 1311 | /** @addtogroup RTC_Private_Functions |
<> | 144:ef7eb2e8f9f7 | 1312 | * @{ |
<> | 144:ef7eb2e8f9f7 | 1313 | */ |
<> | 144:ef7eb2e8f9f7 | 1314 | /** |
<> | 144:ef7eb2e8f9f7 | 1315 | * @brief Enter the RTC Initialization mode. |
<> | 144:ef7eb2e8f9f7 | 1316 | * @note The RTC Initialization mode is write protected, use the |
<> | 144:ef7eb2e8f9f7 | 1317 | * __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function. |
Anna Bridge |
180:96ed750bd169 | 1318 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 1319 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1320 | */ |
<> | 144:ef7eb2e8f9f7 | 1321 | HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 1322 | { |
<> | 156:95d6b41a828b | 1323 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 1324 | |
<> | 144:ef7eb2e8f9f7 | 1325 | /* Check if the Initialization mode is set */ |
<> | 144:ef7eb2e8f9f7 | 1326 | if((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 1327 | { |
<> | 144:ef7eb2e8f9f7 | 1328 | /* Set the Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 1329 | hrtc->Instance->ISR = (uint32_t)RTC_INIT_MASK; |
<> | 144:ef7eb2e8f9f7 | 1330 | |
<> | 144:ef7eb2e8f9f7 | 1331 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1332 | |
<> | 144:ef7eb2e8f9f7 | 1333 | /* Wait till RTC is in INIT state and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 1334 | while((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 1335 | { |
<> | 144:ef7eb2e8f9f7 | 1336 | if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 1337 | { |
<> | 144:ef7eb2e8f9f7 | 1338 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1339 | } |
<> | 144:ef7eb2e8f9f7 | 1340 | } |
<> | 144:ef7eb2e8f9f7 | 1341 | } |
<> | 144:ef7eb2e8f9f7 | 1342 | |
<> | 144:ef7eb2e8f9f7 | 1343 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1344 | } |
<> | 144:ef7eb2e8f9f7 | 1345 | |
<> | 144:ef7eb2e8f9f7 | 1346 | |
<> | 144:ef7eb2e8f9f7 | 1347 | /** |
<> | 144:ef7eb2e8f9f7 | 1348 | * @brief Convert a 2 digit decimal to BCD format. |
Anna Bridge |
180:96ed750bd169 | 1349 | * @param Value Byte to be converted |
<> | 144:ef7eb2e8f9f7 | 1350 | * @retval Converted byte |
<> | 144:ef7eb2e8f9f7 | 1351 | */ |
<> | 144:ef7eb2e8f9f7 | 1352 | uint8_t RTC_ByteToBcd2(uint8_t Value) |
<> | 144:ef7eb2e8f9f7 | 1353 | { |
<> | 156:95d6b41a828b | 1354 | uint32_t bcdhigh = 0U; |
<> | 144:ef7eb2e8f9f7 | 1355 | |
<> | 156:95d6b41a828b | 1356 | while(Value >= 10U) |
<> | 144:ef7eb2e8f9f7 | 1357 | { |
<> | 144:ef7eb2e8f9f7 | 1358 | bcdhigh++; |
<> | 156:95d6b41a828b | 1359 | Value -= 10U; |
<> | 144:ef7eb2e8f9f7 | 1360 | } |
<> | 144:ef7eb2e8f9f7 | 1361 | |
<> | 156:95d6b41a828b | 1362 | return ((uint8_t)(bcdhigh << 4U) | Value); |
<> | 144:ef7eb2e8f9f7 | 1363 | } |
<> | 144:ef7eb2e8f9f7 | 1364 | |
<> | 144:ef7eb2e8f9f7 | 1365 | /** |
<> | 144:ef7eb2e8f9f7 | 1366 | * @brief Convert from 2 digit BCD to Binary. |
Anna Bridge |
180:96ed750bd169 | 1367 | * @param Value BCD value to be converted |
<> | 144:ef7eb2e8f9f7 | 1368 | * @retval Converted word |
<> | 144:ef7eb2e8f9f7 | 1369 | */ |
<> | 144:ef7eb2e8f9f7 | 1370 | uint8_t RTC_Bcd2ToByte(uint8_t Value) |
<> | 144:ef7eb2e8f9f7 | 1371 | { |
<> | 156:95d6b41a828b | 1372 | uint32_t tmp = 0U; |
<> | 156:95d6b41a828b | 1373 | tmp = ((uint8_t)(Value & (uint8_t)0xF0U) >> (uint8_t)0x4U) * 10U; |
<> | 156:95d6b41a828b | 1374 | return (tmp + (Value & (uint8_t)0x0FU)); |
<> | 144:ef7eb2e8f9f7 | 1375 | } |
<> | 144:ef7eb2e8f9f7 | 1376 | /** |
<> | 144:ef7eb2e8f9f7 | 1377 | * @} |
<> | 144:ef7eb2e8f9f7 | 1378 | */ |
<> | 144:ef7eb2e8f9f7 | 1379 | |
<> | 144:ef7eb2e8f9f7 | 1380 | #endif /* HAL_RTC_MODULE_ENABLED */ |
<> | 144:ef7eb2e8f9f7 | 1381 | |
<> | 144:ef7eb2e8f9f7 | 1382 | /** |
<> | 144:ef7eb2e8f9f7 | 1383 | * @} |
<> | 144:ef7eb2e8f9f7 | 1384 | */ |
<> | 144:ef7eb2e8f9f7 | 1385 | |
<> | 144:ef7eb2e8f9f7 | 1386 | |
<> | 144:ef7eb2e8f9f7 | 1387 | /** |
<> | 144:ef7eb2e8f9f7 | 1388 | * @} |
<> | 144:ef7eb2e8f9f7 | 1389 | */ |
<> | 144:ef7eb2e8f9f7 | 1390 | |
<> | 144:ef7eb2e8f9f7 | 1391 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |