mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_cec.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
180:96ed750bd169 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f0xx_hal_cec.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief CEC HAL module driver.
<> 144:ef7eb2e8f9f7 6 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 7 * functionalities of the High Definition Multimedia Interface
<> 144:ef7eb2e8f9f7 8 * Consumer Electronics Control Peripheral (CEC).
<> 156:95d6b41a828b 9 * + Initialization and de-initialization functions
<> 156:95d6b41a828b 10 * + IO operation functions
<> 156:95d6b41a828b 11 * + Peripheral Control functions
<> 144:ef7eb2e8f9f7 12 *
<> 156:95d6b41a828b 13 *
<> 156:95d6b41a828b 14 @verbatim
<> 144:ef7eb2e8f9f7 15 ===============================================================================
<> 144:ef7eb2e8f9f7 16 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 17 ===============================================================================
<> 144:ef7eb2e8f9f7 18 [..]
<> 156:95d6b41a828b 19 The CEC HAL driver can be used as follow:
<> 144:ef7eb2e8f9f7 20
<> 144:ef7eb2e8f9f7 21 (#) Declare a CEC_HandleTypeDef handle structure.
<> 144:ef7eb2e8f9f7 22 (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API:
<> 156:95d6b41a828b 23 (##) Enable the CEC interface clock.
<> 156:95d6b41a828b 24 (##) CEC pins configuration:
<> 156:95d6b41a828b 25 (+) Enable the clock for the CEC GPIOs.
<> 156:95d6b41a828b 26 (+) Configure these CEC pins as alternate function pull-up.
<> 156:95d6b41a828b 27 (##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT()
<> 144:ef7eb2e8f9f7 28 and HAL_CEC_Receive_IT() APIs):
<> 156:95d6b41a828b 29 (+) Configure the CEC interrupt priority.
<> 156:95d6b41a828b 30 (+) Enable the NVIC CEC IRQ handle.
<> 156:95d6b41a828b 31 (@) The specific CEC interrupts (Transmission complete interrupt,
<> 156:95d6b41a828b 32 RXNE interrupt and Error Interrupts) will be managed using the macros
<> 156:95d6b41a828b 33 __HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit
<> 156:95d6b41a828b 34 and receive process.
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 (#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in
<> 144:ef7eb2e8f9f7 37 in case of Bit Rising Error, Error-Bit generation conditions, device logical
<> 144:ef7eb2e8f9f7 38 address and Listen mode in the hcec Init structure.
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 (#) Initialize the CEC registers by calling the HAL_CEC_Init() API.
<> 156:95d6b41a828b 41
<> 156:95d6b41a828b 42 (@) This API (HAL_CEC_Init()) configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
<> 156:95d6b41a828b 43 by calling the customed HAL_CEC_MspInit() API.
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 @endverbatim
<> 144:ef7eb2e8f9f7 46 ******************************************************************************
<> 144:ef7eb2e8f9f7 47 * @attention
<> 144:ef7eb2e8f9f7 48 *
<> 144:ef7eb2e8f9f7 49 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 50 *
<> 144:ef7eb2e8f9f7 51 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 52 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 53 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 54 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 55 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 56 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 57 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 58 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 59 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 60 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 61 *
<> 144:ef7eb2e8f9f7 62 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 63 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 64 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 65 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 66 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 67 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 68 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 69 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 70 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 71 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 72 *
<> 144:ef7eb2e8f9f7 73 ******************************************************************************
<> 144:ef7eb2e8f9f7 74 */
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 77 #include "stm32f0xx_hal.h"
<> 144:ef7eb2e8f9f7 78
Anna Bridge 180:96ed750bd169 79 #ifdef HAL_CEC_MODULE_ENABLED
Anna Bridge 180:96ed750bd169 80
Anna Bridge 180:96ed750bd169 81 #if defined(STM32F042x6) || defined(STM32F048xx) ||\
Anna Bridge 180:96ed750bd169 82 defined(STM32F051x8) || defined(STM32F058xx) ||\
Anna Bridge 180:96ed750bd169 83 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) ||\
Anna Bridge 180:96ed750bd169 84 defined(STM32F091xC) || defined (STM32F098xx)
Anna Bridge 180:96ed750bd169 85
<> 156:95d6b41a828b 86 /** @addtogroup STM32F0xx_HAL_Driver
<> 156:95d6b41a828b 87 * @{
<> 156:95d6b41a828b 88 */
<> 156:95d6b41a828b 89
<> 156:95d6b41a828b 90 /** @defgroup CEC CEC
<> 156:95d6b41a828b 91 * @brief HAL CEC module driver
<> 156:95d6b41a828b 92 * @{
<> 156:95d6b41a828b 93 */
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 96 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 97 /** @defgroup CEC_Private_Constants CEC Private Constants
<> 144:ef7eb2e8f9f7 98 * @{
<> 144:ef7eb2e8f9f7 99 */
<> 144:ef7eb2e8f9f7 100 /**
<> 144:ef7eb2e8f9f7 101 * @}
<> 156:95d6b41a828b 102 */
<> 156:95d6b41a828b 103
<> 144:ef7eb2e8f9f7 104 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 105 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 106 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 107 /** @defgroup CEC_Private_Functions CEC Private Functions
<> 144:ef7eb2e8f9f7 108 * @{
<> 144:ef7eb2e8f9f7 109 */
<> 144:ef7eb2e8f9f7 110 /**
<> 144:ef7eb2e8f9f7 111 * @}
<> 156:95d6b41a828b 112 */
<> 156:95d6b41a828b 113
<> 144:ef7eb2e8f9f7 114 /* Exported functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116 /** @defgroup CEC_Exported_Functions CEC Exported Functions
<> 144:ef7eb2e8f9f7 117 * @{
<> 144:ef7eb2e8f9f7 118 */
<> 144:ef7eb2e8f9f7 119
<> 156:95d6b41a828b 120 /** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 121 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 122 *
<> 156:95d6b41a828b 123 @verbatim
<> 144:ef7eb2e8f9f7 124 ===============================================================================
<> 144:ef7eb2e8f9f7 125 ##### Initialization and Configuration functions #####
<> 144:ef7eb2e8f9f7 126 ===============================================================================
<> 144:ef7eb2e8f9f7 127 [..]
<> 144:ef7eb2e8f9f7 128 This subsection provides a set of functions allowing to initialize the CEC
<> 144:ef7eb2e8f9f7 129 (+) The following parameters need to be configured:
<> 144:ef7eb2e8f9f7 130 (++) SignalFreeTime
<> 144:ef7eb2e8f9f7 131 (++) Tolerance
<> 144:ef7eb2e8f9f7 132 (++) BRERxStop (RX stopped or not upon Bit Rising Error)
<> 144:ef7eb2e8f9f7 133 (++) BREErrorBitGen (Error-Bit generation in case of Bit Rising Error)
<> 144:ef7eb2e8f9f7 134 (++) LBPEErrorBitGen (Error-Bit generation in case of Long Bit Period Error)
<> 144:ef7eb2e8f9f7 135 (++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error)
<> 144:ef7eb2e8f9f7 136 (++) SignalFreeTimeOption (SFT Timer start definition)
<> 144:ef7eb2e8f9f7 137 (++) OwnAddress (CEC device address)
<> 144:ef7eb2e8f9f7 138 (++) ListenMode
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 @endverbatim
<> 144:ef7eb2e8f9f7 141 * @{
<> 144:ef7eb2e8f9f7 142 */
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 /**
<> 144:ef7eb2e8f9f7 145 * @brief Initializes the CEC mode according to the specified
<> 144:ef7eb2e8f9f7 146 * parameters in the CEC_InitTypeDef and creates the associated handle .
Anna Bridge 180:96ed750bd169 147 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 148 * @retval HAL status
<> 144:ef7eb2e8f9f7 149 */
<> 144:ef7eb2e8f9f7 150 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
<> 156:95d6b41a828b 151 {
<> 144:ef7eb2e8f9f7 152 /* Check the CEC handle allocation */
<> 156:95d6b41a828b 153 if((hcec == NULL) ||(hcec->Init.RxBuffer == NULL))
<> 144:ef7eb2e8f9f7 154 {
<> 144:ef7eb2e8f9f7 155 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 156 }
<> 144:ef7eb2e8f9f7 157
<> 156:95d6b41a828b 158 /* Check the parameters */
<> 156:95d6b41a828b 159 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
<> 144:ef7eb2e8f9f7 160 assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime));
<> 144:ef7eb2e8f9f7 161 assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance));
<> 144:ef7eb2e8f9f7 162 assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop));
<> 144:ef7eb2e8f9f7 163 assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen));
<> 144:ef7eb2e8f9f7 164 assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen));
<> 144:ef7eb2e8f9f7 165 assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen));
<> 144:ef7eb2e8f9f7 166 assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption));
<> 144:ef7eb2e8f9f7 167 assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode));
<> 156:95d6b41a828b 168 assert_param(IS_CEC_OWN_ADDRESS(hcec->Init.OwnAddress));
<> 156:95d6b41a828b 169
<> 156:95d6b41a828b 170 if(hcec->gState == HAL_CEC_STATE_RESET)
<> 156:95d6b41a828b 171 {
<> 144:ef7eb2e8f9f7 172 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 173 hcec->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 174 /* Init the low level hardware : GPIO, CLOCK */
<> 144:ef7eb2e8f9f7 175 HAL_CEC_MspInit(hcec);
<> 144:ef7eb2e8f9f7 176 }
<> 156:95d6b41a828b 177 hcec->gState = HAL_CEC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 /* Disable the Peripheral */
<> 144:ef7eb2e8f9f7 180 __HAL_CEC_DISABLE(hcec);
<> 144:ef7eb2e8f9f7 181
<> 156:95d6b41a828b 182 /* Write to CEC Control Register */
<> 156:95d6b41a828b 183 hcec->Instance->CFGR = hcec->Init.SignalFreeTime | hcec->Init.Tolerance | hcec->Init.BRERxStop|\
<> 156:95d6b41a828b 184 hcec->Init.BREErrorBitGen | hcec->Init.LBPEErrorBitGen | hcec->Init.BroadcastMsgNoErrorBitGen |\
<> 156:95d6b41a828b 185 hcec->Init.SignalFreeTimeOption |((uint32_t)(hcec->Init.OwnAddress)<<16U) |\
<> 156:95d6b41a828b 186 hcec->Init.ListenMode;
<> 144:ef7eb2e8f9f7 187
<> 156:95d6b41a828b 188 /* Enable the following CEC Transmission/Reception interrupts as
<> 156:95d6b41a828b 189 * well as the following CEC Transmission/Reception Errors interrupts
<> 156:95d6b41a828b 190 * Rx Byte Received IT
<> 156:95d6b41a828b 191 * End of Reception IT
<> 156:95d6b41a828b 192 * Rx overrun
<> 156:95d6b41a828b 193 * Rx bit rising error
<> 156:95d6b41a828b 194 * Rx short bit period error
<> 156:95d6b41a828b 195 * Rx long bit period error
<> 156:95d6b41a828b 196 * Rx missing acknowledge
<> 156:95d6b41a828b 197 * Tx Byte Request IT
<> 156:95d6b41a828b 198 * End of Transmission IT
<> 156:95d6b41a828b 199 * Tx Missing Acknowledge IT
<> 156:95d6b41a828b 200 * Tx-Error IT
<> 156:95d6b41a828b 201 * Tx-Buffer Underrun IT
<> 156:95d6b41a828b 202 * Tx arbitration lost */
<> 156:95d6b41a828b 203 __HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
<> 156:95d6b41a828b 204
<> 156:95d6b41a828b 205 /* Enable the CEC Peripheral */
<> 144:ef7eb2e8f9f7 206 __HAL_CEC_ENABLE(hcec);
<> 144:ef7eb2e8f9f7 207
<> 156:95d6b41a828b 208 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
<> 156:95d6b41a828b 209 hcec->gState = HAL_CEC_STATE_READY;
<> 156:95d6b41a828b 210 hcec->RxState = HAL_CEC_STATE_READY;
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 return HAL_OK;
<> 144:ef7eb2e8f9f7 213 }
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 /**
<> 144:ef7eb2e8f9f7 216 * @brief DeInitializes the CEC peripheral
Anna Bridge 180:96ed750bd169 217 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 218 * @retval HAL status
<> 144:ef7eb2e8f9f7 219 */
<> 144:ef7eb2e8f9f7 220 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 221 {
<> 144:ef7eb2e8f9f7 222 /* Check the CEC handle allocation */
<> 144:ef7eb2e8f9f7 223 if(hcec == NULL)
<> 144:ef7eb2e8f9f7 224 {
<> 144:ef7eb2e8f9f7 225 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 226 }
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 /* Check the parameters */
<> 144:ef7eb2e8f9f7 229 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
<> 144:ef7eb2e8f9f7 230
<> 156:95d6b41a828b 231 hcec->gState = HAL_CEC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233 /* DeInit the low level hardware */
<> 144:ef7eb2e8f9f7 234 HAL_CEC_MspDeInit(hcec);
<> 144:ef7eb2e8f9f7 235 /* Disable the Peripheral */
<> 144:ef7eb2e8f9f7 236 __HAL_CEC_DISABLE(hcec);
<> 144:ef7eb2e8f9f7 237
<> 156:95d6b41a828b 238 /* Clear Flags */
<> 156:95d6b41a828b 239 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXEND|CEC_FLAG_TXBR|CEC_FLAG_RXBR|CEC_FLAG_RXEND|CEC_ISR_ALL_ERROR);
<> 156:95d6b41a828b 240
<> 156:95d6b41a828b 241 /* Disable the following CEC Transmission/Reception interrupts as
<> 156:95d6b41a828b 242 * well as the following CEC Transmission/Reception Errors interrupts
<> 156:95d6b41a828b 243 * Rx Byte Received IT
<> 156:95d6b41a828b 244 * End of Reception IT
<> 156:95d6b41a828b 245 * Rx overrun
<> 156:95d6b41a828b 246 * Rx bit rising error
<> 156:95d6b41a828b 247 * Rx short bit period error
<> 156:95d6b41a828b 248 * Rx long bit period error
<> 156:95d6b41a828b 249 * Rx missing acknowledge
<> 156:95d6b41a828b 250 * Tx Byte Request IT
<> 156:95d6b41a828b 251 * End of Transmission IT
<> 156:95d6b41a828b 252 * Tx Missing Acknowledge IT
<> 156:95d6b41a828b 253 * Tx-Error IT
<> 156:95d6b41a828b 254 * Tx-Buffer Underrun IT
<> 156:95d6b41a828b 255 * Tx arbitration lost */
<> 156:95d6b41a828b 256 __HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
<> 156:95d6b41a828b 257
<> 144:ef7eb2e8f9f7 258 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
<> 156:95d6b41a828b 259 hcec->gState = HAL_CEC_STATE_RESET;
<> 156:95d6b41a828b 260 hcec->RxState = HAL_CEC_STATE_RESET;
<> 144:ef7eb2e8f9f7 261
<> 144:ef7eb2e8f9f7 262 /* Process Unlock */
<> 144:ef7eb2e8f9f7 263 __HAL_UNLOCK(hcec);
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 return HAL_OK;
<> 144:ef7eb2e8f9f7 266 }
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 /**
<> 156:95d6b41a828b 269 * @brief Initializes the Own Address of the CEC device
Anna Bridge 180:96ed750bd169 270 * @param hcec CEC handle
Anna Bridge 180:96ed750bd169 271 * @param CEC_OwnAddress The CEC own address.
<> 156:95d6b41a828b 272 * @retval HAL status
<> 156:95d6b41a828b 273 */
<> 156:95d6b41a828b 274 HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress)
<> 156:95d6b41a828b 275 {
<> 156:95d6b41a828b 276 /* Check the parameters */
<> 156:95d6b41a828b 277 assert_param(IS_CEC_OWN_ADDRESS(CEC_OwnAddress));
<> 156:95d6b41a828b 278
<> 156:95d6b41a828b 279 if ((hcec->gState == HAL_CEC_STATE_READY) && (hcec->RxState == HAL_CEC_STATE_READY))
<> 156:95d6b41a828b 280 {
<> 156:95d6b41a828b 281 /* Process Locked */
<> 156:95d6b41a828b 282 __HAL_LOCK(hcec);
<> 156:95d6b41a828b 283
<> 156:95d6b41a828b 284 hcec->gState = HAL_CEC_STATE_BUSY;
<> 156:95d6b41a828b 285
<> 156:95d6b41a828b 286 /* Disable the Peripheral */
<> 156:95d6b41a828b 287 __HAL_CEC_DISABLE(hcec);
<> 156:95d6b41a828b 288
<> 156:95d6b41a828b 289 if(CEC_OwnAddress != CEC_OWN_ADDRESS_NONE)
<> 156:95d6b41a828b 290 {
<> 156:95d6b41a828b 291 hcec->Instance->CFGR |= ((uint32_t)CEC_OwnAddress<<16U);
<> 156:95d6b41a828b 292 }
<> 156:95d6b41a828b 293 else
<> 156:95d6b41a828b 294 {
<> 156:95d6b41a828b 295 hcec->Instance->CFGR &= ~(CEC_CFGR_OAR);
<> 156:95d6b41a828b 296 }
<> 156:95d6b41a828b 297
<> 156:95d6b41a828b 298 hcec->gState = HAL_CEC_STATE_READY;
<> 156:95d6b41a828b 299 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
<> 156:95d6b41a828b 300
<> 156:95d6b41a828b 301 /* Process Unlocked */
<> 156:95d6b41a828b 302 __HAL_UNLOCK(hcec);
<> 156:95d6b41a828b 303
<> 156:95d6b41a828b 304 /* Enable the Peripheral */
<> 156:95d6b41a828b 305 __HAL_CEC_ENABLE(hcec);
<> 156:95d6b41a828b 306
<> 156:95d6b41a828b 307 return HAL_OK;
<> 156:95d6b41a828b 308 }
<> 156:95d6b41a828b 309 else
<> 156:95d6b41a828b 310 {
<> 156:95d6b41a828b 311 return HAL_BUSY;
<> 156:95d6b41a828b 312 }
<> 156:95d6b41a828b 313 }
<> 156:95d6b41a828b 314
<> 156:95d6b41a828b 315 /**
<> 144:ef7eb2e8f9f7 316 * @brief CEC MSP Init
Anna Bridge 180:96ed750bd169 317 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 318 * @retval None
<> 144:ef7eb2e8f9f7 319 */
<> 144:ef7eb2e8f9f7 320 __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 321 {
<> 144:ef7eb2e8f9f7 322 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 323 UNUSED(hcec);
<> 144:ef7eb2e8f9f7 324 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 325 the HAL_CEC_MspInit can be implemented in the user file
<> 144:ef7eb2e8f9f7 326 */
<> 144:ef7eb2e8f9f7 327 }
<> 144:ef7eb2e8f9f7 328
<> 144:ef7eb2e8f9f7 329 /**
<> 144:ef7eb2e8f9f7 330 * @brief CEC MSP DeInit
Anna Bridge 180:96ed750bd169 331 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 332 * @retval None
<> 144:ef7eb2e8f9f7 333 */
<> 144:ef7eb2e8f9f7 334 __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 335 {
<> 144:ef7eb2e8f9f7 336 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 337 UNUSED(hcec);
<> 144:ef7eb2e8f9f7 338 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 339 the HAL_CEC_MspDeInit can be implemented in the user file
<> 144:ef7eb2e8f9f7 340 */
<> 144:ef7eb2e8f9f7 341 }
<> 144:ef7eb2e8f9f7 342
<> 144:ef7eb2e8f9f7 343 /**
<> 144:ef7eb2e8f9f7 344 * @}
<> 144:ef7eb2e8f9f7 345 */
<> 144:ef7eb2e8f9f7 346
<> 156:95d6b41a828b 347 /** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions
<> 144:ef7eb2e8f9f7 348 * @brief CEC Transmit/Receive functions
<> 144:ef7eb2e8f9f7 349 *
<> 144:ef7eb2e8f9f7 350 @verbatim
<> 144:ef7eb2e8f9f7 351 ===============================================================================
<> 156:95d6b41a828b 352 ##### IO operation functions #####
<> 144:ef7eb2e8f9f7 353 ===============================================================================
<> 144:ef7eb2e8f9f7 354 This subsection provides a set of functions allowing to manage the CEC data transfers.
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 (#) The CEC handle must contain the initiator (TX side) and the destination (RX side)
<> 156:95d6b41a828b 357 logical addresses (4-bit long addresses, 0x0F for broadcast messages destination)
<> 144:ef7eb2e8f9f7 358
<> 156:95d6b41a828b 359 (#) The communication is performed using Interrupts.
<> 144:ef7eb2e8f9f7 360 These API's return the HAL status.
<> 144:ef7eb2e8f9f7 361 The end of the data processing will be indicated through the
<> 144:ef7eb2e8f9f7 362 dedicated CEC IRQ when using Interrupt mode.
<> 144:ef7eb2e8f9f7 363 The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks
<> 144:ef7eb2e8f9f7 364 will be executed respectivelly at the end of the transmit or Receive process
<> 144:ef7eb2e8f9f7 365 The HAL_CEC_ErrorCallback()user callback will be executed when a communication
<> 144:ef7eb2e8f9f7 366 error is detected
<> 156:95d6b41a828b 367
<> 156:95d6b41a828b 368 (#) API's with Interrupt are :
<> 156:95d6b41a828b 369 (+) HAL_CEC_Transmit_IT()
<> 156:95d6b41a828b 370 (+) HAL_CEC_IRQHandler()
<> 144:ef7eb2e8f9f7 371
<> 156:95d6b41a828b 372 (#) A set of User Callbacks are provided:
<> 156:95d6b41a828b 373 (+) HAL_CEC_TxCpltCallback()
<> 156:95d6b41a828b 374 (+) HAL_CEC_RxCpltCallback()
<> 156:95d6b41a828b 375 (+) HAL_CEC_ErrorCallback()
<> 144:ef7eb2e8f9f7 376
<> 144:ef7eb2e8f9f7 377 @endverbatim
<> 144:ef7eb2e8f9f7 378 * @{
<> 144:ef7eb2e8f9f7 379 */
<> 144:ef7eb2e8f9f7 380
<> 144:ef7eb2e8f9f7 381 /**
<> 156:95d6b41a828b 382 * @brief Send data in interrupt mode
Anna Bridge 180:96ed750bd169 383 * @param hcec CEC handle
Anna Bridge 180:96ed750bd169 384 * @param InitiatorAddress Initiator address
Anna Bridge 180:96ed750bd169 385 * @param DestinationAddress destination logical address
Anna Bridge 180:96ed750bd169 386 * @param pData pointer to input byte data buffer
Anna Bridge 180:96ed750bd169 387 * @param Size amount of data to be sent in bytes (without counting the header).
<> 144:ef7eb2e8f9f7 388 * 0 means only the header is sent (ping operation).
<> 156:95d6b41a828b 389 * Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
<> 144:ef7eb2e8f9f7 390 * @retval HAL status
<> 156:95d6b41a828b 391 */
<> 156:95d6b41a828b 392 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size)
<> 144:ef7eb2e8f9f7 393 {
<> 156:95d6b41a828b 394 /* if the IP isn't already busy and if there is no previous transmission
<> 156:95d6b41a828b 395 already pending due to arbitration lost */
<> 156:95d6b41a828b 396 if (hcec->gState == HAL_CEC_STATE_READY)
<> 156:95d6b41a828b 397 {
<> 156:95d6b41a828b 398 if((pData == NULL ) && (Size > 0U))
<> 144:ef7eb2e8f9f7 399 {
<> 144:ef7eb2e8f9f7 400 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 401 }
<> 144:ef7eb2e8f9f7 402
<> 144:ef7eb2e8f9f7 403 assert_param(IS_CEC_ADDRESS(DestinationAddress));
<> 156:95d6b41a828b 404 assert_param(IS_CEC_ADDRESS(InitiatorAddress));
<> 144:ef7eb2e8f9f7 405 assert_param(IS_CEC_MSGSIZE(Size));
<> 144:ef7eb2e8f9f7 406
<> 144:ef7eb2e8f9f7 407 /* Process Locked */
<> 144:ef7eb2e8f9f7 408 __HAL_LOCK(hcec);
<> 144:ef7eb2e8f9f7 409 hcec->pTxBuffPtr = pData;
<> 156:95d6b41a828b 410 hcec->gState = HAL_CEC_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 411 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
<> 144:ef7eb2e8f9f7 412
<> 144:ef7eb2e8f9f7 413 /* initialize the number of bytes to send,
<> 144:ef7eb2e8f9f7 414 * 0 means only one header is sent (ping operation) */
<> 144:ef7eb2e8f9f7 415 hcec->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 416
<> 144:ef7eb2e8f9f7 417 /* in case of no payload (Size = 0), sender is only pinging the system;
<> 156:95d6b41a828b 418 Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */
<> 156:95d6b41a828b 419 if (Size == 0U)
<> 144:ef7eb2e8f9f7 420 {
<> 144:ef7eb2e8f9f7 421 __HAL_CEC_LAST_BYTE_TX_SET(hcec);
<> 144:ef7eb2e8f9f7 422 }
<> 156:95d6b41a828b 423
<> 144:ef7eb2e8f9f7 424 /* send header block */
<> 156:95d6b41a828b 425 hcec->Instance->TXDR = ((uint8_t)(InitiatorAddress << CEC_INITIATOR_LSB_POS) |(uint8_t) DestinationAddress);
<> 144:ef7eb2e8f9f7 426 /* Set TX Start of Message (TXSOM) bit */
<> 144:ef7eb2e8f9f7 427 __HAL_CEC_FIRST_BYTE_TX_SET(hcec);
<> 156:95d6b41a828b 428
<> 156:95d6b41a828b 429 /* Process Unlocked */
<> 156:95d6b41a828b 430 __HAL_UNLOCK(hcec);
<> 156:95d6b41a828b 431
<> 144:ef7eb2e8f9f7 432 return HAL_OK;
<> 144:ef7eb2e8f9f7 433
<> 144:ef7eb2e8f9f7 434 }
<> 144:ef7eb2e8f9f7 435 else
<> 144:ef7eb2e8f9f7 436 {
<> 156:95d6b41a828b 437 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 438 }
<> 144:ef7eb2e8f9f7 439 }
<> 144:ef7eb2e8f9f7 440
<> 144:ef7eb2e8f9f7 441 /**
<> 144:ef7eb2e8f9f7 442 * @brief Get size of the received frame.
Anna Bridge 180:96ed750bd169 443 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 444 * @retval Frame size
<> 144:ef7eb2e8f9f7 445 */
<> 156:95d6b41a828b 446 uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 447 {
<> 144:ef7eb2e8f9f7 448 return hcec->RxXferSize;
<> 144:ef7eb2e8f9f7 449 }
<> 156:95d6b41a828b 450
<> 156:95d6b41a828b 451 /**
<> 156:95d6b41a828b 452 * @brief Change Rx Buffer.
Anna Bridge 180:96ed750bd169 453 * @param hcec CEC handle
Anna Bridge 180:96ed750bd169 454 * @param Rxbuffer Rx Buffer
<> 156:95d6b41a828b 455 * @note This function can be called only inside the HAL_CEC_RxCpltCallback()
<> 156:95d6b41a828b 456 * @retval Frame size
<> 156:95d6b41a828b 457 */
<> 156:95d6b41a828b 458 void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer)
<> 156:95d6b41a828b 459 {
<> 156:95d6b41a828b 460 hcec->Init.RxBuffer = Rxbuffer;
<> 156:95d6b41a828b 461 }
<> 156:95d6b41a828b 462
<> 144:ef7eb2e8f9f7 463 /**
<> 144:ef7eb2e8f9f7 464 * @brief This function handles CEC interrupt requests.
Anna Bridge 180:96ed750bd169 465 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 466 * @retval None
<> 144:ef7eb2e8f9f7 467 */
<> 144:ef7eb2e8f9f7 468 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 469 {
<> 156:95d6b41a828b 470
<> 144:ef7eb2e8f9f7 471 /* save interrupts register for further error or interrupts handling purposes */
<> 156:95d6b41a828b 472 uint32_t reg = 0U;
<> 156:95d6b41a828b 473 reg = hcec->Instance->ISR;
<> 156:95d6b41a828b 474
<> 144:ef7eb2e8f9f7 475
<> 156:95d6b41a828b 476 /* ----------------------------Arbitration Lost Management----------------------------------*/
<> 156:95d6b41a828b 477 /* CEC TX arbitration error interrupt occurred --------------------------------------*/
<> 156:95d6b41a828b 478 if((reg & CEC_FLAG_ARBLST) != RESET)
<> 144:ef7eb2e8f9f7 479 {
<> 156:95d6b41a828b 480 hcec->ErrorCode = HAL_CEC_ERROR_ARBLST;
<> 144:ef7eb2e8f9f7 481 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST);
<> 144:ef7eb2e8f9f7 482 }
<> 144:ef7eb2e8f9f7 483
<> 156:95d6b41a828b 484 /* ----------------------------Rx Management----------------------------------*/
<> 156:95d6b41a828b 485 /* CEC RX byte received interrupt ---------------------------------------------------*/
<> 156:95d6b41a828b 486 if((reg & CEC_FLAG_RXBR) != RESET)
<> 144:ef7eb2e8f9f7 487 {
<> 156:95d6b41a828b 488 /* reception is starting */
<> 156:95d6b41a828b 489 hcec->RxState = HAL_CEC_STATE_BUSY_RX;
<> 156:95d6b41a828b 490 hcec->RxXferSize++;
<> 156:95d6b41a828b 491 /* read received byte */
<> 156:95d6b41a828b 492 *hcec->Init.RxBuffer++ = hcec->Instance->RXDR;
<> 156:95d6b41a828b 493 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR);
<> 144:ef7eb2e8f9f7 494 }
<> 144:ef7eb2e8f9f7 495
<> 144:ef7eb2e8f9f7 496 /* CEC RX end received interrupt ---------------------------------------------------*/
<> 156:95d6b41a828b 497 if((reg & CEC_FLAG_RXEND) != RESET)
<> 144:ef7eb2e8f9f7 498 {
<> 156:95d6b41a828b 499 /* clear IT */
<> 156:95d6b41a828b 500 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND);
<> 156:95d6b41a828b 501
<> 156:95d6b41a828b 502 /* Rx process is completed, restore hcec->RxState to Ready */
<> 156:95d6b41a828b 503 hcec->RxState = HAL_CEC_STATE_READY;
<> 156:95d6b41a828b 504 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
<> 156:95d6b41a828b 505 hcec->Init.RxBuffer -= hcec->RxXferSize;
<> 156:95d6b41a828b 506 HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize);
<> 156:95d6b41a828b 507 hcec->RxXferSize = 0U;
<> 144:ef7eb2e8f9f7 508 }
<> 144:ef7eb2e8f9f7 509
<> 156:95d6b41a828b 510 /* ----------------------------Tx Management----------------------------------*/
<> 144:ef7eb2e8f9f7 511 /* CEC TX byte request interrupt ------------------------------------------------*/
<> 156:95d6b41a828b 512 if((reg & CEC_FLAG_TXBR) != RESET)
<> 144:ef7eb2e8f9f7 513 {
<> 156:95d6b41a828b 514 if (hcec->TxXferCount == 0U)
<> 156:95d6b41a828b 515 {
<> 156:95d6b41a828b 516 /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */
<> 156:95d6b41a828b 517 __HAL_CEC_LAST_BYTE_TX_SET(hcec);
<> 156:95d6b41a828b 518 hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
<> 156:95d6b41a828b 519 }
<> 156:95d6b41a828b 520 else
<> 156:95d6b41a828b 521 {
<> 156:95d6b41a828b 522 hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
<> 156:95d6b41a828b 523 hcec->TxXferCount--;
<> 156:95d6b41a828b 524 }
<> 156:95d6b41a828b 525 /* clear Tx-Byte request flag */
<> 156:95d6b41a828b 526 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR);
<> 144:ef7eb2e8f9f7 527 }
<> 144:ef7eb2e8f9f7 528
<> 144:ef7eb2e8f9f7 529 /* CEC TX end interrupt ------------------------------------------------*/
<> 156:95d6b41a828b 530 if((reg & CEC_FLAG_TXEND) != RESET)
<> 156:95d6b41a828b 531 {
<> 156:95d6b41a828b 532 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND);
<> 156:95d6b41a828b 533
<> 156:95d6b41a828b 534 /* Tx process is ended, restore hcec->gState to Ready */
<> 156:95d6b41a828b 535 hcec->gState = HAL_CEC_STATE_READY;
<> 156:95d6b41a828b 536 /* Call the Process Unlocked before calling the Tx call back API to give the possibility to
<> 156:95d6b41a828b 537 start again the Transmission under the Tx call back API */
<> 156:95d6b41a828b 538 __HAL_UNLOCK(hcec);
<> 156:95d6b41a828b 539 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
<> 156:95d6b41a828b 540 HAL_CEC_TxCpltCallback(hcec);
<> 144:ef7eb2e8f9f7 541 }
<> 144:ef7eb2e8f9f7 542
<> 156:95d6b41a828b 543 /* ----------------------------Rx/Tx Error Management----------------------------------*/
<> 156:95d6b41a828b 544 if ((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0U)
<> 156:95d6b41a828b 545 {
<> 156:95d6b41a828b 546 hcec->ErrorCode = reg;
<> 156:95d6b41a828b 547 __HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR|HAL_CEC_ERROR_BRE|CEC_FLAG_LBPE|CEC_FLAG_SBPE|HAL_CEC_ERROR_RXACKE|HAL_CEC_ERROR_TXUDR|HAL_CEC_ERROR_TXERR|HAL_CEC_ERROR_TXACKE);
<> 156:95d6b41a828b 548
<> 156:95d6b41a828b 549
<> 156:95d6b41a828b 550 if((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE)) != RESET)
<> 156:95d6b41a828b 551 {
<> 156:95d6b41a828b 552 hcec->Init.RxBuffer-=hcec->RxXferSize;
<> 156:95d6b41a828b 553 hcec->RxXferSize = 0U;
<> 156:95d6b41a828b 554 hcec->RxState = HAL_CEC_STATE_READY;
<> 156:95d6b41a828b 555 }
<> 156:95d6b41a828b 556 else if (((reg & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != RESET) && ((reg & CEC_ISR_ARBLST) == RESET))
<> 156:95d6b41a828b 557 {
<> 156:95d6b41a828b 558 /* Set the CEC state ready to be able to start again the process */
<> 156:95d6b41a828b 559 hcec->gState = HAL_CEC_STATE_READY;
<> 156:95d6b41a828b 560 }
<> 156:95d6b41a828b 561
<> 156:95d6b41a828b 562 /* Error Call Back */
<> 156:95d6b41a828b 563 HAL_CEC_ErrorCallback(hcec);
<> 156:95d6b41a828b 564 }
<> 156:95d6b41a828b 565
<> 144:ef7eb2e8f9f7 566 }
<> 144:ef7eb2e8f9f7 567
<> 144:ef7eb2e8f9f7 568 /**
<> 144:ef7eb2e8f9f7 569 * @brief Tx Transfer completed callback
Anna Bridge 180:96ed750bd169 570 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 571 * @retval None
<> 144:ef7eb2e8f9f7 572 */
<> 144:ef7eb2e8f9f7 573 __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 574 {
<> 144:ef7eb2e8f9f7 575 /* Prevent unused argument(s) compilation warning */
<> 156:95d6b41a828b 576 UNUSED(hcec);
<> 144:ef7eb2e8f9f7 577 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 578 the HAL_CEC_TxCpltCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 579 */
<> 144:ef7eb2e8f9f7 580 }
<> 144:ef7eb2e8f9f7 581
<> 144:ef7eb2e8f9f7 582 /**
<> 144:ef7eb2e8f9f7 583 * @brief Rx Transfer completed callback
Anna Bridge 180:96ed750bd169 584 * @param hcec CEC handle
Anna Bridge 180:96ed750bd169 585 * @param RxFrameSize Size of frame
<> 144:ef7eb2e8f9f7 586 * @retval None
<> 144:ef7eb2e8f9f7 587 */
<> 156:95d6b41a828b 588 __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize)
<> 144:ef7eb2e8f9f7 589 {
<> 144:ef7eb2e8f9f7 590 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 591 UNUSED(hcec);
<> 156:95d6b41a828b 592 UNUSED(RxFrameSize);
<> 144:ef7eb2e8f9f7 593 /* NOTE : This function should not be modified, when the callback is needed,
<> 156:95d6b41a828b 594 the HAL_CEC_RxCpltCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 595 */
<> 144:ef7eb2e8f9f7 596 }
<> 144:ef7eb2e8f9f7 597
<> 144:ef7eb2e8f9f7 598 /**
<> 144:ef7eb2e8f9f7 599 * @brief CEC error callbacks
Anna Bridge 180:96ed750bd169 600 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 601 * @retval None
<> 144:ef7eb2e8f9f7 602 */
<> 144:ef7eb2e8f9f7 603 __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 604 {
<> 144:ef7eb2e8f9f7 605 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 606 UNUSED(hcec);
<> 144:ef7eb2e8f9f7 607 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 608 the HAL_CEC_ErrorCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 609 */
<> 144:ef7eb2e8f9f7 610 }
<> 144:ef7eb2e8f9f7 611 /**
<> 144:ef7eb2e8f9f7 612 * @}
<> 144:ef7eb2e8f9f7 613 */
<> 144:ef7eb2e8f9f7 614
<> 144:ef7eb2e8f9f7 615 /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function
<> 144:ef7eb2e8f9f7 616 * @brief CEC control functions
<> 144:ef7eb2e8f9f7 617 *
<> 144:ef7eb2e8f9f7 618 @verbatim
<> 144:ef7eb2e8f9f7 619 ===============================================================================
<> 144:ef7eb2e8f9f7 620 ##### Peripheral Control function #####
<> 144:ef7eb2e8f9f7 621 ===============================================================================
<> 144:ef7eb2e8f9f7 622 [..]
<> 144:ef7eb2e8f9f7 623 This subsection provides a set of functions allowing to control the CEC.
<> 144:ef7eb2e8f9f7 624 (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral.
<> 156:95d6b41a828b 625 (+) HAL_CEC_GetError() API can be helpful to check in run-time the error of the CEC peripheral.
<> 144:ef7eb2e8f9f7 626 @endverbatim
<> 144:ef7eb2e8f9f7 627 * @{
<> 144:ef7eb2e8f9f7 628 */
<> 144:ef7eb2e8f9f7 629 /**
<> 144:ef7eb2e8f9f7 630 * @brief return the CEC state
Anna Bridge 180:96ed750bd169 631 * @param hcec pointer to a CEC_HandleTypeDef structure that contains
<> 156:95d6b41a828b 632 * the configuration information for the specified CEC module.
<> 144:ef7eb2e8f9f7 633 * @retval HAL state
<> 144:ef7eb2e8f9f7 634 */
<> 144:ef7eb2e8f9f7 635 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 636 {
<> 156:95d6b41a828b 637 uint32_t temp1 = 0x00U, temp2 = 0x00U;
<> 156:95d6b41a828b 638 temp1 = hcec->gState;
<> 156:95d6b41a828b 639 temp2 = hcec->RxState;
<> 156:95d6b41a828b 640
<> 156:95d6b41a828b 641 return (HAL_CEC_StateTypeDef)(temp1 | temp2);
<> 144:ef7eb2e8f9f7 642 }
<> 144:ef7eb2e8f9f7 643
<> 144:ef7eb2e8f9f7 644 /**
<> 156:95d6b41a828b 645 * @brief Return the CEC error code
Anna Bridge 180:96ed750bd169 646 * @param hcec pointer to a CEC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 647 * the configuration information for the specified CEC.
<> 156:95d6b41a828b 648 * @retval CEC Error Code
<> 156:95d6b41a828b 649 */
<> 144:ef7eb2e8f9f7 650 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 651 {
<> 144:ef7eb2e8f9f7 652 return hcec->ErrorCode;
<> 144:ef7eb2e8f9f7 653 }
<> 144:ef7eb2e8f9f7 654
<> 144:ef7eb2e8f9f7 655 /**
<> 144:ef7eb2e8f9f7 656 * @}
<> 144:ef7eb2e8f9f7 657 */
<> 144:ef7eb2e8f9f7 658
<> 144:ef7eb2e8f9f7 659 /**
<> 144:ef7eb2e8f9f7 660 * @}
<> 144:ef7eb2e8f9f7 661 */
<> 144:ef7eb2e8f9f7 662
<> 144:ef7eb2e8f9f7 663 /**
<> 144:ef7eb2e8f9f7 664 * @}
<> 144:ef7eb2e8f9f7 665 */
<> 144:ef7eb2e8f9f7 666
<> 144:ef7eb2e8f9f7 667 /**
<> 144:ef7eb2e8f9f7 668 * @}
Anna Bridge 180:96ed750bd169 669 */
Anna Bridge 180:96ed750bd169 670 #endif /* defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F051x8) || defined(STM32F058xx) || */
Anna Bridge 180:96ed750bd169 671 /* defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || */
Anna Bridge 180:96ed750bd169 672 /* defined(STM32F091xC) || defined (STM32F098xx) */
Anna Bridge 180:96ed750bd169 673
Anna Bridge 180:96ed750bd169 674 #endif /* HAL_CEC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 675
<> 144:ef7eb2e8f9f7 676 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/